2013-02-02 20:47:37 +00:00
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From 0d297b79dc199a7670c867e035d20a1f1b4a02e0 Mon Sep 17 00:00:00 2001
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2012-09-07 15:20:05 +00:00
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From: Gerd Hoffmann <kraxel@redhat.com>
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Date: Thu, 30 Aug 2012 15:49:03 +0200
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2012-10-28 18:05:07 +00:00
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Subject: [PATCH] xhci: add XHCIInterrupter
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2012-09-07 15:20:05 +00:00
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Move all state belonging to the (single) interrupter into a separate
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struct. First step in adding support for multiple interrupters.
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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---
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hw/usb/hcd-xhci.c | 307 ++++++++++++++++++++++++++++--------------------------
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trace-events | 2 +-
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2 files changed, 161 insertions(+), 148 deletions(-)
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diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
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2012-12-16 23:27:22 +00:00
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index ae5620f..76da7a9 100644
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2012-09-07 15:20:05 +00:00
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--- a/hw/usb/hcd-xhci.c
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+++ b/hw/usb/hcd-xhci.c
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@@ -378,6 +378,27 @@ typedef struct XHCIEvent {
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uint8_t epid;
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} XHCIEvent;
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+typedef struct XHCIInterrupter {
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+ uint32_t iman;
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+ uint32_t imod;
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+ uint32_t erstsz;
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+ uint32_t erstba_low;
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+ uint32_t erstba_high;
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+ uint32_t erdp_low;
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+ uint32_t erdp_high;
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+
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+ bool msix_used, er_pcs, er_full;
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+
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+ dma_addr_t er_start;
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+ uint32_t er_size;
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+ unsigned int er_ep_idx;
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+
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+ XHCIEvent ev_buffer[EV_QUEUE];
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+ unsigned int ev_buffer_put;
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+ unsigned int ev_buffer_get;
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+
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+} XHCIInterrupter;
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+
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struct XHCIState {
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PCIDevice pci_dev;
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USBBus bus;
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@@ -407,27 +428,9 @@ struct XHCIState {
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uint32_t numports;
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/* Runtime Registers */
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- uint32_t iman;
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- uint32_t imod;
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- uint32_t erstsz;
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- uint32_t erstba_low;
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- uint32_t erstba_high;
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- uint32_t erdp_low;
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- uint32_t erdp_high;
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- bool msix_used;
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-
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int64_t mfindex_start;
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QEMUTimer *mfwrap_timer;
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-
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- dma_addr_t er_start;
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- uint32_t er_size;
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- bool er_pcs;
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- unsigned int er_ep_idx;
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- bool er_full;
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-
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- XHCIEvent ev_buffer[EV_QUEUE];
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- unsigned int ev_buffer_put;
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- unsigned int ev_buffer_get;
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+ XHCIInterrupter intr[MAXINTRS];
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XHCIRing cmd_ring;
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};
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@@ -446,8 +449,8 @@ enum xhci_flags {
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static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
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unsigned int epid);
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-static void xhci_event(XHCIState *xhci, XHCIEvent *event);
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-static void xhci_write_event(XHCIState *xhci, XHCIEvent *event);
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+static void xhci_event(XHCIState *xhci, XHCIEvent *event, int v);
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+static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v);
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static const char *TRBType_names[] = {
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[TRB_RESERVED] = "TRB_RESERVED",
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@@ -573,7 +576,7 @@ static void xhci_mfwrap_timer(void *opaque)
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XHCIState *xhci = opaque;
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XHCIEvent wrap = { ER_MFINDEX_WRAP, CC_SUCCESS };
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- xhci_event(xhci, &wrap);
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+ xhci_event(xhci, &wrap, 0);
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xhci_mfwrap_update(xhci);
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}
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@@ -626,8 +629,8 @@ static void xhci_intx_update(XHCIState *xhci)
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return;
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}
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- if (xhci->iman & IMAN_IP &&
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- xhci->iman & IMAN_IE &&
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+ if (xhci->intr[0].iman & IMAN_IP &&
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+ xhci->intr[0].iman & IMAN_IE &&
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xhci->usbcmd & USBCMD_INTE) {
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level = 1;
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}
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@@ -636,7 +639,7 @@ static void xhci_intx_update(XHCIState *xhci)
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qemu_set_irq(xhci->irq, level);
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}
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-static void xhci_msix_update(XHCIState *xhci)
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+static void xhci_msix_update(XHCIState *xhci, int v)
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{
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bool enabled;
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@@ -644,29 +647,29 @@ static void xhci_msix_update(XHCIState *xhci)
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return;
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}
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- enabled = xhci->iman & IMAN_IE;
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- if (enabled == xhci->msix_used) {
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+ enabled = xhci->intr[v].iman & IMAN_IE;
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+ if (enabled == xhci->intr[v].msix_used) {
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return;
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}
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if (enabled) {
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- trace_usb_xhci_irq_msix_use(0);
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- msix_vector_use(&xhci->pci_dev, 0);
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- xhci->msix_used = true;
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+ trace_usb_xhci_irq_msix_use(v);
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+ msix_vector_use(&xhci->pci_dev, v);
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+ xhci->intr[v].msix_used = true;
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} else {
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- trace_usb_xhci_irq_msix_unuse(0);
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- msix_vector_unuse(&xhci->pci_dev, 0);
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- xhci->msix_used = false;
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+ trace_usb_xhci_irq_msix_unuse(v);
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+ msix_vector_unuse(&xhci->pci_dev, v);
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+ xhci->intr[v].msix_used = false;
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}
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}
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-static void xhci_intr_raise(XHCIState *xhci)
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+static void xhci_intr_raise(XHCIState *xhci, int v)
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{
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- xhci->erdp_low |= ERDP_EHB;
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- xhci->iman |= IMAN_IP;
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+ xhci->intr[v].erdp_low |= ERDP_EHB;
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+ xhci->intr[v].iman |= IMAN_IP;
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xhci->usbsts |= USBSTS_EINT;
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- if (!(xhci->iman & IMAN_IE)) {
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+ if (!(xhci->intr[v].iman & IMAN_IE)) {
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return;
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}
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@@ -675,24 +678,26 @@ static void xhci_intr_raise(XHCIState *xhci)
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}
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if (msix_enabled(&xhci->pci_dev)) {
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- trace_usb_xhci_irq_msix(0);
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- msix_notify(&xhci->pci_dev, 0);
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+ trace_usb_xhci_irq_msix(v);
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+ msix_notify(&xhci->pci_dev, v);
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return;
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}
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if (msi_enabled(&xhci->pci_dev)) {
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- trace_usb_xhci_irq_msi(0);
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- msi_notify(&xhci->pci_dev, 0);
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+ trace_usb_xhci_irq_msi(v);
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+ msi_notify(&xhci->pci_dev, v);
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return;
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}
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- trace_usb_xhci_irq_intx(1);
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- qemu_set_irq(xhci->irq, 1);
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+ if (v == 0) {
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+ trace_usb_xhci_irq_intx(1);
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+ qemu_set_irq(xhci->irq, 1);
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+ }
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}
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static inline int xhci_running(XHCIState *xhci)
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{
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- return !(xhci->usbsts & USBSTS_HCH) && !xhci->er_full;
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+ return !(xhci->usbsts & USBSTS_HCH) && !xhci->intr[0].er_full;
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}
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static void xhci_die(XHCIState *xhci)
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@@ -701,8 +706,9 @@ static void xhci_die(XHCIState *xhci)
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fprintf(stderr, "xhci: asserted controller error\n");
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}
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-static void xhci_write_event(XHCIState *xhci, XHCIEvent *event)
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+static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v)
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{
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+ XHCIInterrupter *intr = &xhci->intr[v];
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XHCITRB ev_trb;
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dma_addr_t addr;
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@@ -710,27 +716,28 @@ static void xhci_write_event(XHCIState *xhci, XHCIEvent *event)
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ev_trb.status = cpu_to_le32(event->length | (event->ccode << 24));
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ev_trb.control = (event->slotid << 24) | (event->epid << 16) |
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event->flags | (event->type << TRB_TYPE_SHIFT);
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- if (xhci->er_pcs) {
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+ if (intr->er_pcs) {
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ev_trb.control |= TRB_C;
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}
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ev_trb.control = cpu_to_le32(ev_trb.control);
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- trace_usb_xhci_queue_event(xhci->er_ep_idx, trb_name(&ev_trb),
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+ trace_usb_xhci_queue_event(v, intr->er_ep_idx, trb_name(&ev_trb),
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event_name(event), ev_trb.parameter,
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ev_trb.status, ev_trb.control);
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- addr = xhci->er_start + TRB_SIZE*xhci->er_ep_idx;
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+ addr = intr->er_start + TRB_SIZE*intr->er_ep_idx;
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pci_dma_write(&xhci->pci_dev, addr, &ev_trb, TRB_SIZE);
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- xhci->er_ep_idx++;
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- if (xhci->er_ep_idx >= xhci->er_size) {
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- xhci->er_ep_idx = 0;
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- xhci->er_pcs = !xhci->er_pcs;
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+ intr->er_ep_idx++;
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+ if (intr->er_ep_idx >= intr->er_size) {
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+ intr->er_ep_idx = 0;
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+ intr->er_pcs = !intr->er_pcs;
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}
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}
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-static void xhci_events_update(XHCIState *xhci)
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+static void xhci_events_update(XHCIState *xhci, int v)
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{
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+ XHCIInterrupter *intr = &xhci->intr[v];
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dma_addr_t erdp;
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unsigned int dp_idx;
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bool do_irq = 0;
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@@ -739,115 +746,116 @@ static void xhci_events_update(XHCIState *xhci)
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return;
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}
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- erdp = xhci_addr64(xhci->erdp_low, xhci->erdp_high);
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- if (erdp < xhci->er_start ||
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- erdp >= (xhci->er_start + TRB_SIZE*xhci->er_size)) {
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+ erdp = xhci_addr64(intr->erdp_low, intr->erdp_high);
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+ if (erdp < intr->er_start ||
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+ erdp >= (intr->er_start + TRB_SIZE*intr->er_size)) {
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fprintf(stderr, "xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp);
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- fprintf(stderr, "xhci: ER at "DMA_ADDR_FMT" len %d\n",
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- xhci->er_start, xhci->er_size);
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+ fprintf(stderr, "xhci: ER[%d] at "DMA_ADDR_FMT" len %d\n",
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+ v, intr->er_start, intr->er_size);
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xhci_die(xhci);
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return;
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}
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- dp_idx = (erdp - xhci->er_start) / TRB_SIZE;
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- assert(dp_idx < xhci->er_size);
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+ dp_idx = (erdp - intr->er_start) / TRB_SIZE;
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+ assert(dp_idx < intr->er_size);
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/* NEC didn't read section 4.9.4 of the spec (v1.0 p139 top Note) and thus
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* deadlocks when the ER is full. Hack it by holding off events until
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* the driver decides to free at least half of the ring */
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- if (xhci->er_full) {
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- int er_free = dp_idx - xhci->er_ep_idx;
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+ if (intr->er_full) {
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+ int er_free = dp_idx - intr->er_ep_idx;
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if (er_free <= 0) {
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- er_free += xhci->er_size;
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+ er_free += intr->er_size;
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}
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- if (er_free < (xhci->er_size/2)) {
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+ if (er_free < (intr->er_size/2)) {
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DPRINTF("xhci_events_update(): event ring still "
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"more than half full (hack)\n");
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return;
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}
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}
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- while (xhci->ev_buffer_put != xhci->ev_buffer_get) {
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- assert(xhci->er_full);
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- if (((xhci->er_ep_idx+1) % xhci->er_size) == dp_idx) {
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+ while (intr->ev_buffer_put != intr->ev_buffer_get) {
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+ assert(intr->er_full);
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+ if (((intr->er_ep_idx+1) % intr->er_size) == dp_idx) {
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DPRINTF("xhci_events_update(): event ring full again\n");
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#ifndef ER_FULL_HACK
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XHCIEvent full = {ER_HOST_CONTROLLER, CC_EVENT_RING_FULL_ERROR};
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- xhci_write_event(xhci, &full);
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+ xhci_write_event(xhci, &full, v);
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#endif
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do_irq = 1;
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break;
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}
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- XHCIEvent *event = &xhci->ev_buffer[xhci->ev_buffer_get];
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- xhci_write_event(xhci, event);
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- xhci->ev_buffer_get++;
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+ XHCIEvent *event = &intr->ev_buffer[intr->ev_buffer_get];
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+ xhci_write_event(xhci, event, v);
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+ intr->ev_buffer_get++;
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do_irq = 1;
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- if (xhci->ev_buffer_get == EV_QUEUE) {
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- xhci->ev_buffer_get = 0;
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+ if (intr->ev_buffer_get == EV_QUEUE) {
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+ intr->ev_buffer_get = 0;
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}
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}
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if (do_irq) {
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- xhci_intr_raise(xhci);
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+ xhci_intr_raise(xhci, v);
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}
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- if (xhci->er_full && xhci->ev_buffer_put == xhci->ev_buffer_get) {
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|
+ if (intr->er_full && intr->ev_buffer_put == intr->ev_buffer_get) {
|
|
|
|
DPRINTF("xhci_events_update(): event ring no longer full\n");
|
|
|
|
- xhci->er_full = 0;
|
|
|
|
+ intr->er_full = 0;
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
-static void xhci_event(XHCIState *xhci, XHCIEvent *event)
|
|
|
|
+static void xhci_event(XHCIState *xhci, XHCIEvent *event, int v)
|
|
|
|
{
|
|
|
|
+ XHCIInterrupter *intr = &xhci->intr[v];
|
|
|
|
dma_addr_t erdp;
|
|
|
|
unsigned int dp_idx;
|
|
|
|
|
|
|
|
- if (xhci->er_full) {
|
|
|
|
+ if (intr->er_full) {
|
|
|
|
DPRINTF("xhci_event(): ER full, queueing\n");
|
|
|
|
- if (((xhci->ev_buffer_put+1) % EV_QUEUE) == xhci->ev_buffer_get) {
|
|
|
|
+ if (((intr->ev_buffer_put+1) % EV_QUEUE) == intr->ev_buffer_get) {
|
|
|
|
fprintf(stderr, "xhci: event queue full, dropping event!\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
- xhci->ev_buffer[xhci->ev_buffer_put++] = *event;
|
|
|
|
- if (xhci->ev_buffer_put == EV_QUEUE) {
|
|
|
|
- xhci->ev_buffer_put = 0;
|
|
|
|
+ intr->ev_buffer[intr->ev_buffer_put++] = *event;
|
|
|
|
+ if (intr->ev_buffer_put == EV_QUEUE) {
|
|
|
|
+ intr->ev_buffer_put = 0;
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
- erdp = xhci_addr64(xhci->erdp_low, xhci->erdp_high);
|
|
|
|
- if (erdp < xhci->er_start ||
|
|
|
|
- erdp >= (xhci->er_start + TRB_SIZE*xhci->er_size)) {
|
|
|
|
+ erdp = xhci_addr64(intr->erdp_low, intr->erdp_high);
|
|
|
|
+ if (erdp < intr->er_start ||
|
|
|
|
+ erdp >= (intr->er_start + TRB_SIZE*intr->er_size)) {
|
|
|
|
fprintf(stderr, "xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp);
|
|
|
|
- fprintf(stderr, "xhci: ER at "DMA_ADDR_FMT" len %d\n",
|
|
|
|
- xhci->er_start, xhci->er_size);
|
|
|
|
+ fprintf(stderr, "xhci: ER[%d] at "DMA_ADDR_FMT" len %d\n",
|
|
|
|
+ v, intr->er_start, intr->er_size);
|
|
|
|
xhci_die(xhci);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
- dp_idx = (erdp - xhci->er_start) / TRB_SIZE;
|
|
|
|
- assert(dp_idx < xhci->er_size);
|
|
|
|
+ dp_idx = (erdp - intr->er_start) / TRB_SIZE;
|
|
|
|
+ assert(dp_idx < intr->er_size);
|
|
|
|
|
|
|
|
- if ((xhci->er_ep_idx+1) % xhci->er_size == dp_idx) {
|
|
|
|
+ if ((intr->er_ep_idx+1) % intr->er_size == dp_idx) {
|
|
|
|
DPRINTF("xhci_event(): ER full, queueing\n");
|
|
|
|
#ifndef ER_FULL_HACK
|
|
|
|
XHCIEvent full = {ER_HOST_CONTROLLER, CC_EVENT_RING_FULL_ERROR};
|
|
|
|
xhci_write_event(xhci, &full);
|
|
|
|
#endif
|
|
|
|
- xhci->er_full = 1;
|
|
|
|
- if (((xhci->ev_buffer_put+1) % EV_QUEUE) == xhci->ev_buffer_get) {
|
|
|
|
+ intr->er_full = 1;
|
|
|
|
+ if (((intr->ev_buffer_put+1) % EV_QUEUE) == intr->ev_buffer_get) {
|
|
|
|
fprintf(stderr, "xhci: event queue full, dropping event!\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
- xhci->ev_buffer[xhci->ev_buffer_put++] = *event;
|
|
|
|
- if (xhci->ev_buffer_put == EV_QUEUE) {
|
|
|
|
- xhci->ev_buffer_put = 0;
|
|
|
|
+ intr->ev_buffer[intr->ev_buffer_put++] = *event;
|
|
|
|
+ if (intr->ev_buffer_put == EV_QUEUE) {
|
|
|
|
+ intr->ev_buffer_put = 0;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
- xhci_write_event(xhci, event);
|
|
|
|
+ xhci_write_event(xhci, event, v);
|
|
|
|
}
|
|
|
|
|
|
|
|
- xhci_intr_raise(xhci);
|
|
|
|
+ xhci_intr_raise(xhci, v);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void xhci_ring_init(XHCIState *xhci, XHCIRing *ring,
|
|
|
|
@@ -939,17 +947,18 @@ static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring)
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
-static void xhci_er_reset(XHCIState *xhci)
|
|
|
|
+static void xhci_er_reset(XHCIState *xhci, int v)
|
|
|
|
{
|
|
|
|
+ XHCIInterrupter *intr = &xhci->intr[v];
|
|
|
|
XHCIEvRingSeg seg;
|
|
|
|
|
|
|
|
/* cache the (sole) event ring segment location */
|
|
|
|
- if (xhci->erstsz != 1) {
|
|
|
|
- fprintf(stderr, "xhci: invalid value for ERSTSZ: %d\n", xhci->erstsz);
|
|
|
|
+ if (intr->erstsz != 1) {
|
|
|
|
+ fprintf(stderr, "xhci: invalid value for ERSTSZ: %d\n", intr->erstsz);
|
|
|
|
xhci_die(xhci);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
- dma_addr_t erstba = xhci_addr64(xhci->erstba_low, xhci->erstba_high);
|
|
|
|
+ dma_addr_t erstba = xhci_addr64(intr->erstba_low, intr->erstba_high);
|
|
|
|
pci_dma_read(&xhci->pci_dev, erstba, &seg, sizeof(seg));
|
|
|
|
le32_to_cpus(&seg.addr_low);
|
|
|
|
le32_to_cpus(&seg.addr_high);
|
|
|
|
@@ -959,15 +968,15 @@ static void xhci_er_reset(XHCIState *xhci)
|
|
|
|
xhci_die(xhci);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
- xhci->er_start = xhci_addr64(seg.addr_low, seg.addr_high);
|
|
|
|
- xhci->er_size = seg.size;
|
|
|
|
+ intr->er_start = xhci_addr64(seg.addr_low, seg.addr_high);
|
|
|
|
+ intr->er_size = seg.size;
|
|
|
|
|
|
|
|
- xhci->er_ep_idx = 0;
|
|
|
|
- xhci->er_pcs = 1;
|
|
|
|
- xhci->er_full = 0;
|
|
|
|
+ intr->er_ep_idx = 0;
|
|
|
|
+ intr->er_pcs = 1;
|
|
|
|
+ intr->er_full = 0;
|
|
|
|
|
|
|
|
- DPRINTF("xhci: event ring:" DMA_ADDR_FMT " [%d]\n",
|
|
|
|
- xhci->er_start, xhci->er_size);
|
|
|
|
+ DPRINTF("xhci: event ring[%d]:" DMA_ADDR_FMT " [%d]\n",
|
|
|
|
+ v, intr->er_start, intr->er_size);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void xhci_run(XHCIState *xhci)
|
|
|
|
@@ -1368,7 +1377,7 @@ static void xhci_xfer_report(XHCITransfer *xfer)
|
|
|
|
DPRINTF("xhci_xfer_data: EDTLA=%d\n", event.length);
|
|
|
|
edtla = 0;
|
|
|
|
}
|
|
|
|
- xhci_event(xhci, &event);
|
|
|
|
+ xhci_event(xhci, &event, 0 /* FIXME */);
|
|
|
|
reported = 1;
|
|
|
|
if (xfer->status != CC_SUCCESS) {
|
|
|
|
return;
|
2012-10-28 18:05:07 +00:00
|
|
|
@@ -2244,7 +2253,7 @@ static void xhci_process_commands(XHCIState *xhci)
|
2012-09-07 15:20:05 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
event.slotid = slotid;
|
|
|
|
- xhci_event(xhci, &event);
|
|
|
|
+ xhci_event(xhci, &event, 0 /* FIXME */);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-10-28 18:05:07 +00:00
|
|
|
@@ -2274,7 +2283,7 @@ static void xhci_update_port(XHCIState *xhci, XHCIPort *port, int is_detach)
|
2012-09-07 15:20:05 +00:00
|
|
|
port->portsc |= PORTSC_CSC;
|
|
|
|
XHCIEvent ev = { ER_PORT_STATUS_CHANGE, CC_SUCCESS,
|
|
|
|
port->portnr << 24};
|
|
|
|
- xhci_event(xhci, &ev);
|
|
|
|
+ xhci_event(xhci, &ev, 0 /* FIXME */);
|
|
|
|
DPRINTF("xhci: port change event for port %d\n", port->portnr);
|
|
|
|
}
|
|
|
|
}
|
2012-10-28 18:05:07 +00:00
|
|
|
@@ -2307,20 +2316,22 @@ static void xhci_reset(DeviceState *dev)
|
2012-09-07 15:20:05 +00:00
|
|
|
xhci_update_port(xhci, xhci->ports + i, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
- xhci->iman = 0;
|
|
|
|
- xhci->imod = 0;
|
|
|
|
- xhci->erstsz = 0;
|
|
|
|
- xhci->erstba_low = 0;
|
|
|
|
- xhci->erstba_high = 0;
|
|
|
|
- xhci->erdp_low = 0;
|
|
|
|
- xhci->erdp_high = 0;
|
|
|
|
- xhci->msix_used = 0;
|
|
|
|
+ for (i = 0; i < MAXINTRS; i++) {
|
|
|
|
+ xhci->intr[i].iman = 0;
|
|
|
|
+ xhci->intr[i].imod = 0;
|
|
|
|
+ xhci->intr[i].erstsz = 0;
|
|
|
|
+ xhci->intr[i].erstba_low = 0;
|
|
|
|
+ xhci->intr[i].erstba_high = 0;
|
|
|
|
+ xhci->intr[i].erdp_low = 0;
|
|
|
|
+ xhci->intr[i].erdp_high = 0;
|
|
|
|
+ xhci->intr[i].msix_used = 0;
|
|
|
|
|
|
|
|
- xhci->er_ep_idx = 0;
|
|
|
|
- xhci->er_pcs = 1;
|
|
|
|
- xhci->er_full = 0;
|
|
|
|
- xhci->ev_buffer_put = 0;
|
|
|
|
- xhci->ev_buffer_get = 0;
|
|
|
|
+ xhci->intr[i].er_ep_idx = 0;
|
|
|
|
+ xhci->intr[i].er_pcs = 1;
|
|
|
|
+ xhci->intr[i].er_full = 0;
|
|
|
|
+ xhci->intr[i].ev_buffer_put = 0;
|
|
|
|
+ xhci->intr[i].ev_buffer_get = 0;
|
|
|
|
+ }
|
|
|
|
|
|
|
|
xhci->mfindex_start = qemu_get_clock_ns(vm_clock);
|
|
|
|
xhci_mfwrap_update(xhci);
|
2012-10-28 18:05:07 +00:00
|
|
|
@@ -2551,7 +2562,7 @@ static void xhci_oper_write(XHCIState *xhci, uint32_t reg, uint32_t val)
|
2012-09-07 15:20:05 +00:00
|
|
|
if (xhci->crcr_low & (CRCR_CA|CRCR_CS) && (xhci->crcr_low & CRCR_CRR)) {
|
|
|
|
XHCIEvent event = {ER_COMMAND_COMPLETE, CC_COMMAND_RING_STOPPED};
|
|
|
|
xhci->crcr_low &= ~CRCR_CRR;
|
|
|
|
- xhci_event(xhci, &event);
|
|
|
|
+ xhci_event(xhci, &event, 0 /* FIXME */);
|
|
|
|
DPRINTF("xhci: command ring stopped (CRCR=%08x)\n", xhci->crcr_low);
|
|
|
|
} else {
|
|
|
|
dma_addr_t base = xhci_addr64(xhci->crcr_low & ~0x3f, val);
|
2012-10-28 18:05:07 +00:00
|
|
|
@@ -2575,6 +2586,7 @@ static void xhci_oper_write(XHCIState *xhci, uint32_t reg, uint32_t val)
|
2012-09-07 15:20:05 +00:00
|
|
|
|
|
|
|
static uint32_t xhci_runtime_read(XHCIState *xhci, uint32_t reg)
|
|
|
|
{
|
|
|
|
+ XHCIInterrupter *intr = &xhci->intr[0];
|
|
|
|
uint32_t ret;
|
|
|
|
|
|
|
|
switch (reg) {
|
2012-10-28 18:05:07 +00:00
|
|
|
@@ -2582,25 +2594,25 @@ static uint32_t xhci_runtime_read(XHCIState *xhci, uint32_t reg)
|
2012-09-07 15:20:05 +00:00
|
|
|
ret = xhci_mfindex_get(xhci) & 0x3fff;
|
|
|
|
break;
|
|
|
|
case 0x20: /* IMAN */
|
|
|
|
- ret = xhci->iman;
|
|
|
|
+ ret = intr->iman;
|
|
|
|
break;
|
|
|
|
case 0x24: /* IMOD */
|
|
|
|
- ret = xhci->imod;
|
|
|
|
+ ret = intr->imod;
|
|
|
|
break;
|
|
|
|
case 0x28: /* ERSTSZ */
|
|
|
|
- ret = xhci->erstsz;
|
|
|
|
+ ret = intr->erstsz;
|
|
|
|
break;
|
|
|
|
case 0x30: /* ERSTBA low */
|
|
|
|
- ret = xhci->erstba_low;
|
|
|
|
+ ret = intr->erstba_low;
|
|
|
|
break;
|
|
|
|
case 0x34: /* ERSTBA high */
|
|
|
|
- ret = xhci->erstba_high;
|
|
|
|
+ ret = intr->erstba_high;
|
|
|
|
break;
|
|
|
|
case 0x38: /* ERDP low */
|
|
|
|
- ret = xhci->erdp_low;
|
|
|
|
+ ret = intr->erdp_low;
|
|
|
|
break;
|
|
|
|
case 0x3c: /* ERDP high */
|
|
|
|
- ret = xhci->erdp_high;
|
|
|
|
+ ret = intr->erdp_high;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
fprintf(stderr, "xhci_runtime_read: reg 0x%x unimplemented\n", reg);
|
2012-10-28 18:05:07 +00:00
|
|
|
@@ -2613,42 +2625,43 @@ static uint32_t xhci_runtime_read(XHCIState *xhci, uint32_t reg)
|
2012-09-07 15:20:05 +00:00
|
|
|
|
|
|
|
static void xhci_runtime_write(XHCIState *xhci, uint32_t reg, uint32_t val)
|
|
|
|
{
|
|
|
|
+ XHCIInterrupter *intr = &xhci->intr[0];
|
|
|
|
trace_usb_xhci_runtime_write(reg, val);
|
|
|
|
|
|
|
|
switch (reg) {
|
|
|
|
case 0x20: /* IMAN */
|
|
|
|
if (val & IMAN_IP) {
|
|
|
|
- xhci->iman &= ~IMAN_IP;
|
|
|
|
+ intr->iman &= ~IMAN_IP;
|
|
|
|
}
|
|
|
|
- xhci->iman &= ~IMAN_IE;
|
|
|
|
- xhci->iman |= val & IMAN_IE;
|
|
|
|
+ intr->iman &= ~IMAN_IE;
|
|
|
|
+ intr->iman |= val & IMAN_IE;
|
|
|
|
xhci_intx_update(xhci);
|
|
|
|
- xhci_msix_update(xhci);
|
|
|
|
+ xhci_msix_update(xhci, 0);
|
|
|
|
break;
|
|
|
|
case 0x24: /* IMOD */
|
|
|
|
- xhci->imod = val;
|
|
|
|
+ intr->imod = val;
|
|
|
|
break;
|
|
|
|
case 0x28: /* ERSTSZ */
|
|
|
|
- xhci->erstsz = val & 0xffff;
|
|
|
|
+ intr->erstsz = val & 0xffff;
|
|
|
|
break;
|
|
|
|
case 0x30: /* ERSTBA low */
|
|
|
|
/* XXX NEC driver bug: it doesn't align this to 64 bytes
|
|
|
|
- xhci->erstba_low = val & 0xffffffc0; */
|
|
|
|
- xhci->erstba_low = val & 0xfffffff0;
|
|
|
|
+ intr->erstba_low = val & 0xffffffc0; */
|
|
|
|
+ intr->erstba_low = val & 0xfffffff0;
|
|
|
|
break;
|
|
|
|
case 0x34: /* ERSTBA high */
|
|
|
|
- xhci->erstba_high = val;
|
|
|
|
- xhci_er_reset(xhci);
|
|
|
|
+ intr->erstba_high = val;
|
|
|
|
+ xhci_er_reset(xhci, 0);
|
|
|
|
break;
|
|
|
|
case 0x38: /* ERDP low */
|
|
|
|
if (val & ERDP_EHB) {
|
|
|
|
- xhci->erdp_low &= ~ERDP_EHB;
|
|
|
|
+ intr->erdp_low &= ~ERDP_EHB;
|
|
|
|
}
|
|
|
|
- xhci->erdp_low = (val & ~ERDP_EHB) | (xhci->erdp_low & ERDP_EHB);
|
|
|
|
+ intr->erdp_low = (val & ~ERDP_EHB) | (intr->erdp_low & ERDP_EHB);
|
|
|
|
break;
|
|
|
|
case 0x3c: /* ERDP high */
|
|
|
|
- xhci->erdp_high = val;
|
|
|
|
- xhci_events_update(xhci);
|
|
|
|
+ intr->erdp_high = val;
|
|
|
|
+ xhci_events_update(xhci, 0);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
fprintf(stderr, "xhci_oper_write: reg 0x%x unimplemented\n", reg);
|
|
|
|
@@ -2780,7 +2793,7 @@ static void xhci_wakeup(USBPort *usbport)
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
port->portsc |= PORTSC_PLC;
|
|
|
|
- xhci_event(xhci, &ev);
|
|
|
|
+ xhci_event(xhci, &ev, 0 /* FIXME */);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void xhci_complete(USBPort *port, USBPacket *packet)
|
|
|
|
diff --git a/trace-events b/trace-events
|
2013-02-02 20:47:37 +00:00
|
|
|
index 93b05ab..9d39d8d 100644
|
2012-09-07 15:20:05 +00:00
|
|
|
--- a/trace-events
|
|
|
|
+++ b/trace-events
|
2012-10-28 18:05:07 +00:00
|
|
|
@@ -319,7 +319,7 @@ usb_xhci_irq_msi(uint32_t nr) "nr %d"
|
2012-09-07 15:20:05 +00:00
|
|
|
usb_xhci_irq_msix(uint32_t nr) "nr %d"
|
|
|
|
usb_xhci_irq_msix_use(uint32_t nr) "nr %d"
|
|
|
|
usb_xhci_irq_msix_unuse(uint32_t nr) "nr %d"
|
|
|
|
-usb_xhci_queue_event(uint32_t idx, const char *trb, const char *evt, uint64_t param, uint32_t status, uint32_t control) "idx %d, %s, %s, p %016" PRIx64 ", s %08x, c 0x%08x"
|
|
|
|
+usb_xhci_queue_event(uint32_t vector, uint32_t idx, const char *trb, const char *evt, uint64_t param, uint32_t status, uint32_t control) "v %d, idx %d, %s, %s, p %016" PRIx64 ", s %08x, c 0x%08x"
|
|
|
|
usb_xhci_fetch_trb(uint64_t addr, const char *name, uint64_t param, uint32_t status, uint32_t control) "addr %016" PRIx64 ", %s, p %016" PRIx64 ", s %08x, c 0x%08x"
|
|
|
|
usb_xhci_slot_enable(uint32_t slotid) "slotid %d"
|
|
|
|
usb_xhci_slot_disable(uint32_t slotid) "slotid %d"
|