50 lines
1.3 KiB
Diff
50 lines
1.3 KiB
Diff
|
From 1a51e9b66a61238e56668d647a74a6ceeeeaa727 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Aurelien Jarno <aurelien@aurel32.net>
|
||
|
|
Date: Tue, 9 Oct 2012 21:53:12 +0200
|
||
|
|
Subject: [PATCH] target-openrisc: remove conflicting definitions from cpu.h
|
||
|
|
|
||
|
|
On an ARM host, the registers definitions from cpu.h clash
|
||
|
|
with /usr/include/sys/ucontext.h. As there are unused, just remove
|
||
|
|
them.
|
||
|
|
|
||
|
|
Cc: Jia Liu <proljc@gmail.com>
|
||
|
|
Cc: qemu-stable@nongnu.org
|
||
|
|
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
|
||
|
|
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
|
||
|
|
(cherry picked from commit 44e04d3b945ba6f5cc87e65192081da4783f73fa)
|
||
|
|
|
||
|
|
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
|
||
|
|
---
|
||
|
|
target-openrisc/cpu.h | 18 ------------------
|
||
|
|
1 file changed, 18 deletions(-)
|
||
|
|
|
||
|
|
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
|
||
|
|
index de21a87..244788c 100644
|
||
|
|
--- a/target-openrisc/cpu.h
|
||
|
|
+++ b/target-openrisc/cpu.h
|
||
|
|
@@ -89,24 +89,6 @@ enum {
|
||
|
|
/* Interrupt */
|
||
|
|
#define NR_IRQS 32
|
||
|
|
|
||
|
|
-/* Registers */
|
||
|
|
-enum {
|
||
|
|
- R0 = 0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10,
|
||
|
|
- R11, R12, R13, R14, R15, R16, R17, R18, R19, R20,
|
||
|
|
- R21, R22, R23, R24, R25, R26, R27, R28, R29, R30,
|
||
|
|
- R31
|
||
|
|
-};
|
||
|
|
-
|
||
|
|
-/* Register aliases */
|
||
|
|
-enum {
|
||
|
|
- R_ZERO = R0,
|
||
|
|
- R_SP = R1,
|
||
|
|
- R_FP = R2,
|
||
|
|
- R_LR = R9,
|
||
|
|
- R_RV = R11,
|
||
|
|
- R_RVH = R12
|
||
|
|
-};
|
||
|
|
-
|
||
|
|
/* Unit presece register */
|
||
|
|
enum {
|
||
|
|
UPR_UP = (1 << 0),
|