From b3e28228b0f5af506f38d1a211ed0794dd66fafe Mon Sep 17 00:00:00 2001
From: Andreas Schwab <schwab@suse.de>
Date: Thu, 19 Jul 2018 18:38:31 +0200
Subject: [PATCH] Add support for RISC-V

---
 platform/switch_riscv_unix.h | 32 ++++++++++++++++++++++++++++++++
 slp_platformselect.h         |  2 ++
 2 files changed, 34 insertions(+)
 create mode 100644 platform/switch_riscv_unix.h

diff --git a/platform/switch_riscv_unix.h b/platform/switch_riscv_unix.h
new file mode 100644
index 0000000..5b5ea98
--- /dev/null
+++ b/platform/switch_riscv_unix.h
@@ -0,0 +1,32 @@
+#define STACK_REFPLUS 1
+
+#ifdef SLP_EVAL
+#define STACK_MAGIC 0
+
+#define REGS_TO_SAVE "s0", "s1", "s2", "s3", "s4", "s5", \
+		     "s6", "s7", "s8", "s9", "s10", "s11", "fs0", "fs1", \
+		     "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", "fs8", "fs9", \
+		     "fs10", "fs11"
+
+static int
+slp_switch(void)
+{
+  register int ret;
+  register long *stackref, stsizediff;
+  __asm__ volatile ("" : : : REGS_TO_SAVE);
+  __asm__ volatile ("mv %0, sp" : "=r" (stackref) : );
+  {
+      SLP_SAVE_STATE(stackref, stsizediff);
+      __asm__ volatile (
+	  "add sp, sp, %0\n\t"
+	  : /* no outputs */
+	  : "r" (stsizediff)
+	  );
+      SLP_RESTORE_STATE();
+  }
+  __asm__ volatile ("" : : : REGS_TO_SAVE);
+  __asm__ volatile ("mv %0, zero" : "=r" (ret) : );
+  return ret;
+}
+
+#endif
diff --git a/slp_platformselect.h b/slp_platformselect.h
index e6cdc9f..b52c287 100644
--- a/slp_platformselect.h
+++ b/slp_platformselect.h
@@ -49,4 +49,6 @@
 #include "platform/switch_m68k_gcc.h" /* gcc on m68k */
 #elif defined(__GNUC__) && defined(__csky__)
 #include "platform/switch_csky_gcc.h" /* gcc on csky */
+#elif defined(__GNUC__) && defined(__riscv)
+#include "platform/switch_riscv_unix.h" /* gcc on RISC-V */
 #endif