Add support for RISC-V (riscv64)

Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>

b3e28228b0f5af506f38d1a211ed0794dd66fafe.patch

@@ -0,0 +1,60 @@
+From b3e28228b0f5af506f38d1a211ed0794dd66fafe Mon Sep 17 00:00:00 2001
+From: Andreas Schwab <schwab@suse.de>
+Date: Thu, 19 Jul 2018 18:38:31 +0200
+Subject: [PATCH] Add support for RISC-V
+
+---
+ platform/switch_riscv_unix.h | 32 ++++++++++++++++++++++++++++++++
+ slp_platformselect.h         |  2 ++
+ 2 files changed, 34 insertions(+)
+ create mode 100644 platform/switch_riscv_unix.h
+
+diff --git a/platform/switch_riscv_unix.h b/platform/switch_riscv_unix.h
+new file mode 100644
+index 0000000..5b5ea98
+--- /dev/null
++++ b/platform/switch_riscv_unix.h
+@@ -0,0 +1,32 @@
++#define STACK_REFPLUS 1
++
++#ifdef SLP_EVAL
++#define STACK_MAGIC 0
++
++#define REGS_TO_SAVE "s0", "s1", "s2", "s3", "s4", "s5", \
++		     "s6", "s7", "s8", "s9", "s10", "s11", "fs0", "fs1", \
++		     "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", "fs8", "fs9", \
++		     "fs10", "fs11"
++
++static int
++slp_switch(void)
++{
++  register int ret;
++  register long *stackref, stsizediff;
++  __asm__ volatile ("" : : : REGS_TO_SAVE);
++  __asm__ volatile ("mv %0, sp" : "=r" (stackref) : );
++  {
++      SLP_SAVE_STATE(stackref, stsizediff);
++      __asm__ volatile (
++	  "add sp, sp, %0\n\t"
++	  : /* no outputs */
++	  : "r" (stsizediff)
++	  );
++      SLP_RESTORE_STATE();
++  }
++  __asm__ volatile ("" : : : REGS_TO_SAVE);
++  __asm__ volatile ("mv %0, zero" : "=r" (ret) : );
++  return ret;
++}
++
++#endif
+diff --git a/slp_platformselect.h b/slp_platformselect.h
+index e6cdc9f..b52c287 100644
+--- a/slp_platformselect.h
++++ b/slp_platformselect.h
+@@ -49,4 +49,6 @@
+ #include "platform/switch_m68k_gcc.h" /* gcc on m68k */
+ #elif defined(__GNUC__) && defined(__csky__)
+ #include "platform/switch_csky_gcc.h" /* gcc on csky */
++#elif defined(__GNUC__) && defined(__riscv)
++#include "platform/switch_riscv_unix.h" /* gcc on RISC-V */
+ #endif

python-greenlet.spec

@@ -2,13 +2,17 @@
 
 Name:           python-%{modname}
 Version:        0.4.14
-Release:        1%{?dist}
+Release:        1.0.riscv64%{?dist}
 Summary:        Lightweight in-process concurrent programming
 License:        MIT
 URL:            https://github.com/python-greenlet/greenlet
 Source0:        %{url}/archive/%{version}/%{modname}-%{version}.tar.gz
 BuildRequires:  gcc-c++
 
+# Support for RISC-V (riscv64). Upstreamed.
+# See: https://github.com/python-greenlet/greenlet/commit/b3e28228b0f5af506f38d1a211ed0794dd66fafe
+Patch0:         b3e28228b0f5af506f38d1a211ed0794dd66fafe.patch
+
 %global _description \
 The greenlet package is a spin-off of Stackless, a version of CPython\
 that supports micro-threads called "tasklets". Tasklets run\
@@ -91,6 +95,9 @@ Python 3 version.
 %{_includedir}/python%{python3_version}*/%{modname}/
 
 %changelog
+* Fri Sep 21 2018 David Abdurachmanov <david.abdurachmanov@gmail.com> - 0.4.14-1.0.riscv64
+- Add support for RISC-V (riscv64)
+
 * Wed Jul 18 2018 Kevin Fenzi <kevin@scrye.com> - 0.4.14-1
 - Update to 0.4.14.
 - Drop upstreamed/no longer needed patches.