100 lines
2.9 KiB
Diff
100 lines
2.9 KiB
Diff
diff --git a/src/configure b/src/configure
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index 3d05182..357b874 100755
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--- a/src/configure
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+++ b/src/configure
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@@ -4628,7 +4628,7 @@ _ACEOF
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# First set pthread-mutexes based on arch
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case $arch in
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- aarch64|arm*)
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+ aarch64|arm*|riscv*)
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pthread_mutexes=yes
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CFLAGS="$CFLAGS -DUSE_PTHREAD_MUTEXES"
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echo "forcing use of pthread mutexes... " >&6
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diff --git a/src/configure.in b/src/configure.in
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index cff36bc..697c317 100644
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--- a/src/configure.in
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+++ b/src/configure.in
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@@ -378,7 +378,7 @@ AC_DEFINE_UNQUOTED(CPU,$CPU,[cpu type])
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# First set pthread-mutexes based on arch
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case $arch in
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- aarch64|arm*)
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+ aarch64|arm*|riscv*)
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pthread_mutexes=yes
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CFLAGS="$CFLAGS -DUSE_PTHREAD_MUTEXES"
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echo "forcing use of pthread mutexes... " >&6
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diff --git a/src/libpfm4/config.mk b/src/libpfm4/config.mk
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index 51d4f25..18f5838 100644
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--- a/src/libpfm4/config.mk
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+++ b/src/libpfm4/config.mk
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@@ -177,6 +177,9 @@ ifeq ($(ARCH),cell)
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CONFIG_PFMLIB_CELL=y
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endif
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+ifeq ($(ARCH),riscv64)
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+CONFIG_PFMLIB_ARCH_RISCV64=y
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+endif
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#
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# you shouldn't have to touch anything beyond this point
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diff --git a/src/linux-context.h b/src/linux-context.h
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index 524490b..7d51495 100644
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--- a/src/linux-context.h
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+++ b/src/linux-context.h
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@@ -35,6 +35,8 @@ typedef ucontext_t hwd_ucontext_t;
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#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.pc
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#elif defined(__mips__)
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#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.pc
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+#elif defined(__riscv)
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+#define OVERFLOW_ADDRESS(ctx) ctx.ucontext->uc_mcontext.__gregs[REG_PC]
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#else
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#error "OVERFLOW_ADDRESS() undefined!"
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#endif
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diff --git a/src/linux-timer.c b/src/linux-timer.c
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index 853e676..8222acb 100644
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--- a/src/linux-timer.c
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+++ b/src/linux-timer.c
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@@ -288,6 +288,27 @@ get_cycles( void )
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return 0;
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}
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+/************************/
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+/* riscv64 get_cycles() */
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+/************************/
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+
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+#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64
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+static inline long long
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+get_cycles( void )
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+{
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+ register unsigned long ret;
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+
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+ __asm__ __volatile__ ("rdcycle %0" : "=r" (ret));
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+
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+ return ret;
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+}
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+
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+/*
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+ * TODO: riscv32 implementation can be done following example in:
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+ * Volume I: RISC-V User-Level ISA V2.2
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+ * 2.8 Control and Status Register Instructions
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+ * Timers and Counters
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+ */
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#elif !defined(HAVE_GETTIMEOFDAY) && !defined(HAVE_CLOCK_GETTIME)
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#error "No get_cycles support for this architecture. "
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diff --git a/src/mb.h b/src/mb.h
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index 1019691..0b82a9d 100644
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--- a/src/mb.h
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+++ b/src/mb.h
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@@ -39,6 +39,9 @@
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#elif defined(__aarch64__)
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#define rmb() asm volatile("dmb ld" ::: "memory")
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+#elif defined(__riscv)
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+#define rmb() asm volatile("fence ir, ir" ::: "memory")
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+
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#elif defined(__mips__)
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#define rmb() asm volatile( \
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".set mips2\n\t" \
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