205 lines
7.4 KiB
Diff
205 lines
7.4 KiB
Diff
From 5abd39f1a1e4f7c4dd0c1b1252f98e7ee5a95e27 Mon Sep 17 00:00:00 2001
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From: "Richard W.M. Jones" <rjones@redhat.com>
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Date: Fri, 24 Oct 2014 12:59:23 +0200
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Subject: [PATCH 09/19] ppc64le: Update for OCaml 4.02.0.
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These are based on the power (ppc32) branch and some guesswork. In
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particular, I'm not convinced that my changes to floating point
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constant handling are correct.
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Therefore these are not yet integrated into the main patch.
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---
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asmcomp/power64le/CSE.ml | 37 +++++++++++++++++++++++++++++++++++++
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asmcomp/power64le/emit.mlp | 23 ++++++++++++++---------
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asmcomp/power64le/proc.ml | 8 ++++----
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asmcomp/power64le/scheduling.ml | 2 +-
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4 files changed, 56 insertions(+), 14 deletions(-)
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create mode 100644 asmcomp/power64le/CSE.ml
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diff --git a/asmcomp/power64le/CSE.ml b/asmcomp/power64le/CSE.ml
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new file mode 100644
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index 0000000..ec10d2d
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--- /dev/null
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+++ b/asmcomp/power64le/CSE.ml
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@@ -0,0 +1,37 @@
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+(***********************************************************************)
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+(* *)
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+(* OCaml *)
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+(* *)
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+(* Xavier Leroy, projet Gallium, INRIA Rocquencourt *)
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+(* *)
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+(* Copyright 2014 Institut National de Recherche en Informatique et *)
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+(* en Automatique. All rights reserved. This file is distributed *)
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+(* under the terms of the Q Public License version 1.0. *)
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+(* *)
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+(***********************************************************************)
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+
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+(* CSE for the PowerPC *)
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+
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+open Arch
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+open Mach
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+open CSEgen
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+
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+class cse = object (self)
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+
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+inherit cse_generic as super
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+
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+method! class_of_operation op =
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+ match op with
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+ | Ispecific(Imultaddf | Imultsubf) -> Op_pure
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+ | Ispecific(Ialloc_far _) -> Op_other
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+ | _ -> super#class_of_operation op
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+
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+method! is_cheap_operation op =
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+ match op with
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+ | Iconst_int n | Iconst_blockheader n -> n <= 32767n && n >= -32768n
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+ | _ -> false
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+
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+end
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+
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+let fundecl f =
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+ (new cse)#fundecl f
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diff --git a/asmcomp/power64le/emit.mlp b/asmcomp/power64le/emit.mlp
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index 5736a18..3f34102 100644
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--- a/asmcomp/power64le/emit.mlp
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+++ b/asmcomp/power64le/emit.mlp
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@@ -297,6 +297,7 @@ let name_for_int_comparison = function
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let name_for_intop = function
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Iadd -> "add"
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| Imul -> "mulld"
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+ | Imulh -> "mulhd"
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| Idiv -> "divd"
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| Iand -> "and"
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| Ior -> "or"
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@@ -359,7 +360,8 @@ let load_store_size = function
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let instr_size = function
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Lend -> 0
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| Lop(Imove | Ispill | Ireload) -> 1
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- | Lop(Iconst_int n) -> if is_native_immediate n then 1 else 2
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+ | Lop(Iconst_int n | Iconst_blockheader n) ->
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+ if is_native_immediate n then 1 else 2
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| Lop(Iconst_float s) -> 2
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| Lop(Iconst_symbol s) -> 2
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| Lop(Icall_ind) -> 4
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@@ -375,7 +377,7 @@ let instr_size = function
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if chunk = Byte_signed
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then load_store_size addr + 1
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else load_store_size addr
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- | Lop(Istore(chunk, addr)) -> load_store_size addr
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+ | Lop(Istore(chunk, addr, _)) -> load_store_size addr
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| Lop(Ialloc n) -> 4
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| Lop(Ispecific(Ialloc_far n)) -> 5
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| Lop(Iintop Imod) -> 3
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@@ -402,7 +404,7 @@ let instr_size = function
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| Lsetuptrap lbl -> 1
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| Lpushtrap -> 7
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| Lpoptrap -> 1
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- | Lraise -> 6
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+ | Lraise _ -> 6
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let label_map code =
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let map = Hashtbl.create 37 in
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@@ -497,7 +499,7 @@ let rec emit_instr i dslot =
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| (_, _) ->
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fatal_error "Emit: Imove"
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end
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- | Lop(Iconst_int n) ->
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+ | Lop(Iconst_int n | Iconst_blockheader n) ->
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if is_native_immediate n then
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` li {emit_reg i.res.(0)}, {emit_nativeint n}\n`
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else if n >= -0x8000_0000n && n <= 0x7FFF_FFFFn then begin
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@@ -507,7 +509,8 @@ let rec emit_instr i dslot =
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end else begin
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` ld {emit_reg i.res.(0)}, {emit_tocref (TocInt n)}\n`
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end
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- | Lop(Iconst_float s) ->
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+ | Lop(Iconst_float f) ->
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+ let s = string_of_float f in
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` lfd {emit_reg i.res.(0)}, {emit_tocref (TocFloat s)}\n`
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| Lop(Iconst_symbol s) ->
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` ld {emit_reg i.res.(0)}, {emit_tocref (TocSymOfs (s,0))}\n`
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@@ -576,7 +579,7 @@ let rec emit_instr i dslot =
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emit_load_store loadinstr addr i.arg 0 i.res.(0);
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if chunk = Byte_signed then
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` extsb {emit_reg i.res.(0)}, {emit_reg i.res.(0)}\n`
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- | Lop(Istore(chunk, addr)) ->
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+ | Lop(Istore(chunk, addr, _)) ->
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let storeinstr =
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match chunk with
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Byte_unsigned | Byte_signed -> "stb"
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@@ -767,7 +770,7 @@ let rec emit_instr i dslot =
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` mr {emit_gpr 29}, {emit_gpr 11}\n`
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| Lpoptrap ->
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` ld {emit_gpr 29}, 0({emit_gpr 29})\n`
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- | Lraise ->
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+ | Lraise _ ->
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` ld {emit_gpr 0}, 8({emit_gpr 29})\n`;
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` ld {emit_gpr 1}, 16({emit_gpr 29})\n`;
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` ld {emit_gpr 2}, 24({emit_gpr 29})\n`;
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@@ -895,9 +898,11 @@ let emit_item = function
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| Cint n ->
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` .quad {emit_nativeint n}\n`
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| Csingle f ->
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- ` .float 0d{emit_string f}\n`
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+ let s = string_of_float f in
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+ ` .float 0d{emit_string s}\n`
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| Cdouble f ->
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- ` .double 0d{emit_string f}\n`
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+ let s = string_of_float f in
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+ ` .double 0d{emit_string s}\n`
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| Csymbol_address s ->
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` .quad {emit_symbol s}\n`
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| Clabel_address lbl ->
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diff --git a/asmcomp/power64le/proc.ml b/asmcomp/power64le/proc.ml
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index 9b98577..476c984 100644
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--- a/asmcomp/power64le/proc.ml
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+++ b/asmcomp/power64le/proc.ml
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@@ -85,11 +85,11 @@ let rotate_registers = true
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(* Representation of hard registers by pseudo-registers *)
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let hard_int_reg =
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- let v = Array.create 23 Reg.dummy in
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+ let v = Array.make 23 Reg.dummy in
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for i = 0 to 22 do v.(i) <- Reg.at_location Int (Reg i) done; v
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let hard_float_reg =
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- let v = Array.create 31 Reg.dummy in
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+ let v = Array.make 31 Reg.dummy in
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for i = 0 to 30 do v.(i) <- Reg.at_location Float (Reg(100 + i)) done; v
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let all_phys_regs =
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@@ -105,7 +105,7 @@ let stack_slot slot ty =
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let calling_conventions
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first_int last_int first_float last_float make_stack stack_ofs arg =
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- let loc = Array.create (Array.length arg) Reg.dummy in
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+ let loc = Array.make (Array.length arg) Reg.dummy in
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let int = ref first_int in
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let float = ref first_float in
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let ofs = ref stack_ofs in
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@@ -159,7 +159,7 @@ let loc_results res =
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let poweropen_external_conventions first_int last_int
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first_float last_float arg =
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- let loc = Array.create (Array.length arg) Reg.dummy in
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+ let loc = Array.make (Array.length arg) Reg.dummy in
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let int = ref first_int in
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let float = ref first_float in
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let ofs = ref (14 * size_addr) in
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diff --git a/asmcomp/power64le/scheduling.ml b/asmcomp/power64le/scheduling.ml
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index b7bba9b..b582b6a 100644
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--- a/asmcomp/power64le/scheduling.ml
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+++ b/asmcomp/power64le/scheduling.ml
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@@ -46,7 +46,7 @@ method reload_retaddr_latency = 12
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method oper_issue_cycles = function
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Iconst_float _ | Iconst_symbol _ -> 2
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| Iload(_, Ibased(_, _)) -> 2
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- | Istore(_, Ibased(_, _)) -> 2
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+ | Istore(_, Ibased(_, _), _) -> 2
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| Ialloc _ -> 4
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| Iintop(Imod) -> 40 (* assuming full stall *)
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| Iintop(Icomp _) -> 4
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--
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2.4.3
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