riscv: Further fixes for https://github.com/nojb/riscv-ocaml/issues/2
This commit is contained in:
Richard W.M. Jones
parent
0e2c6567fd
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From fc5ac0d955afce294fe58a20cab8e9dda572de78 Mon Sep 17 00:00:00 2001
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From: "Richard W.M. Jones" <rjones@redhat.com>
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Date: Tue, 24 Jun 2014 10:00:15 +0100
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Subject: [PATCH 1/9] Don't add rpaths to libraries.
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Subject: [PATCH 01/10] Don't add rpaths to libraries.
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---
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tools/Makefile.shared | 6 +++---
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@ -1,7 +1,7 @@
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From 61bdb02cedd1be6ecdc37bc4a80ffe3f19aa5521 Mon Sep 17 00:00:00 2001
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From: "Richard W.M. Jones" <rjones@redhat.com>
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Date: Tue, 29 May 2012 20:40:36 +0100
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Subject: [PATCH 2/9] ocamlbyteinfo, ocamlplugininfo: Useful utilities from
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Subject: [PATCH 02/10] ocamlbyteinfo, ocamlplugininfo: Useful utilities from
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Debian, sent upstream.
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See:
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@ -1,7 +1,7 @@
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From 2f93494aea56c9216bb561800a6861b653f409ce Mon Sep 17 00:00:00 2001
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From: "Richard W.M. Jones" <rjones@redhat.com>
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Date: Tue, 29 May 2012 20:44:18 +0100
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Subject: [PATCH 3/9] configure: Allow user defined C compiler flags.
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Subject: [PATCH 03/10] configure: Allow user defined C compiler flags.
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---
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configure | 4 ++++
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@ -1,7 +1,7 @@
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From cdd42ba82210bfaa97cfa010eaac3d805b80cb49 Mon Sep 17 00:00:00 2001
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From: "Richard W.M. Jones" <rjones@redhat.com>
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Date: Thu, 3 Nov 2016 19:50:20 +0000
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Subject: [PATCH 4/9] Don't rewrite -Werror.
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Subject: [PATCH 04/10] Don't rewrite -Werror.
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In Fedora our CFLAGS contains -Wall -Werror=format-security.
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@ -1,7 +1,7 @@
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From d4a20446fc8d00223b0c23726618407e451472e8 Mon Sep 17 00:00:00 2001
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From: "Richard W.M. Jones" <rjones@redhat.com>
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Date: Wed, 9 Nov 2016 11:01:15 -0500
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Subject: [PATCH 5/9] PR#7405: s390x: Fix address of caml_raise_exn in native
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Subject: [PATCH 05/10] PR#7405: s390x: Fix address of caml_raise_exn in native
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dynlink modules.
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This commit started as Fedora patch e732c39340e86939530a087744caa8d8f1247878.
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@ -1,7 +1,7 @@
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From 427232f0f36bfcaafcb1ec2f8da3d1daad0b1121 Mon Sep 17 00:00:00 2001
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From: Nicolas Ojeda Bar <n.oje.bar@gmail.com>
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Date: Tue, 8 Nov 2016 23:56:50 +0100
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Subject: [PATCH 6/9] Adapt config.guess for RISC-V
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Subject: [PATCH 06/10] Adapt config.guess for RISC-V
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---
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config/gnu/config.guess | 5 ++++-
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@ -1,7 +1,7 @@
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From cc3aa63c6892479851786af89b956004491dc84c Mon Sep 17 00:00:00 2001
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From: Nicolas Ojeda Bar <n.oje.bar@gmail.com>
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Date: Fri, 4 Nov 2016 20:39:09 +0100
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Subject: [PATCH 7/9] Add RISC-V backend & runtime
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Subject: [PATCH 07/10] Add RISC-V backend & runtime
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---
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README.adoc | 1 +
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@ -1,7 +1,7 @@
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From f1be77d69e28ad3bd128c6c757d966e90bbf73d3 Mon Sep 17 00:00:00 2001
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From: Nicolas Ojeda Bar <n.oje.bar@gmail.com>
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Date: Thu, 10 Nov 2016 14:12:53 +0100
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Subject: [PATCH 8/9] Try fix for andi/ori/xori immediates (#1)
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Subject: [PATCH 08/10] Try fix for andi/ori/xori immediates (#1)
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---
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asmcomp/riscv/selection.ml | 13 -------------
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@ -1,7 +1,7 @@
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From b81417ea168c3cf9454eeb41f1f723b66b3210aa Mon Sep 17 00:00:00 2001
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From: Nicolas Ojeda Bar <n.oje.bar@gmail.com>
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Date: Tue, 22 Nov 2016 22:30:35 +0100
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Subject: [PATCH 9/9] Fix immediates' range when adjusting/indexing sp
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Subject: [PATCH 09/10] Fix immediates' range when adjusting/indexing sp
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---
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asmcomp/riscv/arch.ml | 3 +++
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@ -0,0 +1,131 @@
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From ab30529b723d451fd0ea8ac64d24fc417af55541 Mon Sep 17 00:00:00 2001
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From: Nicolas Ojeda Bar <n.oje.bar@gmail.com>
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Date: Wed, 23 Nov 2016 12:38:28 +0100
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Subject: [PATCH 10/10] Another immediate range fix
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---
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asmcomp/riscv/emit.mlp | 57 ++++++++++++++++++++++++++++++--------------------
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1 file changed, 34 insertions(+), 23 deletions(-)
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diff --git a/asmcomp/riscv/emit.mlp b/asmcomp/riscv/emit.mlp
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index 97c49ce..6cc1908 100644
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--- a/asmcomp/riscv/emit.mlp
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+++ b/asmcomp/riscv/emit.mlp
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@@ -85,14 +85,6 @@ let emit_reg = function
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| {loc = Reg r} -> emit_string (register_name r)
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| _ -> fatal_error "Emit.emit_reg"
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-(* Output a stack reference *)
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-
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-let emit_stack r =
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- match r.loc with
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- Stack s ->
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- let ofs = slot_offset s (register_class r) in `{emit_int ofs}(sp)`
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- | _ -> fatal_error "Emit.emit_stack"
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-
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(* Adjust sp by the given byte amount *)
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let emit_stack_adjustment = function
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@@ -103,7 +95,27 @@ let emit_stack_adjustment = function
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` li {emit_reg reg_tmp1}, {emit_int n}\n`;
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` add sp, sp, {emit_reg reg_tmp1}\n`
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-let emit_store src ofs =
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+let reload_ra n =
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+ let ofs = n - size_addr in
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+ if is_immediate ofs then
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+ ` {emit_string lg} ra, {emit_int ofs}(sp)\n`
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+ else begin
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+ ` li {emit_reg reg_tmp1}, {emit_int ofs}\n`;
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+ ` add {emit_reg reg_tmp1}, sp, {emit_reg reg_tmp1}\n`;
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+ ` {emit_string lg} ra, 0({emit_reg reg_tmp1})\n`
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+ end
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+
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+let store_ra n =
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+ let ofs = n - size_addr in
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+ if is_immediate ofs then
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+ ` {emit_string stg} ra, {emit_int(n - size_addr)}(sp)\n`
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+ else begin
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+ ` li {emit_reg reg_tmp1}, {emit_int ofs}\n`;
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+ ` add {emit_reg reg_tmp1}, sp, {emit_reg reg_tmp1}\n`;
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+ ` {emit_string stg} ra, 0({emit_reg reg_tmp1})\n`
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+ end
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+
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+let emit_store stg src ofs =
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if is_immediate ofs then
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` {emit_string stg} {emit_reg src}, {emit_int ofs}(sp)\n`
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else begin
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@@ -112,7 +124,7 @@ let emit_store src ofs =
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` {emit_string stg} {emit_reg src}, 0({emit_reg reg_tmp1})\n`
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end
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-let emit_load dst ofs =
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+let emit_load lg dst ofs =
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if is_immediate ofs then
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` {emit_string lg} {emit_reg dst}, {emit_int ofs}(sp)\n`
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else begin
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@@ -265,14 +277,16 @@ let emit_instr i =
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` fmv.d {emit_reg dst}, {emit_reg src}\n`
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| {loc = Reg _; typ = (Val | Int | Addr)}, {loc = Stack s} ->
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let ofs = slot_offset s (register_class dst) in
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- emit_store src ofs
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- | {loc = Reg _; typ = Float}, {loc = Stack _} ->
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- ` fsd {emit_reg src}, {emit_stack dst}\n`
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+ emit_store stg src ofs
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+ | {loc = Reg _; typ = Float}, {loc = Stack s} ->
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+ let ofs = slot_offset s (register_class dst) in
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+ emit_store "fsd" src ofs
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| {loc = Stack s; typ = (Val | Int | Addr)}, {loc = Reg _} ->
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let ofs = slot_offset s (register_class src) in
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- emit_load dst ofs
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- | {loc = Stack _; typ = Float}, {loc = Reg _} ->
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- ` fld {emit_reg dst}, {emit_stack src}\n`
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+ emit_load lg dst ofs
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+ | {loc = Stack s; typ = Float}, {loc = Reg _} ->
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+ let ofs = slot_offset s (register_class src) in
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+ emit_load "fld" dst ofs
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| _ ->
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fatal_error "Emit: Imove"
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end
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@@ -292,8 +306,7 @@ let emit_instr i =
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record_frame ~label i.live false i.dbg
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| Lop(Itailcall_ind {label_after = _}) ->
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let n = frame_size() in
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- if !contains_calls then
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- ` {emit_string lg} ra, {emit_int(n - size_addr)}(sp)\n`;
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+ if !contains_calls then reload_ra n;
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emit_stack_adjustment n;
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` jr {emit_reg i.arg.(0)}\n`
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| Lop(Itailcall_imm {func; label_after = _}) ->
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@@ -301,8 +314,7 @@ let emit_instr i =
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` j {emit_label !tailrec_entry_point}\n`
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end else begin
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let n = frame_size() in
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- if !contains_calls then
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- ` {emit_string lg} ra, {emit_int(n - size_addr)}(sp)\n`;
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+ if !contains_calls then reload_ra n;
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emit_stack_adjustment n;
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` tail {emit_symbol func}\n`
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end
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@@ -424,7 +436,7 @@ let emit_instr i =
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` {emit_string instr} {emit_reg i.res.(0)}, {emit_reg i.arg.(0)}, {emit_reg i.arg.(1)}, {emit_reg i.arg.(2)}\n`
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| Lreloadretaddr ->
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let n = frame_size () in
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- ` {emit_string lg} ra, {emit_int(n - size_addr)}(sp)\n`
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+ reload_ra n
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| Lreturn ->
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let n = frame_size() in
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emit_stack_adjustment n;
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@@ -542,8 +554,7 @@ let fundecl fundecl =
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`{emit_symbol fundecl.fun_name}:\n`;
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let n = frame_size() in
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emit_stack_adjustment (-n);
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- if !contains_calls then
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- ` {emit_string stg} ra, {emit_int(n - size_addr)}(sp)\n`;
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+ if !contains_calls then store_ra n;
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`{emit_label !tailrec_entry_point}:\n`;
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emit_all fundecl.fun_body;
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List.iter emit_call_gc !call_gc_sites;
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--
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2.9.3
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Name: ocaml
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Version: 4.04.0
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Release: 6%{?dist}
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Release: 7%{?dist}
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Summary: OCaml compiler and programming environment
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@ -67,6 +67,7 @@ Patch0006: 0006-Adapt-config.guess-for-RISC-V.patch
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Patch0007: 0007-Add-RISC-V-backend-runtime.patch
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Patch0008: 0008-Try-fix-for-andi-ori-xori-immediates-1.patch
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Patch0009: 0009-Fix-immediates-range-when-adjusting-indexing-sp.patch
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Patch0010: 0010-Another-immediate-range-fix.patch
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BuildRequires: binutils-devel
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BuildRequires: ncurses-devel
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@ -453,8 +454,8 @@ fi
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%changelog
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* Wed Nov 23 2016 Richard W.M. Jones <rjones@redhat.com> - 4.04.0-6
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- riscv: Further fix for https://github.com/nojb/riscv-ocaml/issues/2
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* Wed Nov 23 2016 Richard W.M. Jones <rjones@redhat.com> - 4.04.0-7
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- riscv: Further fixes for https://github.com/nojb/riscv-ocaml/issues/2
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* Tue Nov 22 2016 Richard W.M. Jones <rjones@redhat.com> - 4.04.0-5
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- Update RISC-V support to fix
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