Add support for RISC-V (riscv64)

Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
This commit is contained in:
David Abdurachmanov 2018-06-03 12:26:07 +02:00
parent 0777a37fbd
commit bce46dcf29
Signed by: davidlt
GPG Key ID: 7108702C938B13C1
2 changed files with 59 additions and 1 deletions

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@ -0,0 +1,52 @@
diff --git a/src/nvcore/nvcore.h b/src/nvcore/nvcore.h
index 77ca744..29140a7 100644
--- a/src/nvcore/nvcore.h
+++ b/src/nvcore/nvcore.h
@@ -80,6 +80,10 @@
# define NV_CPU_MIPS64 1
#elif defined POSH_CPU_S390
# define NV_CPU_S390 1
+#elif defined POSH_CPU_RISCV32
+# define NV_CPU_RISCV32 1
+#elif defined POSH_CPU_RISCV64
+# define NV_CPU_RISCV64 1
#else
# error "Unsupported CPU"
#endif
diff --git a/src/nvcore/poshlib/posh.h b/src/nvcore/poshlib/posh.h
index ca7641b..972eae5 100644
--- a/src/nvcore/poshlib/posh.h
+++ b/src/nvcore/poshlib/posh.h
@@ -486,6 +486,23 @@ Metrowerks:
# endif
#endif
+/* ------------------------------------------------------------------
+** RISC-V
+** ------------------------------------------------------------------
+*/
+#if defined __riscv && defined __riscv_xlen
+# if __riscv_xlen == 32
+# define POSH_CPU_RISCV32 1
+# define POSH_CPU_STRING "RISCV32"
+# elif __riscv_xlen == 64
+# define POSH_CPU_RISCV64 1
+# define POSH_CPU_STRING "RISCV64"
+# else
+# error "Unsupported XLEN for RISC-V!"
+# endif
+#endif
+
+
#if defined mips || defined __mips__ || defined __MIPS__ || defined _MIPS
# if defined __mips64
# define POSH_CPU_MIPS64 1
@@ -669,7 +686,7 @@ Metrowerks:
** the MIPS series, so we have to be careful about those.
** ----------------------------------------------------------------------------
*/
-#if defined POSH_CPU_X86 || defined POSH_CPU_AXP || defined POSH_CPU_STRONGARM || defined POSH_OS_WIN32 || defined POSH_OS_WINCE || defined __MIPSEL__ || defined POSH_CPU_AARCH64
+#if defined POSH_CPU_X86 || defined POSH_CPU_AXP || defined POSH_CPU_STRONGARM || defined POSH_OS_WIN32 || defined POSH_OS_WINCE || defined __MIPSEL__ || defined POSH_CPU_AARCH64 || defined POSH_CPU_RISCV32 || defined POSH_CPU_RISCV64
# define POSH_ENDIAN_STRING "little"
# define POSH_LITTLE_ENDIAN 1
#else

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@ -2,7 +2,7 @@
Name: nvidia-texture-tools
Version: 2.0.8
Release: 18%{?dist}
Release: 18.0.riscv64%{?dist}
Summary: Collection of image processing and texture manipulation tools
Group: System Environment/Libraries
License: MIT
@ -39,6 +39,8 @@ Patch8: %{name}-mips.patch
Patch9: %{name}-s390.patch
# add PPCLE support
Patch10: %{name}-ppcle.patch
# add riscv64
Patch11: %{name}-riscv64.patch
%description
The NVIDIA Texture Tools is a collection of image processing and texture
@ -73,6 +75,7 @@ Headers and libraries for development with %{name}.
%patch8 -p1
%patch9 -p1
%patch10 -p1
%patch11 -p1
%build
mkdir -p build
@ -114,6 +117,9 @@ make -C build filtertest
%{_libdir}/lib*.so
%changelog
* Sun Jun 03 2018 David Abdurachmanov <david.abdurachmanov@gmail.com> - 2.0.8-18.0.riscv64
- Add support for RISC-V (riscv64)
* Thu Feb 08 2018 Fedora Release Engineering <releng@fedoraproject.org> - 2.0.8-18
- Rebuilt for https://fedoraproject.org/wiki/Fedora_28_Mass_Rebuild