mozjs68/firefox-68.7.0-add-riscv64....

86 lines
3.1 KiB
Diff

diff --git a/build/moz.configure/init.configure b/build/moz.configure/init.configure
index c772604035..891359c5ba 100644
--- a/build/moz.configure/init.configure
+++ b/build/moz.configure/init.configure
@@ -730,6 +730,9 @@ def split_triplet(triplet, allow_unknown=False):
elif cpu.startswith('aarch64'):
canonical_cpu = 'aarch64'
endianness = 'little'
+ elif cpu.startswith('riscv64'):
+ canonical_cpu = 'riscv64'
+ endianness = 'little'
elif cpu == 'sh4':
canonical_cpu = 'sh4'
endianness = 'little'
diff --git a/js/src/jit/AtomicOperations.h b/js/src/jit/AtomicOperations.h
index 0486cbad1c..d00e2769a5 100644
--- a/js/src/jit/AtomicOperations.h
+++ b/js/src/jit/AtomicOperations.h
@@ -391,7 +391,8 @@ inline bool AtomicOperations::isLockfreeJS(int32_t size) {
#elif defined(__ppc__) || defined(__PPC__) || defined(__sparc__) || \
defined(__ppc64__) || defined(__PPC64__) || defined(__ppc64le__) || \
defined(__PPC64LE__) || defined(__alpha__) || defined(__hppa__) || \
- defined(__sh__) || defined(__s390__) || defined(__s390x__)
+ defined(__sh__) || defined(__s390__) || defined(__s390x__) || \
+ defined(__riscv)
# include "jit/shared/AtomicOperations-feeling-lucky.h"
#else
# error "No AtomicOperations support provided for this platform"
diff --git a/js/src/jit/shared/AtomicOperations-feeling-lucky-gcc.h b/js/src/jit/shared/AtomicOperations-feeling-lucky-gcc.h
index f002cd46c9..e4b6ff9c29 100644
--- a/js/src/jit/shared/AtomicOperations-feeling-lucky-gcc.h
+++ b/js/src/jit/shared/AtomicOperations-feeling-lucky-gcc.h
@@ -70,6 +70,13 @@
# endif
#endif
+#ifdef __riscv
+# if __riscv_xlen == 64
+# define HAS_64BIT_ATOMICS
+# define HAS_64BIT_LOCKFREE
+# endif
+#endif
+
#ifdef JS_CODEGEN_NONE
# ifdef JS_64BIT
# define HAS_64BIT_ATOMICS
diff --git a/mfbt/tests/TestPoisonArea.cpp b/mfbt/tests/TestPoisonArea.cpp
index 2834678ad8..381ad08df1 100644
--- a/mfbt/tests/TestPoisonArea.cpp
+++ b/mfbt/tests/TestPoisonArea.cpp
@@ -159,6 +159,14 @@
#elif defined __aarch64__ || defined _M_ARM64
# define RETURN_INSTR 0xd65f03c0 /* ret */
+#elif defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64
+#if defined(__riscv_compressed)
+#define RETURN_INSTR 0x8082 /* ret */
+#define RETURN_INSTR_TYPE uint16_t
+#else
+#define RETURN_INSTR 0x00008067 /* ret */
+#endif
+
#elif defined __ia64
struct ia64_instr {
uint32_t mI[4];
diff --git a/python/mozbuild/mozbuild/configure/constants.py b/python/mozbuild/mozbuild/configure/constants.py
index 8b7d2261d2..8619421cac 100644
--- a/python/mozbuild/mozbuild/configure/constants.py
+++ b/python/mozbuild/mozbuild/configure/constants.py
@@ -50,6 +50,7 @@ CPU_bitness = {
'mips64': 64,
'ppc': 32,
'ppc64': 64,
+ 'riscv64': 64,
's390': 32,
's390x': 64,
'sh4': 32,
@@ -89,6 +90,7 @@ CPU_preprocessor_checks = OrderedDict((
('mips64', '__mips64'),
('mips32', '__mips__'),
('sh4', '__sh__'),
+ ('riscv64', 'defined(__riscv) && defined(__riscv_xlen) && __riscv_xlen == 64'),
))
assert sorted(CPU_preprocessor_checks.keys()) == sorted(CPU.POSSIBLE_VALUES)