64 lines
2.8 KiB
Diff
64 lines
2.8 KiB
Diff
diff -up Mesa-9.1/src/mesa/drivers/dri/i965/brw_context.c.marcheu Mesa-9.1/src/mesa/drivers/dri/i965/brw_context.c
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--- Mesa-9.1/src/mesa/drivers/dri/i965/brw_context.c.marcheu 2013-02-20 10:26:22.000000000 +1000
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+++ Mesa-9.1/src/mesa/drivers/dri/i965/brw_context.c 2013-03-19 10:44:12.761921622 +1000
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@@ -329,6 +329,7 @@ brwCreateContext(int api,
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brw->urb.max_gs_entries = 256;
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}
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brw->urb.gen6_gs_previously_active = false;
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+ brw->urb.prims_since_last_flush = 0;
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} else if (intel->gen == 5) {
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brw->urb.size = 1024;
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brw->max_vs_threads = 72;
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diff -up Mesa-9.1/src/mesa/drivers/dri/i965/brw_context.h.marcheu Mesa-9.1/src/mesa/drivers/dri/i965/brw_context.h
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--- Mesa-9.1/src/mesa/drivers/dri/i965/brw_context.h.marcheu 2013-02-23 11:45:52.000000000 +1000
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+++ Mesa-9.1/src/mesa/drivers/dri/i965/brw_context.h 2013-03-19 10:44:12.762921630 +1000
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@@ -864,6 +864,7 @@ struct brw_context
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* URB space for the GS.
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*/
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bool gen6_gs_previously_active;
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+ int prims_since_last_flush;
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} urb;
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diff -up Mesa-9.1/src/mesa/drivers/dri/i965/brw_draw.c.marcheu Mesa-9.1/src/mesa/drivers/dri/i965/brw_draw.c
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--- Mesa-9.1/src/mesa/drivers/dri/i965/brw_draw.c.marcheu 2013-02-20 10:26:22.000000000 +1000
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+++ Mesa-9.1/src/mesa/drivers/dri/i965/brw_draw.c 2013-03-19 10:44:12.763921639 +1000
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@@ -294,10 +294,14 @@ static void brw_merge_inputs( struct brw
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* Resolve the depth buffer's HiZ buffer and resolve the depth buffer of each
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* enabled depth texture.
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*
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+ * We don't resolve the depth buffer's HiZ if no primitives have been drawn
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+ * since the last flush. This avoids a case where we lockup the GPU on boot
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+ * when this is the first thing we do.
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+ *
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* (In the future, this will also perform MSAA resolves).
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*/
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static void
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-brw_predraw_resolve_buffers(struct brw_context *brw)
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+brw_predraw_resolve_buffers(struct brw_context *brw, int nr_prims)
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{
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struct gl_context *ctx = &brw->intel.ctx;
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struct intel_context *intel = &brw->intel;
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@@ -306,9 +310,11 @@ brw_predraw_resolve_buffers(struct brw_c
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/* Resolve the depth buffer's HiZ buffer. */
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depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
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- if (depth_irb)
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+ if (depth_irb && brw->urb.prims_since_last_flush > 0 )
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intel_renderbuffer_resolve_hiz(intel, depth_irb);
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+ brw->urb.prims_since_last_flush = nr_prims;
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+
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/* Resolve depth buffer of each enabled depth texture. */
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for (int i = 0; i < BRW_MAX_TEX_UNIT; i++) {
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if (!ctx->Texture.Unit[i]._ReallyEnabled)
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@@ -445,7 +451,7 @@ static bool brw_try_draw_prims( struct g
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* and finalizing textures but before setting up any hardware state for
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* this draw call.
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*/
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- brw_predraw_resolve_buffers(brw);
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+ brw_predraw_resolve_buffers(brw, nr_prims);
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/* Bind all inputs, derive varying and size information:
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*/
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