Merge branch 'f15' of ssh://pkgs.fedoraproject.org/mesa into f15
This commit is contained in:
Adam Jackson
commit
3c90dfd516
|
|
@ -22,3 +22,11 @@ mesa-20100720.tar.bz2
|
|||
/mesa-20110330.tar.xz
|
||||
/mesa-20110401.tar.xz
|
||||
/mesa-20110412.tar.xz
|
||||
/mesa-20110506.tar.xz
|
||||
/mesa-20110509.tar.xz
|
||||
/mesa-20110525.tar.xz
|
||||
/mesa-20110621.tar.xz
|
||||
/mesa-20110626.tar.xz
|
||||
/mesa-20110709.tar.xz
|
||||
/mesa-20110729.tar.xz
|
||||
/mesa-20110730.tar.xz
|
||||
|
|
|
|||
|
|
@ -1,12 +1,12 @@
|
|||
diff -up mesa-20100529/configure.ac.nouveau mesa-20100529/configure.ac
|
||||
--- mesa-20100529/configure.ac.nouveau 2010-05-29 18:57:30.000000000 +1000
|
||||
+++ mesa-20100529/configure.ac 2010-05-29 18:58:24.000000000 +1000
|
||||
@@ -820,20 +820,20 @@ if test "$mesa_driver" = dri; then
|
||||
diff -up mesa-20110620/configure.ac.classic mesa-20110620/configure.ac
|
||||
--- mesa-20110620/configure.ac.classic 2011-06-20 13:52:52.000000000 +1000
|
||||
+++ mesa-20110620/configure.ac 2011-06-20 13:55:09.000000000 +1000
|
||||
@@ -1023,20 +1023,20 @@ if test "$mesa_driver" = dri -o "$mesa_d
|
||||
# x86-64 system where they could *ever* be used.
|
||||
if test "x$DRI_DIRS" = "xyes"; then
|
||||
DRI_DIRS="i915 i965 mga r128 r200 r300 r600 radeon \
|
||||
- savage tdfx unichrome swrast"
|
||||
+ savage tdfx unichrome nouveau"
|
||||
DRI_DIRS="i915 i965 mga nouveau r128 r200 r300 r600 \
|
||||
- radeon savage tdfx unichrome swrast"
|
||||
+ radeon savage tdfx unichrome"
|
||||
fi
|
||||
;;
|
||||
powerpc*)
|
||||
|
|
@ -25,12 +25,12 @@ diff -up mesa-20100529/configure.ac.nouveau mesa-20100529/configure.ac
|
|||
fi
|
||||
;;
|
||||
esac
|
||||
@@ -870,7 +870,7 @@ if test "$mesa_driver" = dri; then
|
||||
@@ -1080,7 +1080,7 @@ if test "$mesa_driver" = dri -o "$mesa_d
|
||||
# default drivers
|
||||
if test "x$DRI_DIRS" = "xyes"; then
|
||||
DRI_DIRS="i810 i915 i965 mga r128 r200 r300 r600 radeon \
|
||||
DRI_DIRS="i810 i915 i965 mga nouveau r128 r200 r300 r600 radeon \
|
||||
- savage sis tdfx unichrome swrast"
|
||||
+ savage sis tdfx unichrome nouveau"
|
||||
+ savage sis tdfx unichrome"
|
||||
fi
|
||||
|
||||
DRI_DIRS=`echo "$DRI_DIRS" | $SED 's/ */ /g'`
|
||||
|
|
|
|||
|
|
@ -1,15 +1,15 @@
|
|||
diff -up mesa-20100529/src/mesa/drivers/dri/intel/intel_fbo.c.dave mesa-20100529/src/mesa/drivers/dri/intel/intel_fbo.c
|
||||
--- mesa-20100529/src/mesa/drivers/dri/intel/intel_fbo.c.dave 2010-05-30 18:24:35.000000000 +1000
|
||||
+++ mesa-20100529/src/mesa/drivers/dri/intel/intel_fbo.c 2010-05-30 18:24:42.000000000 +1000
|
||||
@@ -558,11 +558,6 @@ intel_render_texture(GLcontext * ctx,
|
||||
diff -up mesa-20110620/src/mesa/drivers/dri/intel/intel_fbo.c.da mesa-20110620/src/mesa/drivers/dri/intel/intel_fbo.c
|
||||
--- mesa-20110620/src/mesa/drivers/dri/intel/intel_fbo.c.da 2011-06-20 13:51:25.000000000 +1000
|
||||
+++ mesa-20110620/src/mesa/drivers/dri/intel/intel_fbo.c 2011-06-20 13:51:32.000000000 +1000
|
||||
@@ -612,11 +612,6 @@ intel_render_texture(struct gl_context *
|
||||
return;
|
||||
}
|
||||
|
||||
- DBG("Begin render texture tid %lx tex=%u w=%d h=%d refcount=%d\n",
|
||||
- _glthread_GetID(),
|
||||
- att->Texture->Name, newImage->Width, newImage->Height,
|
||||
- att->Texture->Name, image->Width, image->Height,
|
||||
- irb->Base.RefCount);
|
||||
-
|
||||
/* point the renderbufer's region to the texture image region */
|
||||
if (irb->region != intel_image->mt->region) {
|
||||
if (irb->region)
|
||||
intel_renderbuffer_set_draw_offset(irb, intel_image, att->Zoffset);
|
||||
intel_image->used_as_render_target = GL_TRUE;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,125 +0,0 @@
|
|||
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
|
||||
index 32ee37f..21ce92c 100644
|
||||
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
|
||||
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
|
||||
@@ -52,35 +52,6 @@ static void guess_execution_size(struct brw_compile *p,
|
||||
}
|
||||
|
||||
|
||||
-/**
|
||||
- * Prior to Sandybridge, the SEND instruction accepted non-MRF source
|
||||
- * registers, implicitly moving the operand to a message register.
|
||||
- *
|
||||
- * On Sandybridge, this is no longer the case. This function performs the
|
||||
- * explicit move; it should be called before emitting a SEND instruction.
|
||||
- */
|
||||
-static void
|
||||
-gen6_resolve_implied_move(struct brw_compile *p,
|
||||
- struct brw_reg *src,
|
||||
- GLuint msg_reg_nr)
|
||||
-{
|
||||
- struct intel_context *intel = &p->brw->intel;
|
||||
- if (intel->gen != 6)
|
||||
- return;
|
||||
-
|
||||
- if (src->file == BRW_ARCHITECTURE_REGISTER_FILE && src->nr == BRW_ARF_NULL)
|
||||
- return;
|
||||
-
|
||||
- brw_push_insn_state(p);
|
||||
- brw_set_mask_control(p, BRW_MASK_DISABLE);
|
||||
- brw_set_compression_control(p, BRW_COMPRESSION_NONE);
|
||||
- brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD),
|
||||
- retype(*src, BRW_REGISTER_TYPE_UD));
|
||||
- brw_pop_insn_state(p);
|
||||
- *src = brw_message_reg(msg_reg_nr);
|
||||
-}
|
||||
-
|
||||
-
|
||||
static void brw_set_dest(struct brw_compile *p,
|
||||
struct brw_instruction *insn,
|
||||
struct brw_reg dest)
|
||||
@@ -1800,7 +1771,6 @@ void brw_dp_READ_4_vs_relative(struct brw_compile *p,
|
||||
GLuint bind_table_index)
|
||||
{
|
||||
struct intel_context *intel = &p->brw->intel;
|
||||
- struct brw_reg src = brw_vec8_grf(0, 0);
|
||||
int msg_type;
|
||||
|
||||
/* Setup MRF[1] with offset into const buffer */
|
||||
@@ -1817,7 +1787,6 @@ void brw_dp_READ_4_vs_relative(struct brw_compile *p,
|
||||
addr_reg, brw_imm_d(offset));
|
||||
brw_pop_insn_state(p);
|
||||
|
||||
- gen6_resolve_implied_move(p, &src, 0);
|
||||
struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
|
||||
|
||||
insn->header.predicate_control = BRW_PREDICATE_NONE;
|
||||
@@ -1826,7 +1795,7 @@ void brw_dp_READ_4_vs_relative(struct brw_compile *p,
|
||||
insn->header.mask_control = BRW_MASK_DISABLE;
|
||||
|
||||
brw_set_dest(p, insn, dest);
|
||||
- brw_set_src0(insn, src);
|
||||
+ brw_set_src0(insn, brw_vec8_grf(0, 0));
|
||||
|
||||
if (intel->gen == 6)
|
||||
msg_type = GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
|
||||
@@ -1997,7 +1966,20 @@ void brw_SAMPLE(struct brw_compile *p,
|
||||
{
|
||||
struct brw_instruction *insn;
|
||||
|
||||
- gen6_resolve_implied_move(p, &src0, msg_reg_nr);
|
||||
+ /* Sandybridge doesn't have the implied move for SENDs,
|
||||
+ * and the first message register index comes from src0.
|
||||
+ */
|
||||
+ if (intel->gen >= 6) {
|
||||
+ if (src0.file != BRW_ARCHITECTURE_REGISTER_FILE ||
|
||||
+ src0.nr != BRW_ARF_NULL) {
|
||||
+ brw_push_insn_state(p);
|
||||
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
|
||||
+ brw_set_compression_control(p, BRW_COMPRESSION_NONE);
|
||||
+ brw_MOV(p, retype(brw_message_reg(msg_reg_nr), src0.type), src0);
|
||||
+ brw_pop_insn_state(p);
|
||||
+ }
|
||||
+ src0 = brw_message_reg(msg_reg_nr);
|
||||
+ }
|
||||
|
||||
insn = next_insn(p, BRW_OPCODE_SEND);
|
||||
insn->header.predicate_control = 0; /* XXX */
|
||||
@@ -2052,7 +2034,17 @@ void brw_urb_WRITE(struct brw_compile *p,
|
||||
struct intel_context *intel = &p->brw->intel;
|
||||
struct brw_instruction *insn;
|
||||
|
||||
- gen6_resolve_implied_move(p, &src0, msg_reg_nr);
|
||||
+ /* Sandybridge doesn't have the implied move for SENDs,
|
||||
+ * and the first message register index comes from src0.
|
||||
+ */
|
||||
+ if (intel->gen >= 6) {
|
||||
+ brw_push_insn_state(p);
|
||||
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
|
||||
+ brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD),
|
||||
+ retype(src0, BRW_REGISTER_TYPE_UD));
|
||||
+ brw_pop_insn_state(p);
|
||||
+ src0 = brw_message_reg(msg_reg_nr);
|
||||
+ }
|
||||
|
||||
insn = next_insn(p, BRW_OPCODE_SEND);
|
||||
|
||||
@@ -2162,7 +2154,17 @@ void brw_ff_sync(struct brw_compile *p,
|
||||
struct intel_context *intel = &p->brw->intel;
|
||||
struct brw_instruction *insn;
|
||||
|
||||
- gen6_resolve_implied_move(p, &src0, msg_reg_nr);
|
||||
+ /* Sandybridge doesn't have the implied move for SENDs,
|
||||
+ * and the first message register index comes from src0.
|
||||
+ */
|
||||
+ if (intel->gen >= 6) {
|
||||
+ brw_push_insn_state(p);
|
||||
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
|
||||
+ brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD),
|
||||
+ retype(src0, BRW_REGISTER_TYPE_UD));
|
||||
+ brw_pop_insn_state(p);
|
||||
+ src0 = brw_message_reg(msg_reg_nr);
|
||||
+ }
|
||||
|
||||
insn = next_insn(p, BRW_OPCODE_SEND);
|
||||
brw_set_dest(p, insn, dest);
|
||||
|
|
@ -1,16 +1,16 @@
|
|||
diff -up mesa-20100529/configure.ac.mach64 mesa-20100529/configure.ac
|
||||
--- mesa-20100529/configure.ac.mach64 2010-05-29 11:31:22.000000000 +1000
|
||||
+++ mesa-20100529/configure.ac 2010-05-29 18:53:55.000000000 +1000
|
||||
@@ -819,7 +819,7 @@ if test "$mesa_driver" = dri; then
|
||||
diff -up mesa-20110620/configure.ac.no-mach64 mesa-20110620/configure.ac
|
||||
--- mesa-20110620/configure.ac.no-mach64 2011-06-20 12:19:16.000000000 +1000
|
||||
+++ mesa-20110620/configure.ac 2011-06-20 13:52:27.000000000 +1000
|
||||
@@ -1022,7 +1022,7 @@ if test "$mesa_driver" = dri -o "$mesa_d
|
||||
# the new interface. i810 are missing because there is no
|
||||
# x86-64 system where they could *ever* be used.
|
||||
if test "x$DRI_DIRS" = "xyes"; then
|
||||
- DRI_DIRS="i915 i965 mach64 mga r128 r200 r300 r600 radeon \
|
||||
+ DRI_DIRS="i915 i965 mga r128 r200 r300 r600 radeon \
|
||||
savage tdfx unichrome swrast"
|
||||
- DRI_DIRS="i915 i965 mach64 mga nouveau r128 r200 r300 r600 \
|
||||
+ DRI_DIRS="i915 i965 mga nouveau r128 r200 r300 r600 \
|
||||
radeon savage tdfx unichrome swrast"
|
||||
fi
|
||||
;;
|
||||
@@ -827,13 +827,13 @@ if test "$mesa_driver" = dri; then
|
||||
@@ -1030,13 +1030,13 @@ if test "$mesa_driver" = dri -o "$mesa_d
|
||||
# Build only the drivers for cards that exist on PowerPC.
|
||||
# At some point MGA will be added, but not yet.
|
||||
if test "x$DRI_DIRS" = "xyes"; then
|
||||
|
|
@ -26,21 +26,21 @@ diff -up mesa-20100529/configure.ac.mach64 mesa-20100529/configure.ac
|
|||
fi
|
||||
;;
|
||||
esac
|
||||
@@ -850,7 +850,7 @@ if test "$mesa_driver" = dri; then
|
||||
@@ -1050,7 +1050,7 @@ if test "$mesa_driver" = dri -o "$mesa_d
|
||||
fi
|
||||
|
||||
if test "x$DRI_DIRS" = "xyes"; then
|
||||
- DRI_DIRS="i810 i915 i965 mach64 mga r128 r200 r300 r600 radeon tdfx \
|
||||
+ DRI_DIRS="i810 i915 i965 mga r128 r200 r300 r600 radeon tdfx \
|
||||
unichrome savage sis swrast"
|
||||
- DRI_DIRS="i810 i915 i965 mach64 mga nouveau r128 r200 r300 r600 \
|
||||
+ DRI_DIRS="i810 i915 i965 mga nouveau r128 r200 r300 r600 \
|
||||
radeon tdfx unichrome savage sis swrast"
|
||||
fi
|
||||
;;
|
||||
@@ -869,7 +869,7 @@ if test "$mesa_driver" = dri; then
|
||||
@@ -1079,7 +1079,7 @@ if test "$mesa_driver" = dri -o "$mesa_d
|
||||
|
||||
# default drivers
|
||||
if test "x$DRI_DIRS" = "xyes"; then
|
||||
- DRI_DIRS="i810 i915 i965 mach64 mga r128 r200 r300 r600 radeon \
|
||||
+ DRI_DIRS="i810 i915 i965 mga r128 r200 r300 r600 radeon \
|
||||
- DRI_DIRS="i810 i915 i965 mach64 mga nouveau r128 r200 r300 r600 radeon \
|
||||
+ DRI_DIRS="i810 i915 i965 mga nouveau r128 r200 r300 r600 radeon \
|
||||
savage sis tdfx unichrome swrast"
|
||||
fi
|
||||
|
||||
|
|
|
|||
|
|
@ -1,96 +0,0 @@
|
|||
From 9882bff4ce5843b4122a0348acecc7523b9aee22 Mon Sep 17 00:00:00 2001
|
||||
From: Dave Airlie <airlied@redhat.com>
|
||||
Date: Tue, 12 Apr 2011 21:20:48 +1000
|
||||
Subject: [PATCH] nouveau_vieux: fix build since sampler objects merge
|
||||
|
||||
---
|
||||
src/mesa/drivers/dri/nouveau/nv04_state_tex.c | 8 ++++----
|
||||
src/mesa/drivers/dri/nouveau/nv10_state_tex.c | 8 ++++----
|
||||
src/mesa/drivers/dri/nouveau/nv20_state_tex.c | 8 ++++----
|
||||
3 files changed, 12 insertions(+), 12 deletions(-)
|
||||
|
||||
diff --git a/src/mesa/drivers/dri/nouveau/nv04_state_tex.c b/src/mesa/drivers/dri/nouveau/nv04_state_tex.c
|
||||
index 6c96e58..648d6b1 100644
|
||||
--- a/src/mesa/drivers/dri/nouveau/nv04_state_tex.c
|
||||
+++ b/src/mesa/drivers/dri/nouveau/nv04_state_tex.c
|
||||
@@ -82,11 +82,11 @@ nv04_emit_tex_obj(struct gl_context *ctx, int emit)
|
||||
|
||||
if (t->Sampler.MinFilter != GL_NEAREST &&
|
||||
t->Sampler.MinFilter != GL_LINEAR) {
|
||||
- lod_max = CLAMP(MIN2(t->MaxLod, t->_MaxLambda),
|
||||
+ lod_max = CLAMP(MIN2(t->Sampler.MaxLod, t->_MaxLambda),
|
||||
0, 15) + 1;
|
||||
|
||||
lod_bias = CLAMP(ctx->Texture.Unit[i].LodBias +
|
||||
- t->LodBias, -16, 15) * 8;
|
||||
+ t->Sampler.LodBias, -16, 15) * 8;
|
||||
}
|
||||
|
||||
format |= nvgl_wrap_mode(t->Sampler.WrapT) << 28 |
|
||||
@@ -96,9 +96,9 @@ nv04_emit_tex_obj(struct gl_context *ctx, int emit)
|
||||
lod_max << 12 |
|
||||
get_tex_format(ti);
|
||||
|
||||
- filter |= log2i(t->MaxAnisotropy) << 31 |
|
||||
+ filter |= log2i(t->Sampler.MaxAnisotropy) << 31 |
|
||||
nvgl_filter_mode(t->Sampler.MagFilter) << 28 |
|
||||
- log2i(t->MaxAnisotropy) << 27 |
|
||||
+ log2i(t->Sampler.MaxAnisotropy) << 27 |
|
||||
nvgl_filter_mode(t->Sampler.MinFilter) << 24 |
|
||||
(lod_bias & 0xff) << 16;
|
||||
|
||||
diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_tex.c b/src/mesa/drivers/dri/nouveau/nv10_state_tex.c
|
||||
index 1d98b19..620a686 100644
|
||||
--- a/src/mesa/drivers/dri/nouveau/nv10_state_tex.c
|
||||
+++ b/src/mesa/drivers/dri/nouveau/nv10_state_tex.c
|
||||
@@ -183,7 +183,7 @@ nv10_emit_tex_obj(struct gl_context *ctx, int emit)
|
||||
| nvgl_filter_mode(t->Sampler.MinFilter) << 24;
|
||||
|
||||
tx_enable = NV10_3D_TEX_ENABLE_ENABLE
|
||||
- | log2i(t->MaxAnisotropy) << 4;
|
||||
+ | log2i(t->Sampler.MaxAnisotropy) << 4;
|
||||
|
||||
if (t->Target == GL_TEXTURE_RECTANGLE) {
|
||||
BEGIN_RING(chan, celsius, NV10_3D_TEX_NPOT_PITCH(i), 1);
|
||||
@@ -198,9 +198,9 @@ nv10_emit_tex_obj(struct gl_context *ctx, int emit)
|
||||
|
||||
if (t->Sampler.MinFilter != GL_NEAREST &&
|
||||
t->Sampler.MinFilter != GL_LINEAR) {
|
||||
- int lod_min = t->MinLod;
|
||||
- int lod_max = MIN2(t->MaxLod, t->_MaxLambda);
|
||||
- int lod_bias = t->LodBias
|
||||
+ int lod_min = t->Sampler.MinLod;
|
||||
+ int lod_max = MIN2(t->Sampler.MaxLod, t->_MaxLambda);
|
||||
+ int lod_bias = t->Sampler.LodBias
|
||||
+ ctx->Texture.Unit[i].LodBias;
|
||||
|
||||
lod_max = CLAMP(lod_max, 0, 15);
|
||||
diff --git a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
|
||||
index fdbfdf4..eab74ae 100644
|
||||
--- a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
|
||||
+++ b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
|
||||
@@ -195,7 +195,7 @@ nv20_emit_tex_obj(struct gl_context *ctx, int emit)
|
||||
| 2 << 12;
|
||||
|
||||
tx_enable = NV20_3D_TEX_ENABLE_ENABLE
|
||||
- | log2i(t->MaxAnisotropy) << 4;
|
||||
+ | log2i(t->Sampler.MaxAnisotropy) << 4;
|
||||
|
||||
if (t->Target == GL_TEXTURE_RECTANGLE) {
|
||||
BEGIN_RING(chan, kelvin, NV20_3D_TEX_NPOT_PITCH(i), 1);
|
||||
@@ -210,9 +210,9 @@ nv20_emit_tex_obj(struct gl_context *ctx, int emit)
|
||||
|
||||
if (t->Sampler.MinFilter != GL_NEAREST &&
|
||||
t->Sampler.MinFilter != GL_LINEAR) {
|
||||
- int lod_min = t->MinLod;
|
||||
- int lod_max = MIN2(t->MaxLod, t->_MaxLambda);
|
||||
- int lod_bias = t->LodBias
|
||||
+ int lod_min = t->Sampler.MinLod;
|
||||
+ int lod_max = MIN2(t->Sampler.MaxLod, t->_MaxLambda);
|
||||
+ int lod_bias = t->Sampler.LodBias
|
||||
+ ctx->Texture.Unit[i].LodBias;
|
||||
|
||||
lod_max = CLAMP(lod_max, 0, 15);
|
||||
--
|
||||
1.7.4.2
|
||||
|
||||
56
mesa.spec
56
mesa.spec
|
|
@ -12,13 +12,13 @@
|
|||
%define _default_patch_fuzz 2
|
||||
|
||||
%define manpages gl-manpages-1.0.1
|
||||
%define gitdate 20110412
|
||||
%define gitdate 20110730
|
||||
#% define snapshot
|
||||
|
||||
Summary: Mesa graphics libraries
|
||||
Name: mesa
|
||||
Version: 7.11
|
||||
Release: 0.7.%{gitdate}.0%{?dist}
|
||||
Release: 0.18.%{gitdate}.0%{?dist}
|
||||
License: MIT
|
||||
Group: System Environment/Libraries
|
||||
URL: http://www.mesa3d.org
|
||||
|
|
@ -31,7 +31,6 @@ Source2: %{manpages}.tar.bz2
|
|||
Source3: make-git-snapshot.sh
|
||||
Source4: llvmcore.mk
|
||||
|
||||
Patch1: mesa-nouveau-fix-build.patch
|
||||
Patch2: mesa-7.1-nukeglthread-debug.patch
|
||||
Patch3: mesa-no-mach64.patch
|
||||
Patch4: legacy-drivers.patch
|
||||
|
|
@ -215,7 +214,6 @@ Requires: Xorg %(xserver-sdk-abi-requires ansic) %(xserver-sdk-abi-requires vide
|
|||
%prep
|
||||
#setup -q -n Mesa-%{version}%{?snapshot} -b0 -b2
|
||||
%setup -q -n mesa-%{gitdate} -b2
|
||||
%patch1 -p1 -b .nv-fix
|
||||
%patch2 -p1 -b .intel-glthread
|
||||
%patch3 -p1 -b .no-mach64
|
||||
%patch4 -p1 -b .classic
|
||||
|
|
@ -235,11 +233,11 @@ export CFLAGS="$RPM_OPT_FLAGS"
|
|||
export CXXFLAGS="$RPM_OPT_FLAGS"
|
||||
%ifarch %{ix86}
|
||||
# i do not have words for how much the assembly dispatch code infuriates me
|
||||
%define common_flags --enable-selinux --enable-pic --enable-udev --disable-asm
|
||||
%define common_flags --enable-selinux --enable-pic --disable-asm
|
||||
%else
|
||||
%define common_flags --enable-selinux --enable-pic --enable-udev
|
||||
%define common_flags --enable-selinux --enable-pic
|
||||
%endif
|
||||
%define osmesa_flags --with-driver=osmesa %{common_flags} --disable-gallium --with-dri-drivers="" --disable-glu --disable-egl
|
||||
%define osmesa_flags --with-driver=osmesa %{common_flags} --disable-gallium --with-dri-drivers="" --disable-glu --disable-egl --with-gallium-drivers=""
|
||||
|
||||
# first, build osmesa.
|
||||
|
||||
|
|
@ -265,23 +263,16 @@ mv libllvmcore*.so %{_lib}
|
|||
--disable-gl-osmesa \
|
||||
--with-driver=dri \
|
||||
--with-dri-driverdir=%{_libdir}/dri \
|
||||
--with-state-trackers=dri,glx \
|
||||
--enable-egl \
|
||||
--enable-gles1 \
|
||||
--enable-gles2 \
|
||||
--disable-gallium-intel \
|
||||
--disable-gallium-svga \
|
||||
--disable-gallium-egl \
|
||||
%if %{with_hardware}
|
||||
--enable-gallium-llvm \
|
||||
--enable-gallium-radeon \
|
||||
--enable-gallium-r600 \
|
||||
--enable-gallium-nouveau \
|
||||
--with-gallium-drivers=r300,r600,nouveau,swrast \
|
||||
%else
|
||||
--disable-gallium-llvm \
|
||||
--disable-gallium-radeon \
|
||||
--disable-gallium-r600 \
|
||||
--disable-gallium-nouveau \
|
||||
--with-gallium-drivers=swrast \
|
||||
%endif
|
||||
%{?dri_drivers}
|
||||
|
||||
|
|
@ -488,6 +479,39 @@ rm -rf $RPM_BUILD_ROOT
|
|||
%{_libdir}/libOSMesa.so
|
||||
|
||||
%changelog
|
||||
* Sat Jul 30 2011 Dave Airlie <airlied@redhat.com> 7.11-0.18.20110730.0
|
||||
- latest 7.11-rc4
|
||||
|
||||
* Fri Jul 29 2011 Dave Airlie <airlied@redhat.com> 7.11-0.17.20110729.0
|
||||
- latest mesa snapshot of 7.11 branch
|
||||
|
||||
* Sat Jul 09 2011 Dave Airlie <airlied@redhat.com> 7.11-0.16.20110709.0
|
||||
- update to latest 7.11 with additional gm45 regression fix
|
||||
|
||||
* Sun Jun 26 2011 Dave Airlie <airlied@redhat.com> 7.11-0.15.20110626.0
|
||||
- update to latest mesa 7.11 with intel gen5 fix
|
||||
|
||||
* Tue Jun 21 2011 Dave Airlie <airlied@redhat.com> 7.11-0.14.20110621.0
|
||||
- update to latest mesa 7.11 with nvfx g-s fix.
|
||||
|
||||
* Mon Jun 06 2011 Ben Skeggs <bskeggs@redhat.com> 7.11-0.13.20110525.0
|
||||
- nouveau: fix shell segfault on pre-gallium drivers (#708004)
|
||||
|
||||
* Mon May 30 2011 Dan Horák <dan[at]danny.cz> 7.11-0.12.20110525.0
|
||||
- fix the gallium p_config header for non-x86 arches (Dave Airlie)
|
||||
|
||||
* Wed May 25 2011 Dave Airlie <airlied@redhat.com> 7.11-0.11.20110525.0
|
||||
- rebase to latest upstream for llvm fix + r600g cayman/eg support
|
||||
|
||||
* Tue May 10 2011 Dan Horák <dan[at]danny.cz> 7.11-0.10.20110509.0
|
||||
- r300 needs to be explicitely disabled when with_hardware == 0
|
||||
|
||||
* Mon May 09 2011 Dave Airlie <airlied@redhat.com> 7.11-0.9.20110509.0
|
||||
- fix rv6xx regression in last set of changes (#702872)
|
||||
|
||||
* Fri May 06 2011 Dave Airlie <airlied@redhat.com> 7.11-0.8.20110506.0
|
||||
- rebase for better nvc0 driver + radeon rv6xx flushing fixes.
|
||||
|
||||
* Mon Apr 18 2011 Adam Jackson <ajax@redhat.com> 7.11-0.7.20110412.0
|
||||
- Fix intel driver exclusion to be better arched (#697555)
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue