37 lines
1.4 KiB
Diff
37 lines
1.4 KiB
Diff
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From 57f18623fb94891c04f3a395cfd977ea3747ee61 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= <marek.olsak@amd.com>
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Date: Tue, 17 Jan 2017 13:45:42 +0100
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Subject: radeonsi: for the tess barrier, only use emit_waitcnt on SI and LLVM
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3.9+
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Cc: 17.0 13.0 <mesa-stable@lists.freedesktop.org>
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Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
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index f404273..10f40a9 100644
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--- a/src/gallium/drivers/radeonsi/si_shader.c
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+++ b/src/gallium/drivers/radeonsi/si_shader.c
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@@ -5440,10 +5440,13 @@ static void si_llvm_emit_barrier(const struct lp_build_tgsi_action *action,
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struct si_shader_context *ctx = si_shader_context(bld_base);
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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- /* The real barrier instruction isn’t needed, because an entire patch
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+ /* SI only (thanks to a hw bug workaround):
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+ * The real barrier instruction isn’t needed, because an entire patch
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* always fits into a single wave.
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*/
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- if (ctx->type == PIPE_SHADER_TESS_CTRL) {
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+ if (HAVE_LLVM >= 0x0309 &&
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+ ctx->screen->b.chip_class == SI &&
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+ ctx->type == PIPE_SHADER_TESS_CTRL) {
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emit_waitcnt(ctx, LGKM_CNT & VM_CNT);
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return;
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}
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--
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cgit v0.10.2
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