108 lines
3.8 KiB
Diff
108 lines
3.8 KiB
Diff
From 88e57f376eabc375cd9f374369cf9e8e4dcb90af Mon Sep 17 00:00:00 2001
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From: Nemanja Ivanovic <nemanja.i.ibm@gmail.com>
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Date: Mon, 6 Mar 2017 07:32:13 +0000
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Subject: [PATCH 2/3] [PowerPC] Fix failure with STBRX when store is narrower
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than the bswap
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Fixes a crash caused by r296811 by truncating the input of the STBRX node
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when the bswap is wider than i32.
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Fixes https://bugs.llvm.org/show_bug.cgi?id=32140
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Differential Revision: https://reviews.llvm.org/D30615
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297001 91177308-0d34-0410-b5e6-96231b3b80d8
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---
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lib/Target/PowerPC/PPCISelLowering.cpp | 7 ++--
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test/CodeGen/PowerPC/pr32140.ll | 59 ++++++++++++++++++++++++++++++++++
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2 files changed, 64 insertions(+), 2 deletions(-)
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create mode 100644 test/CodeGen/PowerPC/pr32140.ll
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diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
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index c8eb6f1..521bb32 100644
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--- a/lib/Target/PowerPC/PPCISelLowering.cpp
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+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
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@@ -11230,9 +11230,12 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
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// it need to be shifted to the right side before STBRX.
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EVT mVT = cast<StoreSDNode>(N)->getMemoryVT();
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if (Op1VT.bitsGT(mVT)) {
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- int shift = Op1VT.getSizeInBits() - mVT.getSizeInBits();
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+ int Shift = Op1VT.getSizeInBits() - mVT.getSizeInBits();
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BSwapOp = DAG.getNode(ISD::SRL, dl, Op1VT, BSwapOp,
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- DAG.getConstant(shift, dl, MVT::i32));
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+ DAG.getConstant(Shift, dl, MVT::i32));
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+ // Need to truncate if this is a bswap of i64 stored as i32/i16.
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+ if (Op1VT == MVT::i64)
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+ BSwapOp = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, BSwapOp);
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}
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SDValue Ops[] = {
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diff --git a/test/CodeGen/PowerPC/pr32140.ll b/test/CodeGen/PowerPC/pr32140.ll
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new file mode 100644
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index 0000000..827a904
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--- /dev/null
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+++ b/test/CodeGen/PowerPC/pr32140.ll
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@@ -0,0 +1,59 @@
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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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+; RUN: llc -mtriple=powerpc64le-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
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+; RUN: llc -mtriple=powerpc64-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
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+
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+@as = common local_unnamed_addr global i16 0, align 2
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+@bs = common local_unnamed_addr global i16 0, align 2
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+@ai = common local_unnamed_addr global i32 0, align 4
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+@bi = common local_unnamed_addr global i32 0, align 4
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+
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+define void @bswapStorei64Toi32() {
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+; CHECK-LABEL: bswapStorei64Toi32:
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+; CHECK: # BB#0: # %entry
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+; CHECK: lwa 3, 0(3)
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+; CHECK-NEXT: rldicl 3, 3, 32, 32
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+; CHECK-NEXT: stwbrx 3, 0, 4
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+; CHECK-NEXT: blr
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+entry:
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+ %0 = load i32, i32* @ai, align 4
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+ %conv.i = sext i32 %0 to i64
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+ %or26.i = tail call i64 @llvm.bswap.i64(i64 %conv.i)
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+ %conv = trunc i64 %or26.i to i32
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+ store i32 %conv, i32* @bi, align 4
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+ ret void
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+}
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+
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+define void @bswapStorei32Toi16() {
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+; CHECK-LABEL: bswapStorei32Toi16:
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+; CHECK: # BB#0: # %entry
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+; CHECK: lha 3, 0(3)
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+; CHECK-NEXT: srwi 3, 3, 16
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+; CHECK-NEXT: sthbrx 3, 0, 4
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+; CHECK-NEXT: blr
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+entry:
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+ %0 = load i16, i16* @as, align 2
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+ %conv.i = sext i16 %0 to i32
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+ %or26.i = tail call i32 @llvm.bswap.i32(i32 %conv.i)
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+ %conv = trunc i32 %or26.i to i16
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+ store i16 %conv, i16* @bs, align 2
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+ ret void
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+}
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+
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+define void @bswapStorei64Toi16() {
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+; CHECK-LABEL: bswapStorei64Toi16:
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+; CHECK: # BB#0: # %entry
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+; CHECK: lha 3, 0(3)
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+; CHECK-NEXT: rldicl 3, 3, 16, 48
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+; CHECK-NEXT: sthbrx 3, 0, 4
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+; CHECK-NEXT: blr
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+entry:
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+ %0 = load i16, i16* @as, align 2
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+ %conv.i = sext i16 %0 to i64
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+ %or26.i = tail call i64 @llvm.bswap.i64(i64 %conv.i)
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+ %conv = trunc i64 %or26.i to i16
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+ store i16 %conv, i16* @bs, align 2
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+ ret void
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+}
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+
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+declare i32 @llvm.bswap.i32(i32)
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+declare i64 @llvm.bswap.i64(i64)
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--
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1.8.3.1
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