diff --git a/.gitignore b/.gitignore index 5da0b25..ba3c679 100644 --- a/.gitignore +++ b/.gitignore @@ -90,3 +90,5 @@ /llvm-11.1.0rc1.src.tar.xz /llvm-11.1.0rc2.src.tar.xz /llvm-11.1.0rc2.src.tar.xz.sig +/llvm-12.0.0rc1.src.tar.xz +/llvm-12.0.0rc1.src.tar.xz.sig diff --git a/0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch b/0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch deleted file mode 100644 index 80d6a1e..0000000 --- a/0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch +++ /dev/null @@ -1,166 +0,0 @@ -From d851495f2fe614c4c860bda1bd3c80bfbe48360b Mon Sep 17 00:00:00 2001 -From: Jonas Paulsson -Date: Thu, 8 Oct 2020 13:18:29 +0200 -Subject: [PATCH] [SystemZ] Use LA instead of AGR in eliminateFrameIndex(). - -Since AGR clobbers CC it should not be used here. - -Fixes https://bugs.llvm.org/show_bug.cgi?id=47736. - -Review: Ulrich Weigand -Differential Revision: https://reviews.llvm.org/D89034 ---- - .../Target/SystemZ/SystemZRegisterInfo.cpp | 4 +-- - llvm/test/CodeGen/SystemZ/frame-14.ll | 26 +++++++++---------- - llvm/test/CodeGen/SystemZ/frame-16.ll | 4 +-- - 3 files changed, 17 insertions(+), 17 deletions(-) - -diff --git a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp -index 53b06c6e7e6d..88212e52460f 100644 ---- a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp -+++ b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp -@@ -322,8 +322,8 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI, - // Load the high offset into the scratch register and use it as - // an index. - TII->loadImmediate(MBB, MI, ScratchReg, HighOffset); -- BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg) -- .addReg(ScratchReg, RegState::Kill).addReg(BasePtr); -+ BuildMI(MBB, MI, DL, TII->get(SystemZ::LA), ScratchReg) -+ .addReg(BasePtr, RegState::Kill).addImm(0).addReg(ScratchReg); - } - - // Use the scratch register as the base. It then dies here. -diff --git a/llvm/test/CodeGen/SystemZ/frame-14.ll b/llvm/test/CodeGen/SystemZ/frame-14.ll -index e70731249b42..193ff81123c5 100644 ---- a/llvm/test/CodeGen/SystemZ/frame-14.ll -+++ b/llvm/test/CodeGen/SystemZ/frame-14.ll -@@ -85,13 +85,13 @@ define void @f3() { - define void @f4() { - ; CHECK-NOFP-LABEL: f4: - ; CHECK-NOFP: llilh %r1, 8 --; CHECK-NOFP: agr %r1, %r15 -+; CHECK-NOFP: la %r1, 0(%r1,%r15) - ; CHECK-NOFP: mvi 0(%r1), 42 - ; CHECK-NOFP: br %r14 - ; - ; CHECK-FP-LABEL: f4: - ; CHECK-FP: llilh %r1, 8 --; CHECK-FP: agr %r1, %r11 -+; CHECK-FP: la %r1, 0(%r1,%r11) - ; CHECK-FP: mvi 0(%r1), 42 - ; CHECK-FP: br %r14 - %region1 = alloca [524104 x i8], align 8 -@@ -108,13 +108,13 @@ define void @f4() { - define void @f5() { - ; CHECK-NOFP-LABEL: f5: - ; CHECK-NOFP: llilh %r1, 8 --; CHECK-NOFP: agr %r1, %r15 -+; CHECK-NOFP: la %r1, 0(%r1,%r15) - ; CHECK-NOFP: mvi 4095(%r1), 42 - ; CHECK-NOFP: br %r14 - ; - ; CHECK-FP-LABEL: f5: - ; CHECK-FP: llilh %r1, 8 --; CHECK-FP: agr %r1, %r11 -+; CHECK-FP: la %r1, 0(%r1,%r11) - ; CHECK-FP: mvi 4095(%r1), 42 - ; CHECK-FP: br %r14 - %region1 = alloca [524104 x i8], align 8 -@@ -130,13 +130,13 @@ define void @f5() { - define void @f6() { - ; CHECK-NOFP-LABEL: f6: - ; CHECK-NOFP: llilh %r1, 8 --; CHECK-NOFP: agr %r1, %r15 -+; CHECK-NOFP: la %r1, 0(%r1,%r15) - ; CHECK-NOFP: mviy 4096(%r1), 42 - ; CHECK-NOFP: br %r14 - ; - ; CHECK-FP-LABEL: f6: - ; CHECK-FP: llilh %r1, 8 --; CHECK-FP: agr %r1, %r11 -+; CHECK-FP: la %r1, 0(%r1,%r11) - ; CHECK-FP: mviy 4096(%r1), 42 - ; CHECK-FP: br %r14 - %region1 = alloca [524104 x i8], align 8 -@@ -155,13 +155,13 @@ define void @f6() { - define void @f7() { - ; CHECK-NOFP-LABEL: f7: - ; CHECK-NOFP: llilh %r1, 23 --; CHECK-NOFP: agr %r1, %r15 -+; CHECK-NOFP: la %r1, 0(%r1,%r15) - ; CHECK-NOFP: mviy 65535(%r1), 42 - ; CHECK-NOFP: br %r14 - ; - ; CHECK-FP-LABEL: f7: - ; CHECK-FP: llilh %r1, 23 --; CHECK-FP: agr %r1, %r11 -+; CHECK-FP: la %r1, 0(%r1,%r11) - ; CHECK-FP: mviy 65535(%r1), 42 - ; CHECK-FP: br %r14 - %region1 = alloca [1048400 x i8], align 8 -@@ -178,13 +178,13 @@ define void @f7() { - define void @f8() { - ; CHECK-NOFP-LABEL: f8: - ; CHECK-NOFP: llilh %r1, 24 --; CHECK-NOFP: agr %r1, %r15 -+; CHECK-NOFP: la %r1, 0(%r1,%r15) - ; CHECK-NOFP: mvi 7(%r1), 42 - ; CHECK-NOFP: br %r14 - ; - ; CHECK-FP-LABEL: f8: - ; CHECK-FP: llilh %r1, 24 --; CHECK-FP: agr %r1, %r11 -+; CHECK-FP: la %r1, 0(%r1,%r11) - ; CHECK-FP: mvi 7(%r1), 42 - ; CHECK-FP: br %r14 - %region1 = alloca [1048408 x i8], align 8 -@@ -233,7 +233,7 @@ define void @f10(i32 *%vptr) { - ; CHECK-NOFP-LABEL: f10: - ; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15) - ; CHECK-NOFP: llilh [[REGISTER]], 8 --; CHECK-NOFP: agr [[REGISTER]], %r15 -+; CHECK-NOFP: la [[REGISTER]], 0([[REGISTER]],%r15) - ; CHECK-NOFP: mvi 0([[REGISTER]]), 42 - ; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) - ; CHECK-NOFP: br %r14 -@@ -241,7 +241,7 @@ define void @f10(i32 *%vptr) { - ; CHECK-FP-LABEL: f10: - ; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11) - ; CHECK-FP: llilh [[REGISTER]], 8 --; CHECK-FP: agr [[REGISTER]], %r11 -+; CHECK-FP: la [[REGISTER]], 0([[REGISTER]],%r11) - ; CHECK-FP: mvi 0([[REGISTER]]), 42 - ; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11) - ; CHECK-FP: br %r14 -@@ -273,7 +273,7 @@ define void @f11(i32 *%vptr) { - ; CHECK-NOFP: stmg %r6, %r15, - ; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15) - ; CHECK-NOFP: llilh [[REGISTER]], 8 --; CHECK-NOFP: agr [[REGISTER]], %r15 -+; CHECK-NOFP: la [[REGISTER]], 0([[REGISTER]],%r15) - ; CHECK-NOFP: mvi 0([[REGISTER]]), 42 - ; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) - ; CHECK-NOFP: lmg %r6, %r15, -diff --git a/llvm/test/CodeGen/SystemZ/frame-16.ll b/llvm/test/CodeGen/SystemZ/frame-16.ll -index ae8a041ae110..a95c58207afb 100644 ---- a/llvm/test/CodeGen/SystemZ/frame-16.ll -+++ b/llvm/test/CodeGen/SystemZ/frame-16.ll -@@ -311,13 +311,13 @@ define void @f11(i32 *%vptr, i8 %byte) { - define void @f12(i8 %byte, i64 %index) { - ; CHECK-NOFP-LABEL: f12: - ; CHECK-NOFP: llilh %r1, 8 --; CHECK-NOFP: agr %r1, %r15 -+; CHECK-NOFP: la %r1, 0(%r1,%r15) - ; CHECK-NOFP: stc %r2, 0(%r3,%r1) - ; CHECK-NOFP: br %r14 - ; - ; CHECK-FP-LABEL: f12: - ; CHECK-FP: llilh %r1, 8 --; CHECK-FP: agr %r1, %r11 -+; CHECK-FP: la %r1, 0(%r1,%r11) - ; CHECK-FP: stc %r2, 0(%r3,%r1) - ; CHECK-FP: br %r14 - %region1 = alloca [524104 x i8], align 8 --- -2.26.2 - diff --git a/0001-gcc11.patch b/0001-gcc11.patch deleted file mode 100644 index 67629a3..0000000 --- a/0001-gcc11.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff --git a/utils/benchmark/src/benchmark_register.h b/utils/benchmark/src/benchmark_register.h -index 0705e219..4caa5ad4 100644 ---- a/llvm/utils/benchmark/src/benchmark_register.h -+++ b/llvm/utils/benchmark/src/benchmark_register.h -@@ -1,6 +1,7 @@ - #ifndef BENCHMARK_REGISTER_H - #define BENCHMARK_REGISTER_H - -+#include - #include - - #include "check.h" diff --git a/builtin_mul_overflow.patch b/builtin_mul_overflow.patch deleted file mode 100644 index 3c36784..0000000 --- a/builtin_mul_overflow.patch +++ /dev/null @@ -1,25 +0,0 @@ -diff --git a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp -index cf02ef1e83f3..e370f8c34809 100644 ---- a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp -+++ b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp -@@ -3885,8 +3885,8 @@ void LSRInstance::GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx, - // Check that the multiplication doesn't overflow. - if (Base.BaseOffset == std::numeric_limits::min() && Factor == -1) - continue; -- int64_t NewBaseOffset = (uint64_t)Base.BaseOffset * Factor; -- if (NewBaseOffset / Factor != Base.BaseOffset) -+ int64_t NewBaseOffset; -+ if(__builtin_mul_overflow(Base.BaseOffset, Factor, &NewBaseOffset)) - continue; - // If the offset will be truncated at this use, check that it is in bounds. - if (!IntTy->isPointerTy() && -@@ -3897,8 +3897,7 @@ void LSRInstance::GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx, - int64_t Offset = LU.MinOffset; - if (Offset == std::numeric_limits::min() && Factor == -1) - continue; -- Offset = (uint64_t)Offset * Factor; -- if (Offset / Factor != LU.MinOffset) -+ if(__builtin_mul_overflow(Offset, Factor, &Offset)) - continue; - // If the offset will be truncated at this use, check that it is in bounds. - if (!IntTy->isPointerTy() && diff --git a/llvm.spec b/llvm.spec index 040cd1f..631c9ab 100644 --- a/llvm.spec +++ b/llvm.spec @@ -10,11 +10,11 @@ %global llvm_libdir %{_libdir}/%{name} %global build_llvm_libdir %{buildroot}%{llvm_libdir} -%global rc_ver 2 -%global baserelease 3 +%global rc_ver 1 +%global baserelease 1 %global llvm_srcdir llvm-%{version}%{?rc_ver:rc%{rc_ver}}.src -%global maj_ver 11 -%global min_ver 1 +%global maj_ver 12 +%global min_ver 0 %global patch_ver 0 %if %{with compat_build} @@ -61,14 +61,6 @@ Source3: run-lit-tests Source4: lit.fedora.cfg.py %endif -# Fix coreos-installer test crash on s390x (rhbz#1883457), https://reviews.llvm.org/D89034 -Patch1: 0001-SystemZ-Use-LA-instead-of-AGR-in-eliminateFrameIndex.patch - -Patch2: 0001-gcc11.patch - -# See https://bugzilla.redhat.com/show_bug.cgi?id=1916576 -Patch3: builtin_mul_overflow.patch - BuildRequires: gcc BuildRequires: gcc-c++ BuildRequires: cmake @@ -292,7 +284,7 @@ touch %{buildroot}%{_bindir}/llvm-config # Fix some man pages ln -s llvm-config.1 %{buildroot}%{_mandir}/man1/llvm-config-%{__isa_bits}.1 -mv %{buildroot}%{_mandir}/man1/tblgen.1 %{buildroot}%{_mandir}/man1/llvm-tblgen.1 +mv %{buildroot}%{_mandir}/man1/*tblgen.1 %{buildroot}%{_mandir}/man1/llvm-tblgen.1 # Install binaries needed for lit tests %global test_binaries llvm-isel-fuzzer llvm-opt-fuzzer @@ -550,6 +542,9 @@ fi %endif %changelog +* Tue Feb 2 2021 Serge Guelton - 12.0.0-0.1.rc1 +- 12.0.0-rc1 release + * Tue Jan 26 2021 Fedora Release Engineering - 11.1.0-0.3.rc2 - Rebuilt for https://fedoraproject.org/wiki/Fedora_34_Mass_Rebuild diff --git a/sources b/sources index 8030fde..c4335d1 100644 --- a/sources +++ b/sources @@ -1,2 +1,2 @@ -SHA512 (llvm-11.1.0rc2.src.tar.xz) = 4293bedabfacc3de5384b5567eb69d4ae19095540c31cf1f46b8e841db36b28215353aace2e55ccc15a069a63ba2954b2c969ad6337bebaa8877248a2dca024b -SHA512 (llvm-11.1.0rc2.src.tar.xz.sig) = a6465924e10cf8778c23c7d25c83ac3240611fc1045b55651a2f33aa1636357e86cc4df020a5603c3ae07a0185f769df9d348e8b8321e0db7eada81497327dd1 +SHA512 (llvm-12.0.0rc1.src.tar.xz) = 2cc987a8bcdd91cbd7f404501144761239c7023a066efd490ffb083c0de9062712eb1f6e8e9fb066298b3feb6404f7b6791ecde05d42bf39b533e3fc22f46afa +SHA512 (llvm-12.0.0rc1.src.tar.xz.sig) = ac0844ec5340a9108ef1b069119c9f2373a814c144e8092a9a7e7088abe156d1ca0a73d838e28d0e7749419bfe3d37a51580ad97acd37c0dffa7a29bf9de5eb9