48 lines
21 KiB
Diff
48 lines
21 KiB
Diff
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diff -Naur lldb-12.0.0rc1.src.orig/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h lldb-12.0.0rc1.src/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
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--- lldb-12.0.0rc1.src.orig/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h 2021-02-17 10:17:19.000000000 +0100
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+++ lldb-12.0.0rc1.src/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h 2021-02-17 14:59:48.000000000 +0100
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@@ -14,7 +14,8 @@
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#include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
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#include "Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h"
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-#include <asm/ptrace.h>
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+#include <sys/ptrace.h>
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+#include <linux/ptrace.h>
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namespace lldb_private {
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namespace process_linux {
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diff -Naur lldb-12.0.0rc1.src.orig/source/Plugins/Process/Linux/.NativeRegisterContextLinux_arm64.h.swp lldb-12.0.0rc1.src/source/Plugins/Process/Linux/.NativeRegisterContextLinux_arm64.h.swp
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--- lldb-12.0.0rc1.src.orig/source/Plugins/Process/Linux/.NativeRegisterContextLinux_arm64.h.swp 1970-01-01 01:00:00.000000000 +0100
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+++ lldb-12.0.0rc1.src/source/Plugins/Process/Linux/.NativeRegisterContextLinux_arm64.h.swp 2021-02-17 14:59:48.000000000 +0100
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@@ -0,0 +1,29 @@
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+b0VIM 7.4 T!-`<60><><01>` sguelton sguelton.remote.csb ~sguelton/fedpkg/lldb/lldb-12.0.0rc1.src/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h utf-8
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+ <00> <00> <00> <00> <00> N M <00> <00> <00> <00> T S " ! <00> <00> <00> o n - <00> <00> <00> <00> } | I <00> <00> <00> <00> O N <00> <00> <00> <00> <00> <00> <00> } | _ ^ @ ? <00> o 3 2 <00> <00> <00> <00> <00> <00> <00> o n P O struct user_pt_regs m_gpr_arm64; // 64-bit general purpose registers. bool m_sve_header_is_valid; bool m_sve_buffer_is_valid; bool m_fpu_is_valid; bool m_gpr_is_valid; private: size_t GetFPRSize() override { return sizeof(m_fpr); } void *GetFPRBuffer() override { return &m_fpr; } size_t GetGPRBufferSize() { return sizeof(m_gpr_arm64); } // from GetGPRSize which returns sizeof RegisterInfoPOSIX_arm64::GPR. // GetGPRBufferSize returns sizeof arm64 GPR ptrace buffer, it is different void *GetGPRBuffer() override { return &m_gpr_arm64; } Status WriteFPR() override; Status ReadFPR() override; Status WriteGPR() override; Status ReadGPR() override; protected: enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK }; // Debug register type select bool WatchpointIsEnabled(uint32_t wp_index); uint32_t GetWatchpointSize(uint32_t wp_index); lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override; lldb::addr_t GetWatchpointHitAddress(uint32_t wp_index) override; lldb::addr_t trap_addr) override; Status GetWatchpointHitIndex(uint32_t &wp_index, Status ClearAllHardwareWatchpoints() override; bool ClearHardwareWatchpoint(uint32_t hw_index) override; uint32_t watch_flags) override; uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size, uint32_t NumSupportedHardwareWatchpoints() override; lldb::addr_t trap_addr) override; Status GetHardwareBreakHitIndex(uint32_t &bp_index, Status ClearAllHardwareBreakpoints() override; bool ClearHardwareBreakpoint(uint32_t hw_idx) override; uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override; uint32_t NumSupportedHardwareBreakpoints() override; // Hardware breakpoints/watchpoint management functions bool RegisterOffsetIsDynamic() const override { return true; } GetExpeditedRegisters(ExpeditedRegs expType) const override; std::vector<uint32_t> void InvalidateAllRegisters() override; Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; Status ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; const RegisterValue ®_value) override; Status WriteRegister(const RegisterInfo *reg_info, RegisterValue ®_value) override; Status ReadRegister(const RegisterInfo *reg_info, const RegisterSet *GetRegisterSet(uint32_t set_index) const override; uint32_t GetUserRegisterCount() const override; uint32_t GetRegisterSetCount() const override; NativeThreadProtocol &native_thread); NativeRegisterContextLinux_arm64(const ArchSpec &target_arch, public: class NativeRegisterContextLinux_arm64 : public NativeRegisterContextLinux { class NativeProcessLinux; namespace process_linux { namespace lldb_private {#include <linux/ptrace.h> #include "Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h" #include "Plugins/Process/Linux/NativeRegisterContextLinux.h" #define lldb_NativeRegisterContextLinux_arm64_h #ifndef lldb_NativeRegisterContextLinux_arm64_h #if defined(__arm64__) || defined(__aarch64__) //===----------------------------------------------------------------------===// // // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // See https://llvm.org/LICENSE.txt for license information. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // //===-- NativeRegisterContextLinux_arm64.h ---------------------*- C++ -*-===// ad
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+ <00> <00> <00> <00> <00> <00> U T 1 0 <00> <00> <00> <00> <00> <00> u t = < #endif // defined (__arm64__) || defined (__aarch64__) #endif // #ifndef lldb_NativeRegisterContextLinux_arm64_h } // namespace lldb_private } // namespace process_linux }; uint32_t CalculateSVEOffset(const RegisterInfo *reg_info) const; void ConfigureRegisterContext(); RegisterInfoPOSIX_arm64 &GetRegisterInfo() const; uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const; Status WriteHardwareDebugRegs(int hwbType); Status ReadHardwareDebugInfo(); size_t GetSVEBufferSize() { return m_sve_ptrace_payload.size(); } size_t GetSVEHeaderSize() { return sizeof(m_sve_header); } void *GetSVEBuffer(); void *GetSVEHeader() { return &m_sve_header; } void SetSVERegVG(uint64_t vg) { m_sve_header.vl = vg * 8; } uint64_t GetSVERegVG() { return m_sve_header.vl / 8; } bool IsSVE(unsigned reg) const; Status WriteSVEHeader(); Status ReadSVEHeader(); Status WriteAllSVE(); Status ReadAllSVE(); bool IsFPR(unsigned reg) const; bool IsGPR(unsigned reg) const; bool m_refresh_hwdebug_info; uint32_t m_max_hbp_supported; uint32_t m_max_hwp_supported; struct DREG m_hwp_regs[16]; // Arm native linux hardware watchpoints struct DREG m_hbr_regs[16]; // Arm native linux hardware breakpoints }; uint32_t refcount; // Serves as enable/disable and reference counter. uint32_t control; // Breakpoint/watchpoint control value. lldb::addr_t real_addr; // Address value that should cause target to stop. // occurred. lldb::addr_t hit_addr; // Address at which last watchpoint trigger exception lldb::addr_t address; // Breakpoint/watchpoint address value. struct DREG { // Debug register info for hardware breakpoints and watchpoints management. std::vector<uint8_t> m_sve_ptrace_payload; struct user_sve_header m_sve_header; SVEState m_sve_state; m_fpr; // floating-point registers including extended register sets. RegisterInfoPOSIX_arm64::FPU ad <00> j e <00> <00> <00> <00> <00> <00> ~ 1 ) <00> <00> <00> n m ; : <00>
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+ <00> <00> <00> P O <00> <00> <00> l k ' & <00> <00> <00> <00> <00> <00> b * ) <00> <00> <00> <00> <00> <00> <00> j i <00> <00> <00> c b ) ( <00> <00> <00> <00> <00> k j struct user_pt_regs m_gpr_arm64; // 64-bit general purpose registers. bool m_sve_header_is_valid; bool m_sve_buffer_is_valid; bool m_fpu_is_valid; bool m_gpr_is_valid; private: size_t GetFPRSize() override { return sizeof(m_fpr); } void *GetFPRBuffer() override { return &m_fpr; } size_t GetGPRBufferSize() { return sizeof(m_gpr_arm64); } // from GetGPRSize which returns sizeof RegisterInfoPOSIX_arm64::GPR. // GetGPRBufferSize returns sizeof arm64 GPR ptrace buffer, it is different void *GetGPRBuffer() override { return &m_gpr_arm64; } Status WriteFPR() override; Status ReadFPR() override; Status WriteGPR() override; Status ReadGPR() override; protected: enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK }; // Debug register type select bool WatchpointIsEnabled(uint32_t wp_index); uint32_t GetWatchpointSize(uint32_t wp_index); lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override; lldb::addr_t GetWatchpointHitAddress(uint32_t wp_index) override; lldb::addr_t trap_addr) override; Status GetWatchpointHitIndex(uint32_t &wp_index, Status ClearAllHardwareWatchpoints() override; bool ClearHardwareWatchpoint(uint32_t hw_index) override; uint32_t watch_flags) override; uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size, uint32_t NumSupportedHardwareWatchpoints() override; lldb::addr_t trap_addr) override; Status GetHardwareBreakHitIndex(uint32_t &bp_index, Status ClearAllHardwareBreakpoints() override; bool ClearHardwareBreakpoint(uint32_t hw_idx) override; uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override; uint32_t NumSupportedHardwareBreakpoints() override; // Hardware breakpoints/watchpoint management functions bool RegisterOffsetIsDynamic() const override { return true; } GetExpeditedRegisters(ExpeditedRegs expType) const override; std::vector<uint32_t> void InvalidateAllRegisters() override; Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; Status ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; const RegisterValue ®_value) override; Status WriteRegister(const RegisterInfo *reg_info, RegisterValue ®_value) override; Status ReadRegister(const RegisterInfo *reg_info, const RegisterSet *GetRegisterSet(uint32_t set_index) const override; uint32_t GetUserRegisterCount() const override; uint32_t GetRegisterSetCount() const override; NativeThreadProtocol &native_thread); NativeRegisterContextLinux_arm64(const ArchSpec &target_arch, public: class NativeRegisterContextLinux_arm64 : public NativeRegisterContextLinux { class NativeProcessLinux; namespace process_linux { namespace lldb_private { #include <linux/ptrace.h> #include <sys/ptrace.h>
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\ No newline at end of file
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