143 lines
3.8 KiB
Diff
143 lines
3.8 KiB
Diff
From ac0e85360cd8f25160b67ee9fb45663d20f82c1d Mon Sep 17 00:00:00 2001
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From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Tue, 19 Jun 2018 16:51:13 +0100
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Subject: [PATCH 17/19] cpu: add CPU features and model for indirect branch
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prediction protection
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CVE-2017-5715
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
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---
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src/cpu/cpu_map.xml | 44 ++++++++++++++++++++++++++++++++++++++++++++
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1 file changed, 44 insertions(+)
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diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
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index 8e7ac4973d..c31e7ce36a 100644
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--- a/src/cpu/cpu_map.xml
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+++ b/src/cpu/cpu_map.xml
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@@ -283,6 +283,9 @@
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<feature name='avx512-4fmaps'>
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<cpuid eax_in='0x07' ecx_in='0x00' edx='0x00000008'/>
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</feature>
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+ <feature name='spec-ctrl'>
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+ <cpuid eax_in='0x07' ecx_in='0x00' edx='0x04000000'/>
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+ </feature>
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<!-- Processor Extended State Enumeration sub leaf 1 -->
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<feature name='xsaveopt'>
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@@ -411,6 +414,11 @@
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<cpuid eax_in='0x80000007' edx='0x00000100'/>
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</feature>
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+ <!-- More AMD-specific features -->
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+ <feature name='ibpb'>
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+ <cpuid eax_in='0x80000008' ebx='0x00001000'/>
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+ </feature>
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+
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<!-- models -->
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<model name='486'>
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<feature name='fpu'/>
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@@ -857,6 +865,10 @@
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<feature name='syscall'/>
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<feature name='tsc'/>
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</model>
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+ <model name='Nehalem-IBRS'>
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+ <model name='Nehalem'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='Westmere'>
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<signature family='6' model='44'/>
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@@ -894,6 +906,10 @@
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<feature name='syscall'/>
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<feature name='tsc'/>
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</model>
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+ <model name='Westmere-IBRS'>
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+ <model name='Westmere'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='SandyBridge'>
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<signature family='6' model='42'/>
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@@ -937,6 +953,10 @@
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<feature name='x2apic'/>
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<feature name='xsave'/>
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</model>
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+ <model name='SandyBridge-IBRS'>
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+ <model name='SandyBridge'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='IvyBridge'>
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<signature family='6' model='58'/>
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@@ -986,6 +1006,10 @@
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<feature name='x2apic'/>
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<feature name='xsave'/>
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</model>
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+ <model name='IvyBridge-IBRS'>
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+ <model name='IvyBridge'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='Haswell-noTSX'>
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<signature family='6' model='60'/>
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@@ -1039,6 +1063,10 @@
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<feature name='x2apic'/>
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<feature name='xsave'/>
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</model>
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+ <model name='Haswell-noTSX-IBRS'>
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+ <model name='Haswell-noTSX'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='Haswell'>
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<signature family='6' model='60'/>
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@@ -1094,6 +1122,10 @@
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<feature name='x2apic'/>
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<feature name='xsave'/>
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</model>
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+ <model name='Haswell-IBRS'>
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+ <model name='Haswell'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='Broadwell-noTSX'>
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<signature family='6' model='61'/>
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@@ -1151,6 +1183,10 @@
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<feature name='x2apic'/>
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<feature name='xsave'/>
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</model>
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+ <model name='Broadwell-noTSX-IBRS'>
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+ <model name='Broadwell-noTSX'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='Broadwell'>
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<signature family='6' model='61'/>
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@@ -1210,6 +1246,10 @@
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<feature name='x2apic'/>
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<feature name='xsave'/>
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</model>
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+ <model name='Broadwell-IBRS'>
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+ <model name='Broadwell'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<model name='Skylake-Client'>
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<signature family='6' model='94'/>
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@@ -1278,6 +1318,10 @@
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<feature name='xsavec'/>
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<feature name='xsaveopt'/>
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</model>
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+ <model name='Skylake-Client-IBRS'>
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+ <model name='Skylake-Client'/>
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+ <feature name='spec-ctrl'/>
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+ </model>
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<!-- AMD CPUs -->
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<model name='athlon'>
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--
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2.17.0
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