Add new CPU features for speculative store bypass (CVE-2018-3639)
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
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From 519a6adb135959709fefbe30b7f40de436dd2f16 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= <berrange@redhat.com>
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Date: Mon, 21 May 2018 23:05:07 +0100
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Subject: [PATCH 1/2] cpu: define the 'ssbd' CPUID feature bit (CVE-2018-3639)
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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New microcode introduces the "Speculative Store Bypass Disable"
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CPUID feature bit. This needs to be exposed to guest OS to allow
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them to protect against CVE-2018-3639.
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Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
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Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
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(cherry picked from commit 1dbca2eccad58d91a5fd33962854f1a653638182)
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---
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src/cpu/cpu_map.xml | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
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index 00a43b172c..245aec3309 100644
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--- a/src/cpu/cpu_map.xml
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+++ b/src/cpu/cpu_map.xml
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@@ -298,6 +298,9 @@
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<feature name='spec-ctrl'>
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<cpuid eax_in='0x07' ecx_in='0x00' edx='0x04000000'/>
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</feature>
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+ <feature name='ssbd'>
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+ <cpuid eax_in='0x07' ecx_in='0x00' edx='0x80000000'/>
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+ </feature>
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<!-- Processor Extended State Enumeration sub leaf 1 -->
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<feature name='xsaveopt'>
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--
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2.17.0
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@ -0,0 +1,47 @@
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From 40cf57b55f3af94163d7ef3d50aec6c5c79c139d Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= <berrange@redhat.com>
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Date: Mon, 21 May 2018 23:05:08 +0100
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Subject: [PATCH 2/2] cpu: define the 'virt-ssbd' CPUID feature bit
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(CVE-2018-3639)
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Some AMD processors only support a non-architectural means of
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enabling Speculative Store Bypass Disable. To allow simplified
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handling in virtual environments, hypervisors will expose an
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architectural definition through CPUID bit 0x80000008_EBX[25].
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This needs to be exposed to guest OS running on AMD x86 hosts to
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allow them to protect against CVE-2018-3639.
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Note that since this CPUID bit won't be present in the host CPUID
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results on physical hosts, it will not be enabled automatically
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in guests configured with "host-model" CPU unless using QEMU
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version >= 2.9.0. Thus for older versions of QEMU, this feature
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must be manually enabled using policy=force. Guests using the
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"host-passthrough" CPU mode do not need special handling.
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Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
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Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
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(cherry picked from commit 9267342206ce17f6933d57a3128cdc504d5945c9)
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---
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src/cpu/cpu_map.xml | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
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index 245aec3309..96daa0f9af 100644
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--- a/src/cpu/cpu_map.xml
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+++ b/src/cpu/cpu_map.xml
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@@ -433,6 +433,9 @@
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<feature name='ibpb'>
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<cpuid eax_in='0x80000008' ebx='0x00001000'/>
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</feature>
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+ <feature name='virt-ssbd'>
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+ <cpuid eax_in='0x80000008' ebx='0x02000000'/>
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+ </feature>
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<!-- models -->
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<model name='486'>
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--
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2.17.0
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@ -247,7 +247,7 @@
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Summary: Library providing a simple virtualization API
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Name: libvirt
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Version: 4.1.0
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Release: 2%{?dist}%{?extra_release}
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Release: 3%{?dist}%{?extra_release}
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License: LGPLv2+
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Group: Development/Libraries
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BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root
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@ -258,6 +258,8 @@ URL: https://libvirt.org/
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%endif
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Source: https://libvirt.org/sources/%{?mainturl}libvirt-%{version}.tar.xz
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Patch1: 0001-tests-force-use-of-NORMAL-TLS-priority-in-test-suite.patch
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Patch2: 0001-cpu-define-the-ssbd-CPUID-feature-bit-CVE-2018-3639.patch
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Patch3: 0002-cpu-define-the-virt-ssbd-CPUID-feature-bit-CVE-2018-.patch
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Requires: libvirt-daemon = %{version}-%{release}
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Requires: libvirt-daemon-config-network = %{version}-%{release}
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@ -2192,6 +2194,9 @@ exit 0
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%changelog
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* Mon Jun 18 2018 Daniel P. Berrangé <berrange@redhat.com> - 4.1.0-3
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- Add new CPU features for speculative store bypass (CVE-2018-3639)
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* Wed Mar 21 2018 Daniel P. Berrangé <berrange@redhat.com> - 4.1.0-2
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- Fix systemd macro argument with line continuations (rhbz#1558648)
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