123 lines
3.2 KiB
Diff
123 lines
3.2 KiB
Diff
From 9b6035bc63cb1c00eea32739ba6119ff114588ea Mon Sep 17 00:00:00 2001
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From: yangwei1 <yangwei1@eswincomputing.com>
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Date: Thu, 23 May 2024 20:30:07 +0800
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Subject: [PATCH 026/222] fix:modify ina226 addr and hold time
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Changelogs:
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1.modify ina226 addr form 0x4c to 0x48 in i2c11
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2.modify name of hold time from iic_hold_time to i2c-sda-hold-time-ns
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---
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arch/riscv/boot/dts/eswin/eic7700-evb-a2.dts | 22 +++++++++-----------
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arch/riscv/boot/dts/eswin/eic7700-evb.dts | 21 +++++++++----------
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2 files changed, 20 insertions(+), 23 deletions(-)
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diff --git a/arch/riscv/boot/dts/eswin/eic7700-evb-a2.dts b/arch/riscv/boot/dts/eswin/eic7700-evb-a2.dts
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index 8c2b945ed8a9..519c74d06f0e 100644
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--- a/arch/riscv/boot/dts/eswin/eic7700-evb-a2.dts
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+++ b/arch/riscv/boot/dts/eswin/eic7700-evb-a2.dts
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@@ -793,35 +793,33 @@ rtc@51 {
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&d0_aon_i2c1 {
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/* ina226x4 */
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status = "okay";
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- eswin,syscfg = <&d0_sys_con 0x3C0 15>;
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- iic_hold_time = <0x40>;
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-
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- u80_cpu: ina226@45 {
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+ i2c-sda-hold-time-ns = <0x40>;
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+ vdd_cpu: ina226@45 {
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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- label = "ina226-u80_CPU";
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+ label = "vdd_cpu";
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reg = <0x45>;
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shunt-resistor = <1000>;
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};
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- u82_soc: ina226@44 {
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+ vdd_soc: ina226@44 {
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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- label = "ina226-u82_soc";
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+ label = "vdd_soc";
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reg = <0x44>;
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shunt-resistor = <1000>;
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};
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- u83_lpddr4: ina226@41 {
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+ vdd_lpddr: ina226@41 {
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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- label = "ina226-u83_lpddr4";
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+ label = "vdd_lpddr";
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reg = <0x41>;
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shunt-resistor = <1000>;
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};
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- u99_dc: ina226@4c {
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+ dc_in: ina226@48 {
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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- label = "ina226-u99_dc";
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- reg = <0x4c>;
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+ label = "dc_in";
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+ reg = <0x48>;
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shunt-resistor = <1000>;
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};
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};
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diff --git a/arch/riscv/boot/dts/eswin/eic7700-evb.dts b/arch/riscv/boot/dts/eswin/eic7700-evb.dts
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index c627133f179c..a1e0766efd04 100644
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--- a/arch/riscv/boot/dts/eswin/eic7700-evb.dts
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+++ b/arch/riscv/boot/dts/eswin/eic7700-evb.dts
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@@ -752,8 +752,7 @@ rtc@51 {
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&d0_aon_i2c1 {
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/* mpq8785 & ina226x4 */
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status = "okay";
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- eswin,syscfg = <&d0_sys_con 0x3C0 15>;
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- iic_hold_time = <0x40>;
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+ i2c-sda-hold-time-ns = <0x40>;
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mpq8785@10 {
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compatible = "mps,mpq8785";
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reg = <0x10>;
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@@ -771,32 +770,32 @@ npu_vcc1:npu_svcc{
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};
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};
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};
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- u80_cpu: ina226@45 {
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+ vdd_cpu: ina226@45 {
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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- label = "ina226-u80_CPU";
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+ label = "vdd_cpu";
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reg = <0x45>;
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shunt-resistor = <1000>;
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};
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- u82_soc: ina226@44 {
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+ vdd_soc: ina226@44 {
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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- label = "ina226-u82_soc";
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+ label = "vdd_soc";
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reg = <0x44>;
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shunt-resistor = <1000>;
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};
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- u83_lpddr4: ina226@41 {
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+ vdd_lpddr: ina226@41 {
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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- label = "ina226-u83_lpddr4";
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+ label = "vdd_lpddr";
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reg = <0x41>;
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shunt-resistor = <1000>;
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};
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- u99_dc: ina226@4c {
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+ dc_in: ina226@48 {
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compatible = "ti,ina226";
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#io-channel-cells = <1>;
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- label = "ina226-u99_dc";
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- reg = <0x4c>;
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+ label = "dc_in";
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+ reg = <0x48>;
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shunt-resistor = <1000>;
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};
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};
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--
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2.47.0
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