274 lines
7.1 KiB
Diff
274 lines
7.1 KiB
Diff
From 624e057827435de39274c34e20c2d937cb9d4ac3 Mon Sep 17 00:00:00 2001
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From: Peter Robinson <pbrobinson@gmail.com>
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Date: Thu, 31 May 2018 19:08:12 +0100
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Subject: [PATCH] bcm2835: cpufreq: add CPU frequency control driver
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Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
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---
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arch/arm/boot/dts/bcm2835-rpi.dtsi | 7 ++
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arch/arm/boot/dts/bcm2837.dtsi | 33 +++++++
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drivers/clk/bcm/Kconfig | 8 ++
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drivers/clk/bcm/Makefile | 1 +
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drivers/clk/bcm/clk-raspberrypi.c | 138 +++++++++++++++++++++++++++++
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5 files changed, 187 insertions(+)
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create mode 100644 drivers/clk/bcm/clk-raspberrypi.c
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diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
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index 6c3cfaa77f3d..e6d1627ec421 100644
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--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
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+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
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@@ -35,6 +35,13 @@
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reg = <0x7e00b840 0xf>;
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interrupts = <0 2>;
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};
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+
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+ arm_clk: arm_clk {
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+ compatible = "raspberrypi,bcm2835-cpu";
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+ clocks = <&clocks BCM2835_CLOCK_VPU>;
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+ #clock-cells = <0>;
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+ clock-output-names = "arm";
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+ };
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};
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};
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diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi
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index 7704bb029605..c24176282a1f 100644
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--- a/arch/arm/boot/dts/bcm2837.dtsi
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+++ b/arch/arm/boot/dts/bcm2837.dtsi
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@@ -38,6 +38,9 @@
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reg = <0>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0x000000d8>;
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+ clocks = <&arm_clk>;
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+ clock-names = "cpu";
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+ operating-points-v2 = <&cpu0_opp_table>;
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};
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cpu1: cpu@1 {
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@@ -46,6 +49,9 @@
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reg = <1>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0x000000e0>;
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+ clocks = <&arm_clk>;
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+ clock-names = "cpu";
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+ operating-points-v2 = <&cpu0_opp_table>;
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};
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cpu2: cpu@2 {
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@@ -54,6 +60,9 @@
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reg = <2>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0x000000e8>;
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+ clocks = <&arm_clk>;
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+ clock-names = "cpu";
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+ operating-points-v2 = <&cpu0_opp_table>;
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};
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cpu3: cpu@3 {
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@@ -62,6 +71,30 @@
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reg = <3>;
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enable-method = "spin-table";
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cpu-release-addr = <0x0 0x000000f0>;
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+ clocks = <&arm_clk>;
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+ clock-names = "cpu";
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+ operating-points-v2 = <&cpu0_opp_table>;
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+ };
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+ };
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+
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+ cpu0_opp_table: opp_table0 {
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+ compatible = "operating-points-v2";
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+ opp-shared;
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+
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+ opp@600000000 {
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+ opp-hz = /bits/ 64 <600000000>;
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+ clock-latency-ns = <355000>;
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+ opp-suspend;
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+ };
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+
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+ opp@900000000 {
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+ opp-hz = /bits/ 64 <900000000>;
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+ clock-latency-ns = <355000>;
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+ };
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+
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+ opp@1200000000 {
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+ opp-hz = /bits/ 64 <1200000000>;
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+ clock-latency-ns = <355000>;
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};
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};
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};
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diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
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index 4c4bd85f707c..e40bd19da22b 100644
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--- a/drivers/clk/bcm/Kconfig
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+++ b/drivers/clk/bcm/Kconfig
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@@ -63,3 +63,11 @@ config CLK_BCM_SR
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default ARCH_BCM_IPROC
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help
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Enable common clock framework support for the Broadcom Stingray SoC
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+
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+config CLK_RASPBERRYPI_CPU
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+ bool "Raspberry Pi CPU clock driver"
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+ depends on ARCH_BCM2835 || (COMPILE_TEST && OF)
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+ depends on RASPBERRYPI_FIRMWARE=y
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+ help
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+ This enables support for the RPi CPU clock which can be adjusted
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+ via the RPi firmware.
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diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
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index 002661d39128..a028b0a90b6e 100644
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--- a/drivers/clk/bcm/Makefile
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+++ b/drivers/clk/bcm/Makefile
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@@ -8,6 +8,7 @@ obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-a
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obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
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obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835-aux.o
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obj-$(CONFIG_ARCH_BCM_53573) += clk-bcm53573-ilp.o
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+obj-$(CONFIG_CLK_RASPBERRYPI_CPU) += clk-raspberrypi.o
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obj-$(CONFIG_CLK_BCM_CYGNUS) += clk-cygnus.o
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obj-$(CONFIG_CLK_BCM_HR2) += clk-hr2.o
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obj-$(CONFIG_CLK_BCM_NSP) += clk-nsp.o
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diff --git a/drivers/clk/bcm/clk-raspberrypi.c b/drivers/clk/bcm/clk-raspberrypi.c
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new file mode 100644
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index 000000000000..046efc822a59
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--- /dev/null
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+++ b/drivers/clk/bcm/clk-raspberrypi.c
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@@ -0,0 +1,138 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * Raspberry Pi CPU clock driver
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+ *
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+ * Copyright (C) 2018 Stefan Wahren <stefan.wahren@i2se.com>
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+ */
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+
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+#include <linux/clk.h>
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+#include <linux/clk-provider.h>
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+#include <linux/device.h>
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+#include <linux/err.h>
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+#include <linux/module.h>
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+#include <linux/of_device.h>
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+#include <linux/platform_device.h>
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+#include <linux/slab.h>
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+#include <soc/bcm2835/raspberrypi-firmware.h>
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+
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+#define VCMSG_ID_ARM_CLOCK 0x000000003 /* Clock/Voltage ID's */
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+
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+struct rpi_cpu_clkgen {
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+ struct clk_hw hw;
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+ struct rpi_firmware *fw;
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+};
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+
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+/* tag part of the message */
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+struct prop {
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+ u32 id; /* the ID of the clock/voltage to get or set */
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+ u32 val; /* the value (e.g. rate (in Hz)) to set */
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+} __packed;
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+
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+static int rpi_cpu_clock_property(struct rpi_firmware *fw, u32 tag, u32 *val)
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+{
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+ int ret;
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+ struct prop msg = {
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+ .id = VCMSG_ID_ARM_CLOCK,
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+ .val = *val,
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+ };
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+
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+ ret = rpi_firmware_property(fw, tag, &msg, sizeof(msg));
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+ if (ret)
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+ return ret;
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+
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+ *val = msg.val;
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+
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+ return 0;
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+}
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+
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+static unsigned long rpi_cpu_get_rate(struct clk_hw *hw,
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+ unsigned long parent_rate)
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+{
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+ struct rpi_cpu_clkgen *cpu = container_of(hw, struct rpi_cpu_clkgen, hw);
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+ u32 rate = 0;
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+
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+ rpi_cpu_clock_property(cpu->fw, RPI_FIRMWARE_GET_CLOCK_RATE, &rate);
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+
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+ return rate;
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+}
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+
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+static long rpi_cpu_round_rate(struct clk_hw *hw, unsigned long rate,
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+ unsigned long *parent_rate)
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+{
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+ return rate;
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+}
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+
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+static int rpi_cpu_set_rate(struct clk_hw *hw, unsigned long rate,
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+ unsigned long parent_rate)
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+{
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+ struct rpi_cpu_clkgen *cpu = container_of(hw, struct rpi_cpu_clkgen, hw);
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+ u32 new_rate = rate;
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+
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+ return rpi_cpu_clock_property(cpu->fw, RPI_FIRMWARE_SET_CLOCK_RATE,
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+ &new_rate);
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+}
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+
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+static const struct clk_ops rpi_cpu_ops = {
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+ .recalc_rate = rpi_cpu_get_rate,
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+ .round_rate = rpi_cpu_round_rate,
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+ .set_rate = rpi_cpu_set_rate,
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+};
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+
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+static int rpi_cpu_probe(struct platform_device *pdev)
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+{
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+ struct device *dev = &pdev->dev;
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+ struct device_node *fw_node;
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+ struct rpi_cpu_clkgen *cpu;
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+ struct clk_init_data *init;
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+ int ret;
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+
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+ cpu = devm_kzalloc(dev, sizeof(*cpu), GFP_KERNEL);
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+ if (!cpu)
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+ return -ENOMEM;
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+
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+ init = devm_kzalloc(dev, sizeof(*init), GFP_KERNEL);
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+ if (!init)
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+ return -ENOMEM;
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+
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+ fw_node = of_find_compatible_node(NULL, NULL,
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+ "raspberrypi,bcm2835-firmware");
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+ if (!fw_node) {
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+ dev_err(dev, "Missing firmware node\n");
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+ return -ENOENT;
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+ }
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+
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+ cpu->fw = rpi_firmware_get(fw_node);
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+ of_node_put(fw_node);
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+ if (!cpu->fw)
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+ return -EPROBE_DEFER;
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+
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+ init->name = dev->of_node->name;
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+ init->ops = &rpi_cpu_ops;
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+
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+ cpu->hw.init = init;
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+ ret = devm_clk_hw_register(dev, &cpu->hw);
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+ if (ret)
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+ return ret;
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+
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+ return of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get,
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+ &cpu->hw);
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+}
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+
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+static const struct of_device_id rpi_cpu_of_match[] = {
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+ { .compatible = "raspberrypi,bcm2835-cpu", },
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+ {},
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+};
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+MODULE_DEVICE_TABLE(of, rpi_cpu_of_match);
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+
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+static struct platform_driver rpi_cpu_driver = {
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+ .driver = {
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+ .name = "raspberrypi-cpu",
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+ .of_match_table = rpi_cpu_of_match,
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+ },
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+ .probe = rpi_cpu_probe,
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+};
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+builtin_platform_driver(rpi_cpu_driver);
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+
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+MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>");
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+MODULE_DESCRIPTION("Raspberry Pi CPU clock driver");
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+MODULE_LICENSE("GPL v2");
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--
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2.17.0
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