93 lines
3.8 KiB
Diff
93 lines
3.8 KiB
Diff
From af4e1c5eca95bed1192d8dc45c8ed63aea2209e8 Mon Sep 17 00:00:00 2001
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From: Marcel Bocu <marcel.p.bocu@gmail.com>
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Date: Mon, 22 Jul 2019 20:45:10 +0300
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Subject: [PATCH] x86/amd_nb: Add PCI device IDs for family 17h, model 70h
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The AMD Ryzen gen 3 processors came with a different PCI IDs for the
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function 3 & 4 which are used to access the SMN interface. The root
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PCI address however remained at the same address as the model 30h.
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Adding the F3/F4 PCI IDs respectively to the misc and link ids appear
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to be sufficient for k10temp, so let's add them and follow up on the
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patch if other functions need more tweaking.
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Vicki Pfau sent an identical patch after I checked that no-one had
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written this patch. I would have been happy about dropping my patch but
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unlike for his patch series, I had already Cc:ed the x86 people and
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they already reviewed the changes. Since Vicki has not answered to
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any email after his initial series, let's assume she is on vacation
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and let's avoid duplication of reviews from the maintainers and merge
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my series. To acknowledge Vicki's anteriority, I added her S-o-b to
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the patch.
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v2, suggested by Guenter Roeck and Brian Woods:
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- rename from 71h to 70h
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Signed-off-by: Vicki Pfau <vi@endrift.com>
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Signed-off-by: Marcel Bocu <marcel.p.bocu@gmail.com>
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Tested-by: Marcel Bocu <marcel.p.bocu@gmail.com>
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Acked-by: Thomas Gleixner <tglx@linutronix.de>
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Acked-by: Brian Woods <brian.woods@amd.com>
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Acked-by: Bjorn Helgaas <bhelgaas@google.com> # pci_ids.h
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Cc: Thomas Gleixner <tglx@linutronix.de>
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Cc: Ingo Molnar <mingo@redhat.com>
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Cc: Borislav Petkov <bp@alien8.de>
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Cc: "H. Peter Anvin" <hpa@zytor.com>
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Cc: x86@kernel.org
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Cc: "Woods, Brian" <Brian.Woods@amd.com>
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Cc: Clemens Ladisch <clemens@ladisch.de>
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Cc: Jean Delvare <jdelvare@suse.com>
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Cc: Guenter Roeck <linux@roeck-us.net>
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Cc: linux-hwmon@vger.kernel.org
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Link: https://lore.kernel.org/r/20190722174510.2179-1-marcel.p.bocu@gmail.com
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Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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---
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arch/x86/kernel/amd_nb.c | 3 +++
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include/linux/pci_ids.h | 1 +
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2 files changed, 4 insertions(+)
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diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
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index d63e63b7d1d9..251c795b4eb3 100644
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--- a/arch/x86/kernel/amd_nb.c
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+++ b/arch/x86/kernel/amd_nb.c
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@@ -21,6 +21,7 @@
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#define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
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#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
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#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494
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+#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444
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/* Protect the PCI config register pairs used for SMN and DF indirect access. */
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static DEFINE_MUTEX(smn_mutex);
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@@ -50,6 +51,7 @@ const struct pci_device_id amd_nb_misc_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
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+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) },
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{}
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};
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EXPORT_SYMBOL_GPL(amd_nb_misc_ids);
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@@ -63,6 +65,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) },
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+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
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{}
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};
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diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
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index c842735a4f45..4b97f427cc92 100644
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--- a/include/linux/pci_ids.h
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+++ b/include/linux/pci_ids.h
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@@ -548,6 +548,7 @@
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#define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463
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#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb
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#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493
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+#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F3 0x1443
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#define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
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#define PCI_DEVICE_ID_AMD_LANCE 0x2000
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#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
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--
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2.21.0
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