57 lines
2.1 KiB
Diff
57 lines
2.1 KiB
Diff
From patchwork Thu Feb 8 13:43:37 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [3/4] clk: bcm2835: De-assert/assert PLL reset signal when appropriate
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From: Boris Brezillon <boris.brezillon@bootlin.com>
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X-Patchwork-Id: 10207157
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Message-Id: <20180208134338.24590-3-boris.brezillon@bootlin.com>
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To: Florian Fainelli <f.fainelli@gmail.com>, Ray Jui <rjui@broadcom.com>,
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Scott Branden <sbranden@broadcom.com>,
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bcm-kernel-feedback-list@broadcom.com,
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Stephen Warren <swarren@wwwdotorg.org>,
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Lee Jones <lee@kernel.org>, Eric Anholt <eric@anholt.net>,
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linux-rpi-kernel@lists.infradead.org,
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Mike Turquette <mturquette@baylibre.com>,
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Stephen Boyd <sboyd@codeaurora.org>, linux-clk@vger.kernel.org
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Cc: Boris Brezillon <boris.brezillon@bootlin.com>, stable@vger.kernel.org
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Date: Thu, 8 Feb 2018 14:43:37 +0100
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In order to enable a PLL, not only the PLL has to be powered up and
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locked, but you also have to de-assert the reset signal. The last part
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was missing. Add it so PLLs that were not enabled by the FW/bootloader
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can be enabled from Linux.
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Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
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Cc: <stable@vger.kernel.org>
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Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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---
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drivers/clk/bcm/clk-bcm2835.c | 7 +++++++
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1 file changed, 7 insertions(+)
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diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
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index a07f6451694a..6c5d4a8e426c 100644
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -602,6 +602,9 @@ static void bcm2835_pll_off(struct clk_hw *hw)
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const struct bcm2835_pll_data *data = pll->data;
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spin_lock(&cprman->regs_lock);
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+ cprman_write(cprman, data->a2w_ctrl_reg,
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+ cprman_read(cprman, data->a2w_ctrl_reg) &
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+ ~A2W_PLL_CTRL_PRST_DISABLE);
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cprman_write(cprman, data->cm_ctrl_reg,
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cprman_read(cprman, data->cm_ctrl_reg) |
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CM_PLL_ANARST);
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@@ -640,6 +643,10 @@ static int bcm2835_pll_on(struct clk_hw *hw)
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cpu_relax();
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}
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+ cprman_write(cprman, data->a2w_ctrl_reg,
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+ cprman_read(cprman, data->a2w_ctrl_reg) |
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+ A2W_PLL_CTRL_PRST_DISABLE);
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+
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return 0;
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}
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