117 lines
4.0 KiB
Diff
117 lines
4.0 KiB
Diff
From patchwork Wed Apr 18 16:34:15 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: arm64: msm8916: fix gic_irq_domain_translate warnings
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From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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X-Patchwork-Id: 10348701
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Message-Id: <20180418163415.21646-1-srinivas.kandagatla@linaro.org>
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To: andy.gross@linaro.org, linux-arm-msm@vger.kernel.org
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Cc: david.brown@linaro.org, robh+dt@kernel.org,
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linux-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
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devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
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Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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Date: Wed, 18 Apr 2018 17:34:15 +0100
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From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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Remove the usage of IRQ_TYPE_NONE to fix loud warnings from
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patch (83a86fbb5b56b "irqchip/gic: Loudly complain about
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the use of IRQ_TYPE_NONE").
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Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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Reviewed-by: Thierry Escande <thierry.escande@linaro.org>
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Tested-by: Thierry Escande <thierry.escande@linaro.org>
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Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
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Tested-by: Amit Kucheria <amit.kucheria@linaro.org>
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Tested-by: Vinod Koul <vkoul@kernel.org>
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---
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arch/arm64/boot/dts/qcom/msm8916.dtsi | 18 +++++++++---------
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1 file changed, 9 insertions(+), 9 deletions(-)
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diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
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index cfbd72186762..5d66a575c7e1 100644
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--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
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+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
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@@ -180,7 +180,7 @@
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pmu {
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compatible = "arm,cortex-a53-pmu";
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- interrupts = <GIC_PPI 7 GIC_CPU_MASK_SIMPLE(4)>;
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+ interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4)| IRQ_TYPE_LEVEL_HIGH)>;
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};
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thermal-zones {
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@@ -513,7 +513,7 @@
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blsp_i2c2: i2c@78b6000 {
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compatible = "qcom,i2c-qup-v2.2.1";
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reg = <0x078b6000 0x500>;
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- interrupts = <GIC_SPI 96 0>;
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+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP1_AHB_CLK>,
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<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
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clock-names = "iface", "core";
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@@ -528,7 +528,7 @@
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blsp_i2c4: i2c@78b8000 {
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compatible = "qcom,i2c-qup-v2.2.1";
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reg = <0x078b8000 0x500>;
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- interrupts = <GIC_SPI 98 0>;
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+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP1_AHB_CLK>,
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<&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
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clock-names = "iface", "core";
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@@ -543,7 +543,7 @@
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blsp_i2c6: i2c@78ba000 {
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compatible = "qcom,i2c-qup-v2.2.1";
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reg = <0x078ba000 0x500>;
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- interrupts = <GIC_SPI 100 0>;
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+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP1_AHB_CLK>,
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<&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
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clock-names = "iface", "core";
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@@ -575,7 +575,7 @@
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"mi2s-bit-clk3";
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#sound-dai-cells = <1>;
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- interrupts = <0 160 0>;
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+ interrupts = <0 160 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "lpass-irq-lpaif";
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reg = <0x07708000 0x10000>;
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reg-names = "lpass-lpaif";
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@@ -595,7 +595,7 @@
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reg = <0x07824900 0x11c>, <0x07824000 0x800>;
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reg-names = "hc_mem", "core_mem";
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- interrupts = <0 123 0>, <0 138 0>;
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+ interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>, <0 138 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hc_irq", "pwr_irq";
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clocks = <&gcc GCC_SDCC1_APPS_CLK>,
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<&gcc GCC_SDCC1_AHB_CLK>,
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@@ -612,7 +612,7 @@
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reg = <0x07864900 0x11c>, <0x07864000 0x800>;
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reg-names = "hc_mem", "core_mem";
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- interrupts = <0 125 0>, <0 221 0>;
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+ interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>, <0 221 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hc_irq", "pwr_irq";
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clocks = <&gcc GCC_SDCC2_APPS_CLK>,
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<&gcc GCC_SDCC2_AHB_CLK>,
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@@ -819,7 +819,7 @@
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iommu-ctx@2000 {
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compatible = "qcom,msm-iommu-v1-ns";
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reg = <0x2000 0x1000>;
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- interrupts = <GIC_SPI 242 0>;
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+ interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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@@ -864,7 +864,7 @@
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"bus_clk",
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"vsync_clk";
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- interrupts = <0 72 0>;
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+ interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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