172 lines
5.2 KiB
Diff
172 lines
5.2 KiB
Diff
From patchwork Thu Jul 20 19:37:07 2017
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [1/3] ARM: bcm283x: Define UART pinmuxing on board level
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From: Stefan Wahren <stefan.wahren@i2se.com>
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X-Patchwork-Id: 9855625
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Message-Id: <1500579429-9101-2-git-send-email-stefan.wahren@i2se.com>
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To: Eric Anholt <eric@anholt.net>, Rob Herring <robh+dt@kernel.org>,
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Mark Rutland <mark.rutland@arm.com>
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Cc: Stefan Wahren <stefan.wahren@i2se.com>, devicetree@vger.kernel.org,
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Florian Fainelli <f.fainelli@gmail.com>,
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Scott Branden <sbranden@broadcom.com>,
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linux-rpi-kernel@lists.infradead.org,
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linux-arm-kernel@lists.infradead.org, Gerd Hoffmann <kraxel@redhat.com>
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Date: Thu, 20 Jul 2017 21:37:07 +0200
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Until RPI 3 and Zero W the pl011 (uart0) was always on pin 14/15. So in
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order to take care of them and other boards in the future,
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we need to define UART pinmuxing on board level.
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This work based on Eric Anholt's patch "ARM: bcm2385: Don't force pl011
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onto pins 14/15." and Fabian Vogt's patch "ARM64: dts: bcm2837: assign
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uart0 to BT and uart1 to pin headers".
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Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
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---
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arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 6 ++++++
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arch/arm/boot/dts/bcm2835-rpi-a.dts | 6 ++++++
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arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 6 ++++++
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arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 6 ++++++
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arch/arm/boot/dts/bcm2835-rpi-b.dts | 6 ++++++
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arch/arm/boot/dts/bcm2835-rpi-zero.dts | 6 ++++++
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arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +-
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arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 6 ++++++
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arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts | 10 ++++++++++
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9 files changed, 53 insertions(+), 1 deletion(-)
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diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
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index d070454..9f86649 100644
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--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
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+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
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@@ -99,3 +99,9 @@
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&hdmi {
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hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
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};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_gpio14>;
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+ status = "okay";
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+};
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diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
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index 46d078e..4b1af06 100644
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--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
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+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
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@@ -94,3 +94,9 @@
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&hdmi {
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hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
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};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_gpio14>;
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+ status = "okay";
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+};
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diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
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index 432088e..a846f1e 100644
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--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
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+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
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@@ -101,3 +101,9 @@
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&hdmi {
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hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
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};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_gpio14>;
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+ status = "okay";
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+};
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diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
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index 4133bc2..e860964 100644
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--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
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+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
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@@ -94,3 +94,9 @@
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&hdmi {
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hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
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};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_gpio14>;
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+ status = "okay";
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+};
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diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
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index 4d56fe3..5d77f3f 100644
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--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
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+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
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@@ -89,3 +89,9 @@
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&hdmi {
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hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
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};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_gpio14>;
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+ status = "okay";
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+};
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diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
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index 79a20d5..7036240 100644
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--- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts
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+++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
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@@ -103,3 +103,9 @@
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&hdmi {
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hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
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};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_gpio14>;
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+ status = "okay";
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+};
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diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
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index e55b362..e36c392 100644
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--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
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+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
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@@ -39,7 +39,7 @@
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};
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alt0: alt0 {
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- brcm,pins = <4 5 7 8 9 10 11 14 15>;
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+ brcm,pins = <4 5 7 8 9 10 11>;
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brcm,function = <BCM2835_FSEL_ALT0>;
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};
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};
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diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
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index bf19e8c..e8de414 100644
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--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
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+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
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@@ -39,3 +39,9 @@
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&hdmi {
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hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
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};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_gpio14>;
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+ status = "okay";
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+};
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diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts
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index 972f14d..20725ca 100644
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--- a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts
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+++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts
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@@ -19,7 +19,17 @@
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};
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};
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+/* uart0 communicates with the BT module */
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_ctsrts_gpio30 &gpclk2_gpio43>;
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+ status = "okay";
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+};
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+
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+/* uart1 is mapped to the pin header */
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&uart1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart1_gpio14>;
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status = "okay";
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};
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