199 lines
6.8 KiB
Diff
199 lines
6.8 KiB
Diff
From 2a6f0971d09e2bb88d2ae40d91ceb2776090497d Mon Sep 17 00:00:00 2001
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From: Fedora Kernel Team <kernel-team@fedoraproject.org>
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Date: Mon, 20 Jun 2016 11:11:50 +0200
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Subject: [PATCH 01/17] drm/i915: Reorganize WM structs/unions in CRTC state
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Upstream: since drm-intel-next-2016-05-22
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commit e8f1f02e7125220b99af8047703b63c11a7081d6
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Author: Matt Roper <matthew.d.roper@intel.com>
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AuthorDate: Thu May 12 07:05:55 2016 -0700
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Commit: Matt Roper <matthew.d.roper@intel.com>
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CommitDate: Fri May 13 07:32:11 2016 -0700
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drm/i915: Reorganize WM structs/unions in CRTC state
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Reorganize the nested structures and unions we have for pipe watermark
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data in intel_crtc_state so that platform-specific data can be added in
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a more sensible manner (and save a bit of memory at the same time).
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The change basically changes the organization from:
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union {
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struct intel_pipe_wm ilk;
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struct intel_pipe_wm skl;
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} optimal;
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struct intel_pipe_wm intermediate /* ILK-only */
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to
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union {
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struct {
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struct intel_pipe_wm intermediate;
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struct intel_pipe_wm optimal;
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} ilk;
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struct {
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struct intel_pipe_wm optimal;
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} skl;
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}
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There should be no functional change here, but it will allow us to add
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more platform-specific fields going forward (and more easily extend to
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other platform types like VLV).
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While we're at it, let's move the entire watermark substructure out to
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its own structure definition to make the code slightly more readable.
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Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-2-git-send-email-matthew.d.roper@intel.com
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---
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drivers/gpu/drm/i915/intel_drv.h | 48 +++++++++++++++++++++++++++++++---------
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drivers/gpu/drm/i915/intel_pm.c | 16 +++++++-------
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2 files changed, 46 insertions(+), 18 deletions(-)
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diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
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index 3a30b37..7d19baf 100644
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--- a/drivers/gpu/drm/i915/intel_drv.h
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+++ b/drivers/gpu/drm/i915/intel_drv.h
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@@ -363,6 +363,40 @@ struct skl_pipe_wm {
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uint32_t linetime;
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};
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+struct intel_crtc_wm_state {
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+ union {
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+ struct {
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+ /*
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+ * Intermediate watermarks; these can be
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+ * programmed immediately since they satisfy
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+ * both the current configuration we're
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+ * switching away from and the new
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+ * configuration we're switching to.
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+ */
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+ struct intel_pipe_wm intermediate;
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+
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+ /*
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+ * Optimal watermarks, programmed post-vblank
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+ * when this state is committed.
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+ */
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+ struct intel_pipe_wm optimal;
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+ } ilk;
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+
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+ struct {
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+ /* gen9+ only needs 1-step wm programming */
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+ struct skl_pipe_wm optimal;
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+ } skl;
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+ };
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+
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+ /*
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+ * Platforms with two-step watermark programming will need to
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+ * update watermark programming post-vblank to switch from the
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+ * safe intermediate watermarks to the optimal final
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+ * watermarks.
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+ */
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+ bool need_postvbl_update;
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+};
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+
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struct intel_crtc_state {
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struct drm_crtc_state base;
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@@ -509,16 +543,10 @@ struct intel_crtc_state {
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/* IVB sprite scaling w/a (WaCxSRDisabledForSpriteScaling:ivb) */
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bool disable_lp_wm;
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- struct {
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- /*
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- * optimal watermarks, programmed post-vblank when this state
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- * is committed
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- */
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- union {
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- struct intel_pipe_wm ilk;
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- struct skl_pipe_wm skl;
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- } optimal;
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- } wm;
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+ struct intel_crtc_wm_state wm;
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+
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+ /* Gamma mode programmed on the pipe */
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+ uint32_t gamma_mode;
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};
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struct vlv_wm_state {
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diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
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index 54ab023..0da1d60 100644
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--- a/drivers/gpu/drm/i915/intel_pm.c
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+++ b/drivers/gpu/drm/i915/intel_pm.c
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@@ -2302,7 +2302,7 @@ static int ilk_compute_pipe_wm(struct intel_crtc *intel_crtc,
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if (IS_ERR(cstate))
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return PTR_ERR(cstate);
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- pipe_wm = &cstate->wm.optimal.ilk;
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+ pipe_wm = &cstate->wm.ilk.optimal;
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memset(pipe_wm, 0, sizeof(*pipe_wm));
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for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
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@@ -2385,7 +2385,7 @@ static void ilk_merge_wm_level(struct drm_device *dev,
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for_each_intel_crtc(dev, intel_crtc) {
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const struct intel_crtc_state *cstate =
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to_intel_crtc_state(intel_crtc->base.state);
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- const struct intel_pipe_wm *active = &cstate->wm.optimal.ilk;
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+ const struct intel_pipe_wm *active = &cstate->wm.ilk.optimal;
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const struct intel_wm_level *wm = &active->wm[level];
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if (!active->pipe_enabled)
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@@ -2536,12 +2536,12 @@ static void ilk_compute_wm_results(struct drm_device *dev,
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const struct intel_crtc_state *cstate =
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to_intel_crtc_state(intel_crtc->base.state);
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enum pipe pipe = intel_crtc->pipe;
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- const struct intel_wm_level *r = &cstate->wm.optimal.ilk.wm[0];
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+ const struct intel_wm_level *r = &cstate->wm.ilk.optimal.wm[0];
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if (WARN_ON(!r->enable))
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continue;
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- results->wm_linetime[pipe] = cstate->wm.optimal.ilk.linetime;
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+ results->wm_linetime[pipe] = cstate->wm.ilk.optimal.linetime;
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results->wm_pipe[pipe] =
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(r->pri_val << WM0_PIPE_PLANE_SHIFT) |
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@@ -3617,7 +3617,7 @@ static void skl_update_wm(struct drm_crtc *crtc)
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct skl_wm_values *results = &dev_priv->wm.skl_results;
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struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
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- struct skl_pipe_wm *pipe_wm = &cstate->wm.optimal.skl;
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+ struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal;
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/* Clear all dirty flags */
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@@ -3711,7 +3711,7 @@ static void ilk_update_wm(struct drm_crtc *crtc)
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intel_wait_for_vblank(crtc->dev, intel_crtc->pipe);
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}
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- intel_crtc->wm.active.ilk = cstate->wm.optimal.ilk;
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+ intel_crtc->wm.active.ilk = cstate->wm.ilk.optimal;
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ilk_program_watermarks(cstate);
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}
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@@ -3767,7 +3767,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc)
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struct skl_wm_values *hw = &dev_priv->wm.skl_hw;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
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- struct skl_pipe_wm *active = &cstate->wm.optimal.skl;
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+ struct skl_pipe_wm *active = &cstate->wm.skl.optimal;
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enum pipe pipe = intel_crtc->pipe;
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int level, i, max_level;
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uint32_t temp;
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@@ -3833,7 +3833,7 @@ static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc)
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struct ilk_wm_values *hw = &dev_priv->wm.hw;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
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- struct intel_pipe_wm *active = &cstate->wm.optimal.ilk;
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+ struct intel_pipe_wm *active = &cstate->wm.ilk.optimal;
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enum pipe pipe = intel_crtc->pipe;
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static const i915_reg_t wm0_pipe_reg[] = {
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[PIPE_A] = WM0_PIPEA_ILK,
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--
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2.7.4
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