52 lines
2.0 KiB
Diff
52 lines
2.0 KiB
Diff
drm/i915: Make G4X-style PLL search more permissive
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Fixes an Ironlake laptop with a 68.940MHz 1280x800 panel and 120MHz SSC
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reference clock.
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More generally, the 0.488% tolerance used before is just too tight to
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reliably find a PLL setting. I extracted the search algorithm and
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modified it to find the dot clocks with maximum error over the valid
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range for the given output type:
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http://people.freedesktop.org/~ajax/intel_g4x_find_best_pll.c
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This gave:
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Worst dotclock for Ironlake DAC refclk is 350000kHz (error 0.00571)
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Worst dotclock for Ironlake SL-LVDS refclk is 102321kHz (error 0.00524)
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Worst dotclock for Ironlake DL-LVDS refclk is 219642kHz (error 0.00488)
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Worst dotclock for Ironlake SL-LVDS SSC refclk is 84374kHz (error 0.00529)
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Worst dotclock for Ironlake DL-LVDS SSC refclk is 183035kHz (error 0.00488)
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Worst dotclock for G4X SDVO refclk is 50000kHz (error 0.17332)
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Worst dotclock for G4X HDMI refclk is 334400kHz (error 0.00478)
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Worst dotclock for G4X SL-LVDS refclk is 95571kHz (error 0.00449)
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Worst dotclock for G4X DL-LVDS refclk is 224000kHz (error 0.00510)
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The SDVO number looks a bit suspicious, which I haven't tracked down
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yet. But it's clear that the old threshold is too tight.
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Signed-off-by: Adam Jackson <ajax at redhat.com>
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[ RHBZ #572799 ]
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---
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drivers/gpu/drm/i915/intel_display.c | 4 ++--
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1 files changed, 2 insertions(+), 2 deletions(-)
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diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
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index a8d65b7..4b17722 100644
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--- a/drivers/gpu/drm/i915/intel_display.c
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+++ b/drivers/gpu/drm/i915/intel_display.c
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@@ -862,8 +862,8 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
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intel_clock_t clock;
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int max_n;
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bool found;
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- /* approximately equals target * 0.00488 */
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- int err_most = (target >> 8) + (target >> 10);
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+ /* approximately equals target * 0.00585 */
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+ int err_most = (target >> 8) + (target >> 9);
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found = false;
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if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
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--
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1.7.1
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