206 lines
6.1 KiB
Diff
206 lines
6.1 KiB
Diff
x86, amd: factor out MMCONFIG discovery
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This factors out the AMD native MMCONFIG discovery so we can use it
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outside amd_bus.c.
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amd_bus.c reads AMD MSRs so it can remove the MMCONFIG area from the
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PCI resources. We may also need the MMCONFIG information to work
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around BIOS defects in the ACPI MCFG table.
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Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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--- a/arch/x86/include/asm/amd_nb.h
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+++ a/arch/x86/include/asm/amd_nb.h
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@@ -13,6 +13,7 @@ extern const struct pci_device_id amd_nb_misc_ids[];
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extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[];
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extern bool early_is_amd_nb(u32 value);
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+extern void amd_get_mmconfig_range(u64 *start, u64 *end);
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extern int amd_cache_northbridges(void);
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extern void amd_flush_garts(void);
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extern int amd_numa_init(void);
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--- a/arch/x86/kernel/amd_nb.c
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+++ a/arch/x86/kernel/amd_nb.c
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@@ -119,6 +119,38 @@ bool __init early_is_amd_nb(u32 device)
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return false;
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}
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+void amd_get_mmconfig_range(u64 *start, u64 *end)
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+{
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+ u32 address;
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+ u64 base, msr;
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+ unsigned segn_busn_bits;
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+
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+ *start = 0;
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+ *end = 0;
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+
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+ if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
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+ return;
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+
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+ /* assume all cpus from fam10h have mmconfig */
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+ if (boot_cpu_data.x86 < 0x10)
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+ return;
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+
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+ address = MSR_FAM10H_MMIO_CONF_BASE;
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+ rdmsrl(address, msr);
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+
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+ /* mmconfig is not enabled */
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+ if (!(msr & FAM10H_MMIO_CONF_ENABLE))
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+ return;
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+
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+ base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);
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+
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+ segn_busn_bits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
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+ FAM10H_MMIO_CONF_BUSRANGE_MASK;
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+
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+ *start = base;
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+ *end = base + (1ULL<<(segn_busn_bits + 20)) - 1;
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+}
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+
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int amd_get_subcaches(int cpu)
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{
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struct pci_dev *link = node_to_amd_nb(amd_get_nb_id(cpu))->link;
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--- a/arch/x86/pci/amd_bus.c
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+++ a/arch/x86/pci/amd_bus.c
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@@ -30,34 +30,6 @@ static struct pci_hostbridge_probe pci_probes[] __initdata = {
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{ 0, 0x18, PCI_VENDOR_ID_AMD, 0x1300 },
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};
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-static u64 __initdata fam10h_mmconf_start;
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-static u64 __initdata fam10h_mmconf_end;
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-static void __init get_pci_mmcfg_amd_fam10h_range(void)
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-{
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- u32 address;
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- u64 base, msr;
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- unsigned segn_busn_bits;
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-
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- /* assume all cpus from fam10h have mmconf */
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- if (boot_cpu_data.x86 < 0x10)
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- return;
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-
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- address = MSR_FAM10H_MMIO_CONF_BASE;
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- rdmsrl(address, msr);
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-
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- /* mmconfig is not enable */
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- if (!(msr & FAM10H_MMIO_CONF_ENABLE))
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- return;
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-
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- base = msr & (FAM10H_MMIO_CONF_BASE_MASK<<FAM10H_MMIO_CONF_BASE_SHIFT);
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-
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- segn_busn_bits = (msr >> FAM10H_MMIO_CONF_BUSRANGE_SHIFT) &
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- FAM10H_MMIO_CONF_BUSRANGE_MASK;
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-
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- fam10h_mmconf_start = base;
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- fam10h_mmconf_end = base + (1ULL<<(segn_busn_bits + 20)) - 1;
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-}
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-
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#define RANGE_NUM 16
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/**
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@@ -85,6 +57,8 @@ static int __init early_fill_mp_bus_info(void)
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u64 val;
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u32 address;
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bool found;
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+ u64 fam10h_mmconf_start;
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+ u64 fam10h_mmconf_end;
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if (!early_pci_allowed())
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return -1;
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@@ -211,7 +185,7 @@ static int __init early_fill_mp_bus_info(void)
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subtract_range(range, RANGE_NUM, 0, end);
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/* get mmconfig */
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- get_pci_mmcfg_amd_fam10h_range();
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+ amd_get_mmconfig_range(&fam10h_mmconf_start, &fam10h_mmconf_end);
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/* need to take out mmconf range */
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if (fam10h_mmconf_end) {
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printk(KERN_DEBUG "Fam 10h mmconf [%llx, %llx]\n", fam10h_mmconf_start, fam10h_mmconf_end);
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PNP: work around Dell 1536/1546 BIOS MMCONFIG bug that breaks USB
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Some Dell BIOSes have MCFG tables that don't report the entire
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MMCONFIG area claimed by the chipset. If we move PCI devices into
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that claimed-but-unreported area, they don't work.
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This quirk reads the AMD MMCONFIG MSRs and adds PNP0C01 resources as
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needed to cover the entire area.
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Example problem scenario:
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BIOS-e820: 00000000cfec5400 - 00000000d4000000 (reserved)
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Fam 10h mmconf [d0000000, dfffffff]
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PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xd0000000-0xd3ffffff] (base 0xd0000000)
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pnp 00:0c: [mem 0xd0000000-0xd3ffffff]
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pci 0000:00:12.0: reg 10: [mem 0xffb00000-0xffb00fff]
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pci 0000:00:12.0: no compatible bridge window for [mem 0xffb00000-0xffb00fff]
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pci 0000:00:12.0: BAR 0: assigned [mem 0xd4000000-0xd40000ff]
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Reported-by: Lisa Salimbas <lisa.salimbas@canonical.com>
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Reported-by: <thuban@singularity.fr>
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References: https://bugzilla.kernel.org/show_bug.cgi?id=31602
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References: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/647043
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References: https://bugzilla.redhat.com/show_bug.cgi?id=770308
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Cc: stable@kernel.org # 2.6.34+
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Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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--- a/drivers/pnp/quirks.c
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+++ a/drivers/pnp/quirks.c
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@@ -295,6 +295,46 @@ static void quirk_system_pci_resources(struct pnp_dev *dev)
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}
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}
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+#ifdef CONFIG_AMD_NB
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+
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+#include <asm/amd_nb.h>
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+
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+static void quirk_amd_mmconfig_area(struct pnp_dev *dev)
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+{
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+ u64 mmconfig_start, mmconfig_end;
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+ resource_size_t start, end;
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+ struct pnp_resource *pnp_res;
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+ struct resource *res;
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+
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+ amd_get_mmconfig_range(&mmconfig_start, &mmconfig_end);
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+ if (!mmconfig_end)
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+ return;
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+
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+ list_for_each_entry(pnp_res, &dev->resources, list) {
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+ res = &pnp_res->res;
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+ if (res->end < mmconfig_start || res->start > mmconfig_end ||
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+ (res->start == mmconfig_start && res->end == mmconfig_end))
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+ continue;
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+
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+ dev_warn(&dev->dev, FW_BUG
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+ "%pR covers only part of AMD MMCONFIG area [mem %#010llx-%#010llx]; adding more reservations\n",
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+ res, (unsigned long long) mmconfig_start,
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+ (unsigned long long) mmconfig_end);
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+ if (mmconfig_start < res->start) {
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+ start = mmconfig_start;
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+ end = res->start - 1;
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+ pnp_add_mem_resource(dev, start, end, 0);
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+ }
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+ if (mmconfig_end > res->end) {
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+ start = res->end + 1;
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+ end = mmconfig_end;
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+ pnp_add_mem_resource(dev, start, end, 0);
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+ }
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+ break;
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+ }
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+}
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+#endif
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+
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/*
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* PnP Quirks
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* Cards or devices that need some tweaking due to incomplete resource info
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@@ -322,6 +362,9 @@ static struct pnp_fixup pnp_fixups[] = {
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/* PnP resources that might overlap PCI BARs */
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{"PNP0c01", quirk_system_pci_resources},
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{"PNP0c02", quirk_system_pci_resources},
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+#ifdef CONFIG_AMD_NB
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+ {"PNP0c01", quirk_amd_mmconfig_area},
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+#endif
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{""}
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};
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