99 lines
3.7 KiB
Diff
99 lines
3.7 KiB
Diff
From aa964d59aab2cb04bc011ffd370822ac79f82a0b Mon Sep 17 00:00:00 2001
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From: Boris Brezillon <boris.brezillon@bootlin.com>
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Date: Wed, 7 Mar 2018 15:39:17 +0100
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Subject: [PATCH] clk: bcm2835: De-assert/assert PLL reset signal when
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appropriate
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In order to enable a PLL, not only the PLL has to be powered up and
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locked, but you also have to de-assert the reset signal. The last part
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was missing. Add it so PLLs that were not enabled by the FW/bootloader
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can be enabled from Linux.
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Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
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Cc: <stable@vger.kernel.org>
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Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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---
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drivers/clk/bcm/clk-bcm2835.c | 7 +++++++
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1 file changed, 7 insertions(+)
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diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
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index a07f6451694a..6c5d4a8e426c 100644
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -602,6 +602,9 @@ static void bcm2835_pll_off(struct clk_hw *hw)
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const struct bcm2835_pll_data *data = pll->data;
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spin_lock(&cprman->regs_lock);
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+ cprman_write(cprman, data->a2w_ctrl_reg,
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+ cprman_read(cprman, data->a2w_ctrl_reg) &
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+ ~A2W_PLL_CTRL_PRST_DISABLE);
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cprman_write(cprman, data->cm_ctrl_reg,
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cprman_read(cprman, data->cm_ctrl_reg) |
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CM_PLL_ANARST);
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@@ -640,6 +643,10 @@ static int bcm2835_pll_on(struct clk_hw *hw)
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cpu_relax();
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}
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+ cprman_write(cprman, data->a2w_ctrl_reg,
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+ cprman_read(cprman, data->a2w_ctrl_reg) |
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+ A2W_PLL_CTRL_PRST_DISABLE);
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+
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return 0;
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}
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From 1b6867ee05d84cc6ec23b5ec0b78684187d3190a Mon Sep 17 00:00:00 2001
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From: Boris Brezillon <boris.brezillon@bootlin.com>
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Date: Wed, 7 Mar 2018 15:41:14 +0100
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Subject: [PATCH] clk: bcm2835: Make sure the PLL is gated before changing its
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rate
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All bcm2835 PLLs should be gated before their rate can be changed.
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Setting CLK_SET_RATE_GATE will let the core enforce that, but this is
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not enough to make the code work in all situations. Indeed, the
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CLK_SET_RATE_GATE flag prevents a user from changing the rate while
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the clock is enabled, but this check only guarantees there's no Linux
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users. In our case, the clock might have been enabled by the
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bootloader/FW, and, because we have CLK_IGNORE_UNUSED set, Linux never
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disables the PLL. So we have to make sure the PLL is actually disabled
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before changing the rate.
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Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
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Cc: <stable@vger.kernel.org>
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Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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---
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drivers/clk/bcm/clk-bcm2835.c | 14 +++++++++++++-
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1 file changed, 13 insertions(+), 1 deletion(-)
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diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
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index 6c5d4a8e426c..051ce769c109 100644
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -678,6 +678,18 @@ static int bcm2835_pll_set_rate(struct clk_hw *hw,
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u32 ana[4];
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int i;
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+ /*
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+ * Normally, the CLK_SET_RATE_GATE flag prevents a user from changing
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+ * the rate while the clock is enabled, but this check only makes sure
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+ * there's no Linux users.
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+ * In our case, the clock might have been enabled by the bootloader/FW,
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+ * and, since CLK_IGNORE_UNUSED flag is set, Linux never disables it.
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+ * So we have to make sure the clk is actually disabled before changing
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+ * the rate.
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+ */
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+ if (bcm2835_pll_is_on(hw))
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+ bcm2835_pll_off(hw);
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+
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if (rate > data->max_fb_rate) {
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use_fb_prediv = true;
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rate /= 2;
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@@ -1318,7 +1330,7 @@ static struct clk_hw *bcm2835_register_pll(struct bcm2835_cprman *cprman,
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init.num_parents = 1;
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init.name = data->name;
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init.ops = &bcm2835_pll_clk_ops;
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- init.flags = CLK_IGNORE_UNUSED;
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+ init.flags = CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE;
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pll = kzalloc(sizeof(*pll), GFP_KERNEL);
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if (!pll)
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