34 lines
1.1 KiB
Diff
34 lines
1.1 KiB
Diff
From e5d5c9682aa02a6b9c0c6bd446d433b924441679 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
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Date: Tue, 28 Nov 2017 10:02:35 +0100
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Subject: [PATCH 3/3] x86/PCI: limit the size of the 64bit BAR to 256GB
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This avoids problems with Xen which hides some memory resources from the
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OS and potentially also allows memory hotplug while this fixup is
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enabled.
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Signed-off-by: Christian König <christian.koenig@amd.com>
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---
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arch/x86/pci/fixup.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
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index c817ab85dc82..149adbc7f2a3 100644
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--- a/arch/x86/pci/fixup.c
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+++ b/arch/x86/pci/fixup.c
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@@ -701,7 +701,7 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
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res->name = "PCI Bus 0000:00";
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res->flags = IORESOURCE_PREFETCH | IORESOURCE_MEM |
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IORESOURCE_MEM_64 | IORESOURCE_WINDOW;
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- res->start = 0x100000000ull;
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+ res->start = 0xbd00000000ull;
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res->end = 0xfd00000000ull - 1;
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/* Just grab the free area behind system memory for this */
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--
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2.11.0
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