475 lines
15 KiB
Diff
475 lines
15 KiB
Diff
From d47d17a98d30ef1fc3efecf3e48b87b72c9ac3f1 Mon Sep 17 00:00:00 2001
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From: denglei <denglei@eswincomputing.com>
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Date: Thu, 18 Jul 2024 16:38:30 +0800
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Subject: [PATCH 113/219] feat:HDMI support low power.
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Changelogs:
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HDMI support low power.
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Signed-off-by: denglei <denglei@eswincomputing.com>
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---
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.../dts/eswin/eswin-win2030-die0-soc.dtsi | 6 +-
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.../dts/eswin/eswin-win2030-die1-soc.dtsi | 6 +-
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.../boot/dts/eswin/hifive-premier-550.dts | 1 -
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drivers/gpu/drm/eswin/dw-hdmi.c | 27 ++-
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drivers/gpu/drm/eswin/eswin_dw_hdmi.c | 180 +-----------------
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5 files changed, 26 insertions(+), 194 deletions(-)
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diff --git a/arch/riscv/boot/dts/eswin/eswin-win2030-die0-soc.dtsi b/arch/riscv/boot/dts/eswin/eswin-win2030-die0-soc.dtsi
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index 3b2961f29389..8cc13e04a2d4 100644
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--- a/arch/riscv/boot/dts/eswin/eswin-win2030-die0-soc.dtsi
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+++ b/arch/riscv/boot/dts/eswin/eswin-win2030-die0-soc.dtsi
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@@ -1857,9 +1857,9 @@ dw_hdmi: hdmi@502a0000 {
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//pinctrl-0 = <&hdmi_i2c_xfer>;
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interrupt-parent = <&plic0>;
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interrupts = <274>;
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- clocks = <&d0_clock WIN2030_CLK_VO_CFG_CLK>, <&d0_clock WIN2030_CLK_VO_PIXEL_CLK>,
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- <&d0_clock WIN2030_CLK_VO_CEC_CLK>, <&d0_clock WIN2030_CLK_VO_CR_CLK>;
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- clock-names = "iahb", "vpll", "cec", "isfr";
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+ clocks = <&d0_clock WIN2030_CLK_VO_CFG_CLK>, <&d0_clock WIN2030_CLK_VO_CEC_CLK>,
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+ <&d0_clock WIN2030_CLK_VO_CR_CLK>;
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+ clock-names = "iahb", "cec", "isfr";
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//power-domains = <&power WIN2030_PD_HDCP>;
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reg-io-width = <4>;
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ddc-i2c-scl-high-time-ns = <4708>;
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diff --git a/arch/riscv/boot/dts/eswin/eswin-win2030-die1-soc.dtsi b/arch/riscv/boot/dts/eswin/eswin-win2030-die1-soc.dtsi
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index 005cd8fc4c35..92cddf1e756f 100644
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--- a/arch/riscv/boot/dts/eswin/eswin-win2030-die1-soc.dtsi
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+++ b/arch/riscv/boot/dts/eswin/eswin-win2030-die1-soc.dtsi
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@@ -1729,9 +1729,9 @@ d1_dw_hdmi: hdmi@702a0000 {
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//pinctrl-0 = <&hdmi_i2c_xfer>;
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interrupt-parent = <&plic1>;
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interrupts = <274>;
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- clocks = <&d1_clock WIN2030_CLK_VO_CFG_CLK>, <&d1_clock WIN2030_CLK_VO_PIXEL_CLK>,
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- <&d1_clock WIN2030_CLK_VO_CEC_CLK>, <&d1_clock WIN2030_CLK_VO_CR_CLK>;
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- clock-names = "iahb", "vpll", "cec", "isfr";
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+ clocks = <&d1_clock WIN2030_CLK_VO_CFG_CLK>, <&d1_clock WIN2030_CLK_VO_CEC_CLK>,
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+ <&d1_clock WIN2030_CLK_VO_CR_CLK>;
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+ clock-names = "iahb", "cec", "isfr";
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//power-domains = <&power WIN2030_PD_HDCP>;
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reg-io-width = <4>;
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ddc-i2c-scl-high-time-ns = <4708>;
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diff --git a/arch/riscv/boot/dts/eswin/hifive-premier-550.dts b/arch/riscv/boot/dts/eswin/hifive-premier-550.dts
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index 11ecf0bb3cd2..163938a2a393 100644
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--- a/arch/riscv/boot/dts/eswin/hifive-premier-550.dts
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+++ b/arch/riscv/boot/dts/eswin/hifive-premier-550.dts
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@@ -310,7 +310,6 @@ &dsi_panel {
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&dw_hdmi {
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status = "okay";
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- eswin-plat = <1>;
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ports {
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port@2 {
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reg = <2>;
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diff --git a/drivers/gpu/drm/eswin/dw-hdmi.c b/drivers/gpu/drm/eswin/dw-hdmi.c
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index 7123022dfd0c..552b80ccacdb 100644
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--- a/drivers/gpu/drm/eswin/dw-hdmi.c
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+++ b/drivers/gpu/drm/eswin/dw-hdmi.c
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@@ -51,6 +51,8 @@
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#define HDMI14_MAX_TMDSCLK 340000000
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+#define HDMI_CEC_CLK 32768
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+
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static bool hpd_flag = false;
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static const u16 csc_coeff_default[3][4] = {
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@@ -2066,7 +2068,6 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi,
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frame.extended_colorimetry =
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HDMI_EXTENDED_COLORIMETRY_XV_YCC_709;
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break;
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-
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case V4L2_YCBCR_ENC_BT2020:
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if (hdmi->hdmi_data.enc_in_encoding ==
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V4L2_YCBCR_ENC_BT2020)
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@@ -2076,7 +2077,6 @@ static void hdmi_config_AVI(struct dw_hdmi *hdmi,
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frame.extended_colorimetry =
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HDMI_EXTENDED_COLORIMETRY_BT2020;
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break;
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-
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default: /* Carries no data */
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frame.colorimetry = HDMI_COLORIMETRY_ITU_601;
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frame.extended_colorimetry =
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@@ -4248,6 +4248,12 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
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ret);
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goto err_iahb;
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}
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+
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+ ret = clk_set_rate(hdmi->cec_clk, HDMI_CEC_CLK);
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+ if (ret) {
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+ dev_err(hdmi->dev, "Cannot set CEC clock rate, error:%d\n", ret);
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+ goto err_iahb;
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+ }
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}
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/* hdmi prstn reset */
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@@ -4256,7 +4262,7 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
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if (IS_ERR_OR_NULL(hdmi->rst_hdmi_prstn)) {
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dev_err(hdmi->dev, "Failed to get hdmi prstn reset handle\n");
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ret = -EFAULT;
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- goto err_iahb;
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+ goto err_cec;
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}
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/* hdmi phyctl reset */
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@@ -4265,7 +4271,7 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
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if (IS_ERR_OR_NULL(hdmi->rst_hdmi_phyrstn)) {
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dev_err(hdmi->dev, "Failed to get hdmi phyrstn reset handle\n");
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ret = -EFAULT;
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- goto err_iahb;
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+ goto err_cec;
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}
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/* hdmi rstn reset */
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@@ -4274,7 +4280,7 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
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if (IS_ERR_OR_NULL(hdmi->rst_hdmi_rstn)) {
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dev_err(hdmi->dev, "Failed to get hdmi rstn reset handle\n");
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ret = -EFAULT;
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- goto err_iahb;
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+ goto err_cec;
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}
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if (hdmi->rst_hdmi_prstn) {
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@@ -4303,12 +4309,12 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
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dev_err(dev, "Unsupported HDMI controller (%04x:%02x:%02x)\n",
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hdmi->version, prod_id0, prod_id1);
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ret = -ENODEV;
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- goto err_iahb;
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+ goto err_cec;
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}
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ret = dw_hdmi_detect_phy(hdmi);
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if (ret < 0)
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- goto err_iahb;
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+ goto err_cec;
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dev_info(dev, "Detected HDMI TX controller v%x.%03x %s HDCP (%s)\n",
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hdmi->version >> 12, hdmi->version & 0xfff,
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@@ -4321,14 +4327,14 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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ret = irq;
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- goto err_iahb;
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+ goto err_cec;
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}
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ret = devm_request_threaded_irq(dev, irq, dw_hdmi_hardirq,
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dw_hdmi_irq, IRQF_SHARED,
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dev_name(dev), hdmi);
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if (ret)
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- goto err_iahb;
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+ goto err_cec;
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/*
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* To prevent overflows in HDMI_IH_FC_STAT2, set the clk regenerator
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@@ -4452,9 +4458,10 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
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return hdmi;
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+err_cec:
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+ clk_disable_unprepare(hdmi->cec_clk);
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err_iahb:
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clk_disable_unprepare(hdmi->iahb_clk);
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- clk_disable_unprepare(hdmi->cec_clk);
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err_isfr:
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clk_disable_unprepare(hdmi->isfr_clk);
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err_res:
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diff --git a/drivers/gpu/drm/eswin/eswin_dw_hdmi.c b/drivers/gpu/drm/eswin/eswin_dw_hdmi.c
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index 36efffa7d47a..1412036bdc31 100644
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--- a/drivers/gpu/drm/eswin/eswin_dw_hdmi.c
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+++ b/drivers/gpu/drm/eswin/eswin_dw_hdmi.c
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@@ -57,12 +57,8 @@ enum dw_hdmi_eswin_color_depth {
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struct eswin_hdmi {
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struct device *dev;
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struct regmap *regmap;
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- struct drm_encoder encoder;
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- struct clk *vpll_clk;
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- struct clk *hclk_vio;
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- struct clk *dclk;
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struct dw_hdmi *hdmi;
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- struct phy *phy;
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+ struct drm_encoder encoder;
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u8 id;
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unsigned long bus_format;
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unsigned long output_bus_format;
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@@ -201,101 +197,6 @@ static struct dw_hdmi_phy_config eswin_phy_config[] = {
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{ ~0UL, 0x0000, 0x0000, 0x0000 }
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};
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-static int eswin_hdmi_update_phy_table(struct eswin_hdmi *hdmi, u32 *config,
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- int phy_table_size)
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-{
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- int i;
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-
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- if (phy_table_size > ARRAY_SIZE(eswin_phy_config)) {
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- dev_err(hdmi->dev, "phy table array number is out of range\n");
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- return -E2BIG;
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- }
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-
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- for (i = 0; i < phy_table_size; i++) {
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- if (config[i * 4] != 0)
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- eswin_phy_config[i].mpixelclock = (u64)config[i * 4];
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- else
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- eswin_phy_config[i].mpixelclock = ~0UL;
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- eswin_phy_config[i].sym_ctr = (u16)config[i * 4 + 1];
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- eswin_phy_config[i].term = (u16)config[i * 4 + 2];
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- eswin_phy_config[i].vlev_ctr = (u16)config[i * 4 + 3];
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- }
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-
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- return 0;
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-}
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-
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-static int eswin_hdmi_parse_dt(struct eswin_hdmi *hdmi)
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-{
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- struct device_node *np = hdmi->dev->of_node;
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- int ret, val, phy_table_size;
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- u32 *phy_config;
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-
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- hdmi->vpll_clk = devm_clk_get(hdmi->dev, "vpll");
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- if (PTR_ERR(hdmi->vpll_clk) == -ENOENT) {
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- hdmi->vpll_clk = NULL;
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- } else if (PTR_ERR(hdmi->vpll_clk) == -EPROBE_DEFER) {
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- return -EPROBE_DEFER;
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- } else if (IS_ERR(hdmi->vpll_clk)) {
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- DRM_DEV_ERROR(hdmi->dev, "failed to get vpll clock\n");
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- return PTR_ERR(hdmi->vpll_clk);
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- }
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-
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- hdmi->hclk_vio = devm_clk_get(hdmi->dev, "hclk_vio");
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- if (PTR_ERR(hdmi->hclk_vio) == -ENOENT) {
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- hdmi->hclk_vio = NULL;
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- } else if (PTR_ERR(hdmi->hclk_vio) == -EPROBE_DEFER) {
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- return -EPROBE_DEFER;
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- } else if (IS_ERR(hdmi->hclk_vio)) {
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- dev_err(hdmi->dev, "failed to get hclk_vio clock\n");
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- return PTR_ERR(hdmi->hclk_vio);
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- }
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- hdmi->dclk = devm_clk_get(hdmi->dev, "dclk");
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- if (PTR_ERR(hdmi->dclk) == -ENOENT) {
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- hdmi->dclk = NULL;
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- } else if (PTR_ERR(hdmi->dclk) == -EPROBE_DEFER) {
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- return -EPROBE_DEFER;
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- } else if (IS_ERR(hdmi->dclk)) {
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- dev_err(hdmi->dev, "failed to get dclk\n");
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- return PTR_ERR(hdmi->dclk);
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- }
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-
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- ret = clk_prepare_enable(hdmi->vpll_clk);
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- if (ret) {
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- dev_err(hdmi->dev, "Failed to enable HDMI vpll: %d\n", ret);
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- return ret;
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- }
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-
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- ret = clk_prepare_enable(hdmi->hclk_vio);
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- if (ret) {
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- dev_err(hdmi->dev, "Failed to eanble HDMI hclk_vio: %d\n", ret);
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- return ret;
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- }
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-
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- if (of_get_property(np, "eswin,phy-table", &val)) {
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- phy_config = kmalloc(val, GFP_KERNEL);
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- if (!phy_config) {
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- /* use default table when kmalloc failed. */
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- dev_err(hdmi->dev, "kmalloc phy table failed\n");
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-
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- return -ENOMEM;
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- }
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- phy_table_size = val / 16;
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- of_property_read_u32_array(np, "eswin,phy-table", phy_config,
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- val / sizeof(u32));
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- ret = eswin_hdmi_update_phy_table(hdmi, phy_config,
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- phy_table_size);
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- if (ret) {
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- kfree(phy_config);
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- return ret;
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- }
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- kfree(phy_config);
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- } else {
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- dev_dbg(hdmi->dev, "use default hdmi phy table\n");
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- }
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-
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- return 0;
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-}
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-
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static enum drm_mode_status
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dw_hdmi_eswin_mode_valid(struct dw_hdmi *hdmi, void *data,
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const struct drm_display_info *info,
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@@ -316,19 +217,6 @@ dw_hdmi_eswin_mode_valid(struct dw_hdmi *hdmi, void *data,
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return (valid) ? MODE_OK : MODE_BAD;
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}
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-static void dw_hdmi_eswin_encoder_disable(struct drm_encoder *encoder)
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-{
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- struct eswin_hdmi *hdmi = to_eswin_hdmi(encoder);
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-
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- /*
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- * when plug out hdmi it will be switch cvbs and then phy bus width
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- * must be set as 8
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- */
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- if (hdmi->phy)
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- phy_set_bus_width(hdmi->phy, 8);
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- clk_disable_unprepare(hdmi->dclk);
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-}
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-
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static bool
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dw_hdmi_eswin_encoder_mode_fixup(struct drm_encoder *encoder,
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const struct drm_display_mode *mode,
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@@ -337,35 +225,6 @@ dw_hdmi_eswin_encoder_mode_fixup(struct drm_encoder *encoder,
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return true;
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}
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-static void dw_hdmi_eswin_encoder_mode_set(struct drm_encoder *encoder,
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- struct drm_display_mode *mode,
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- struct drm_display_mode *adj_mode)
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-{
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- struct eswin_hdmi *hdmi = to_eswin_hdmi(encoder);
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-
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- clk_set_rate(hdmi->vpll_clk, adj_mode->clock * 1000);
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-}
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-
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-static void dw_hdmi_eswin_encoder_enable(struct drm_encoder *encoder)
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-{
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- struct eswin_hdmi *hdmi = to_eswin_hdmi(encoder);
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- struct drm_crtc *crtc = encoder->crtc;
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-
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- if (WARN_ON(!crtc || !crtc->state))
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- return;
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-
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- if (hdmi->phy)
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- phy_set_bus_width(hdmi->phy, hdmi->phy_bus_width);
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-
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- clk_set_rate(hdmi->vpll_clk,
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- crtc->state->adjusted_mode.crtc_clock * 1000);
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-
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- clk_set_rate(hdmi->dclk, crtc->state->adjusted_mode.crtc_clock * 1000);
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- clk_prepare_enable(hdmi->dclk);
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-
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- DRM_DEV_DEBUG(hdmi->dev, "dc output to hdmi\n");
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-}
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-
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static void dw_hdmi_eswin_select_output(struct drm_connector_state *conn_state,
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struct drm_crtc_state *crtc_state,
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struct eswin_hdmi *hdmi,
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@@ -561,8 +420,6 @@ dw_hdmi_eswin_encoder_atomic_check(struct drm_encoder *encoder,
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}
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hdmi->phy_bus_width = bus_width;
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- if (hdmi->phy)
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- phy_set_bus_width(hdmi->phy, bus_width);
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s->encoder_type = DRM_MODE_ENCODER_TMDS;
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@@ -864,7 +721,7 @@ static int dw_hdmi_eswin_set_property(struct drm_connector *connector,
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hdmi->video_enable = val;
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}
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} else {
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- DRM_ERROR("don't support set %s property\n", property->name);
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+ DRM_DEBUG("don't support set %s property\n", property->name);
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return 0;
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}
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return 0;
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@@ -950,9 +807,6 @@ static const struct dw_hdmi_property_ops dw_hdmi_eswin_property_ops = {
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static const struct drm_encoder_helper_funcs
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dw_hdmi_eswin_encoder_helper_funcs = {
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.mode_fixup = dw_hdmi_eswin_encoder_mode_fixup,
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- .mode_set = dw_hdmi_eswin_encoder_mode_set,
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- .enable = dw_hdmi_eswin_encoder_enable,
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- .disable = dw_hdmi_eswin_encoder_disable,
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.atomic_check = dw_hdmi_eswin_encoder_atomic_check,
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};
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@@ -980,7 +834,7 @@ static int dw_hdmi_eswin_bind(struct device *dev, struct device *master,
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struct drm_device *drm = data;
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struct drm_encoder *encoder;
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struct eswin_hdmi *hdmi;
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- int ret;
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+ int ret = 0;
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if (!pdev->dev.of_node)
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return -ENODEV;
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@@ -1010,19 +864,6 @@ static int dw_hdmi_eswin_bind(struct device *dev, struct device *master,
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if (encoder->possible_crtcs == 0)
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return -EPROBE_DEFER;
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- ret = eswin_hdmi_parse_dt(hdmi);
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|
- if (ret) {
|
|
- DRM_DEV_ERROR(hdmi->dev, "Unable to parse OF data\n");
|
|
- return ret;
|
|
- }
|
|
-
|
|
- ret = clk_prepare_enable(hdmi->vpll_clk);
|
|
- if (ret) {
|
|
- DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI vpll: %d\n",
|
|
- ret);
|
|
- return ret;
|
|
- }
|
|
-
|
|
plat_data->phy_data = hdmi;
|
|
plat_data->get_input_bus_format = dw_hdmi_eswin_get_input_bus_format;
|
|
plat_data->get_output_bus_format = dw_hdmi_eswin_get_output_bus_format;
|
|
@@ -1030,14 +871,6 @@ static int dw_hdmi_eswin_bind(struct device *dev, struct device *master,
|
|
plat_data->get_enc_out_encoding = dw_hdmi_eswin_get_enc_out_encoding;
|
|
plat_data->property_ops = &dw_hdmi_eswin_property_ops;
|
|
|
|
- hdmi->phy = devm_phy_optional_get(dev, "hdmi");
|
|
- if (IS_ERR(hdmi->phy)) {
|
|
- ret = PTR_ERR(hdmi->phy);
|
|
- if (ret != -EPROBE_DEFER)
|
|
- DRM_DEV_ERROR(hdmi->dev, "failed to get phy\n");
|
|
- return ret;
|
|
- }
|
|
-
|
|
drm_encoder_helper_add(encoder, &dw_hdmi_eswin_encoder_helper_funcs);
|
|
drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);
|
|
|
|
@@ -1052,7 +885,6 @@ static int dw_hdmi_eswin_bind(struct device *dev, struct device *master,
|
|
if (IS_ERR(hdmi->hdmi)) {
|
|
ret = PTR_ERR(hdmi->hdmi);
|
|
drm_encoder_cleanup(encoder);
|
|
- clk_disable_unprepare(hdmi->vpll_clk);
|
|
}
|
|
|
|
return ret;
|
|
@@ -1064,7 +896,6 @@ static void dw_hdmi_eswin_unbind(struct device *dev, struct device *master,
|
|
struct eswin_hdmi *hdmi = dev_get_drvdata(dev);
|
|
|
|
dw_hdmi_unbind(hdmi->hdmi);
|
|
- clk_disable_unprepare(hdmi->vpll_clk);
|
|
}
|
|
|
|
static const struct component_ops dw_hdmi_eswin_ops = {
|
|
@@ -1074,8 +905,6 @@ static const struct component_ops dw_hdmi_eswin_ops = {
|
|
|
|
static int dw_hdmi_eswin_probe(struct platform_device *pdev)
|
|
{
|
|
- pm_runtime_enable(&pdev->dev);
|
|
- pm_runtime_get_sync(&pdev->dev);
|
|
return component_add(&pdev->dev, &dw_hdmi_eswin_ops);
|
|
}
|
|
|
|
@@ -1084,13 +913,11 @@ static void dw_hdmi_eswin_shutdown(struct platform_device *pdev)
|
|
struct eswin_hdmi *hdmi = dev_get_drvdata(&pdev->dev);
|
|
|
|
dw_hdmi_suspend(hdmi->hdmi);
|
|
- pm_runtime_put_sync(&pdev->dev);
|
|
}
|
|
|
|
static int dw_hdmi_eswin_remove(struct platform_device *pdev)
|
|
{
|
|
component_del(&pdev->dev, &dw_hdmi_eswin_ops);
|
|
- pm_runtime_disable(&pdev->dev);
|
|
return 0;
|
|
}
|
|
|
|
@@ -1099,7 +926,6 @@ static int __maybe_unused dw_hdmi_eswin_suspend(struct device *dev)
|
|
struct eswin_hdmi *hdmi = dev_get_drvdata(dev);
|
|
|
|
dw_hdmi_suspend(hdmi->hdmi);
|
|
- pm_runtime_put_sync(dev);
|
|
|
|
return 0;
|
|
}
|
|
--
|
|
2.47.0
|
|
|