64 lines
2.0 KiB
Diff
64 lines
2.0 KiB
Diff
From 572a653f4f01d6311a203cdf6739c8daa12da7a2 Mon Sep 17 00:00:00 2001
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From: huangyifeng <huangyifeng@eswincomputing.com>
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Date: Fri, 19 Jul 2024 10:11:52 +0800
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Subject: [PATCH 112/219] fix(cpu pll): enable cpu low power clk when use it.
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Changelogs:
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When the CPU switches frequency, it will first switch to the CPU
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low power clock. At this time, it is necessary to enable it first to
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ensure
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it is turned on
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Signed-off-by: huangyifeng <huangyifeng@eswincomputing.com>
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---
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drivers/clk/eswin/clk.c | 13 +++++++++++--
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1 file changed, 11 insertions(+), 2 deletions(-)
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diff --git a/drivers/clk/eswin/clk.c b/drivers/clk/eswin/clk.c
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index 685f6377d9f8..06569c72ba37 100755
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--- a/drivers/clk/eswin/clk.c
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+++ b/drivers/clk/eswin/clk.c
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@@ -308,9 +308,16 @@ static int clk_pll_set_rate(struct clk_hw *hw,
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pr_err("%s %d, failed to get %s\n",__func__,__LINE__, clk_cpu_lp_pll_name);
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return -EINVAL;
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}
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+ ret = clk_prepare_enable(clk_cpu_lp_pll);
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+ if (ret) {
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+ pr_err("%s %d, failed to enable %s, ret %d\n",__func__,__LINE__,
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+ clk_cpu_lp_pll_name, ret);
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+ return ret;
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+ }
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clk_cpu_pll = __clk_lookup(clk_cpu_pll_name);
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if (!clk_cpu_pll) {
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pr_err("%s %d, failed to get %s\n",__func__,__LINE__, clk_cpu_pll_name);
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+ clk_disable_unprepare(clk_cpu_lp_pll);
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return -EINVAL;
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}
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@@ -318,6 +325,7 @@ static int clk_pll_set_rate(struct clk_hw *hw,
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if (ret) {
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pr_err("%s %d, faild to switch %s to %s, ret %d\n",__func__,__LINE__, clk_cpu_mux_name,
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clk_cpu_lp_pll_name, ret);
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+ clk_disable_unprepare(clk_cpu_lp_pll);
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return -EPERM;
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}
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}
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@@ -371,11 +379,12 @@ static int clk_pll_set_rate(struct clk_hw *hw,
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ret = clk_set_parent(clk_cpu_mux, clk_cpu_pll);
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if (ret) {
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pr_err("%s %d, faild to switch %s to %s, ret %d\n",__func__,__LINE__,
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- clk_cpu_mux_name, clk_cpu_pll_name, ret);
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+ clk_cpu_mux_name, clk_cpu_pll_name, ret);
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return -EPERM;
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}
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+ clk_disable_unprepare(clk_cpu_lp_pll);
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}
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- return 0;
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+ return 0;
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}
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static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
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--
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2.47.0
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