176 lines
6.9 KiB
Diff
176 lines
6.9 KiB
Diff
From patchwork Thu Feb 8 13:43:35 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [1/4] clk: bcm2835: Fix ana->maskX definitions
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From: Boris Brezillon <boris.brezillon@bootlin.com>
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X-Patchwork-Id: 10207161
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Message-Id: <20180208134338.24590-1-boris.brezillon@bootlin.com>
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To: Florian Fainelli <f.fainelli@gmail.com>, Ray Jui <rjui@broadcom.com>,
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Scott Branden <sbranden@broadcom.com>,
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bcm-kernel-feedback-list@broadcom.com,
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Stephen Warren <swarren@wwwdotorg.org>,
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Lee Jones <lee@kernel.org>, Eric Anholt <eric@anholt.net>,
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linux-rpi-kernel@lists.infradead.org,
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Mike Turquette <mturquette@baylibre.com>,
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Stephen Boyd <sboyd@codeaurora.org>, linux-clk@vger.kernel.org
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Cc: Boris Brezillon <boris.brezillon@bootlin.com>, stable@vger.kernel.org
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Date: Thu, 8 Feb 2018 14:43:35 +0100
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ana->maskX values are already '~'-ed in bcm2835_pll_set_rate(). Remove
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the '~' in the definition to fix ANA setup.
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Note that this commit fixes a long standing bug preventing one from
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using an HDMI display if it's plugged after the FW has booted Linux.
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This is because PLLH is used by the HDMI encoder to generate the pixel
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clock.
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Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
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Cc: <stable@vger.kernel.org>
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Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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---
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drivers/clk/bcm/clk-bcm2835.c | 8 ++++----
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1 file changed, 4 insertions(+), 4 deletions(-)
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diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
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index 44301a3d9963..2108a274185a 100644
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -449,17 +449,17 @@ struct bcm2835_pll_ana_bits {
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static const struct bcm2835_pll_ana_bits bcm2835_ana_default = {
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.mask0 = 0,
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.set0 = 0,
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- .mask1 = (u32)~(A2W_PLL_KI_MASK | A2W_PLL_KP_MASK),
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+ .mask1 = A2W_PLL_KI_MASK | A2W_PLL_KP_MASK,
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.set1 = (2 << A2W_PLL_KI_SHIFT) | (8 << A2W_PLL_KP_SHIFT),
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- .mask3 = (u32)~A2W_PLL_KA_MASK,
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+ .mask3 = A2W_PLL_KA_MASK,
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.set3 = (2 << A2W_PLL_KA_SHIFT),
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.fb_prediv_mask = BIT(14),
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};
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static const struct bcm2835_pll_ana_bits bcm2835_ana_pllh = {
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- .mask0 = (u32)~(A2W_PLLH_KA_MASK | A2W_PLLH_KI_LOW_MASK),
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+ .mask0 = A2W_PLLH_KA_MASK | A2W_PLLH_KI_LOW_MASK,
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.set0 = (2 << A2W_PLLH_KA_SHIFT) | (2 << A2W_PLLH_KI_LOW_SHIFT),
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- .mask1 = (u32)~(A2W_PLLH_KI_HIGH_MASK | A2W_PLLH_KP_MASK),
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+ .mask1 = A2W_PLLH_KI_HIGH_MASK | A2W_PLLH_KP_MASK,
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.set1 = (6 << A2W_PLLH_KP_SHIFT),
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.mask3 = 0,
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.set3 = 0,
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From patchwork Thu Feb 8 13:43:36 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [2/4] clk: bcm2835: Protect sections updating shared registers
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From: Boris Brezillon <boris.brezillon@bootlin.com>
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X-Patchwork-Id: 10207155
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Message-Id: <20180208134338.24590-2-boris.brezillon@bootlin.com>
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To: Florian Fainelli <f.fainelli@gmail.com>, Ray Jui <rjui@broadcom.com>,
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Scott Branden <sbranden@broadcom.com>,
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bcm-kernel-feedback-list@broadcom.com,
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Stephen Warren <swarren@wwwdotorg.org>,
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Lee Jones <lee@kernel.org>, Eric Anholt <eric@anholt.net>,
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linux-rpi-kernel@lists.infradead.org,
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Mike Turquette <mturquette@baylibre.com>,
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Stephen Boyd <sboyd@codeaurora.org>, linux-clk@vger.kernel.org
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Cc: Boris Brezillon <boris.brezillon@bootlin.com>, stable@vger.kernel.org
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Date: Thu, 8 Feb 2018 14:43:36 +0100
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CM_PLLx and A2W_XOSC_CTRL registers are accessed by different clock
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handlers and must be accessed with ->regs_lock held.
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Update the sections where this protection is missing.
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Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
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Cc: <stable@vger.kernel.org>
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Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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---
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drivers/clk/bcm/clk-bcm2835.c | 4 ++++
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1 file changed, 4 insertions(+)
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diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
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index 2108a274185a..a07f6451694a 100644
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -623,8 +623,10 @@ static int bcm2835_pll_on(struct clk_hw *hw)
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~A2W_PLL_CTRL_PWRDN);
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/* Take the PLL out of reset. */
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+ spin_lock(&cprman->regs_lock);
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cprman_write(cprman, data->cm_ctrl_reg,
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cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST);
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+ spin_unlock(&cprman->regs_lock);
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/* Wait for the PLL to lock. */
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timeout = ktime_add_ns(ktime_get(), LOCK_TIMEOUT_NS);
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@@ -701,9 +703,11 @@ static int bcm2835_pll_set_rate(struct clk_hw *hw,
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}
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/* Unmask the reference clock from the oscillator. */
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+ spin_lock(&cprman->regs_lock);
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cprman_write(cprman, A2W_XOSC_CTRL,
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cprman_read(cprman, A2W_XOSC_CTRL) |
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data->reference_enable_mask);
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+ spin_unlock(&cprman->regs_lock);
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if (do_ana_setup_first)
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bcm2835_pll_write_ana(cprman, data->ana_reg_base, ana);
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From patchwork Thu Feb 8 13:43:37 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [3/4] clk: bcm2835: De-assert/assert PLL reset signal when appropriate
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From: Boris Brezillon <boris.brezillon@bootlin.com>
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X-Patchwork-Id: 10207157
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Message-Id: <20180208134338.24590-3-boris.brezillon@bootlin.com>
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To: Florian Fainelli <f.fainelli@gmail.com>, Ray Jui <rjui@broadcom.com>,
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Scott Branden <sbranden@broadcom.com>,
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bcm-kernel-feedback-list@broadcom.com,
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Stephen Warren <swarren@wwwdotorg.org>,
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Lee Jones <lee@kernel.org>, Eric Anholt <eric@anholt.net>,
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linux-rpi-kernel@lists.infradead.org,
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Mike Turquette <mturquette@baylibre.com>,
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Stephen Boyd <sboyd@codeaurora.org>, linux-clk@vger.kernel.org
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Cc: Boris Brezillon <boris.brezillon@bootlin.com>, stable@vger.kernel.org
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Date: Thu, 8 Feb 2018 14:43:37 +0100
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In order to enable a PLL, not only the PLL has to be powered up and
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locked, but you also have to de-assert the reset signal. The last part
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was missing. Add it so PLLs that were not enabled by the FW/bootloader
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can be enabled from Linux.
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Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
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Cc: <stable@vger.kernel.org>
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Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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---
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drivers/clk/bcm/clk-bcm2835.c | 7 +++++++
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1 file changed, 7 insertions(+)
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diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
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index a07f6451694a..6c5d4a8e426c 100644
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -602,6 +602,9 @@ static void bcm2835_pll_off(struct clk_hw *hw)
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const struct bcm2835_pll_data *data = pll->data;
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spin_lock(&cprman->regs_lock);
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+ cprman_write(cprman, data->a2w_ctrl_reg,
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+ cprman_read(cprman, data->a2w_ctrl_reg) &
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+ ~A2W_PLL_CTRL_PRST_DISABLE);
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cprman_write(cprman, data->cm_ctrl_reg,
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cprman_read(cprman, data->cm_ctrl_reg) |
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CM_PLL_ANARST);
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@@ -640,6 +643,10 @@ static int bcm2835_pll_on(struct clk_hw *hw)
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cpu_relax();
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}
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+ cprman_write(cprman, data->a2w_ctrl_reg,
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+ cprman_read(cprman, data->a2w_ctrl_reg) |
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+ A2W_PLL_CTRL_PRST_DISABLE);
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+
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return 0;
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}
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