7d2c2f2d91
(rhbz 1305038) - Disable fbc on haswell by default (fdo#96461)
58 lines
2.2 KiB
Diff
58 lines
2.2 KiB
Diff
From f28225dda2a2bf1e2d96bbe44b45d43a7d5071d3 Mon Sep 17 00:00:00 2001
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From: Matt Roper <matthew.d.roper@intel.com>
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Date: Thu, 12 May 2016 07:05:59 -0700
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Subject: [PATCH 05/17] drm/i915/gen9: Store plane minimum blocks in CRTC wm
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state (v2)
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This will eventually allow us to re-use old values without
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re-calculating them for unchanged planes (which also helps us avoid
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re-grabbing extra plane states).
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v2:
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- Drop unnecessary memset's; they were meant for a later patch (which
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got reworked anyway to not need them, but were mis-rebased into this
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one. (Maarten)
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Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-6-git-send-email-matthew.d.roper@intel.com
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---
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drivers/gpu/drm/i915/intel_drv.h | 4 ++++
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drivers/gpu/drm/i915/intel_pm.c | 4 ++--
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2 files changed, 6 insertions(+), 2 deletions(-)
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diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
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index 6a95696..9308cff 100644
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--- a/drivers/gpu/drm/i915/intel_drv.h
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+++ b/drivers/gpu/drm/i915/intel_drv.h
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@@ -431,6 +431,10 @@ struct intel_crtc_wm_state {
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/* cached plane data rate */
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unsigned plane_data_rate[I915_MAX_PLANES];
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unsigned plane_y_data_rate[I915_MAX_PLANES];
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+
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+ /* minimum block allocation */
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+ uint16_t minimum_blocks[I915_MAX_PLANES];
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+ uint16_t minimum_y_blocks[I915_MAX_PLANES];
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} skl;
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};
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diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
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index 5104ba7..6c7a048 100644
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--- a/drivers/gpu/drm/i915/intel_pm.c
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+++ b/drivers/gpu/drm/i915/intel_pm.c
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@@ -3067,8 +3067,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
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enum pipe pipe = intel_crtc->pipe;
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struct skl_ddb_entry *alloc = &ddb->pipe[pipe];
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uint16_t alloc_size, start, cursor_blocks;
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- uint16_t minimum[I915_MAX_PLANES];
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- uint16_t y_minimum[I915_MAX_PLANES];
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+ uint16_t *minimum = cstate->wm.skl.minimum_blocks;
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+ uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks;
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unsigned int total_data_rate;
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skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc);
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--
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2.7.4
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