146 lines
7.0 KiB
Diff
146 lines
7.0 KiB
Diff
From patchwork Thu Jun 13 16:27:45 2019
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From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
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To: devicetree@vger.kernel.org
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Subject: [PATCH] arm64: dts: rockchip: Update DWC3 modules on RK3399 SoCs
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Date: Thu, 13 Jun 2019 18:27:45 +0200
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Cc: Mark Rutland <mark.rutland@arm.com>, Heiko Stuebner <heiko@sntech.de>,
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Felipe Balbi <felipe.balbi@linux.intel.com>,
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linux-rockchip@lists.infradead.org, Tony Xie <tony.xie@rock-chips.com>,
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As per binding documentation [1], the DWC3 core should have the "ref",
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"bus_early" and "suspend" clocks. As explained in the binding, those
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clocks are required for new platforms but not for existing platforms
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before commit fe8abf332b8f ("usb: dwc3: support clocks and resets for
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DWC3 core").
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However, as those clocks are really treated as required, this ends with
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having some annoying messages when the "rockchip,rk3399-dwc3" is used:
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[ 1.724107] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2
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[ 1.731893] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2
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[ 2.495937] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2
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[ 2.647239] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2
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In order to remove those annoying messages, update the DWC3 hardware
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module node and add all the required clocks. With this change, both, the
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glue node and the DWC3 core node, have the clocks defined, but that's
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not really a problem and there isn't a side effect on do this. So, we
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can get rid of the annoying get clk error messages.
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[1] Documentation/devicetree/bindings/usb/dwc3.txt
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Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
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---
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arch/arm64/boot/dts/rockchip/rk3399.dtsi | 6 ++++++
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1 file changed, 6 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
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index 196ac9b78076..a15348d185ce 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
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@@ -414,6 +414,9 @@
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compatible = "snps,dwc3";
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reg = <0x0 0xfe800000 0x0 0x100000>;
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interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
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+ clocks = <&cru SCLK_USB3OTG0_REF>, <&cru ACLK_USB3OTG0>,
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+ <&cru SCLK_USB3OTG0_SUSPEND>;
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+ clock-names = "ref", "bus_early", "suspend";
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dr_mode = "otg";
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phys = <&u2phy0_otg>, <&tcphy0_usb3>;
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phy-names = "usb2-phy", "usb3-phy";
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@@ -447,6 +450,9 @@
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compatible = "snps,dwc3";
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reg = <0x0 0xfe900000 0x0 0x100000>;
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interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
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+ clocks = <&cru SCLK_USB3OTG1_REF>, <&cru ACLK_USB3OTG1>,
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+ <&cru SCLK_USB3OTG1_SUSPEND>;
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+ clock-names = "ref", "bus_early", "suspend";
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dr_mode = "otg";
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phys = <&u2phy1_otg>, <&tcphy1_usb3>;
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phy-names = "usb2-phy", "usb3-phy";
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