From 39b54105069e02d28eca66bf732e30403afcf800 Mon Sep 17 00:00:00 2001 From: David Abdurachmanov Date: Tue, 28 Jun 2022 10:31:35 +0300 Subject: [PATCH 1/3] Set SiFive Unmatched FU740 compatible to sifive,u74-mc Signed-off-by: David Abdurachmanov --- arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi index 7b77c1349..523c5ee6c 100644 --- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi @@ -39,7 +39,7 @@ cpu0_intc: interrupt-controller { }; }; cpu1: cpu@1 { - compatible = "sifive,bullet0", "riscv"; + compatible = "sifive,u74-mc", "sifive,bullet0", "riscv"; d-cache-block-size = <64>; d-cache-sets = <64>; d-cache-size = <32768>; @@ -63,7 +63,7 @@ cpu1_intc: interrupt-controller { }; }; cpu2: cpu@2 { - compatible = "sifive,bullet0", "riscv"; + compatible = "sifive,u74-mc", "sifive,bullet0", "riscv"; d-cache-block-size = <64>; d-cache-sets = <64>; d-cache-size = <32768>; @@ -87,7 +87,7 @@ cpu2_intc: interrupt-controller { }; }; cpu3: cpu@3 { - compatible = "sifive,bullet0", "riscv"; + compatible = "sifive,u74-mc", "sifive,bullet0", "riscv"; d-cache-block-size = <64>; d-cache-sets = <64>; d-cache-size = <32768>; @@ -111,7 +111,7 @@ cpu3_intc: interrupt-controller { }; }; cpu4: cpu@4 { - compatible = "sifive,bullet0", "riscv"; + compatible = "sifive,u74-mc", "sifive,bullet0", "riscv"; d-cache-block-size = <64>; d-cache-sets = <64>; d-cache-size = <32768>; -- 2.35.1 From ef78729362db7d8f2fc67e4dfa1dec03026101c2 Mon Sep 17 00:00:00 2001 From: David Abdurachmanov Date: Tue, 28 Jun 2022 11:14:31 +0300 Subject: [PATCH 2/3] SiFive Unmatched PWM LEDs Add SiFive Unmatched PWM LEDs. The multi-color LED should be converted to Documentation/devicetree/bindings/leds/leds-pwm-multicolor.yaml starting v5.19 kernel. Signed-off-by: David Abdurachmanov --- .../boot/dts/sifive/hifive-unmatched-a00.dts | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts index c4ed9efdf..d3e359de1 100644 --- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts +++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts @@ -4,6 +4,8 @@ #include "fu740-c000.dtsi" #include #include +#include +#include /* Clock frequency (in Hz) of the PCB crystal for rtcclk */ #define RTCCLK_FREQ 1000000 @@ -26,6 +28,46 @@ memory@80000000 { reg = <0x0 0x80000000 0x4 0x00000000>; }; + pwmleds { + compatible = "pwm-leds"; + + led-0 { + label = "green:d12"; + color = ; + pwms = <&pwm0 0 7812500 PWM_POLARITY_INVERTED>; + active-low = <1>; + max-brightness = <255>; + linux,default-trigger = "none"; + }; + + led-1 { + label = "green:d2"; + color = ; + pwms = <&pwm0 1 7812500 PWM_POLARITY_INVERTED>; + active-low = <1>; + max-brightness = <255>; + linux,default-trigger = "none"; + }; + + led-2 { + label = "red:d2"; + color = ; + pwms = <&pwm0 2 7812500 PWM_POLARITY_INVERTED>; + active-low = <1>; + max-brightness = <255>; + linux,default-trigger = "none"; + }; + + led-3 { + label = "blue:d2"; + color = ; + pwms = <&pwm0 3 7812500 PWM_POLARITY_INVERTED>; + active-low = <1>; + max-brightness = <255>; + linux,default-trigger = "none"; + }; + }; + hfclk: hfclk { #clock-cells = <0>; compatible = "fixed-clock"; -- 2.35.1 From 033ceb56fa0b6151dcab77a1d3e9c66f3dec624c Mon Sep 17 00:00:00 2001 From: David Abdurachmanov Date: Tue, 28 Jun 2022 11:39:36 +0300 Subject: [PATCH 3/3] SiFive FU740 DMA Engine Signed-off-by: David Abdurachmanov --- arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi index 523c5ee6c..d5355aecc 100644 --- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi @@ -140,6 +140,13 @@ soc { #size-cells = <2>; compatible = "simple-bus"; ranges; + dma: dma-controller@3000000 { + compatible = "sifive,fu540-c000-pdma"; + reg = <0x0 0x3000000 0x0 0x8000>; + interrupt-parent = <&plic0>; + interrupts = <11>, <12>, <13>, <14>, <15>, <16>, <17>, <18>; + #dma-cells = <1>; + }; plic0: interrupt-controller@c000000 { #interrupt-cells = <1>; #address-cells = <0>; -- 2.35.1