Disable debug

And bump version for test builds

.gitignore

@@ -1,2 +1,7 @@
+clog
 *.xz
 *.bz2
+*.rpm
+*.orig
+kernel-[234].*/
+perf-man-*.tar.gz

0001-HID-input-rework-HID_QUIRK_MULTI_INPUT.patch

@@ -0,0 +1,187 @@
+From de1715d88a5e80cc14455db1cf758cdf970fff22 Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Thu, 12 May 2016 15:47:27 +0200
+Subject: [PATCH 1/3] HID: input: rework HID_QUIRK_MULTI_INPUT
+
+The purpose of HID_QUIRK_MULTI_INPUT is to have an input device per
+report id. This is useful when the HID device presents several HID
+collections of different device types.
+
+The current implementation of hid-input creates one input node per id per
+type (input or output). This is problematic for the LEDs of a keyboard as
+they are often set through an output report. The current code creates
+one input node with all the keyboard keys, and one other with only the
+LEDs.
+
+To solve this, we use a two-passes way:
+- first, we initialize all input nodes and associate one per report id
+- then, we register all the input nodes
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/hid/hid-input.c | 95 ++++++++++++++++++++++++++++---------------------
+ include/linux/hid.h     |  1 +
+ 2 files changed, 55 insertions(+), 41 deletions(-)
+
+diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c
+index bcfaf32..bb2ec45 100644
+--- a/drivers/hid/hid-input.c
++++ b/drivers/hid/hid-input.c
+@@ -1458,6 +1458,31 @@ static void hidinput_cleanup_hidinput(struct hid_device *hid,
+ 	kfree(hidinput);
+ }
+ 
++static struct hid_input *hidinput_match(struct hid_report *report)
++{
++	struct hid_device *hid = report->device;
++	struct hid_input *hidinput;
++
++	list_for_each_entry(hidinput, &hid->inputs, list) {
++		if (hidinput->report &&
++		    hidinput->report->id == report->id)
++			return hidinput;
++	}
++
++	return NULL;
++}
++
++static inline void hidinput_configure_usages(struct hid_input *hidinput,
++					     struct hid_report *report)
++{
++	int i, j;
++
++	for (i = 0; i < report->maxfield; i++)
++		for (j = 0; j < report->field[i]->maxusage; j++)
++			hidinput_configure_usage(hidinput, report->field[i],
++						 report->field[i]->usage + j);
++}
++
+ /*
+  * Register the input device; print a message.
+  * Configure the input layer interface
+@@ -1468,8 +1493,8 @@ int hidinput_connect(struct hid_device *hid, unsigned int force)
+ {
+ 	struct hid_driver *drv = hid->driver;
+ 	struct hid_report *report;
+-	struct hid_input *hidinput = NULL;
+-	int i, j, k;
++	struct hid_input *next, *hidinput = NULL;
++	int i, k;
+ 
+ 	INIT_LIST_HEAD(&hid->inputs);
+ 	INIT_WORK(&hid->led_work, hidinput_led_worker);
+@@ -1499,43 +1524,40 @@ int hidinput_connect(struct hid_device *hid, unsigned int force)
+ 			if (!report->maxfield)
+ 				continue;
+ 
++			/*
++			 * Find the previous hidinput report attached
++			 * to this report id.
++			 */
++			if (hid->quirks & HID_QUIRK_MULTI_INPUT)
++				hidinput = hidinput_match(report);
++
+ 			if (!hidinput) {
+ 				hidinput = hidinput_allocate(hid);
+ 				if (!hidinput)
+ 					goto out_unwind;
+ 			}
+ 
+-			for (i = 0; i < report->maxfield; i++)
+-				for (j = 0; j < report->field[i]->maxusage; j++)
+-					hidinput_configure_usage(hidinput, report->field[i],
+-								 report->field[i]->usage + j);
+-
+-			if ((hid->quirks & HID_QUIRK_NO_EMPTY_INPUT) &&
+-			    !hidinput_has_been_populated(hidinput))
+-				continue;
++			hidinput_configure_usages(hidinput, report);
+ 
+-			if (hid->quirks & HID_QUIRK_MULTI_INPUT) {
+-				/* This will leave hidinput NULL, so that it
+-				 * allocates another one if we have more inputs on
+-				 * the same interface. Some devices (e.g. Happ's
+-				 * UGCI) cram a lot of unrelated inputs into the
+-				 * same interface. */
++			if (hid->quirks & HID_QUIRK_MULTI_INPUT)
+ 				hidinput->report = report;
+-				if (drv->input_configured &&
+-				    drv->input_configured(hid, hidinput))
+-					goto out_cleanup;
+-				if (input_register_device(hidinput->input))
+-					goto out_cleanup;
+-				hidinput = NULL;
+-			}
+ 		}
+ 	}
+ 
+-	if (hidinput && (hid->quirks & HID_QUIRK_NO_EMPTY_INPUT) &&
+-	    !hidinput_has_been_populated(hidinput)) {
+-		/* no need to register an input device not populated */
+-		hidinput_cleanup_hidinput(hid, hidinput);
+-		hidinput = NULL;
++	list_for_each_entry_safe(hidinput, next, &hid->inputs, list) {
++		if ((hid->quirks & HID_QUIRK_NO_EMPTY_INPUT) &&
++		    !hidinput_has_been_populated(hidinput)) {
++			/* no need to register an input device not populated */
++			hidinput_cleanup_hidinput(hid, hidinput);
++			continue;
++		}
++
++		if (drv->input_configured &&
++		    drv->input_configured(hid, hidinput))
++			goto out_unwind;
++		if (input_register_device(hidinput->input))
++			goto out_unwind;
++		hidinput->registered = true;
+ 	}
+ 
+ 	if (list_empty(&hid->inputs)) {
+@@ -1543,20 +1565,8 @@ int hidinput_connect(struct hid_device *hid, unsigned int force)
+ 		goto out_unwind;
+ 	}
+ 
+-	if (hidinput) {
+-		if (drv->input_configured &&
+-		    drv->input_configured(hid, hidinput))
+-			goto out_cleanup;
+-		if (input_register_device(hidinput->input))
+-			goto out_cleanup;
+-	}
+-
+ 	return 0;
+ 
+-out_cleanup:
+-	list_del(&hidinput->list);
+-	input_free_device(hidinput->input);
+-	kfree(hidinput);
+ out_unwind:
+ 	/* unwind the ones we already registered */
+ 	hidinput_disconnect(hid);
+@@ -1573,7 +1583,10 @@ void hidinput_disconnect(struct hid_device *hid)
+ 
+ 	list_for_each_entry_safe(hidinput, next, &hid->inputs, list) {
+ 		list_del(&hidinput->list);
+-		input_unregister_device(hidinput->input);
++		if (hidinput->registered)
++			input_unregister_device(hidinput->input);
++		else
++			input_free_device(hidinput->input);
+ 		kfree(hidinput);
+ 	}
+ 
+diff --git a/include/linux/hid.h b/include/linux/hid.h
+index 75b66ec..8a5d697 100644
+--- a/include/linux/hid.h
++++ b/include/linux/hid.h
+@@ -479,6 +479,7 @@ struct hid_input {
+ 	struct list_head list;
+ 	struct hid_report *report;
+ 	struct input_dev *input;
++	bool registered;
+ };
+ 
+ enum hid_type {
+-- 
+2.7.4
+

0001-Input-add-new-driver-for-the-Surface-3.patch

@@ -0,0 +1,372 @@
+From 4feacbc24eea0c5f36728017575cc0ad28d8758b Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Thu, 19 May 2016 09:24:06 -0700
+Subject: [PATCH] Input: add new driver for the Surface 3
+
+This is a basic driver for the Surface 3. I am not so sure it will work
+with any firmwares as most values are encoded, but given that I only have
+access to my current device with its firmware and I don't have the
+datasheet, it should be OK for now.
+
+The Surface Pen is not supported (if it is supposed to be). I'll work on
+this when I get one.
+
+Tested-by: Bastien Nocera <hadess@hadess.net>
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+---
+ drivers/input/touchscreen/Kconfig        |  13 ++
+ drivers/input/touchscreen/Makefile       |   1 +
+ drivers/input/touchscreen/surface3_spi.c | 304 +++++++++++++++++++++++++++++++
+ 3 files changed, 318 insertions(+)
+ create mode 100644 drivers/input/touchscreen/surface3_spi.c
+
+diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
+index 75443bb..c3880b9 100644
+--- a/drivers/input/touchscreen/Kconfig
++++ b/drivers/input/touchscreen/Kconfig
+@@ -1085,6 +1085,19 @@ config TOUCHSCREEN_SUR40
+ 	  To compile this driver as a module, choose M here: the
+ 	  module will be called sur40.
+ 
++config TOUCHSCREEN_SURFACE3_SPI
++	tristate "Ntrig/Microsoft Surface 3 SPI touchscreen"
++	depends on SPI
++	depends on GPIOLIB || COMPILE_TEST
++	help
++	  Say Y here if you have the Ntrig/Microsoft SPI touchscreen
++	  controller chip as found on the Surface 3 in your system.
++
++	  If unsure, say N.
++
++	  To compile this driver as a module, choose M here: the
++	  module will be called surface3_spi.
++
+ config TOUCHSCREEN_SX8654
+ 	tristate "Semtech SX8654 touchscreen"
+ 	depends on I2C
+diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
+index 4b518c7..75af04d 100644
+--- a/drivers/input/touchscreen/Makefile
++++ b/drivers/input/touchscreen/Makefile
+@@ -66,6 +66,7 @@ obj-$(CONFIG_TOUCHSCREEN_ST1232)	+= st1232.o
+ obj-$(CONFIG_TOUCHSCREEN_STMPE)		+= stmpe-ts.o
+ obj-$(CONFIG_TOUCHSCREEN_SUN4I)		+= sun4i-ts.o
+ obj-$(CONFIG_TOUCHSCREEN_SUR40)		+= sur40.o
++obj-$(CONFIG_TOUCHSCREEN_SURFACE3_SPI)	+= surface3_spi.o
+ obj-$(CONFIG_TOUCHSCREEN_TI_AM335X_TSC)	+= ti_am335x_tsc.o
+ obj-$(CONFIG_TOUCHSCREEN_TOUCHIT213)	+= touchit213.o
+ obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT)	+= touchright.o
+diff --git a/drivers/input/touchscreen/surface3_spi.c b/drivers/input/touchscreen/surface3_spi.c
+new file mode 100644
+index 0000000..e18e742
+--- /dev/null
++++ b/drivers/input/touchscreen/surface3_spi.c
+@@ -0,0 +1,304 @@
++/*
++ *  Driver for Ntrig/Microsoft Touchscreens over SPI
++ *
++ *  Copyright (c) 2016 Red Hat Inc.
++ */
++
++/*
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; version 2 of the License.
++ */
++
++#include <linux/kernel.h>
++
++#include <linux/delay.h>
++#include <linux/gpio/consumer.h>
++#include <linux/input.h>
++#include <linux/input/mt.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/spi/spi.h>
++#include <linux/acpi.h>
++
++#include <asm/unaligned.h>
++
++#define SURFACE3_PACKET_SIZE	264
++
++struct surface3_ts_data {
++	struct spi_device *spi;
++	struct gpio_desc *gpiod_rst[2];
++	struct input_dev *input_dev;
++
++	u8 rd_buf[SURFACE3_PACKET_SIZE]		____cacheline_aligned;
++};
++
++struct surface3_ts_data_finger {
++	u8 status;
++	__le16 tracking_id;
++	__le16 x;
++	__le16 cx;
++	__le16 y;
++	__le16 cy;
++	__le16 width;
++	__le16 height;
++	u32 padding;
++} __packed;
++
++static int surface3_spi_read(struct surface3_ts_data *ts_data)
++{
++	struct spi_device *spi = ts_data->spi;
++
++	memset(ts_data->rd_buf, 0, sizeof(ts_data->rd_buf));
++	return spi_read(spi, ts_data->rd_buf, sizeof(ts_data->rd_buf));
++}
++
++static void surface3_spi_report_touch(struct surface3_ts_data *ts_data,
++				   struct surface3_ts_data_finger *finger)
++{
++	int st = finger->status & 0x01;
++	int slot;
++
++	slot = input_mt_get_slot_by_key(ts_data->input_dev,
++				get_unaligned_le16(&finger->tracking_id));
++	if (slot < 0)
++		return;
++
++	input_mt_slot(ts_data->input_dev, slot);
++	input_mt_report_slot_state(ts_data->input_dev, MT_TOOL_FINGER, st);
++	if (st) {
++		input_report_abs(ts_data->input_dev,
++				 ABS_MT_POSITION_X,
++				 get_unaligned_le16(&finger->x));
++		input_report_abs(ts_data->input_dev,
++				 ABS_MT_POSITION_Y,
++				 get_unaligned_le16(&finger->y));
++		input_report_abs(ts_data->input_dev,
++				 ABS_MT_WIDTH_MAJOR,
++				 get_unaligned_le16(&finger->width));
++		input_report_abs(ts_data->input_dev,
++				 ABS_MT_WIDTH_MINOR,
++				 get_unaligned_le16(&finger->height));
++	}
++}
++
++static void surface3_spi_process(struct surface3_ts_data *ts_data)
++{
++	const char header[] = {0xff, 0xff, 0xff, 0xff, 0xa5, 0x5a, 0xe7, 0x7e,
++			       0x01, 0xd2, 0x00, 0x80, 0x01, 0x03, 0x03};
++	u8 *data = ts_data->rd_buf;
++	u16 timestamp;
++	unsigned int i;
++
++	if (memcmp(header, data, sizeof(header)))
++		dev_err(&ts_data->spi->dev,
++			"%s header error: %*ph, ignoring...\n",
++			__func__, (int)sizeof(header), data);
++
++	timestamp = get_unaligned_le16(&data[15]);
++
++	for (i = 0; i < 13; i++) {
++		struct surface3_ts_data_finger *finger;
++
++		finger = (struct surface3_ts_data_finger *)&data[17 +
++				i * sizeof(struct surface3_ts_data_finger)];
++
++		/*
++		 * When bit 5 of status is 1, it marks the end of the report:
++		 * - touch present: 0xe7
++		 * - touch released: 0xe4
++		 * - nothing valuable: 0xff
++		 */
++		if (finger->status & 0x10)
++			break;
++
++		surface3_spi_report_touch(ts_data, finger);
++	}
++
++	input_mt_sync_frame(ts_data->input_dev);
++	input_sync(ts_data->input_dev);
++}
++
++static irqreturn_t surface3_spi_irq_handler(int irq, void *dev_id)
++{
++	struct surface3_ts_data *data = dev_id;
++
++	if (surface3_spi_read(data))
++		return IRQ_HANDLED;
++
++	dev_dbg(&data->spi->dev, "%s received -> %*ph\n",
++		__func__, SURFACE3_PACKET_SIZE, data->rd_buf);
++	surface3_spi_process(data);
++
++	return IRQ_HANDLED;
++}
++
++static void surface3_spi_power(struct surface3_ts_data *data, bool on)
++{
++	gpiod_set_value(data->gpiod_rst[0], on);
++	gpiod_set_value(data->gpiod_rst[1], on);
++	/* let the device settle a little */
++	msleep(20);
++}
++
++/**
++ * surface3_spi_get_gpio_config - Get GPIO config from ACPI/DT
++ *
++ * @ts: surface3_spi_ts_data pointer
++ */
++static int surface3_spi_get_gpio_config(struct surface3_ts_data *data)
++{
++	int error;
++	struct device *dev;
++	struct gpio_desc *gpiod;
++	int i;
++
++	dev = &data->spi->dev;
++
++	/* Get the reset lines GPIO pin number */
++	for (i = 0; i < 2; i++) {
++		gpiod = devm_gpiod_get_index(dev, NULL, i, GPIOD_OUT_LOW);
++		if (IS_ERR(gpiod)) {
++			error = PTR_ERR(gpiod);
++			if (error != -EPROBE_DEFER)
++				dev_err(dev,
++					"Failed to get power GPIO %d: %d\n",
++					i,
++					error);
++			return error;
++		}
++
++		data->gpiod_rst[i] = gpiod;
++	}
++
++	return 0;
++}
++
++static int surface3_spi_create_input(struct surface3_ts_data *data)
++{
++	struct input_dev *input;
++	int error;
++
++	input = devm_input_allocate_device(&data->spi->dev);
++	if (!input)
++		return -ENOMEM;
++
++	data->input_dev = input;
++
++	input_set_abs_params(input, ABS_MT_POSITION_X, 0, 9600, 0, 0);
++	input_abs_set_res(input, ABS_MT_POSITION_X, 40);
++	input_set_abs_params(input, ABS_MT_POSITION_Y, 0, 7200, 0, 0);
++	input_abs_set_res(input, ABS_MT_POSITION_Y, 48);
++	input_set_abs_params(input, ABS_MT_WIDTH_MAJOR, 0, 1024, 0, 0);
++	input_set_abs_params(input, ABS_MT_WIDTH_MINOR, 0, 1024, 0, 0);
++	input_mt_init_slots(input, 10, INPUT_MT_DIRECT);
++
++	input->name = "Surface3 SPI Capacitive TouchScreen";
++	input->phys = "input/ts";
++	input->id.bustype = BUS_SPI;
++	input->id.vendor = 0x045e;	/* Microsoft */
++	input->id.product = 0x0000;
++	input->id.version = 0x0000;
++
++	error = input_register_device(input);
++	if (error) {
++		dev_err(&data->spi->dev,
++			"Failed to register input device: %d", error);
++		return error;
++	}
++
++	return 0;
++}
++
++static int surface3_spi_probe(struct spi_device *spi)
++{
++	struct surface3_ts_data *data;
++	int error;
++
++	/* Set up SPI*/
++	spi->bits_per_word = 8;
++	spi->mode = SPI_MODE_0;
++	error = spi_setup(spi);
++	if (error)
++		return error;
++
++	data = devm_kzalloc(&spi->dev, sizeof(*data), GFP_KERNEL);
++	if (!data)
++		return -ENOMEM;
++
++	data->spi = spi;
++	spi_set_drvdata(spi, data);
++
++	error = surface3_spi_get_gpio_config(data);
++	if (error)
++		return error;
++
++	surface3_spi_power(data, true);
++	surface3_spi_power(data, false);
++	surface3_spi_power(data, true);
++
++	error = surface3_spi_create_input(data);
++	if (error)
++		return error;
++
++	error = devm_request_threaded_irq(&spi->dev, spi->irq,
++					  NULL, surface3_spi_irq_handler,
++					  IRQF_ONESHOT,
++					  "Surface3-irq", data);
++	if (error)
++		return error;
++
++	return 0;
++}
++
++static int __maybe_unused surface3_spi_suspend(struct device *dev)
++{
++	struct spi_device *spi = to_spi_device(dev);
++	struct surface3_ts_data *data = spi_get_drvdata(spi);
++
++	disable_irq(data->spi->irq);
++
++	surface3_spi_power(data, false);
++
++	return 0;
++}
++
++static int __maybe_unused surface3_spi_resume(struct device *dev)
++{
++	struct spi_device *spi = to_spi_device(dev);
++	struct surface3_ts_data *data = spi_get_drvdata(spi);
++
++	surface3_spi_power(data, true);
++
++	enable_irq(data->spi->irq);
++
++	return 0;
++}
++
++static SIMPLE_DEV_PM_OPS(surface3_spi_pm_ops,
++			 surface3_spi_suspend,
++			 surface3_spi_resume);
++
++#ifdef CONFIG_ACPI
++static const struct acpi_device_id surface3_spi_acpi_match[] = {
++	{ "MSHW0037", 0 },
++	{ }
++};
++MODULE_DEVICE_TABLE(acpi, surface3_spi_acpi_match);
++#endif
++
++static struct spi_driver surface3_spi_driver = {
++	.driver = {
++		.name	= "Surface3-spi",
++		.acpi_match_table = ACPI_PTR(surface3_spi_acpi_match),
++		.pm = &surface3_spi_pm_ops,
++	},
++	.probe = surface3_spi_probe,
++};
++
++module_spi_driver(surface3_spi_driver);
++
++MODULE_AUTHOR("Benjamin Tissoires <benjamin.tissoires@gmail.com>");
++MODULE_DESCRIPTION("Surface 3 SPI touchscreen driver");
++MODULE_LICENSE("GPL v2");
+-- 
+2.7.4
+

0001-Input-soc_button_array-use-gpio_is_valid.patch

@@ -0,0 +1,37 @@
+From 7e990a7b8f8bd62a806c4804608d00640352841f Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Thu, 12 May 2016 11:21:13 +0200
+Subject: [PATCH 1/6] Input - soc_button_array: use gpio_is_valid()
+
+gpio_keys will later use gpio_is_valid(). To match the actual
+behavior, we should use it here too.
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/input/misc/soc_button_array.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/input/misc/soc_button_array.c b/drivers/input/misc/soc_button_array.c
+index c14b827..bbd433c 100644
+--- a/drivers/input/misc/soc_button_array.c
++++ b/drivers/input/misc/soc_button_array.c
+@@ -17,6 +17,7 @@
+ #include <linux/acpi.h>
+ #include <linux/gpio/consumer.h>
+ #include <linux/gpio_keys.h>
++#include <linux/gpio.h>
+ #include <linux/platform_device.h>
+ 
+ /*
+@@ -92,7 +93,7 @@ soc_button_device_create(struct platform_device *pdev,
+ 			continue;
+ 
+ 		gpio = soc_button_lookup_gpio(&pdev->dev, info->acpi_index);
+-		if (gpio < 0)
++		if (!gpio_is_valid(gpio))
+ 			continue;
+ 
+ 		gpio_keys[n_buttons].type = info->event_type;
+-- 
+2.7.4
+

0001-Input-surface3_spi-Prepare-to-add-support-for-Surfac.patch

@@ -0,0 +1,106 @@
+From 427ee20610a7c252e99d08e08e70a4203c6059d0 Mon Sep 17 00:00:00 2001
+From: Stephen Just <stephenjust@gmail.com>
+Date: Fri, 27 May 2016 16:28:09 -0700
+Subject: [PATCH] Input: surface3_spi - Prepare to add support for Surface Pen
+
+Surface Pens can be supported by handling a second report type. Prepare
+for this change.
+
+Signed-off-by: Stephen Just <stephenjust@gmail.com>
+Reviewed-and-tested-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+---
+ drivers/input/touchscreen/surface3_spi.c | 39 +++++++++++++++++++++-----------
+ 1 file changed, 26 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/input/touchscreen/surface3_spi.c b/drivers/input/touchscreen/surface3_spi.c
+index e18e742..e6cea7e 100644
+--- a/drivers/input/touchscreen/surface3_spi.c
++++ b/drivers/input/touchscreen/surface3_spi.c
+@@ -26,6 +26,8 @@
+ 
+ #define SURFACE3_PACKET_SIZE	264
+ 
++#define SURFACE3_REPORT_TOUCH	0xd2
++
+ struct surface3_ts_data {
+ 	struct spi_device *spi;
+ 	struct gpio_desc *gpiod_rst[2];
+@@ -83,19 +85,10 @@ static void surface3_spi_report_touch(struct surface3_ts_data *ts_data,
+ 	}
+ }
+ 
+-static void surface3_spi_process(struct surface3_ts_data *ts_data)
++static void surface3_spi_process_touch(struct surface3_ts_data *ts_data, u8 *data)
+ {
+-	const char header[] = {0xff, 0xff, 0xff, 0xff, 0xa5, 0x5a, 0xe7, 0x7e,
+-			       0x01, 0xd2, 0x00, 0x80, 0x01, 0x03, 0x03};
+-	u8 *data = ts_data->rd_buf;
+ 	u16 timestamp;
+ 	unsigned int i;
+-
+-	if (memcmp(header, data, sizeof(header)))
+-		dev_err(&ts_data->spi->dev,
+-			"%s header error: %*ph, ignoring...\n",
+-			__func__, (int)sizeof(header), data);
+-
+ 	timestamp = get_unaligned_le16(&data[15]);
+ 
+ 	for (i = 0; i < 13; i++) {
+@@ -120,6 +113,26 @@ static void surface3_spi_process(struct surface3_ts_data *ts_data)
+ 	input_sync(ts_data->input_dev);
+ }
+ 
++static void surface3_spi_process(struct surface3_ts_data *ts_data)
++{
++	const char header[] = {
++		0xff, 0xff, 0xff, 0xff, 0xa5, 0x5a, 0xe7, 0x7e, 0x01
++	};
++	u8 *data = ts_data->rd_buf;
++
++	if (memcmp(header, data, sizeof(header)))
++		dev_err(&ts_data->spi->dev,
++			"%s header error: %*ph, ignoring...\n",
++			__func__, (int)sizeof(header), data);
++
++	if (data[9] == SURFACE3_REPORT_TOUCH)
++		surface3_spi_process_touch(ts_data, data);
++	else
++		dev_err(&ts_data->spi->dev,
++			"%s unknown packet type: %x, ignoring...\n",
++			__func__, data[9]);
++}
++
+ static irqreturn_t surface3_spi_irq_handler(int irq, void *dev_id)
+ {
+ 	struct surface3_ts_data *data = dev_id;
+@@ -175,7 +188,7 @@ static int surface3_spi_get_gpio_config(struct surface3_ts_data *data)
+ 	return 0;
+ }
+ 
+-static int surface3_spi_create_input(struct surface3_ts_data *data)
++static int surface3_spi_create_touch_input(struct surface3_ts_data *data)
+ {
+ 	struct input_dev *input;
+ 	int error;
+@@ -198,7 +211,7 @@ static int surface3_spi_create_input(struct surface3_ts_data *data)
+ 	input->phys = "input/ts";
+ 	input->id.bustype = BUS_SPI;
+ 	input->id.vendor = 0x045e;	/* Microsoft */
+-	input->id.product = 0x0000;
++	input->id.product = 0x0001;
+ 	input->id.version = 0x0000;
+ 
+ 	error = input_register_device(input);
+@@ -238,7 +251,7 @@ static int surface3_spi_probe(struct spi_device *spi)
+ 	surface3_spi_power(data, false);
+ 	surface3_spi_power(data, true);
+ 
+-	error = surface3_spi_create_input(data);
++	error = surface3_spi_create_touch_input(data);
+ 	if (error)
+ 		return error;
+ 
+-- 
+2.7.4
+

0001-Input-surface3_spi-add-surface-pen-support-for-Surfa.patch

@@ -0,0 +1,191 @@
+From 72fb4765ac9eea56a94282f29cdc70706f21494e Mon Sep 17 00:00:00 2001
+From: Stephen Just <stephenjust@gmail.com>
+Date: Fri, 27 May 2016 16:29:39 -0700
+Subject: [PATCH] Input: surface3_spi - add surface pen support for Surface 3
+
+This change creates a second input device which will handle input from
+a Surface Pen. The Surface Pen supplies a different packet header than
+touch events, so it is simple to handle one or the other.
+
+This patch handles both the newer Surface Pen with one button, and the
+older variant with a second button to switch to Eraser mode.
+
+Signed-off-by: Stephen Just <stephenjust@gmail.com>
+Reviewed-and-tested-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
+---
+ drivers/input/touchscreen/surface3_spi.c | 114 ++++++++++++++++++++++++++++++-
+ 1 file changed, 112 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/input/touchscreen/surface3_spi.c b/drivers/input/touchscreen/surface3_spi.c
+index e6cea7e..e12fb9b 100644
+--- a/drivers/input/touchscreen/surface3_spi.c
++++ b/drivers/input/touchscreen/surface3_spi.c
+@@ -27,11 +27,14 @@
+ #define SURFACE3_PACKET_SIZE	264
+ 
+ #define SURFACE3_REPORT_TOUCH	0xd2
++#define SURFACE3_REPORT_PEN	0x16
+ 
+ struct surface3_ts_data {
+ 	struct spi_device *spi;
+ 	struct gpio_desc *gpiod_rst[2];
+ 	struct input_dev *input_dev;
++	struct input_dev *pen_input_dev;
++	int pen_tool;
+ 
+ 	u8 rd_buf[SURFACE3_PACKET_SIZE]		____cacheline_aligned;
+ };
+@@ -48,6 +51,14 @@ struct surface3_ts_data_finger {
+ 	u32 padding;
+ } __packed;
+ 
++struct surface3_ts_data_pen {
++	u8 status;
++	__le16 x;
++	__le16 y;
++	__le16 pressure;
++	u8 padding;
++} __packed;
++
+ static int surface3_spi_read(struct surface3_ts_data *ts_data)
+ {
+ 	struct spi_device *spi = ts_data->spi;
+@@ -113,6 +124,53 @@ static void surface3_spi_process_touch(struct surface3_ts_data *ts_data, u8 *dat
+ 	input_sync(ts_data->input_dev);
+ }
+ 
++static void surface3_spi_report_pen(struct surface3_ts_data *ts_data,
++				    struct surface3_ts_data_pen *pen)
++{
++	struct input_dev *dev = ts_data->pen_input_dev;
++	int st = pen->status;
++	int prox = st & 0x01;
++	int rubber = st & 0x18;
++	int tool = (prox && rubber) ? BTN_TOOL_RUBBER : BTN_TOOL_PEN;
++
++	/* fake proximity out to switch tools */
++	if (ts_data->pen_tool != tool) {
++		input_report_key(dev, ts_data->pen_tool, 0);
++		input_sync(dev);
++		ts_data->pen_tool = tool;
++	}
++
++	input_report_key(dev, BTN_TOUCH, st & 0x12);
++
++	input_report_key(dev, ts_data->pen_tool, prox);
++
++	if (st) {
++		input_report_key(dev,
++				 BTN_STYLUS,
++				 st & 0x04);
++
++		input_report_abs(dev,
++				 ABS_X,
++				 get_unaligned_le16(&pen->x));
++		input_report_abs(dev,
++				 ABS_Y,
++				 get_unaligned_le16(&pen->y));
++		input_report_abs(dev,
++				 ABS_PRESSURE,
++				 get_unaligned_le16(&pen->pressure));
++	}
++}
++
++static void surface3_spi_process_pen(struct surface3_ts_data *ts_data, u8 *data)
++{
++	struct surface3_ts_data_pen *pen;
++
++	pen = (struct surface3_ts_data_pen *)&data[15];
++
++	surface3_spi_report_pen(ts_data, pen);
++	input_sync(ts_data->pen_input_dev);
++}
++
+ static void surface3_spi_process(struct surface3_ts_data *ts_data)
+ {
+ 	const char header[] = {
+@@ -125,12 +183,19 @@ static void surface3_spi_process(struct surface3_ts_data *ts_data)
+ 			"%s header error: %*ph, ignoring...\n",
+ 			__func__, (int)sizeof(header), data);
+ 
+-	if (data[9] == SURFACE3_REPORT_TOUCH)
++	switch (data[9]) {
++	case SURFACE3_REPORT_TOUCH:
+ 		surface3_spi_process_touch(ts_data, data);
+-	else
++		break;
++	case SURFACE3_REPORT_PEN:
++		surface3_spi_process_pen(ts_data, data);
++		break;
++	default:
+ 		dev_err(&ts_data->spi->dev,
+ 			"%s unknown packet type: %x, ignoring...\n",
+ 			__func__, data[9]);
++		break;
++	}
+ }
+ 
+ static irqreturn_t surface3_spi_irq_handler(int irq, void *dev_id)
+@@ -224,6 +289,47 @@ static int surface3_spi_create_touch_input(struct surface3_ts_data *data)
+ 	return 0;
+ }
+ 
++static int surface3_spi_create_pen_input(struct surface3_ts_data *data)
++{
++	struct input_dev *input;
++	int error;
++
++	input = devm_input_allocate_device(&data->spi->dev);
++	if (!input)
++		return -ENOMEM;
++
++	data->pen_input_dev = input;
++	data->pen_tool = BTN_TOOL_PEN;
++
++	__set_bit(INPUT_PROP_DIRECT, input->propbit);
++	__set_bit(INPUT_PROP_POINTER, input->propbit);
++	input_set_abs_params(input, ABS_X, 0, 9600, 0, 0);
++	input_abs_set_res(input, ABS_X, 40);
++	input_set_abs_params(input, ABS_Y, 0, 7200, 0, 0);
++	input_abs_set_res(input, ABS_Y, 48);
++	input_set_abs_params(input, ABS_PRESSURE, 0, 1024, 0, 0);
++	input_set_capability(input, EV_KEY, BTN_TOUCH);
++	input_set_capability(input, EV_KEY, BTN_STYLUS);
++	input_set_capability(input, EV_KEY, BTN_TOOL_PEN);
++	input_set_capability(input, EV_KEY, BTN_TOOL_RUBBER);
++
++	input->name = "Surface3 SPI Pen Input";
++	input->phys = "input/ts";
++	input->id.bustype = BUS_SPI;
++	input->id.vendor = 0x045e;     /* Microsoft */
++	input->id.product = 0x0002;
++	input->id.version = 0x0000;
++
++	error = input_register_device(input);
++	if (error) {
++		dev_err(&data->spi->dev,
++			"Failed to register input device: %d", error);
++		return error;
++	}
++
++	return 0;
++}
++
+ static int surface3_spi_probe(struct spi_device *spi)
+ {
+ 	struct surface3_ts_data *data;
+@@ -255,6 +361,10 @@ static int surface3_spi_probe(struct spi_device *spi)
+ 	if (error)
+ 		return error;
+ 
++	error = surface3_spi_create_pen_input(data);
++	if (error)
++		return error;
++
+ 	error = devm_request_threaded_irq(&spi->dev, spi->irq,
+ 					  NULL, surface3_spi_irq_handler,
+ 					  IRQF_ONESHOT,
+-- 
+2.7.4
+

0001-WIP-acpi-button-remove-pointer-to-old-lid_sysfs-on-u.patch

@@ -0,0 +1,41 @@
+From a3df5bf1d383e45c54875355556bc8b3bb2889c5 Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Tue, 31 May 2016 10:34:45 +0200
+Subject: [PATCH 1/2] WIP: acpi/button: remove pointer to old lid_sysfs on
+ unbind
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/acpi/button.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/acpi/button.c b/drivers/acpi/button.c
+index 5c3b091..e413599 100644
+--- a/drivers/acpi/button.c
++++ b/drivers/acpi/button.c
+@@ -188,9 +188,11 @@ done:
+ remove_dev_dir:
+ 	remove_proc_entry(acpi_device_bid(device),
+ 			  acpi_lid_dir);
++	acpi_lid_dir = NULL;
+ 	acpi_device_dir(device) = NULL;
+ remove_lid_dir:
+ 	remove_proc_entry(ACPI_BUTTON_SUBCLASS_LID, acpi_button_dir);
++	acpi_button_dir = NULL;
+ remove_button_dir:
+ 	remove_proc_entry(ACPI_BUTTON_CLASS, acpi_root_dir);
+ 	goto done;
+@@ -207,8 +209,10 @@ static int acpi_button_remove_fs(struct acpi_device *device)
+ 			  acpi_device_dir(device));
+ 	remove_proc_entry(acpi_device_bid(device),
+ 			  acpi_lid_dir);
++	acpi_lid_dir = NULL;
+ 	acpi_device_dir(device) = NULL;
+ 	remove_proc_entry(ACPI_BUTTON_SUBCLASS_LID, acpi_button_dir);
++	acpi_button_dir = NULL;
+ 	remove_proc_entry(ACPI_BUTTON_CLASS, acpi_root_dir);
+ 
+ 	return 0;
+-- 
+2.7.4
+

0001-WIP-i2c-hid-enabled-S0-S3.patch

@@ -0,0 +1,108 @@
+From 72023d2508fdd513a92e9dd25d1cc0999a0f32ee Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Fri, 27 May 2016 17:13:50 +0200
+Subject: [PATCH] WIP: i2c-hid enabled S0 S3
+
+---
+ drivers/hid/i2c-hid/i2c-hid.c | 37 +++++++++++++++++++++++++++++++++++++
+ 1 file changed, 37 insertions(+)
+
+diff --git a/drivers/hid/i2c-hid/i2c-hid.c b/drivers/hid/i2c-hid/i2c-hid.c
+index b3ec4f2..d0b1355 100644
+--- a/drivers/hid/i2c-hid/i2c-hid.c
++++ b/drivers/hid/i2c-hid/i2c-hid.c
+@@ -154,6 +154,8 @@ struct i2c_hid {
+ 	struct mutex		reset_lock;
+ };
+ 
++static int i2c_hid_acpi_power(struct i2c_client *client, int lvl);
++
+ static int __i2c_hid_command(struct i2c_client *client,
+ 		const struct i2c_hid_cmd *command, u8 reportID,
+ 		u8 reportType, u8 *args, int args_len,
+@@ -245,6 +247,7 @@ static int i2c_hid_get_report(struct i2c_client *client, u8 reportType,
+ 
+ 	i2c_hid_dbg(ihid, "%s\n", __func__);
+ 
++	pm_runtime_get_sync(&client->dev);
+ 	if (reportID >= 0x0F) {
+ 		args[args_len++] = reportID;
+ 		reportID = 0x0F;
+@@ -261,6 +264,7 @@ static int i2c_hid_get_report(struct i2c_client *client, u8 reportType,
+ 		return ret;
+ 	}
+ 
++	pm_runtime_put(&client->dev);
+ 	return 0;
+ }
+ 
+@@ -584,6 +588,9 @@ static int i2c_hid_get_raw_report(struct hid_device *hid,
+ 
+ 	ret_count = ihid->rawbuf[0] | (ihid->rawbuf[1] << 8);
+ 
++	i2c_hid_dbg(ihid, "report (len=%d): %*ph\n",
++		    (int)ask_count, (int)ask_count, ihid->rawbuf);
++
+ 	if (ret_count <= 2)
+ 		return 0;
+ 
+@@ -789,6 +796,8 @@ static int i2c_hid_power(struct hid_device *hid, int lvl)
+ 		pm_runtime_put(&client->dev);
+ 		break;
+ 	}
++
++	i2c_hid_acpi_power(client, lvl);
+ 	return 0;
+ }
+ 
+@@ -909,12 +918,38 @@ static const struct acpi_device_id i2c_hid_acpi_match[] = {
+ 	{ },
+ };
+ MODULE_DEVICE_TABLE(acpi, i2c_hid_acpi_match);
++
++static int i2c_hid_acpi_power(struct i2c_client *client, int lvl)
++{
++	int error = 0;
++
++	pr_err("%s lvl: %d %s:%d\n", __func__, lvl, __FILE__, __LINE__);
++
++	switch (lvl) {
++	case PM_HINT_FULLON:
++		error = acpi_bus_set_power(ACPI_HANDLE(&client->dev), ACPI_STATE_D0);
++		break;
++	case PM_HINT_NORMAL:
++		error = acpi_bus_set_power(ACPI_HANDLE(&client->dev), ACPI_STATE_D3);
++		break;
++	}
++	if (error)
++		dev_warn(&client->dev, "%s: error changing power state: %d\n", __func__, error);
++
++	return 0;
++}
++
+ #else
+ static inline int i2c_hid_acpi_pdata(struct i2c_client *client,
+ 		struct i2c_hid_platform_data *pdata)
+ {
+ 	return -ENODEV;
+ }
++
++static inline int i2c_hid_acpi_power(struct i2c_client *client, int lvl)
++{
++	return 0;
++}
+ #endif
+ 
+ #ifdef CONFIG_OF
+@@ -1004,6 +1039,8 @@ static int i2c_hid_probe(struct i2c_client *client,
+ 
+ 	ihid->client = client;
+ 
++	i2c_hid_acpi_power(client, PM_HINT_FULLON);
++
+ 	hidRegister = ihid->pdata.hid_descriptor_address;
+ 	ihid->wHIDDescRegister = cpu_to_le16(hidRegister);
+ 
+-- 
+2.7.4
+

0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch

@@ -0,0 +1,227 @@
+From 0042e1e7a03a2fb5d6c464c03ce84d55b31add11 Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:05:55 -0700
+Subject: [PATCH 01/17] drm/i915: Reorganize WM structs/unions in CRTC state
+
+Reorganize the nested structures and unions we have for pipe watermark
+data in intel_crtc_state so that platform-specific data can be added in
+a more sensible manner (and save a bit of memory at the same time).
+
+The change basically changes the organization from:
+
+        union {
+                struct intel_pipe_wm ilk;
+                struct intel_pipe_wm skl;
+        } optimal;
+
+        struct intel_pipe_wm intermediate /* ILK-only */
+
+to
+
+        union {
+                struct {
+                        struct intel_pipe_wm intermediate;
+                        struct intel_pipe_wm optimal;
+                } ilk;
+
+                struct {
+                        struct intel_pipe_wm optimal;
+                } skl;
+        }
+
+There should be no functional change here, but it will allow us to add
+more platform-specific fields going forward (and more easily extend to
+other platform types like VLV).
+
+While we're at it, let's move the entire watermark substructure out to
+its own structure definition to make the code slightly more readable.
+
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-2-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/intel_display.c |  2 +-
+ drivers/gpu/drm/i915/intel_drv.h     | 61 +++++++++++++++++++++---------------
+ drivers/gpu/drm/i915/intel_pm.c      | 18 +++++------
+ 3 files changed, 45 insertions(+), 36 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index d19b392..4633aec 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -12027,7 +12027,7 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
+ 		}
+ 	} else if (dev_priv->display.compute_intermediate_wm) {
+ 		if (HAS_PCH_SPLIT(dev_priv) && INTEL_GEN(dev_priv) < 9)
+-			pipe_config->wm.intermediate = pipe_config->wm.optimal.ilk;
++			pipe_config->wm.ilk.intermediate = pipe_config->wm.ilk.optimal;
+ 	}
+ 
+ 	if (INTEL_INFO(dev)->gen >= 9) {
+diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
+index 4a24b00..5a186bf 100644
+--- a/drivers/gpu/drm/i915/intel_drv.h
++++ b/drivers/gpu/drm/i915/intel_drv.h
+@@ -405,6 +405,40 @@ struct skl_pipe_wm {
+ 	uint32_t linetime;
+ };
+ 
++struct intel_crtc_wm_state {
++	union {
++		struct {
++			/*
++			 * Intermediate watermarks; these can be
++			 * programmed immediately since they satisfy
++			 * both the current configuration we're
++			 * switching away from and the new
++			 * configuration we're switching to.
++			 */
++			struct intel_pipe_wm intermediate;
++
++			/*
++			 * Optimal watermarks, programmed post-vblank
++			 * when this state is committed.
++			 */
++			struct intel_pipe_wm optimal;
++		} ilk;
++
++		struct {
++			/* gen9+ only needs 1-step wm programming */
++			struct skl_pipe_wm optimal;
++		} skl;
++	};
++
++	/*
++	 * Platforms with two-step watermark programming will need to
++	 * update watermark programming post-vblank to switch from the
++	 * safe intermediate watermarks to the optimal final
++	 * watermarks.
++	 */
++	bool need_postvbl_update;
++};
++
+ struct intel_crtc_state {
+ 	struct drm_crtc_state base;
+ 
+@@ -558,32 +592,7 @@ struct intel_crtc_state {
+ 	/* IVB sprite scaling w/a (WaCxSRDisabledForSpriteScaling:ivb) */
+ 	bool disable_lp_wm;
+ 
+-	struct {
+-		/*
+-		 * Optimal watermarks, programmed post-vblank when this state
+-		 * is committed.
+-		 */
+-		union {
+-			struct intel_pipe_wm ilk;
+-			struct skl_pipe_wm skl;
+-		} optimal;
+-
+-		/*
+-		 * Intermediate watermarks; these can be programmed immediately
+-		 * since they satisfy both the current configuration we're
+-		 * switching away from and the new configuration we're switching
+-		 * to.
+-		 */
+-		struct intel_pipe_wm intermediate;
+-
+-		/*
+-		 * Platforms with two-step watermark programming will need to
+-		 * update watermark programming post-vblank to switch from the
+-		 * safe intermediate watermarks to the optimal final
+-		 * watermarks.
+-		 */
+-		bool need_postvbl_update;
+-	} wm;
++	struct intel_crtc_wm_state wm;
+ 
+ 	/* Gamma mode programmed on the pipe */
+ 	uint32_t gamma_mode;
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index a7ef45d..4353fec 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -2309,7 +2309,7 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate)
+ 	int level, max_level = ilk_wm_max_level(dev), usable_level;
+ 	struct ilk_wm_maximums max;
+ 
+-	pipe_wm = &cstate->wm.optimal.ilk;
++	pipe_wm = &cstate->wm.ilk.optimal;
+ 
+ 	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
+ 		struct intel_plane_state *ps;
+@@ -2391,7 +2391,7 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev,
+ 				       struct intel_crtc *intel_crtc,
+ 				       struct intel_crtc_state *newstate)
+ {
+-	struct intel_pipe_wm *a = &newstate->wm.intermediate;
++	struct intel_pipe_wm *a = &newstate->wm.ilk.intermediate;
+ 	struct intel_pipe_wm *b = &intel_crtc->wm.active.ilk;
+ 	int level, max_level = ilk_wm_max_level(dev);
+ 
+@@ -2400,7 +2400,7 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev,
+ 	 * currently active watermarks to get values that are safe both before
+ 	 * and after the vblank.
+ 	 */
+-	*a = newstate->wm.optimal.ilk;
++	*a = newstate->wm.ilk.optimal;
+ 	a->pipe_enabled |= b->pipe_enabled;
+ 	a->sprites_enabled |= b->sprites_enabled;
+ 	a->sprites_scaled |= b->sprites_scaled;
+@@ -2429,7 +2429,7 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev,
+ 	 * If our intermediate WM are identical to the final WM, then we can
+ 	 * omit the post-vblank programming; only update if it's different.
+ 	 */
+-	if (memcmp(a, &newstate->wm.optimal.ilk, sizeof(*a)) == 0)
++	if (memcmp(a, &newstate->wm.ilk.optimal, sizeof(*a)) == 0)
+ 		newstate->wm.need_postvbl_update = false;
+ 
+ 	return 0;
+@@ -3678,7 +3678,7 @@ static void skl_update_wm(struct drm_crtc *crtc)
+ 	struct drm_i915_private *dev_priv = dev->dev_private;
+ 	struct skl_wm_values *results = &dev_priv->wm.skl_results;
+ 	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
+-	struct skl_pipe_wm *pipe_wm = &cstate->wm.optimal.skl;
++	struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal;
+ 
+ 
+ 	/* Clear all dirty flags */
+@@ -3757,7 +3757,7 @@ static void ilk_initial_watermarks(struct intel_crtc_state *cstate)
+ 	struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
+ 
+ 	mutex_lock(&dev_priv->wm.wm_mutex);
+-	intel_crtc->wm.active.ilk = cstate->wm.intermediate;
++	intel_crtc->wm.active.ilk = cstate->wm.ilk.intermediate;
+ 	ilk_program_watermarks(dev_priv);
+ 	mutex_unlock(&dev_priv->wm.wm_mutex);
+ }
+@@ -3769,7 +3769,7 @@ static void ilk_optimize_watermarks(struct intel_crtc_state *cstate)
+ 
+ 	mutex_lock(&dev_priv->wm.wm_mutex);
+ 	if (cstate->wm.need_postvbl_update) {
+-		intel_crtc->wm.active.ilk = cstate->wm.optimal.ilk;
++		intel_crtc->wm.active.ilk = cstate->wm.ilk.optimal;
+ 		ilk_program_watermarks(dev_priv);
+ 	}
+ 	mutex_unlock(&dev_priv->wm.wm_mutex);
+@@ -3826,7 +3826,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc)
+ 	struct skl_wm_values *hw = &dev_priv->wm.skl_hw;
+ 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ 	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
+-	struct skl_pipe_wm *active = &cstate->wm.optimal.skl;
++	struct skl_pipe_wm *active = &cstate->wm.skl.optimal;
+ 	enum pipe pipe = intel_crtc->pipe;
+ 	int level, i, max_level;
+ 	uint32_t temp;
+@@ -3892,7 +3892,7 @@ static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc)
+ 	struct ilk_wm_values *hw = &dev_priv->wm.hw;
+ 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ 	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
+-	struct intel_pipe_wm *active = &cstate->wm.optimal.ilk;
++	struct intel_pipe_wm *active = &cstate->wm.ilk.optimal;
+ 	enum pipe pipe = intel_crtc->pipe;
+ 	static const i915_reg_t wm0_pipe_reg[] = {
+ 		[PIPE_A] = WM0_PIPEA_ILK,
+-- 
+2.7.4
+

0001-gpiolib-acpi-make-sure-we-trigger-the-events-at-leas.patch

@@ -0,0 +1,91 @@
+From 5144a26d49d40c1847e0af496d78c54eb29f570f Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Thu, 26 May 2016 15:29:10 +0200
+Subject: [PATCH] gpiolib-acpi: make sure we trigger the events at least once
+ on boot
+
+The Surface 3 has its _LID state controlled by an ACPI operation region
+triggered by a GPIO event:
+
+ OperationRegion (GPOR, GeneralPurposeIo, Zero, One)
+ Field (GPOR, ByteAcc, NoLock, Preserve)
+ {
+     Connection (
+         GpioIo (Shared, PullNone, 0x0000, 0x0000, IoRestrictionNone,
+             "\\_SB.GPO0", 0x00, ResourceConsumer, ,
+             )
+             {   // Pin list
+                 0x004C
+             }
+     ),
+     HELD,   1
+ }
+
+ Method (_E4C, 0, Serialized)  // _Exx: Edge-Triggered GPE
+ {
+     If ((HELD == One))
+     {
+         ^^LID.LIDB = One
+     }
+     Else
+     {
+         ^^LID.LIDB = Zero
+         Notify (LID, 0x80) // Status Change
+     }
+
+     Notify (^^PCI0.SPI1.NTRG, One) // Device Check
+ }
+
+Currently, the state of LIDB is wrong until the user actually closes or
+open the cover. We need to trigger the GPIO event once to update the
+internal ACPI state.
+
+Coincidentally, this also enables the integrated HID sensor hub which also
+requires an ACPI gpio operation region to start initialization.
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/gpio/gpiolib-acpi.c | 13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c
+index 2dc5258..71775a0 100644
+--- a/drivers/gpio/gpiolib-acpi.c
++++ b/drivers/gpio/gpiolib-acpi.c
+@@ -175,7 +175,7 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares,
+ 	irq_handler_t handler = NULL;
+ 	struct gpio_desc *desc;
+ 	unsigned long irqflags;
+-	int ret, pin, irq;
++	int ret, pin, irq, value;
+ 
+ 	if (ares->type != ACPI_RESOURCE_TYPE_GPIO)
+ 		return AE_OK;
+@@ -214,6 +214,8 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares,
+ 
+ 	gpiod_direction_input(desc);
+ 
++	value = gpiod_get_value(desc);
++
+ 	ret = gpiochip_lock_as_irq(chip, pin);
+ 	if (ret) {
+ 		dev_err(chip->parent, "Failed to lock GPIO as interrupt\n");
+@@ -266,6 +268,15 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares,
+ 	}
+ 
+ 	list_add_tail(&event->node, &acpi_gpio->events);
++
++	/*
++	 * Make sure we trigger the initial state of the IRQ when
++	 * using RISING or FALLING.
++	 */
++	if (((irqflags & IRQF_TRIGGER_RISING) && value == 1) ||
++	    ((irqflags & IRQF_TRIGGER_FALLING) && value == 0))
++		handler(-1, event);
++
+ 	return AE_OK;
+ 
+ fail_free_event:
+-- 
+2.7.4
+

0001-power-MSHW0011-rev-eng-implementation.patch

@@ -0,0 +1,756 @@
+From c4827e382726f31e069860af7a9af9bdef4b8bfb Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Tue, 24 May 2016 22:30:49 +0200
+Subject: [PATCH] power: MSHW0011 rev-eng implementation
+
+MSHW0011 replaces the battery firmware by using ACPI operation regions.
+The values have been obtained by reverse engineering, and are subject to
+errors. Looks like it works on overall pretty well.
+
+I couldn't manage to get the IRQ correctly triggered, so I am using a
+good old polling thread to check for changes.
+
+The acpica bits need their own patch with a little more love.
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/acpi/acpica/exfield.c  |  11 +
+ drivers/power/Kconfig          |   8 +
+ drivers/power/Makefile         |   1 +
+ drivers/power/surface3_power.c | 674 +++++++++++++++++++++++++++++++++++++++++
+ 4 files changed, 694 insertions(+)
+ create mode 100644 drivers/power/surface3_power.c
+
+diff --git a/drivers/acpi/acpica/exfield.c b/drivers/acpi/acpica/exfield.c
+index d5d8020..f386675 100644
+--- a/drivers/acpi/acpica/exfield.c
++++ b/drivers/acpi/acpica/exfield.c
+@@ -413,6 +413,17 @@ acpi_ex_write_data_to_field(union acpi_operand_object *source_desc,
+ 			 *     Data[x-1]: (Bytes 2-x of the arbitrary length data buffer)
+ 			 */
+ 			length += 2;
++
++			/*
++			 * bug? in the MS Surface 3: length is 2 but the command
++			 * needs 3 parameters.
++			 * Functions like BIX requires a lot of in/out data,
++			 * so just take the incoming buffer length as the
++			 * reference.
++			 */
++			if (accessor_type == 0xf)
++				length = source_desc->buffer.length;
++
+ 			function = ACPI_WRITE | (accessor_type << 16);
+ 		} else {	/* IPMI */
+ 
+diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
+index 421770d..fb54d8b 100644
+--- a/drivers/power/Kconfig
++++ b/drivers/power/Kconfig
+@@ -509,6 +509,14 @@ config AXP20X_POWER
+ 	  This driver provides support for the power supply features of
+ 	  AXP20x PMIC.
+ 
++config SURFACE3_POWER
++	tristate "Surface 3 power management driver"
++	depends on I2C
++	depends on GPIOLIB
++	help
++	  This driver provides support for the power supply features of
++	  the Surface 3.
++
+ endif # POWER_SUPPLY
+ 
+ source "drivers/power/reset/Kconfig"
+diff --git a/drivers/power/Makefile b/drivers/power/Makefile
+index e46b75d..a147a0e 100644
+--- a/drivers/power/Makefile
++++ b/drivers/power/Makefile
+@@ -74,3 +74,4 @@ obj-$(CONFIG_CHARGER_TPS65217)	+= tps65217_charger.o
+ obj-$(CONFIG_POWER_RESET)	+= reset/
+ obj-$(CONFIG_AXP288_FUEL_GAUGE) += axp288_fuel_gauge.o
+ obj-$(CONFIG_AXP288_CHARGER)	+= axp288_charger.o
++obj-$(CONFIG_SURFACE3_POWER)	+= surface3_power.o
+diff --git a/drivers/power/surface3_power.c b/drivers/power/surface3_power.c
+new file mode 100644
+index 0000000..eee21d3
+--- /dev/null
++++ b/drivers/power/surface3_power.c
+@@ -0,0 +1,674 @@
++/*
++ * Supports for the power IC on the Surface 3 tablet.
++ *
++ * (C) Copyright 2016 Red Hat, Inc
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; version 2
++ * of the License.
++ */
++
++/*
++ * This driver has been reverse-engineered by parsing the DSDT of the Surface 3
++ * and looking at the registers of the chips.
++ *
++ * The DSDT allowed to find out that:
++ * - the driver is required for the ACPI BAT0 device to communicate to the chip
++ *   through an operation region.
++ * - the various defines for the operation region functions to communicate with
++ *   this driver
++ * - the DSM 3f99e367-6220-4955-8b0f-06ef2ae79412 allows to trigger ACPI
++ *   events to BAT0 (the code is all available in the DSDT).
++ *
++ * Further findings regarding the 2 chips declared in the MSHW0011 are:
++ * - there are 2 chips declared:
++ *   . 0x22 seems to control the ADP1 line status (and probably the charger)
++ *   . 0x55 controls the battery directly
++ * - the battery chip uses a SMBus protocol (using plain SMBus allows non
++ *   destructive commands):
++ *   . the commands/registers used are in the range 0x00..0x7F
++ *   . if bit 8 (0x80) is set in the SMBus command, the returned value is the
++ *     same as when it is not set. There is a high chance this bit is the
++ *     read/write
++ *   . the various registers semantic as been deduced by observing the register
++ *     dumps.
++ */
++
++#include <linux/kernel.h>
++#include <linux/i2c.h>
++#include <linux/slab.h>
++#include <linux/acpi.h>
++#include <linux/kthread.h>
++#include <linux/freezer.h>
++
++#include <asm/unaligned.h>
++
++#define POLL_INTERVAL		(HZ * 2)
++
++static bool dump_registers;
++module_param_named(dump_registers, dump_registers, bool, 0644);
++MODULE_PARM_DESC(dump_registers,
++		 "Dump the SMBus register at probe (debugging only).");
++
++struct mshw0011_data {
++	struct i2c_client	*adp1;
++	struct i2c_client	*bat0;
++	unsigned short		notify_version;
++	struct task_struct	*poll_task;
++	bool			kthread_running;
++
++	bool			charging;
++	bool			bat_charging;
++	u8			trip_point;
++};
++
++struct mshw0011_lookup {
++	struct mshw0011_data	*cdata;
++	unsigned int		n;
++	unsigned int		index;
++	int			addr;
++};
++
++struct mshw0011_handler_data {
++	struct acpi_connection_info	info;
++	struct i2c_client		*client;
++};
++
++struct bix {
++	u32	revision;
++	u32	power_unit;
++	u32	design_capacity;
++	u32	last_full_charg_capacity;
++	u32	battery_technology;
++	u32	design_voltage;
++	u32	design_capacity_of_warning;
++	u32	design_capacity_of_low;
++	u32	cycle_count;
++	u32	measurement_accuracy;
++	u32	max_sampling_time;
++	u32	min_sampling_time;
++	u32	max_average_interval;
++	u32	min_average_interval;
++	u32	battery_capacity_granularity_1;
++	u32	battery_capacity_granularity_2;
++	char	model[10];
++	char	serial[10];
++	char	type[10];
++	char	OEM[10];
++} __packed;
++
++struct bst {
++	u32	battery_state;
++	s32	battery_present_rate;
++	u32	battery_remaining_capacity;
++	u32	battery_present_voltage;
++} __packed;
++
++struct gsb_command {
++	u8	arg0;
++	u8	arg1;
++	u8	arg2;
++} __packed;
++
++struct gsb_buffer {
++	u8	status;
++	u8	len;
++	u8	ret;
++	union {
++		struct gsb_command	cmd;
++		struct bst		bst;
++		struct bix		bix;
++	} __packed;
++} __packed;
++
++#define MSHW0011_CMD_DEST_BAT0		0x01
++#define MSHW0011_CMD_DEST_ADP1		0x03
++
++#define MSHW0011_CMD_BAT0_STA		0x01
++#define MSHW0011_CMD_BAT0_BIX		0x02
++#define MSHW0011_CMD_BAT0_BCT		0x03
++#define MSHW0011_CMD_BAT0_BTM		0x04
++#define MSHW0011_CMD_BAT0_BST		0x05
++#define MSHW0011_CMD_BAT0_BTP		0x06
++#define MSHW0011_CMD_ADP1_PSR		0x07
++#define MSHW0011_CMD_BAT0_PSOC		0x09
++#define MSHW0011_CMD_BAT0_PMAX		0x0A
++#define MSHW0011_CMD_BAT0_PSRC		0x0B
++#define MSHW0011_CMD_BAT0_CHGI		0x0C
++#define MSHW0011_CMD_BAT0_ARTG		0x0D
++
++#define MSHW0011_NOTIFY_GET_VERSION	0x00
++#define MSHW0011_NOTIFY_ADP1		0x01
++#define MSHW0011_NOTIFY_BAT0		0x02
++
++#define MSHW0011_ADP1_REG_PSR		0x03
++
++#define MSHW0011_BAT0_REG_CAPACITY	0x0c
++#define MSHW0011_BAT0_REG_VOLTAGE	0x08
++#define MSHW0011_BAT0_REG_RATE		0x14
++#define MSHW0011_BAT0_REG_OEM		0x45
++#define MSHW0011_BAT0_REG_TYPE		0x4e
++#define MSHW0011_BAT0_REG_SERIAL_NO	0x56
++#define MSHW0011_BAT0_REG_CYCLE_CNT	0x6e
++
++#define MSHW0011_EV_2_5			0x1ff
++
++static int mshw0011_i2c_read_block(struct i2c_client *client, u8 reg, u8 *buf,
++				   int len)
++{
++	int status, i;
++
++	for (i = 0; i < len; i++) {
++		status = i2c_smbus_read_byte_data(client, reg + i);
++		if (status < 0) {
++			buf[i] = 0xff;
++			continue;
++		}
++
++		buf[i] = (u8)status;
++	}
++
++	return 0;
++}
++
++static int
++mshw0011_notify(struct mshw0011_data *cdata, u8 arg1, u8 arg2,
++		unsigned int *ret_value)
++{
++	static const u8 mshw0011_guid[] = {
++		0x67, 0xE3, 0x99, 0x3F, 0x20, 0x62, 0x55, 0x49,
++		0x8b, 0x0f, 0x06, 0xef, 0x2a, 0xe7, 0x94, 0x12,
++	};
++	union acpi_object *obj;
++	struct acpi_device *adev;
++	acpi_handle handle;
++	unsigned int i;
++
++	handle = ACPI_HANDLE(&cdata->adp1->dev);
++	if (!handle || acpi_bus_get_device(handle, &adev))
++		return -ENODEV;
++
++	obj = acpi_evaluate_dsm_typed(handle, mshw0011_guid, arg1, arg2, NULL,
++				      ACPI_TYPE_BUFFER);
++	if (!obj) {
++		dev_err(&cdata->adp1->dev, "device _DSM execution failed\n");
++		return -ENODEV;
++	}
++
++	*ret_value = 0;
++	for (i = 0; i < obj->buffer.length; i++)
++		*ret_value |= obj->buffer.pointer[i] << (i * 8);
++
++	ACPI_FREE(obj);
++	return 0;
++}
++
++static const struct bix default_bix = {
++	.revision = 0x00,
++	.power_unit = 0x01,
++	.design_capacity = 0x1dca,
++	.last_full_charg_capacity = 0x1dca,
++	.battery_technology = 0x01,
++	.design_voltage = 0x10df,
++	.design_capacity_of_warning = 0x8f,
++	.design_capacity_of_low = 0x47,
++	.cycle_count = 0xffffffff,
++	.measurement_accuracy = 0x00015F90,
++	.max_sampling_time = 0x03E8,
++	.min_sampling_time = 0x03E8,
++	.max_average_interval = 0x03E8,
++	.min_average_interval = 0x03E8,
++	.battery_capacity_granularity_1 = 0x45,
++	.battery_capacity_granularity_2 = 0x11,
++	.model = "P11G8M",
++	.serial = "",
++	.type = "LION",
++	.OEM = "",
++};
++
++static int mshw0011_bix(struct mshw0011_data *cdata, struct bix *bix)
++{
++	struct i2c_client *client = cdata->bat0;
++	int ret;
++	char buf[10];
++
++	*bix = default_bix;
++
++	/* get serial number */
++	ret = mshw0011_i2c_read_block(client, MSHW0011_BAT0_REG_SERIAL_NO,
++				      buf, 10);
++	if (ret) {
++		dev_err(&client->dev, "Error reading serial no: %d\n", ret);
++		return ret;
++	}
++	memcpy(bix->serial, buf + 7, 3);
++	memcpy(bix->serial + 3, buf, 6);
++	bix->serial[9] = '\0';
++
++	/* get cycle count */
++	ret = i2c_smbus_read_word_data(client, MSHW0011_BAT0_REG_CYCLE_CNT);
++	if (ret < 0) {
++		dev_err(&client->dev, "Error reading cycle count: %d\n", ret);
++		return ret;
++	}
++	bix->cycle_count = le16_to_cpu(ret);
++
++	/* get OEM name */
++	ret = mshw0011_i2c_read_block(client, MSHW0011_BAT0_REG_OEM, buf, 4);
++	if (ret) {
++		dev_err(&client->dev, "Error reading cycle count: %d\n", ret);
++		return ret;
++	}
++	memcpy(bix->OEM, buf, 3);
++	bix->OEM[4] = '\0';
++
++	return 0;
++}
++
++static int mshw0011_bst(struct mshw0011_data *cdata, struct bst *bst)
++{
++	struct i2c_client *client = cdata->bat0;
++	int rate, capacity, voltage;
++	s16 tmp;
++
++	rate = i2c_smbus_read_word_data(client, MSHW0011_BAT0_REG_RATE);
++	if (rate < 0)
++		return rate;
++
++	capacity = i2c_smbus_read_word_data(client, MSHW0011_BAT0_REG_CAPACITY);
++	if (capacity < 0)
++		return capacity;
++
++	voltage = i2c_smbus_read_word_data(client, MSHW0011_BAT0_REG_VOLTAGE);
++	if (voltage < 0)
++		return voltage;
++
++	tmp = le16_to_cpu(rate);
++	bst->battery_present_rate = (s32)tmp;
++	bst->battery_state = bst->battery_present_rate < 0 ? 0x01 : 0x02;
++	bst->battery_remaining_capacity = le16_to_cpu(capacity);
++	bst->battery_present_voltage = le16_to_cpu(voltage);
++
++	return 0;
++}
++
++static int mshw0011_adp_psr(struct mshw0011_data *cdata)
++{
++	struct i2c_client *client = cdata->adp1;
++	int ret;
++
++	ret = i2c_smbus_read_byte_data(client, MSHW0011_ADP1_REG_PSR);
++	if (ret < 0)
++		return ret;
++
++	return ret;
++}
++
++static int mshw0011_isr(struct mshw0011_data *cdata)
++{
++	struct bst bst;
++	int ret;
++	bool status, bat_status;
++
++	ret = mshw0011_adp_psr(cdata);
++	if (ret < 0)
++		return ret;
++
++	status = ret;
++
++	if (status != cdata->charging)
++		mshw0011_notify(cdata, cdata->notify_version,
++				MSHW0011_NOTIFY_ADP1, &ret);
++
++	cdata->charging = status;
++
++	ret = mshw0011_bst(cdata, &bst);
++	if (ret < 0)
++		return ret;
++
++	bat_status = bst.battery_present_rate >= 0;
++
++	if (bat_status != cdata->bat_charging)
++		mshw0011_notify(cdata, cdata->notify_version,
++				MSHW0011_NOTIFY_BAT0, &ret);
++
++	cdata->bat_charging = bat_status;
++
++	return 0;
++}
++
++static int mshw0011_poll_task(void *data)
++{
++	struct mshw0011_data *cdata = data;
++	int ret = 0;
++
++	cdata->kthread_running = true;
++
++	set_freezable();
++
++	while (!kthread_should_stop()) {
++		schedule_timeout_interruptible(POLL_INTERVAL);
++		try_to_freeze();
++		ret = mshw0011_isr(data);
++		if (ret)
++			goto out;
++	}
++
++out:
++	cdata->kthread_running = false;
++	return ret;
++}
++
++static acpi_status
++mshw0011_space_handler(u32 function, acpi_physical_address command,
++			u32 bits, u64 *value64,
++			void *handler_context, void *region_context)
++{
++	struct gsb_buffer *gsb = (struct gsb_buffer *)value64;
++	struct mshw0011_handler_data *data = handler_context;
++	struct acpi_connection_info *info = &data->info;
++	struct acpi_resource_i2c_serialbus *sb;
++	struct i2c_client *client = data->client;
++	struct mshw0011_data *cdata = i2c_get_clientdata(client);
++	struct acpi_resource *ares;
++	u32 accessor_type = function >> 16;
++	acpi_status ret;
++	int status = 1;
++
++	ret = acpi_buffer_to_resource(info->connection, info->length, &ares);
++	if (ACPI_FAILURE(ret))
++		return ret;
++
++	if (!value64 || ares->type != ACPI_RESOURCE_TYPE_SERIAL_BUS) {
++		ret = AE_BAD_PARAMETER;
++		goto err;
++	}
++
++	sb = &ares->data.i2c_serial_bus;
++	if (sb->type != ACPI_RESOURCE_SERIAL_TYPE_I2C) {
++		ret = AE_BAD_PARAMETER;
++		goto err;
++	}
++
++	if (accessor_type != ACPI_GSB_ACCESS_ATTRIB_RAW_PROCESS) {
++		ret = AE_BAD_PARAMETER;
++		goto err;
++	}
++
++	if (gsb->cmd.arg0 == MSHW0011_CMD_DEST_ADP1 &&
++	    gsb->cmd.arg1 == MSHW0011_CMD_ADP1_PSR) {
++		ret = mshw0011_adp_psr(cdata);
++		if (ret >= 0) {
++			status = ret;
++			ret = 0;
++		}
++		goto out;
++	}
++
++	if (gsb->cmd.arg0 != MSHW0011_CMD_DEST_BAT0) {
++		ret = AE_BAD_PARAMETER;
++		goto err;
++	}
++
++	switch (gsb->cmd.arg1) {
++	case MSHW0011_CMD_BAT0_STA:
++		status = 1;
++		ret = 0;
++		break;
++	case MSHW0011_CMD_BAT0_BIX:
++		status = 1;
++		ret = mshw0011_bix(cdata, &gsb->bix);
++		break;
++	case MSHW0011_CMD_BAT0_BTP:
++		status = 1;
++		ret = 0;
++		cdata->trip_point = gsb->cmd.arg2;
++		break;
++	case MSHW0011_CMD_BAT0_BST:
++		status = 1;
++		ret = mshw0011_bst(cdata, &gsb->bst);
++		break;
++	default:
++		pr_info("command(0x%02x) is not supported.\n", gsb->cmd.arg1);
++		ret = AE_BAD_PARAMETER;
++		goto err;
++	}
++
++ out:
++	gsb->ret = status;
++	gsb->status = 0;
++
++ err:
++	ACPI_FREE(ares);
++	return ret;
++}
++
++static int mshw0011_install_space_handler(struct i2c_client *client)
++{
++	acpi_handle handle;
++	struct mshw0011_handler_data *data;
++	acpi_status status;
++
++	handle = ACPI_HANDLE(&client->dev);
++
++	if (!handle)
++		return -ENODEV;
++
++	data = kzalloc(sizeof(struct mshw0011_handler_data),
++			    GFP_KERNEL);
++	if (!data)
++		return -ENOMEM;
++
++	data->client = client;
++	status = acpi_bus_attach_private_data(handle, (void *)data);
++	if (ACPI_FAILURE(status)) {
++		kfree(data);
++		return -ENOMEM;
++	}
++
++	status = acpi_install_address_space_handler(handle,
++				ACPI_ADR_SPACE_GSBUS,
++				&mshw0011_space_handler,
++				NULL,
++				data);
++	if (ACPI_FAILURE(status)) {
++		dev_err(&client->dev, "Error installing i2c space handler\n");
++		acpi_bus_detach_private_data(handle);
++		kfree(data);
++		return -ENOMEM;
++	}
++
++	acpi_walk_dep_device_list(handle);
++	return 0;
++}
++
++static void mshw0011_remove_space_handler(struct i2c_client *client)
++{
++	acpi_handle handle;
++	struct mshw0011_handler_data *data;
++	acpi_status status;
++
++	handle = ACPI_HANDLE(&client->dev);
++
++	if (!handle)
++		return;
++
++	acpi_remove_address_space_handler(handle,
++				ACPI_ADR_SPACE_GSBUS,
++				&mshw0011_space_handler);
++
++	status = acpi_bus_get_private_data(handle, (void **)&data);
++	if (ACPI_SUCCESS(status))
++		kfree(data);
++
++	acpi_bus_detach_private_data(handle);
++}
++
++static int acpi_find_i2c(struct acpi_resource *ares, void *data)
++{
++	struct mshw0011_lookup *lookup = data;
++
++	if (ares->type != ACPI_RESOURCE_TYPE_SERIAL_BUS)
++		return 1;
++
++	if (lookup->n++ == lookup->index && !lookup->addr)
++		lookup->addr = ares->data.i2c_serial_bus.slave_address;
++
++	return 1;
++}
++
++static int mshw0011_i2c_resource_lookup(struct mshw0011_data *cdata,
++					unsigned int index)
++{
++	struct i2c_client *client = cdata->adp1;
++	struct acpi_device *adev = ACPI_COMPANION(&client->dev);
++	struct mshw0011_lookup lookup = {
++		.cdata = cdata,
++		.index = index,
++	};
++	struct list_head res_list;
++	int ret;
++
++	INIT_LIST_HEAD(&res_list);
++
++	ret = acpi_dev_get_resources(adev, &res_list, acpi_find_i2c, &lookup);
++	if (ret < 0)
++		return ret;
++
++	acpi_dev_free_resource_list(&res_list);
++
++	if (!lookup.addr)
++		return -ENOENT;
++
++	return lookup.addr;
++}
++
++static void mshw0011_dump_registers(struct i2c_client *client,
++				    struct i2c_client *bat0)
++{
++	char rd_buf[60];
++	int error, i, c;
++	char buff[17 * 3 * 2] = {0};
++
++	dev_info(&client->dev, "dumping registers 0x00 to 0x7F:\n");
++
++	for (i = 0; i < 0x80; i += 0x20) {
++		memset(rd_buf, 0, sizeof(rd_buf));
++		error = mshw0011_i2c_read_block(bat0, i, rd_buf, 0x20);
++		dev_info(&client->dev, " read 0x%02x: %*ph|%*ph\n",
++			 i,
++			 0x10, rd_buf,
++			 0x10, rd_buf + 0x10);
++		for (c = 0; c < 0x20; c++) {
++			if (rd_buf[c] >= 0x20 && rd_buf[c] <= 0x7e) {
++				buff[c * 3 + 0] = ' ';
++				buff[c * 3 + 1] = rd_buf[c];
++			} else {
++				buff[c * 3 + 0] = '-';
++				buff[c * 3 + 1] = '-';
++			}
++			buff[c * 3 + 2] = (c + 1) % 0x10 ? ' ' : '|';
++		}
++		buff[0x1f * 3 + 2] = '\0';
++		dev_info(&client->dev, "ascii 0x%02x: %s\n", i, buff);
++	}
++}
++
++static int mshw0011_probe(struct i2c_client *client,
++			  const struct i2c_device_id *id)
++{
++	struct device *dev = &client->dev;
++	struct i2c_client *bat0;
++	struct mshw0011_data *data;
++	int error, version, addr;
++
++	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
++	if (!data)
++		return -ENOMEM;
++
++	data->adp1 = client;
++	i2c_set_clientdata(client, data);
++
++	addr = mshw0011_i2c_resource_lookup(data, 1);
++	if (addr < 0)
++		return addr;
++
++	bat0 = i2c_new_dummy(client->adapter, addr);
++	if (!bat0)
++		return -ENOMEM;
++
++	data->bat0 = bat0;
++	i2c_set_clientdata(bat0, data);
++
++	if (dump_registers)
++		mshw0011_dump_registers(client, bat0);
++
++	error = mshw0011_notify(data, 1, MSHW0011_NOTIFY_GET_VERSION, &version);
++	if (error)
++		goto out_err;
++
++	data->notify_version = version == MSHW0011_EV_2_5;
++
++	data->poll_task = kthread_run(mshw0011_poll_task, data, "mshw0011_adp");
++	if (IS_ERR(data->poll_task)) {
++		error = PTR_ERR(data->poll_task);
++		dev_err(&client->dev, "Unable to run kthread err %d\n", error);
++		goto out_err;
++	}
++
++	error = mshw0011_install_space_handler(client);
++	if (error)
++		goto out_err;
++
++	return 0;
++
++out_err:
++	if (data->kthread_running)
++		kthread_stop(data->poll_task);
++	i2c_unregister_device(data->bat0);
++	return error;
++}
++
++static int mshw0011_remove(struct i2c_client *client)
++{
++	struct mshw0011_data *cdata = i2c_get_clientdata(client);
++
++	mshw0011_remove_space_handler(client);
++
++	if (cdata->kthread_running)
++		kthread_stop(cdata->poll_task);
++
++	i2c_unregister_device(cdata->bat0);
++
++	return 0;
++}
++
++static const struct i2c_device_id mshw0011_id[] = {
++	{ "MSHW0011:00", 0 },
++	{ }
++};
++MODULE_DEVICE_TABLE(i2c, mshw0011_id);
++
++#ifdef CONFIG_ACPI
++static const struct acpi_device_id mshw0011_acpi_match[] = {
++	{ "MSHW0011", 0 },
++	{ }
++};
++MODULE_DEVICE_TABLE(acpi, mshw0011_acpi_match);
++#endif
++
++static struct i2c_driver mshw0011_driver = {
++	.probe = mshw0011_probe,
++	.remove = mshw0011_remove,
++	.id_table = mshw0011_id,
++	.driver = {
++		.name = "mshw0011",
++		.acpi_match_table = ACPI_PTR(mshw0011_acpi_match),
++	},
++};
++module_i2c_driver(mshw0011_driver);
++
++MODULE_AUTHOR("Benjamin Tissoires <benjamin.tissoires@gmail.com>");
++MODULE_DESCRIPTION("mshw0011 driver");
++MODULE_LICENSE("GPL v2");
+-- 
+2.5.0
+

0002-HID-multitouch-enable-the-Surface-3-Type-Cover-to-re.patch

@@ -0,0 +1,98 @@
+From 0e81c6dd0106dfb2ddb065077f596756ea429adc Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Thu, 12 May 2016 15:32:08 +0200
+Subject: [PATCH 2/3] HID: multitouch: enable the Surface 3 Type Cover to
+ report multitouch data
+
+There is no reasons to filter out keyboard and consumer control collections
+in hid-multitouch.
+With the previous hid-input fix, there is now a full support of the Type
+Cover and we can remove all specific bits from hid-core and hid-microsoft.
+
+hid-multitouch will automatically set HID_QUIRK_NO_INIT_REPORTS so we can
+also remove it from the list of ushbid quirks.
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/hid/hid-core.c          | 2 --
+ drivers/hid/hid-ids.h           | 1 -
+ drivers/hid/hid-microsoft.c     | 2 --
+ drivers/hid/hid-multitouch.c    | 4 +++-
+ drivers/hid/usbhid/hid-quirks.c | 1 -
+ 5 files changed, 3 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
+index efd8f8c..1bbbe6c 100644
+--- a/drivers/hid/hid-core.c
++++ b/drivers/hid/hid-core.c
+@@ -727,7 +727,6 @@ static void hid_scan_collection(struct hid_parser *parser, unsigned type)
+ 	    (hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3 ||
+ 	     hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2 ||
+ 	     hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP ||
+-	     hid->product == USB_DEVICE_ID_MS_TYPE_COVER_3 ||
+ 	     hid->product == USB_DEVICE_ID_MS_POWER_COVER) &&
+ 	    hid->group == HID_GROUP_MULTITOUCH)
+ 		hid->group = HID_GROUP_GENERIC;
+@@ -1979,7 +1978,6 @@ static const struct hid_device_id hid_have_special_driver[] = {
+ 	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3) },
+ 	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2) },
+ 	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP) },
+-	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3) },
+ 	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_7K) },
+ 	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_600) },
+ 	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3KV1) },
+diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
+index 191c981..c54d0a9 100644
+--- a/drivers/hid/hid-ids.h
++++ b/drivers/hid/hid-ids.h
+@@ -708,7 +708,6 @@
+ #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3    0x07dc
+ #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2  0x07e2
+ #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP 0x07dd
+-#define USB_DEVICE_ID_MS_TYPE_COVER_3    0x07de
+ #define USB_DEVICE_ID_MS_POWER_COVER     0x07da
+ 
+ #define USB_VENDOR_ID_MOJO		0x8282
+diff --git a/drivers/hid/hid-microsoft.c b/drivers/hid/hid-microsoft.c
+index e924d55..cf6920b 100644
+--- a/drivers/hid/hid-microsoft.c
++++ b/drivers/hid/hid-microsoft.c
+@@ -288,8 +288,6 @@ static const struct hid_device_id ms_devices[] = {
+ 		.driver_data = MS_HIDINPUT },
+ 	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP),
+ 		.driver_data = MS_HIDINPUT },
+-	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3),
+-		.driver_data = MS_HIDINPUT },
+ 	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER),
+ 		.driver_data = MS_HIDINPUT },
+ 	{ HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_KEYBOARD),
+diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
+index 95b7d61..dd279d7 100644
+--- a/drivers/hid/hid-multitouch.c
++++ b/drivers/hid/hid-multitouch.c
+@@ -835,7 +835,9 @@ static int mt_input_mapping(struct hid_device *hdev, struct hid_input *hi,
+ 	if (!td->mtclass.export_all_inputs &&
+ 	    field->application != HID_DG_TOUCHSCREEN &&
+ 	    field->application != HID_DG_PEN &&
+-	    field->application != HID_DG_TOUCHPAD)
++	    field->application != HID_DG_TOUCHPAD &&
++	    field->application != HID_GD_KEYBOARD &&
++	    field->application != HID_CP_CONSUMER_CONTROL)
+ 		return -1;
+ 
+ 	/*
+diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c
+index b4b8c6a..baf2bad 100644
+--- a/drivers/hid/usbhid/hid-quirks.c
++++ b/drivers/hid/usbhid/hid-quirks.c
+@@ -98,7 +98,6 @@ static const struct hid_blacklist {
+ 	{ USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3, HID_QUIRK_NO_INIT_REPORTS },
+ 	{ USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_2, HID_QUIRK_NO_INIT_REPORTS },
+ 	{ USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP, HID_QUIRK_NO_INIT_REPORTS },
+-	{ USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3, HID_QUIRK_NO_INIT_REPORTS },
+ 	{ USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER, HID_QUIRK_NO_INIT_REPORTS },
+ 	{ USB_VENDOR_ID_MSI, USB_DEVICE_ID_MSI_GT683R_LED_PANEL, HID_QUIRK_NO_INIT_REPORTS },
+ 	{ USB_VENDOR_ID_NEXIO, USB_DEVICE_ID_NEXIO_MULTITOUCH_PTI0750, HID_QUIRK_NO_INIT_REPORTS },
+-- 
+2.7.4
+

0002-Input-soc_button_array-bail-out-earlier-if-gpiod_cou.patch

@@ -0,0 +1,34 @@
+From dc16436c048a734bffabefb79508c39795f2a8bb Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Fri, 13 May 2016 15:52:20 +0200
+Subject: [PATCH 2/6] Input - soc_button_array: bail out earlier if gpiod_count
+ is null
+
+The PNP0C40 device of the Surface 3 doesn't have any GPIO attached to it.
+Instead of trying to access the GPIO, request the count beforehand and
+bail out if it is null or if an error is returned.
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/input/misc/soc_button_array.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/drivers/input/misc/soc_button_array.c b/drivers/input/misc/soc_button_array.c
+index bbd433c..5467d04 100644
+--- a/drivers/input/misc/soc_button_array.c
++++ b/drivers/input/misc/soc_button_array.c
+@@ -167,6 +167,11 @@ static int soc_button_probe(struct platform_device *pdev)
+ 
+ 	button_info = (struct soc_button_info *)id->driver_data;
+ 
++	if (gpiod_count(&pdev->dev, KBUILD_MODNAME) <= 0) {
++		dev_info(&pdev->dev, "no GPIO attached, ignoring...\n");
++		return -ENODEV;
++	}
++
+ 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ 	if (!priv)
+ 		return -ENOMEM;
+-- 
+2.7.4
+

0002-WIP-add-custom-surface3-platform-device-for-controll.patch

@@ -0,0 +1,373 @@
+From 59131c2cc6f95e7517d73b2e8eefa890284ddf08 Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Fri, 3 Jun 2016 18:41:02 +0200
+Subject: [PATCH 2/2] WIP: add custom surface3 platform device for controlling
+ LID and hotplug
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/platform/x86/Kconfig        |  12 ++
+ drivers/platform/x86/Makefile       |   1 +
+ drivers/platform/x86/surface3-wmi.c | 315 ++++++++++++++++++++++++++++++++++++
+ 3 files changed, 328 insertions(+)
+ create mode 100644 drivers/platform/x86/surface3-wmi.c
+
+diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
+index 3ec0025..376999b 100644
+--- a/drivers/platform/x86/Kconfig
++++ b/drivers/platform/x86/Kconfig
+@@ -363,6 +363,18 @@ config IDEAPAD_LAPTOP
+ 	  This is a driver for Lenovo IdeaPad netbooks contains drivers for
+ 	  rfkill switch, hotkey, fan control and backlight control.
+ 
++config SURFACE3_WMI
++	tristate "Surface 3 WMI Driver"
++	depends on ACPI_WMI
++	depends on DMI
++	depends on INPUT
++	depends on SPI
++	---help---
++	  Say Y here if you have a Surface 3.
++
++	  To compile this driver as a module, choose M here: the module will
++	  be called surface3-wmi.
++
+ config THINKPAD_ACPI
+ 	tristate "ThinkPad ACPI Laptop Extras"
+ 	depends on ACPI
+diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile
+index 9b11b40..7324919 100644
+--- a/drivers/platform/x86/Makefile
++++ b/drivers/platform/x86/Makefile
+@@ -34,6 +34,7 @@ obj-$(CONFIG_PANASONIC_LAPTOP)	+= panasonic-laptop.o
+ obj-$(CONFIG_INTEL_MENLOW)	+= intel_menlow.o
+ obj-$(CONFIG_ACPI_WMI)		+= wmi.o
+ obj-$(CONFIG_MSI_WMI)		+= msi-wmi.o
++obj-$(CONFIG_SURFACE3_WMI)	+= surface3-wmi.o
+ obj-$(CONFIG_TOPSTAR_LAPTOP)	+= topstar-laptop.o
+ 
+ # toshiba_acpi must link after wmi to ensure that wmi devices are found
+diff --git a/drivers/platform/x86/surface3-wmi.c b/drivers/platform/x86/surface3-wmi.c
+new file mode 100644
+index 0000000..92f7a38
+--- /dev/null
++++ b/drivers/platform/x86/surface3-wmi.c
+@@ -0,0 +1,315 @@
++/*
++ *  Driver for the LID cover switch of the Surface 3
++ *
++ *  Copyright (c) 2016 Red Hat Inc.
++ */
++
++/*
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the Free
++ * Software Foundation; version 2 of the License.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/slab.h>
++
++#include <linux/acpi.h>
++#include <linux/dmi.h>
++#include <linux/input.h>
++#include <linux/mutex.h>
++#include <linux/platform_device.h>
++#include <linux/spi/spi.h>
++
++MODULE_AUTHOR("Benjamin Tissoires <benjamin.tissoires@redhat.com>");
++MODULE_DESCRIPTION("Surface 3 platform driver");
++MODULE_LICENSE("GPL");
++
++#define ACPI_BUTTON_HID_LID		"PNP0C0D"
++#define SPI_CTL_OBJ_NAME		"SPI"
++#define SPI_TS_OBJ_NAME			"NTRG"
++
++#define SURFACE3_LID_GUID "F7CC25EC-D20B-404C-8903-0ED4359C18AE"
++
++MODULE_ALIAS("wmi:" SURFACE3_LID_GUID);
++
++static const struct dmi_system_id surface3_dmi_table[] = {
++#if defined(CONFIG_X86)
++	{
++		.matches = {
++			DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
++			DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"),
++		},
++	},
++#endif
++	{ }
++};
++
++struct surface3_wmi {
++	struct platform_device *spi_master_pdev;
++	struct acpi_device *spi_master_adev;
++	struct acpi_device *touchscreen_adev;
++	struct acpi_device *pnp0c0d_adev;
++	struct acpi_hotplug_context hp;
++	struct input_dev *input;
++};
++
++static struct platform_device *s3_wmi_pdev;
++
++static struct surface3_wmi s3_wmi;
++
++static DEFINE_MUTEX(s3_wmi_lock);
++
++static int s3_wmi_query_block(const char *guid, int instance, int *ret)
++{
++	acpi_status status;
++	union acpi_object *obj;
++
++	struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
++
++	mutex_lock(&s3_wmi_lock);
++	status = wmi_query_block(guid, instance, &output);
++
++	obj = output.pointer;
++
++	if (!obj || obj->type != ACPI_TYPE_INTEGER) {
++		if (obj) {
++			pr_err("query block returned object "
++			       "type: %d - buffer length:%d\n", obj->type,
++			       obj->type == ACPI_TYPE_BUFFER ?
++			       obj->buffer.length : 0);
++		}
++		kfree(obj);
++		return -EINVAL;
++	}
++	*ret = obj->integer.value;
++	kfree(obj);
++	mutex_unlock(&s3_wmi_lock);
++	return 0;
++}
++
++static inline int s3_wmi_query_lid(int *ret)
++{
++	return s3_wmi_query_block(SURFACE3_LID_GUID, 0, ret);
++}
++
++static int s3_wmi_send_lid_state(int *return_value)
++{
++	int ret, lid_sw;
++
++	ret = s3_wmi_query_lid(&lid_sw);
++	if (ret)
++		return ret;
++
++	input_report_switch(s3_wmi.input, SW_LID, lid_sw);
++	input_sync(s3_wmi.input);
++
++	if (return_value)
++		*return_value = lid_sw;
++
++	return 0;
++}
++
++static int s3_wmi_hp_notify(struct acpi_device *adev, u32 value)
++{
++	int ret, lid_sw;
++	ret = s3_wmi_send_lid_state(&lid_sw);
++	if (ret)
++		return ret;
++
++	if (lid_sw) {
++		platform_device_unregister(s3_wmi.spi_master_pdev);
++		acpi_bus_trim(s3_wmi.spi_master_adev);
++	} else {
++		acpi_bus_scan(s3_wmi.spi_master_adev->handle);
++	}
++
++	return 0;
++}
++
++static acpi_status s3_wmi_attach_spi_device(acpi_handle handle,
++					    u32 level,
++					    void *data,
++					    void **return_value)
++{
++	struct acpi_device *adev, **ts_adev;
++
++	if (acpi_bus_get_device(handle, &adev))
++		return AE_OK;
++
++	ts_adev = data;
++
++	if (strncmp(acpi_device_bid(adev), SPI_TS_OBJ_NAME,
++	    strlen(SPI_TS_OBJ_NAME)))
++		return AE_OK;
++
++	if (*ts_adev) {
++		pr_err("duplicate entry %s\n", SPI_TS_OBJ_NAME);
++		return AE_OK;
++	}
++
++	*ts_adev = adev;
++
++	return AE_OK;
++}
++
++static int s3_wmi_check_platform_device(struct device *dev, void *data)
++{
++	struct acpi_device *adev, *ts_adev;
++	acpi_handle handle;
++	acpi_status status;
++
++	/* ignore non ACPI devices */
++	handle = ACPI_HANDLE(dev);
++	if (!handle || acpi_bus_get_device(handle, &adev))
++		return 0;
++
++	/* check for LID ACPI switch */
++	if (!strcmp(ACPI_BUTTON_HID_LID, acpi_device_hid(adev))) {
++		s3_wmi.pnp0c0d_adev = adev;
++		return 0;
++	}
++
++	/* ignore non SPI controllers */
++	if (strncmp(acpi_device_bid(adev), SPI_CTL_OBJ_NAME,
++	    strlen(SPI_CTL_OBJ_NAME)))
++		return 0;
++
++	status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1,
++				     s3_wmi_attach_spi_device, NULL,
++				     &ts_adev, NULL);
++	if (ACPI_FAILURE(status))
++		dev_warn(dev, "failed to enumerate SPI slaves\n");
++
++	if (!ts_adev)
++		return 0;
++
++	s3_wmi.spi_master_pdev = to_platform_device(dev);
++	s3_wmi.spi_master_adev = adev;
++	s3_wmi.touchscreen_adev = ts_adev;
++
++	return 0;
++}
++
++static int s3_wmi_create_and_register_input(struct platform_device *pdev)
++{
++	struct input_dev *input;
++	int error;
++
++	input = devm_input_allocate_device(&pdev->dev);
++	if (!input)
++		return -ENOMEM;
++
++	input->name = "Lid Switch";
++	input->phys = "button/input0";
++	input->id.bustype = BUS_HOST;
++	input->id.product = 0x0005;
++
++	input_set_capability(input, EV_SW, SW_LID);
++
++	error = input_register_device(input);
++	if (error)
++		goto out_err;
++
++	s3_wmi.input = input;
++
++	return 0;
++ out_err:
++	input_free_device(s3_wmi.input);
++	return error;
++}
++
++static int __init s3_wmi_probe(struct platform_device *pdev)
++{
++	int error;
++
++	if (!dmi_check_system(surface3_dmi_table))
++		return -ENODEV;
++
++	memset(&s3_wmi, 0, sizeof(s3_wmi));
++
++	bus_for_each_dev(&platform_bus_type, NULL, NULL,
++			 s3_wmi_check_platform_device);
++
++	if (!s3_wmi.touchscreen_adev)
++		return -ENODEV;
++
++	acpi_bus_trim(s3_wmi.pnp0c0d_adev);
++
++	error = s3_wmi_create_and_register_input(pdev);
++	if (error)
++		goto restore_acpi_lid;
++
++	acpi_initialize_hp_context(s3_wmi.touchscreen_adev, &s3_wmi.hp,
++				   s3_wmi_hp_notify, NULL);
++
++	s3_wmi_send_lid_state(NULL);
++
++	return 0;
++
++ restore_acpi_lid:
++	acpi_bus_scan(s3_wmi.pnp0c0d_adev->handle);
++	return error;
++}
++
++static int s3_wmi_remove(struct platform_device *device)
++{
++	/* remove the hotplug context from the acpi device */
++	s3_wmi.touchscreen_adev->hp = NULL;
++
++	/* reinstall the actual PNPC0C0D LID default handle */
++	acpi_bus_scan(s3_wmi.pnp0c0d_adev->handle);
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int s3_wmi_resume(struct device *dev)
++{
++	s3_wmi_send_lid_state(NULL);
++	return 0;
++}
++#endif
++static SIMPLE_DEV_PM_OPS(s3_wmi_pm, NULL, s3_wmi_resume);
++
++static struct platform_driver s3_wmi_driver = {
++	.driver = {
++		.name = "surface3-wmi",
++		.pm = &s3_wmi_pm,
++	},
++	.remove = s3_wmi_remove,
++};
++
++static int __init s3_wmi_init(void)
++{
++	int error;
++
++	s3_wmi_pdev = platform_device_alloc("surface3-wmi", -1);
++	if (!s3_wmi_pdev)
++		return -ENOMEM;
++
++	error = platform_device_add(s3_wmi_pdev);
++	if (error)
++		goto err_device_put;
++
++	error = platform_driver_probe(&s3_wmi_driver, s3_wmi_probe);
++	if (error)
++		goto err_device_del;
++
++	pr_info("Surface 3 WMI Extras loaded\n");
++	return 0;
++
++ err_device_del:
++	platform_device_del(s3_wmi_pdev);
++ err_device_put:
++	platform_device_put(s3_wmi_pdev);
++	return error;
++}
++
++static void __exit s3_wmi_exit(void)
++{
++	platform_device_unregister(s3_wmi_pdev);
++	platform_driver_unregister(&s3_wmi_driver);
++}
++
++module_init(s3_wmi_init);
++module_exit(s3_wmi_exit);
+-- 
+2.7.4
+

0002-drm-i915-Rename-s-skl_compute_pipe_wm-skl_build_pipe.patch

@@ -0,0 +1,50 @@
+From 95a9343e4b4e61d4c16da8bffc6a6e392d666dea Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:05:56 -0700
+Subject: [PATCH 02/17] drm/i915: Rename
+ s/skl_compute_pipe_wm/skl_build_pipe_wm/
+
+When we added atomic watermarks, we added a new display vfunc
+'compute_pipe_wm' that is used to compute any pipe-specific watermark
+information that we can at atomic check time.  This was a somewhat poor
+naming choice since we already had a 'skl_compute_pipe_wm' function that
+doesn't quite fit this model --- the existing SKL function is something
+that gets used at atomic commit time, after the DDB allocation has been
+determined.  Let's rename the existing SKL function to avoid confusion.
+
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-3-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/intel_pm.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index 4353fec..e15cb2a 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -3327,9 +3327,9 @@ static void skl_compute_transition_wm(struct intel_crtc_state *cstate,
+ 	}
+ }
+ 
+-static void skl_compute_pipe_wm(struct intel_crtc_state *cstate,
+-				struct skl_ddb_allocation *ddb,
+-				struct skl_pipe_wm *pipe_wm)
++static void skl_build_pipe_wm(struct intel_crtc_state *cstate,
++			      struct skl_ddb_allocation *ddb,
++			      struct skl_pipe_wm *pipe_wm)
+ {
+ 	struct drm_device *dev = cstate->base.crtc->dev;
+ 	const struct drm_i915_private *dev_priv = dev->dev_private;
+@@ -3596,7 +3596,7 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc,
+ 	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
+ 
+ 	skl_allocate_pipe_ddb(cstate, ddb);
+-	skl_compute_pipe_wm(cstate, ddb, pipe_wm);
++	skl_build_pipe_wm(cstate, ddb, pipe_wm);
+ 
+ 	if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm)))
+ 		return false;
+-- 
+2.7.4
+

0002-power-surface3_power-Improve-battery-capacity-report.patch

@@ -0,0 +1,139 @@
+From bf221e0568393a86b1b41b5ceb313c2580976947 Mon Sep 17 00:00:00 2001
+From: Stephen Just <stephenjust@gmail.com>
+Date: Tue, 28 Jun 2016 23:37:11 -0600
+Subject: [PATCH] power: surface3_power: Improve battery capacity reporting
+
+Read additional registers from the battery device to get more
+accurate status reading. Also properly report battery (dis)charge
+state and current.
+---
+ drivers/power/surface3_power.c | 55 ++++++++++++++++++++++++++++++++++++------
+ 1 file changed, 48 insertions(+), 7 deletions(-)
+
+diff --git a/drivers/power/surface3_power.c b/drivers/power/surface3_power.c
+index eee21d3..ac8155b 100644
+--- a/drivers/power/surface3_power.c
++++ b/drivers/power/surface3_power.c
+@@ -61,6 +61,7 @@ struct mshw0011_data {
+ 	bool			charging;
+ 	bool			bat_charging;
+ 	u8			trip_point;
++	s32			full_capacity;
+ };
+ 
+ struct mshw0011_lookup {
+@@ -122,6 +123,10 @@ struct gsb_buffer {
+ 	} __packed;
+ } __packed;
+ 
++#define ACPI_BATTERY_STATE_DISCHARGING	0x1
++#define ACPI_BATTERY_STATE_CHARGING	0x2
++#define ACPI_BATTERY_STATE_CRITICAL	0x4
++
+ #define MSHW0011_CMD_DEST_BAT0		0x01
+ #define MSHW0011_CMD_DEST_ADP1		0x03
+ 
+@@ -140,11 +145,14 @@ struct gsb_buffer {
+ 
+ #define MSHW0011_NOTIFY_GET_VERSION	0x00
+ #define MSHW0011_NOTIFY_ADP1		0x01
+-#define MSHW0011_NOTIFY_BAT0		0x02
++#define MSHW0011_NOTIFY_BAT0_BST	0x02
++#define MSHW0011_NOTIFY_BAT0_BIX	0x05
+ 
+ #define MSHW0011_ADP1_REG_PSR		0x03
+ 
+-#define MSHW0011_BAT0_REG_CAPACITY	0x0c
++#define MSHW0011_BAT0_REG_CAPACITY		0x0c
++#define MSHW0011_BAT0_REG_FULL_CHG_CAPACITY	0x0e
++#define MSHW0011_BAT0_REG_DESIGN_CAPACITY	0x40
+ #define MSHW0011_BAT0_REG_VOLTAGE	0x08
+ #define MSHW0011_BAT0_REG_RATE		0x14
+ #define MSHW0011_BAT0_REG_OEM		0x45
+@@ -235,6 +243,22 @@ static int mshw0011_bix(struct mshw0011_data *cdata, struct bix *bix)
+ 
+ 	*bix = default_bix;
+ 
++	/* get design capacity */
++	ret = i2c_smbus_read_word_data(client, MSHW0011_BAT0_REG_DESIGN_CAPACITY);
++	if (ret < 0) {
++		dev_err(&client->dev, "Error reading design capacity: %d\n", ret);
++		return ret;
++	}
++	bix->design_capacity = le16_to_cpu(ret);
++
++	/* get last full charge capacity */
++	ret = i2c_smbus_read_word_data(client, MSHW0011_BAT0_REG_FULL_CHG_CAPACITY);
++	if (ret < 0) {
++		dev_err(&client->dev, "Error reading last full charge capacity: %d\n", ret);
++		return ret;
++	}
++	bix->last_full_charg_capacity = le16_to_cpu(ret);
++
+ 	/* get serial number */
+ 	ret = mshw0011_i2c_read_block(client, MSHW0011_BAT0_REG_SERIAL_NO,
+ 				      buf, 10);
+@@ -269,7 +293,7 @@ static int mshw0011_bix(struct mshw0011_data *cdata, struct bix *bix)
+ static int mshw0011_bst(struct mshw0011_data *cdata, struct bst *bst)
+ {
+ 	struct i2c_client *client = cdata->bat0;
+-	int rate, capacity, voltage;
++	int rate, capacity, voltage, state;
+ 	s16 tmp;
+ 
+ 	rate = i2c_smbus_read_word_data(client, MSHW0011_BAT0_REG_RATE);
+@@ -285,8 +309,15 @@ static int mshw0011_bst(struct mshw0011_data *cdata, struct bst *bst)
+ 		return voltage;
+ 
+ 	tmp = le16_to_cpu(rate);
+-	bst->battery_present_rate = (s32)tmp;
+-	bst->battery_state = bst->battery_present_rate < 0 ? 0x01 : 0x02;
++	bst->battery_present_rate = abs((s32)tmp);
++
++	state = 0;
++	if ((s32) tmp > 0)
++		state |= ACPI_BATTERY_STATE_CHARGING;
++	else if ((s32) tmp < 0)
++		state |= ACPI_BATTERY_STATE_DISCHARGING;
++	bst->battery_state = state;
++
+ 	bst->battery_remaining_capacity = le16_to_cpu(capacity);
+ 	bst->battery_present_voltage = le16_to_cpu(voltage);
+ 
+@@ -308,6 +339,7 @@ static int mshw0011_adp_psr(struct mshw0011_data *cdata)
+ static int mshw0011_isr(struct mshw0011_data *cdata)
+ {
+ 	struct bst bst;
++	struct bix bix;
+ 	int ret;
+ 	bool status, bat_status;
+ 
+@@ -327,14 +359,23 @@ static int mshw0011_isr(struct mshw0011_data *cdata)
+ 	if (ret < 0)
+ 		return ret;
+ 
+-	bat_status = bst.battery_present_rate >= 0;
++	bat_status = bst.battery_state;
+ 
+ 	if (bat_status != cdata->bat_charging)
+ 		mshw0011_notify(cdata, cdata->notify_version,
+-				MSHW0011_NOTIFY_BAT0, &ret);
++				MSHW0011_NOTIFY_BAT0_BST, &ret);
+ 
+ 	cdata->bat_charging = bat_status;
+ 
++	ret = mshw0011_bix(cdata, &bix);
++	if (ret < 0)
++		return ret;
++	if (bix.last_full_charg_capacity != cdata->full_capacity)
++		mshw0011_notify(cdata, cdata->notify_version,
++				MSHW0011_NOTIFY_BAT0_BIX, &ret);
++
++	cdata->full_capacity = bix.last_full_charg_capacity;
++
+ 	return 0;
+ }
+ 
+-- 
+2.7.4
+

0003-HID-multitouch-set-correct-class-for-Surface-Type-Co.patch

@@ -0,0 +1,32 @@
+From d4b0c0bfd2194496d7a72722829d4283ed5f3141 Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Fri, 3 Jun 2016 11:49:17 +0200
+Subject: [PATCH 3/3] HID: multitouch: set correct class for Surface Type Cover
+ 3
+
+Looks like Microsoft forgot to set the blob discriminating between Win 8
+and Win 7 devices...
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/hid/hid-multitouch.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
+index dd279d7..fa6622a 100644
+--- a/drivers/hid/hid-multitouch.c
++++ b/drivers/hid/hid-multitouch.c
+@@ -1379,6 +1379,10 @@ static const struct hid_device_id mt_devices[] = {
+ 		MT_USB_DEVICE(USB_VENDOR_ID_ILITEK,
+ 			USB_DEVICE_ID_ILITEK_MULTITOUCH) },
+ 
++	/* Microsoft */
++	{ .driver_data = MT_CLS_WIN_8,
++		MT_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, 0x07cd) },
++
+ 	/* MosArt panels */
+ 	{ .driver_data = MT_CLS_CONFIDENCE_MINUS_ONE,
+ 		MT_USB_DEVICE(USB_VENDOR_ID_ASUS,
+-- 
+2.7.4
+

0003-Input-soc_button_array-make-sure-one-GPIO-is-not-ass.patch

@@ -0,0 +1,47 @@
+From 3a6162d1b35218b4fc684a0c95e103ce68105bb5 Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Mon, 9 May 2016 14:28:25 +0200
+Subject: [PATCH 3/6] Input - soc_button_array: make sure one GPIO is not
+ assigned twice
+
+The Surface 3 declares twice the GPIO as GpioInt and GpioIo in its
+ACPI table. Given that we do not keep the gpiod around, but the actual
+number associated to, there is a chance while enumerating the GPIOs that
+one gets assigned twice. Make sure a previous button has not been mapped
+already to the current button to prevent such failure.
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/input/misc/soc_button_array.c | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/input/misc/soc_button_array.c b/drivers/input/misc/soc_button_array.c
+index 5467d04..cb5cce3 100644
+--- a/drivers/input/misc/soc_button_array.c
++++ b/drivers/input/misc/soc_button_array.c
+@@ -77,7 +77,7 @@ soc_button_device_create(struct platform_device *pdev,
+ 	struct gpio_keys_platform_data *gpio_keys_pdata;
+ 	int n_buttons = 0;
+ 	int gpio;
+-	int error;
++	int i, error;
+ 
+ 	gpio_keys_pdata = devm_kzalloc(&pdev->dev,
+ 				       sizeof(*gpio_keys_pdata) +
+@@ -96,6 +96,13 @@ soc_button_device_create(struct platform_device *pdev,
+ 		if (!gpio_is_valid(gpio))
+ 			continue;
+ 
++		for (i = 0; i < n_buttons; i++) {
++			if (gpio_keys[i].gpio == gpio)
++				break;
++		}
++		if (i < n_buttons)
++			continue; /* the GPIO has already been assigned */
++
+ 		gpio_keys[n_buttons].type = info->event_type;
+ 		gpio_keys[n_buttons].code = info->event_code;
+ 		gpio_keys[n_buttons].gpio = gpio;
+-- 
+2.7.4
+

0003-drm-i915-gen9-Cache-plane-data-rates-in-CRTC-state.patch

@@ -0,0 +1,204 @@
+From be60f2176911a4ac8e0450ab51f11c235a4984de Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:05:57 -0700
+Subject: [PATCH 03/17] drm/i915/gen9: Cache plane data rates in CRTC state
+
+This will be important when we start calculating CRTC data rates for
+in-flight CRTC states since it will allow us to calculate the total data
+rate without needing to grab the plane state for any planes that aren't
+updated by the transaction.
+
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-4-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/intel_drv.h |  4 ++
+ drivers/gpu/drm/i915/intel_pm.c  | 92 ++++++++++++++++++++++++++--------------
+ 2 files changed, 63 insertions(+), 33 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
+index 5a186bf..6a95696 100644
+--- a/drivers/gpu/drm/i915/intel_drv.h
++++ b/drivers/gpu/drm/i915/intel_drv.h
+@@ -427,6 +427,10 @@ struct intel_crtc_wm_state {
+ 		struct {
+ 			/* gen9+ only needs 1-step wm programming */
+ 			struct skl_pipe_wm optimal;
++
++			/* cached plane data rate */
++			unsigned plane_data_rate[I915_MAX_PLANES];
++			unsigned plane_y_data_rate[I915_MAX_PLANES];
+ 		} skl;
+ 	};
+ 
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index e15cb2a..6835614 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -2940,6 +2940,14 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
+ 	struct intel_plane_state *intel_pstate = to_intel_plane_state(pstate);
+ 	struct drm_framebuffer *fb = pstate->fb;
+ 	uint32_t width = 0, height = 0;
++	unsigned format = fb ? fb->pixel_format : DRM_FORMAT_XRGB8888;
++
++	if (!intel_pstate->visible)
++		return 0;
++	if (pstate->plane->type == DRM_PLANE_TYPE_CURSOR)
++		return 0;
++	if (y && format != DRM_FORMAT_NV12)
++		return 0;
+ 
+ 	width = drm_rect_width(&intel_pstate->src) >> 16;
+ 	height = drm_rect_height(&intel_pstate->src) >> 16;
+@@ -2948,17 +2956,17 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
+ 		swap(width, height);
+ 
+ 	/* for planar format */
+-	if (fb->pixel_format == DRM_FORMAT_NV12) {
++	if (format == DRM_FORMAT_NV12) {
+ 		if (y)  /* y-plane data rate */
+ 			return width * height *
+-				drm_format_plane_cpp(fb->pixel_format, 0);
++				drm_format_plane_cpp(format, 0);
+ 		else    /* uv-plane data rate */
+ 			return (width / 2) * (height / 2) *
+-				drm_format_plane_cpp(fb->pixel_format, 1);
++				drm_format_plane_cpp(format, 1);
+ 	}
+ 
+ 	/* for packed formats */
+-	return width * height * drm_format_plane_cpp(fb->pixel_format, 0);
++	return width * height * drm_format_plane_cpp(format, 0);
+ }
+ 
+ /*
+@@ -2967,32 +2975,34 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
+  *   3 * 4096 * 8192  * 4 < 2^32
+  */
+ static unsigned int
+-skl_get_total_relative_data_rate(const struct intel_crtc_state *cstate)
++skl_get_total_relative_data_rate(struct intel_crtc_state *cstate)
+ {
+ 	struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
+ 	struct drm_device *dev = intel_crtc->base.dev;
+ 	const struct intel_plane *intel_plane;
+-	unsigned int total_data_rate = 0;
++	unsigned int rate, total_data_rate = 0;
+ 
++	/* Calculate and cache data rate for each plane */
+ 	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
+ 		const struct drm_plane_state *pstate = intel_plane->base.state;
++		int id = skl_wm_plane_id(intel_plane);
+ 
+-		if (pstate->fb == NULL)
+-			continue;
++		/* packed/uv */
++		rate = skl_plane_relative_data_rate(cstate, pstate, 0);
++		cstate->wm.skl.plane_data_rate[id] = rate;
+ 
+-		if (intel_plane->base.type == DRM_PLANE_TYPE_CURSOR)
+-			continue;
++		/* y-plane */
++		rate = skl_plane_relative_data_rate(cstate, pstate, 1);
++		cstate->wm.skl.plane_y_data_rate[id] = rate;
++	}
+ 
+-		/* packed/uv */
+-		total_data_rate += skl_plane_relative_data_rate(cstate,
+-								pstate,
+-								0);
++	/* Calculate CRTC's total data rate from cached values */
++	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
++		int id = skl_wm_plane_id(intel_plane);
+ 
+-		if (pstate->fb->pixel_format == DRM_FORMAT_NV12)
+-			/* y-plane */
+-			total_data_rate += skl_plane_relative_data_rate(cstate,
+-									pstate,
+-									1);
++		/* packed/uv */
++		total_data_rate += cstate->wm.skl.plane_data_rate[id];
++		total_data_rate += cstate->wm.skl.plane_y_data_rate[id];
+ 	}
+ 
+ 	return total_data_rate;
+@@ -3056,6 +3066,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 	 * FIXME: we may not allocate every single block here.
+ 	 */
+ 	total_data_rate = skl_get_total_relative_data_rate(cstate);
++	if (total_data_rate == 0)
++		return;
+ 
+ 	start = alloc->start;
+ 	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
+@@ -3070,7 +3082,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 		if (plane->type == DRM_PLANE_TYPE_CURSOR)
+ 			continue;
+ 
+-		data_rate = skl_plane_relative_data_rate(cstate, pstate, 0);
++		data_rate = cstate->wm.skl.plane_data_rate[id];
+ 
+ 		/*
+ 		 * allocation for (packed formats) or (uv-plane part of planar format):
+@@ -3089,20 +3101,16 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 		/*
+ 		 * allocation for y_plane part of planar format:
+ 		 */
+-		if (pstate->fb->pixel_format == DRM_FORMAT_NV12) {
+-			y_data_rate = skl_plane_relative_data_rate(cstate,
+-								   pstate,
+-								   1);
+-			y_plane_blocks = y_minimum[id];
+-			y_plane_blocks += div_u64((uint64_t)alloc_size * y_data_rate,
+-						total_data_rate);
+-
+-			ddb->y_plane[pipe][id].start = start;
+-			ddb->y_plane[pipe][id].end = start + y_plane_blocks;
+-
+-			start += y_plane_blocks;
+-		}
++		y_data_rate = cstate->wm.skl.plane_y_data_rate[id];
++
++		y_plane_blocks = y_minimum[id];
++		y_plane_blocks += div_u64((uint64_t)alloc_size * y_data_rate,
++					total_data_rate);
+ 
++		ddb->y_plane[pipe][id].start = start;
++		ddb->y_plane[pipe][id].end = start + y_plane_blocks;
++
++		start += y_plane_blocks;
+ 	}
+ 
+ }
+@@ -3879,10 +3887,28 @@ void skl_wm_get_hw_state(struct drm_device *dev)
+ 	struct drm_i915_private *dev_priv = dev->dev_private;
+ 	struct skl_ddb_allocation *ddb = &dev_priv->wm.skl_hw.ddb;
+ 	struct drm_crtc *crtc;
++	struct intel_crtc *intel_crtc;
+ 
+ 	skl_ddb_get_hw_state(dev_priv, ddb);
+ 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
+ 		skl_pipe_wm_get_hw_state(crtc);
++
++	/* Calculate plane data rates */
++	for_each_intel_crtc(dev, intel_crtc) {
++		struct intel_crtc_state *cstate = intel_crtc->config;
++		struct intel_plane *intel_plane;
++
++		for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
++			const struct drm_plane_state *pstate =
++				intel_plane->base.state;
++			int id = skl_wm_plane_id(intel_plane);
++
++			cstate->wm.skl.plane_data_rate[id] =
++				skl_plane_relative_data_rate(cstate, pstate, 0);
++			cstate->wm.skl.plane_y_data_rate[id] =
++				skl_plane_relative_data_rate(cstate, pstate, 1);
++		}
++	}
+ }
+ 
+ static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc)
+-- 
+2.7.4
+

0004-Input-soc_button_array-allow-to-specify-active_low.patch

@@ -0,0 +1,54 @@
+From de9a764d3063d5c1743eab8b1a994b02119767a0 Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Fri, 13 May 2016 15:54:15 +0200
+Subject: [PATCH 4/6] Input - soc_button_array: allow to specify active_low
+
+The Surface 3 has the "Windows" key active high, and not low. We need
+a way to specify it in the description.
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/input/misc/soc_button_array.c | 13 +++++++------
+ 1 file changed, 7 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/input/misc/soc_button_array.c b/drivers/input/misc/soc_button_array.c
+index cb5cce3..077e06e4 100644
+--- a/drivers/input/misc/soc_button_array.c
++++ b/drivers/input/misc/soc_button_array.c
+@@ -34,6 +34,7 @@ struct soc_button_info {
+ 	unsigned int event_code;
+ 	bool autorepeat;
+ 	bool wakeup;
++	bool active_low;
+ };
+ 
+ /*
+@@ -106,7 +107,7 @@ soc_button_device_create(struct platform_device *pdev,
+ 		gpio_keys[n_buttons].type = info->event_type;
+ 		gpio_keys[n_buttons].code = info->event_code;
+ 		gpio_keys[n_buttons].gpio = gpio;
+-		gpio_keys[n_buttons].active_low = 1;
++		gpio_keys[n_buttons].active_low = info->active_low;
+ 		gpio_keys[n_buttons].desc = info->name;
+ 		gpio_keys[n_buttons].wakeup = info->wakeup;
+ 		n_buttons++;
+@@ -206,11 +207,11 @@ static int soc_button_probe(struct platform_device *pdev)
+ }
+ 
+ static struct soc_button_info soc_button_PNP0C40[] = {
+-	{ "power", 0, EV_KEY, KEY_POWER, false, true },
+-	{ "home", 1, EV_KEY, KEY_LEFTMETA, false, true },
+-	{ "volume_up", 2, EV_KEY, KEY_VOLUMEUP, true, false },
+-	{ "volume_down", 3, EV_KEY, KEY_VOLUMEDOWN, true, false },
+-	{ "rotation_lock", 4, EV_SW, SW_ROTATE_LOCK, false, false },
++	{ "power", 0, EV_KEY, KEY_POWER, false, true, true },
++	{ "home", 1, EV_KEY, KEY_LEFTMETA, false, true, true },
++	{ "volume_up", 2, EV_KEY, KEY_VOLUMEUP, true, false, true },
++	{ "volume_down", 3, EV_KEY, KEY_VOLUMEDOWN, true, false, true },
++	{ "rotation_lock", 4, EV_SW, SW_ROTATE_LOCK, false, false, true },
+ 	{ }
+ };
+ 
+-- 
+2.7.4
+

0004-drm-i915-gen9-Allow-calculation-of-data-rate-for-in-.patch

@@ -0,0 +1,131 @@
+From 2bf927b92091d11f778a2a972b996f24a63281be Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:05:58 -0700
+Subject: [PATCH 04/17] drm/i915/gen9: Allow calculation of data rate for
+ in-flight state (v2)
+
+Our skl_get_total_relative_data_rate() function gets passed a crtc state
+object to calculate the data rate for, but it currently always looks
+up the committed plane states that correspond to that CRTC.  Let's
+check whether the CRTC state is an in-flight state (meaning
+cstate->state is non-NULL) and if so, use the corresponding in-flight
+plane states.
+
+We'll soon be using this function exclusively for in-flight states; at
+that time we'll be able to simplify the function a bit, but for now we
+allow it to be used in either mode.
+
+v2:
+ - Rebase on top of changes to cache plane data rates.
+
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-5-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/intel_pm.c | 74 +++++++++++++++++++++++++++++++++--------
+ 1 file changed, 60 insertions(+), 14 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index 6835614..5104ba7 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -2975,25 +2975,69 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
+  *   3 * 4096 * 8192  * 4 < 2^32
+  */
+ static unsigned int
+-skl_get_total_relative_data_rate(struct intel_crtc_state *cstate)
++skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate)
+ {
+-	struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
+-	struct drm_device *dev = intel_crtc->base.dev;
++	struct drm_crtc_state *cstate = &intel_cstate->base;
++	struct drm_atomic_state *state = cstate->state;
++	struct drm_crtc *crtc = cstate->crtc;
++	struct drm_device *dev = crtc->dev;
++	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ 	const struct intel_plane *intel_plane;
+ 	unsigned int rate, total_data_rate = 0;
++	int id;
+ 
+ 	/* Calculate and cache data rate for each plane */
+-	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
+-		const struct drm_plane_state *pstate = intel_plane->base.state;
+-		int id = skl_wm_plane_id(intel_plane);
++	/*
++	 * FIXME: At the moment this function can be called on either an
++	 * in-flight or a committed state object.  If it's in-flight then we
++	 * only want to re-calculate the plane data rate for planes that are
++	 * part of the transaction (i.e., we don't want to grab any additional
++	 * plane states if we don't have to).  If we're operating on committed
++	 * state, we'll just go ahead and recalculate the plane data rate for
++	 * all planes.
++	 *
++	 * Once we finish moving our DDB allocation to the atomic check phase,
++	 * we'll only be calling this function on in-flight state objects, so
++	 * the 'else' branch here will go away.
++	 */
++	if (state) {
++		struct drm_plane *plane;
++		struct drm_plane_state *pstate;
++		int i;
++
++		for_each_plane_in_state(state, plane, pstate, i) {
++			intel_plane = to_intel_plane(plane);
++			id = skl_wm_plane_id(intel_plane);
++
++			if (intel_plane->pipe != intel_crtc->pipe)
++				continue;
++
++			/* packed/uv */
++			rate = skl_plane_relative_data_rate(intel_cstate,
++							    pstate, 0);
++			intel_cstate->wm.skl.plane_data_rate[id] = rate;
++
++			/* y-plane */
++			rate = skl_plane_relative_data_rate(intel_cstate,
++							    pstate, 1);
++			intel_cstate->wm.skl.plane_y_data_rate[id] = rate;
++		}
++	} else {
++		for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
++			const struct drm_plane_state *pstate =
++				intel_plane->base.state;
++			int id = skl_wm_plane_id(intel_plane);
+ 
+-		/* packed/uv */
+-		rate = skl_plane_relative_data_rate(cstate, pstate, 0);
+-		cstate->wm.skl.plane_data_rate[id] = rate;
++			/* packed/uv */
++			rate = skl_plane_relative_data_rate(intel_cstate,
++							    pstate, 0);
++			intel_cstate->wm.skl.plane_data_rate[id] = rate;
+ 
+-		/* y-plane */
+-		rate = skl_plane_relative_data_rate(cstate, pstate, 1);
+-		cstate->wm.skl.plane_y_data_rate[id] = rate;
++			/* y-plane */
++			rate = skl_plane_relative_data_rate(intel_cstate,
++							    pstate, 1);
++			intel_cstate->wm.skl.plane_y_data_rate[id] = rate;
++		}
+ 	}
+ 
+ 	/* Calculate CRTC's total data rate from cached values */
+@@ -3001,10 +3045,12 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *cstate)
+ 		int id = skl_wm_plane_id(intel_plane);
+ 
+ 		/* packed/uv */
+-		total_data_rate += cstate->wm.skl.plane_data_rate[id];
+-		total_data_rate += cstate->wm.skl.plane_y_data_rate[id];
++		total_data_rate += intel_cstate->wm.skl.plane_data_rate[id];
++		total_data_rate += intel_cstate->wm.skl.plane_y_data_rate[id];
+ 	}
+ 
++	WARN_ON(cstate->plane_mask && total_data_rate == 0);
++
+ 	return total_data_rate;
+ }
+ 
+-- 
+2.7.4
+

0005-Input-soc_button_array-export-part-of-the-internals.patch

@@ -0,0 +1,255 @@
+From 7423522630722f7aad88afb097776e41b52d1b22 Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Fri, 13 May 2016 15:56:56 +0200
+Subject: [PATCH 5/6] Input - soc_button_array: export part of the internals
+
+The MS Surfaces are not directly using the PNP0C40 device for the buttons
+but instead a MSHW0028. This one is bound on a I2C bus and so we need to
+use a separate driver for it.
+
+One noticeable change is that the original soc_button_array fails
+to rmmod and then modprobe when using KBUILD_MODNAME as the gpiod con_id
+with the Surface 3. Add this as a parameter of the new API.
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/input/misc/soc_button_array.c  | 108 +++++++++++++++++++--------------
+ include/linux/input/soc_button_array.h |  37 +++++++++++
+ 2 files changed, 98 insertions(+), 47 deletions(-)
+ create mode 100644 include/linux/input/soc_button_array.h
+
+diff --git a/drivers/input/misc/soc_button_array.c b/drivers/input/misc/soc_button_array.c
+index 077e06e4..96012f9 100644
+--- a/drivers/input/misc/soc_button_array.c
++++ b/drivers/input/misc/soc_button_array.c
+@@ -19,23 +19,7 @@
+ #include <linux/gpio_keys.h>
+ #include <linux/gpio.h>
+ #include <linux/platform_device.h>
+-
+-/*
+- * Definition of buttons on the tablet. The ACPI index of each button
+- * is defined in section 2.8.7.2 of "Windows ACPI Design Guide for SoC
+- * Platforms"
+- */
+-#define MAX_NBUTTONS	5
+-
+-struct soc_button_info {
+-	const char *name;
+-	int acpi_index;
+-	unsigned int event_type;
+-	unsigned int event_code;
+-	bool autorepeat;
+-	bool wakeup;
+-	bool active_low;
+-};
++#include <linux/input/soc_button_array.h>
+ 
+ /*
+  * Some of the buttons like volume up/down are auto repeat, while others
+@@ -51,12 +35,13 @@ struct soc_button_data {
+ /*
+  * Get the Nth GPIO number from the ACPI object.
+  */
+-static int soc_button_lookup_gpio(struct device *dev, int acpi_index)
++static int soc_button_lookup_gpio(struct device *dev, const char *con_id,
++				  int acpi_index)
+ {
+ 	struct gpio_desc *desc;
+ 	int gpio;
+ 
+-	desc = gpiod_get_index(dev, KBUILD_MODNAME, acpi_index, GPIOD_ASIS);
++	desc = gpiod_get_index(dev, con_id, acpi_index, GPIOD_ASIS);
+ 	if (IS_ERR(desc))
+ 		return PTR_ERR(desc);
+ 
+@@ -68,7 +53,8 @@ static int soc_button_lookup_gpio(struct device *dev, int acpi_index)
+ }
+ 
+ static struct platform_device *
+-soc_button_device_create(struct platform_device *pdev,
++soc_button_device_create(struct device *dev,
++			 const char *gpiod_con_id,
+ 			 const struct soc_button_info *button_info,
+ 			 bool autorepeat)
+ {
+@@ -80,7 +66,7 @@ soc_button_device_create(struct platform_device *pdev,
+ 	int gpio;
+ 	int i, error;
+ 
+-	gpio_keys_pdata = devm_kzalloc(&pdev->dev,
++	gpio_keys_pdata = devm_kzalloc(dev,
+ 				       sizeof(*gpio_keys_pdata) +
+ 					sizeof(*gpio_keys) * MAX_NBUTTONS,
+ 				       GFP_KERNEL);
+@@ -93,7 +79,9 @@ soc_button_device_create(struct platform_device *pdev,
+ 		if (info->autorepeat != autorepeat)
+ 			continue;
+ 
+-		gpio = soc_button_lookup_gpio(&pdev->dev, info->acpi_index);
++		gpio = soc_button_lookup_gpio(dev,
++					      gpiod_con_id,
++					      info->acpi_index);
+ 		if (!gpio_is_valid(gpio))
+ 			continue;
+ 
+@@ -142,14 +130,12 @@ soc_button_device_create(struct platform_device *pdev,
+ err_free_pdev:
+ 	platform_device_put(pd);
+ err_free_mem:
+-	devm_kfree(&pdev->dev, gpio_keys_pdata);
++	devm_kfree(dev, gpio_keys_pdata);
+ 	return ERR_PTR(error);
+ }
+ 
+-static int soc_button_remove(struct platform_device *pdev)
++int soc_dev_button_remove(struct soc_button_data *priv)
+ {
+-	struct soc_button_data *priv = platform_get_drvdata(pdev);
+-
+ 	int i;
+ 
+ 	for (i = 0; i < BUTTON_TYPES; i++)
+@@ -158,40 +144,28 @@ static int soc_button_remove(struct platform_device *pdev)
+ 
+ 	return 0;
+ }
++EXPORT_SYMBOL_GPL(soc_dev_button_remove);
+ 
+-static int soc_button_probe(struct platform_device *pdev)
++int soc_dev_button_enumerate(struct device *dev, struct soc_button_data *priv,
++			     const char *gpiod_con_id,
++			     struct soc_button_info *button_info)
+ {
+-	struct device *dev = &pdev->dev;
+-	const struct acpi_device_id *id;
+-	struct soc_button_info *button_info;
+-	struct soc_button_data *priv;
+ 	struct platform_device *pd;
+ 	int i;
+ 	int error;
+ 
+-	id = acpi_match_device(dev->driver->acpi_match_table, dev);
+-	if (!id)
+-		return -ENODEV;
+-
+-	button_info = (struct soc_button_info *)id->driver_data;
+-
+-	if (gpiod_count(&pdev->dev, KBUILD_MODNAME) <= 0) {
+-		dev_info(&pdev->dev, "no GPIO attached, ignoring...\n");
++	if (gpiod_count(dev, gpiod_con_id) <= 0) {
++		dev_info(dev, "no GPIO attached, ignoring...\n");
+ 		return -ENODEV;
+ 	}
+ 
+-	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+-	if (!priv)
+-		return -ENOMEM;
+-
+-	platform_set_drvdata(pdev, priv);
+-
+ 	for (i = 0; i < BUTTON_TYPES; i++) {
+-		pd = soc_button_device_create(pdev, button_info, i == 0);
++		pd = soc_button_device_create(dev, gpiod_con_id, button_info,
++					      i == 0);
+ 		if (IS_ERR(pd)) {
+ 			error = PTR_ERR(pd);
+ 			if (error != -ENODEV) {
+-				soc_button_remove(pdev);
++				soc_dev_button_remove(priv);
+ 				return error;
+ 			}
+ 			continue;
+@@ -205,6 +179,46 @@ static int soc_button_probe(struct platform_device *pdev)
+ 
+ 	return 0;
+ }
++EXPORT_SYMBOL_GPL(soc_dev_button_enumerate);
++
++struct soc_button_data *soc_dev_button_data_allocate(struct device *dev)
++{
++	return devm_kzalloc(dev, sizeof(struct soc_button_data), GFP_KERNEL);
++}
++EXPORT_SYMBOL_GPL(soc_dev_button_data_allocate);
++
++static int soc_button_probe(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	const struct acpi_device_id *id;
++	struct soc_button_info *button_info;
++	struct soc_button_data *priv;
++	int error;
++
++	id = acpi_match_device(dev->driver->acpi_match_table, dev);
++	if (!id)
++		return -ENODEV;
++
++	button_info = (struct soc_button_info *)id->driver_data;
++
++	priv = soc_dev_button_data_allocate(dev);
++	if (!priv)
++		return -ENOMEM;
++
++	error = soc_dev_button_enumerate(dev, priv, KBUILD_MODNAME,
++					 button_info);
++	if (error)
++		return error;
++
++	platform_set_drvdata(pdev, priv);
++
++	return 0;
++}
++
++static int soc_button_remove(struct platform_device *pdev)
++{
++	return soc_dev_button_remove(platform_get_drvdata(pdev));
++}
+ 
+ static struct soc_button_info soc_button_PNP0C40[] = {
+ 	{ "power", 0, EV_KEY, KEY_POWER, false, true, true },
+diff --git a/include/linux/input/soc_button_array.h b/include/linux/input/soc_button_array.h
+new file mode 100644
+index 0000000..634ce90
+--- /dev/null
++++ b/include/linux/input/soc_button_array.h
+@@ -0,0 +1,37 @@
++/*
++ * Supports for the button array on SoC tablets originally running
++ * Windows 8.
++ *
++ * (C) Copyright 2014 Intel Corporation
++ * (C) Copyright 2016 Red Hat, Inc
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; version 2
++ * of the License.
++ */
++
++/*
++ * Definition of buttons on the tablet. The ACPI index of each button
++ * is defined in section 2.8.7.2 of "Windows ACPI Design Guide for SoC
++ * Platforms"
++ */
++#define MAX_NBUTTONS	5
++
++struct soc_button_info {
++	const char *name;
++	int acpi_index;
++	unsigned int event_type;
++	unsigned int event_code;
++	bool autorepeat;
++	bool wakeup;
++	bool active_low;
++};
++
++struct soc_button_data;
++
++struct soc_button_data *soc_dev_button_data_allocate(struct device *dev);
++int soc_dev_button_remove(struct soc_button_data *priv);
++int soc_dev_button_enumerate(struct device *dev, struct soc_button_data *priv,
++			     const char *gpiod_con_id,
++			     struct soc_button_info *button_info);
+-- 
+2.7.4
+

0005-drm-i915-gen9-Store-plane-minimum-blocks-in-CRTC-wm-.patch

@@ -0,0 +1,57 @@
+From f28225dda2a2bf1e2d96bbe44b45d43a7d5071d3 Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:05:59 -0700
+Subject: [PATCH 05/17] drm/i915/gen9: Store plane minimum blocks in CRTC wm
+ state (v2)
+
+This will eventually allow us to re-use old values without
+re-calculating them for unchanged planes (which also helps us avoid
+re-grabbing extra plane states).
+
+v2:
+ -  Drop unnecessary memset's; they were meant for a later patch (which
+    got reworked anyway to not need them, but were mis-rebased into this
+    one.  (Maarten)
+
+Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-6-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/intel_drv.h | 4 ++++
+ drivers/gpu/drm/i915/intel_pm.c  | 4 ++--
+ 2 files changed, 6 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
+index 6a95696..9308cff 100644
+--- a/drivers/gpu/drm/i915/intel_drv.h
++++ b/drivers/gpu/drm/i915/intel_drv.h
+@@ -431,6 +431,10 @@ struct intel_crtc_wm_state {
+ 			/* cached plane data rate */
+ 			unsigned plane_data_rate[I915_MAX_PLANES];
+ 			unsigned plane_y_data_rate[I915_MAX_PLANES];
++
++			/* minimum block allocation */
++			uint16_t minimum_blocks[I915_MAX_PLANES];
++			uint16_t minimum_y_blocks[I915_MAX_PLANES];
+ 		} skl;
+ 	};
+ 
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index 5104ba7..6c7a048 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -3067,8 +3067,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 	enum pipe pipe = intel_crtc->pipe;
+ 	struct skl_ddb_entry *alloc = &ddb->pipe[pipe];
+ 	uint16_t alloc_size, start, cursor_blocks;
+-	uint16_t minimum[I915_MAX_PLANES];
+-	uint16_t y_minimum[I915_MAX_PLANES];
++	uint16_t *minimum = cstate->wm.skl.minimum_blocks;
++	uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks;
+ 	unsigned int total_data_rate;
+ 
+ 	skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc);
+-- 
+2.7.4
+

0006-Input-surface3_button_array-Introduce-button-support.patch

@@ -0,0 +1,181 @@
+From d25373cf47d005fbab3b363a32fa9d890ead1a51 Mon Sep 17 00:00:00 2001
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Fri, 13 May 2016 17:54:09 +0200
+Subject: [PATCH 6/6] Input - surface3_button_array: Introduce button support
+ for the Surface 3
+
+The Surface 3 is not following the ACPI spec for PNP0C40, but nearly.
+The device is connected to a I2C device that might have some magic
+but we don't know about.
+Just create the device after the enumeration and use the declared GPIOs
+to provide button support.
+
+The Surface Pro 3 is using an ACPI driver and matches against the bid
+of the device ("VGBI") but I think it also could use this. To prevent
+this driver to be used on the Surface Pro, we add a match on the
+Surface 3 bid "TEV2".
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/input/misc/Kconfig                 |   9 +++
+ drivers/input/misc/Makefile                |   1 +
+ drivers/input/misc/surface3_button_array.c | 115 +++++++++++++++++++++++++++++
+ 3 files changed, 125 insertions(+)
+ create mode 100644 drivers/input/misc/surface3_button_array.c
+
+diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
+index efb0ca8..6f99d3b 100644
+--- a/drivers/input/misc/Kconfig
++++ b/drivers/input/misc/Kconfig
+@@ -776,6 +776,15 @@ config INPUT_SOC_BUTTON_ARRAY
+ 	  To compile this driver as a module, choose M here: the
+ 	  module will be called soc_button_array.
+ 
++config INPUT_SURFACE3_BUTTON_ARRAY
++	tristate "Microsoft Surface 3 SoC Button Array"
++	depends on INPUT_SOC_BUTTON_ARRAY
++	help
++	  Say Y here if you have a MS Surface tablet.
++
++	  To compile this driver as a module, choose M here: the
++	  module will be called surface3_button_array.
++
+ config INPUT_DRV260X_HAPTICS
+ 	tristate "TI DRV260X haptics support"
+ 	depends on INPUT && I2C
+diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile
+index 6a1e5e2..020b24a 100644
+--- a/drivers/input/misc/Makefile
++++ b/drivers/input/misc/Makefile
+@@ -67,6 +67,7 @@ obj-$(CONFIG_INPUT_SGI_BTNS)		+= sgi_btns.o
+ obj-$(CONFIG_INPUT_SIRFSOC_ONKEY)	+= sirfsoc-onkey.o
+ obj-$(CONFIG_INPUT_SOC_BUTTON_ARRAY)	+= soc_button_array.o
+ obj-$(CONFIG_INPUT_SPARCSPKR)		+= sparcspkr.o
++obj-$(CONFIG_INPUT_SURFACE3_BUTTON_ARRAY)	+= surface3_button_array.o
+ obj-$(CONFIG_INPUT_TPS65218_PWRBUTTON)	+= tps65218-pwrbutton.o
+ obj-$(CONFIG_INPUT_TWL4030_PWRBUTTON)	+= twl4030-pwrbutton.o
+ obj-$(CONFIG_INPUT_TWL4030_VIBRA)	+= twl4030-vibra.o
+diff --git a/drivers/input/misc/surface3_button_array.c b/drivers/input/misc/surface3_button_array.c
+new file mode 100644
+index 0000000..b48307c
+--- /dev/null
++++ b/drivers/input/misc/surface3_button_array.c
+@@ -0,0 +1,115 @@
++/*
++ * Supports for the button array on the Surface tablets.
++ *
++ * (C) Copyright 2016 Red Hat, Inc
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; version 2
++ * of the License.
++ */
++
++#include <linux/kernel.h>
++#include <linux/i2c.h>
++#include <linux/slab.h>
++#include <linux/acpi.h>
++#include <linux/input/soc_button_array.h>
++#include <uapi/linux/input-event-codes.h>
++
++struct soc_device_info {
++	const char * const *obj_names;
++	struct soc_button_info *buttons;
++};
++
++static int surface3_probe(struct i2c_client *client,
++			   const struct i2c_device_id *id)
++{
++	const char *bid, *obj_name;
++	struct soc_device_info *device_info;
++	struct soc_button_data *priv;
++	int error;
++	int i;
++
++	if (!id->driver_data)
++		return -EINVAL;
++
++	device_info = (struct soc_device_info *)id->driver_data;
++
++	if (device_info->obj_names) {
++		bid = acpi_device_bid(ACPI_COMPANION(&client->dev));
++		i = 0;
++		do {
++			obj_name = device_info->obj_names[i++];
++			if (obj_name && !strcmp(bid, obj_name))
++				break;
++		} while (obj_name);
++		/* no acpi_device_bid match, bail out */
++		if (!obj_name)
++			return -ENODEV;
++	}
++
++	priv = soc_dev_button_data_allocate(&client->dev);
++	if (!priv)
++		return -ENOMEM;
++
++	error = soc_dev_button_enumerate(&client->dev, priv, NULL,
++					 device_info->buttons);
++	if (error)
++		return error;
++
++	i2c_set_clientdata(client, priv);
++
++	return 0;
++}
++
++static int surface3_remove(struct i2c_client *client)
++{
++	return soc_dev_button_remove(i2c_get_clientdata(client));
++}
++
++static struct soc_button_info soc_button_surface3[] = {
++	{ "power", 0, EV_KEY, KEY_POWER, false, true, true },
++	{ "home", 1, EV_KEY, KEY_LEFTMETA, false, true, false },
++	{ "volume_up", 2, EV_KEY, KEY_VOLUMEUP, true, false, true },
++	{ "volume_down", 3, EV_KEY, KEY_VOLUMEDOWN, true, false, true },
++	{ }
++};
++
++static const char * const soc_device_obj_names_surface3[] = {
++	"TEV2",
++	0,
++};
++
++static const struct soc_device_info soc_device_surface3 = {
++	.obj_names = soc_device_obj_names_surface3,
++	.buttons = soc_button_surface3,
++};
++
++static const struct i2c_device_id surface3_id[] = {
++	{ "MSHW0028:00", (unsigned long)&soc_device_surface3 },
++	{ }
++};
++MODULE_DEVICE_TABLE(i2c, surface3_id);
++
++#ifdef CONFIG_ACPI
++static const struct acpi_device_id surface3_acpi_match[] = {
++	{ "MSHW0028", 0 },
++	{ }
++};
++MODULE_DEVICE_TABLE(acpi, surface3_acpi_match);
++#endif
++
++static struct i2c_driver surface3_driver = {
++	.probe = surface3_probe,
++	.remove = surface3_remove,
++	.id_table = surface3_id,
++	.driver = {
++		.name = "surface3",
++		.acpi_match_table = ACPI_PTR(surface3_acpi_match),
++	},
++};
++module_i2c_driver(surface3_driver);
++
++MODULE_AUTHOR("Benjamin Tissoires <benjamin.tissoires@gmail.com>");
++MODULE_DESCRIPTION("surface3 button array driver");
++MODULE_LICENSE("GPL v2");
+-- 
+2.7.4
+

0006-drm-i915-Track-whether-an-atomic-transaction-changes.patch

@@ -0,0 +1,58 @@
+From 21b8f4f57b5f37796b4aa6d24ad8b326fe68902b Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:06:00 -0700
+Subject: [PATCH 06/17] drm/i915: Track whether an atomic transaction changes
+ the active CRTC's
+
+For the purposes of DDB re-allocation we need to know whether a
+transaction changes the list of CRTC's that are active.  While
+state->modeset could be used for this purpose, that would be slightly
+too aggressive since it would lead us to re-allocate the DDB when a
+CRTC's mode changes, but not its final active state.
+
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-7-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/intel_display.c |  3 +++
+ drivers/gpu/drm/i915/intel_drv.h     | 10 ++++++++++
+ 2 files changed, 13 insertions(+)
+
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index 4633aec..f26d1c5 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -13300,6 +13300,9 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
+ 			intel_state->active_crtcs |= 1 << i;
+ 		else
+ 			intel_state->active_crtcs &= ~(1 << i);
++
++		if (crtc_state->active != crtc->state->active)
++			intel_state->active_pipe_changes |= drm_crtc_mask(crtc);
+ 	}
+ 
+ 	/*
+diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
+index 9308cff..d19e83e 100644
+--- a/drivers/gpu/drm/i915/intel_drv.h
++++ b/drivers/gpu/drm/i915/intel_drv.h
+@@ -291,6 +291,16 @@ struct intel_atomic_state {
+ 
+ 	bool dpll_set, modeset;
+ 
++	/*
++	 * Does this transaction change the pipes that are active?  This mask
++	 * tracks which CRTC's have changed their active state at the end of
++	 * the transaction (not counting the temporary disable during modesets).
++	 * This mask should only be non-zero when intel_state->modeset is true,
++	 * but the converse is not necessarily true; simply changing a mode may
++	 * not flip the final active status of any CRTC's
++	 */
++	unsigned int active_pipe_changes;
++
+ 	unsigned int active_crtcs;
+ 	unsigned int min_pixclk[I915_MAX_PIPES];
+ 
+-- 
+2.7.4
+

0007-drm-i915-gen9-Allow-skl_allocate_pipe_ddb-to-operate.patch

@@ -0,0 +1,342 @@
+From c336cf7907da066978af5f2d7d4acd88c78b8c86 Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:06:01 -0700
+Subject: [PATCH 07/17] drm/i915/gen9: Allow skl_allocate_pipe_ddb() to operate
+ on in-flight state (v3)
+
+We eventually want to calculate watermark values at atomic 'check' time
+instead of atomic 'commit' time so that any requested configurations
+that result in impossible watermark requirements are properly rejected.
+The first step along this path is to allocate the DDB at atomic 'check'
+time.  As we perform this transition, allow the main allocation function
+to operate successfully on either an in-flight state or an
+already-commited state.  Once we complete the transition in a future
+patch, we'll come back and remove the unnecessary logic for the
+already-committed case.
+
+v2: Rebase/refactor; we should no longer need to grab extra plane states
+    while allocating the DDB since we can pull cached data rates and
+    minimum block counts from the CRTC state for any planes that aren't
+    being modified by this transaction.
+
+v3:
+ - Simplify memsets to clear DDB plane entries.  (Maarten)
+ - Drop a redundant memset of plane[pipe][PLANE_CURSOR] that was added
+   by an earlier Coccinelle patch.  (Maarten)
+ - Assign *num_active at the top of skl_ddb_get_pipe_allocation_limits()
+   so that no code paths return without setting it.  (kbuild robot)
+
+Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-8-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/i915_drv.h |   6 ++
+ drivers/gpu/drm/i915/intel_pm.c | 179 +++++++++++++++++++++++++++++-----------
+ 2 files changed, 139 insertions(+), 46 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
+index 7c334e9..611c128 100644
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -324,6 +324,12 @@ struct i915_hotplug {
+ 			    &dev->mode_config.plane_list,	\
+ 			    base.head)
+ 
++#define for_each_intel_plane_mask(dev, intel_plane, plane_mask)		\
++	list_for_each_entry(intel_plane, &dev->mode_config.plane_list,	\
++			    base.head)					\
++		for_each_if ((plane_mask) &				\
++			     (1 << drm_plane_index(&intel_plane->base)))
++
+ #define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane)	\
+ 	list_for_each_entry(intel_plane,				\
+ 			    &(dev)->mode_config.plane_list,		\
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index 6c7a048..f009d43 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -2849,13 +2849,25 @@ skl_wm_plane_id(const struct intel_plane *plane)
+ static void
+ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
+ 				   const struct intel_crtc_state *cstate,
+-				   const struct intel_wm_config *config,
+-				   struct skl_ddb_entry *alloc /* out */)
++				   struct intel_wm_config *config,
++				   struct skl_ddb_entry *alloc, /* out */
++				   int *num_active /* out */)
+ {
++	struct drm_atomic_state *state = cstate->base.state;
++	struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
++	struct drm_i915_private *dev_priv = to_i915(dev);
+ 	struct drm_crtc *for_crtc = cstate->base.crtc;
+ 	struct drm_crtc *crtc;
+ 	unsigned int pipe_size, ddb_size;
+ 	int nth_active_pipe;
++	int pipe = to_intel_crtc(for_crtc)->pipe;
++
++	if (intel_state && intel_state->active_pipe_changes)
++		*num_active = hweight32(intel_state->active_crtcs);
++	else if (intel_state)
++		*num_active = hweight32(dev_priv->active_crtcs);
++	else
++		*num_active = config->num_pipes_active;
+ 
+ 	if (!cstate->base.active) {
+ 		alloc->start = 0;
+@@ -2870,25 +2882,56 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
+ 
+ 	ddb_size -= 4; /* 4 blocks for bypass path allocation */
+ 
+-	nth_active_pipe = 0;
+-	for_each_crtc(dev, crtc) {
+-		if (!to_intel_crtc(crtc)->active)
+-			continue;
++	/*
++	 * FIXME: At the moment we may be called on either in-flight or fully
++	 * committed cstate's.  Once we fully move DDB allocation in the check
++	 * phase, we'll only be called on in-flight states and the 'else'
++	 * branch here will go away.
++	 *
++	 * The 'else' branch is slightly racy here, but it was racy to begin
++	 * with; since it's going away soon, no effort is made to address that.
++	 */
++	if (state) {
++		/*
++		 * If the state doesn't change the active CRTC's, then there's
++		 * no need to recalculate; the existing pipe allocation limits
++		 * should remain unchanged.  Note that we're safe from racing
++		 * commits since any racing commit that changes the active CRTC
++		 * list would need to grab _all_ crtc locks, including the one
++		 * we currently hold.
++		 */
++		if (!intel_state->active_pipe_changes) {
++			*alloc = dev_priv->wm.skl_hw.ddb.pipe[pipe];
++			return;
++		}
+ 
+-		if (crtc == for_crtc)
+-			break;
++		nth_active_pipe = hweight32(intel_state->active_crtcs &
++					    (drm_crtc_mask(for_crtc) - 1));
++		pipe_size = ddb_size / hweight32(intel_state->active_crtcs);
++		alloc->start = nth_active_pipe * ddb_size / *num_active;
++		alloc->end = alloc->start + pipe_size;
++	} else {
++		nth_active_pipe = 0;
++		for_each_crtc(dev, crtc) {
++			if (!to_intel_crtc(crtc)->active)
++				continue;
+ 
+-		nth_active_pipe++;
+-	}
++			if (crtc == for_crtc)
++				break;
+ 
+-	pipe_size = ddb_size / config->num_pipes_active;
+-	alloc->start = nth_active_pipe * ddb_size / config->num_pipes_active;
+-	alloc->end = alloc->start + pipe_size;
++			nth_active_pipe++;
++		}
++
++		pipe_size = ddb_size / config->num_pipes_active;
++		alloc->start = nth_active_pipe * ddb_size /
++			config->num_pipes_active;
++		alloc->end = alloc->start + pipe_size;
++	}
+ }
+ 
+-static unsigned int skl_cursor_allocation(const struct intel_wm_config *config)
++static unsigned int skl_cursor_allocation(int num_active)
+ {
+-	if (config->num_pipes_active == 1)
++	if (num_active == 1)
+ 		return 32;
+ 
+ 	return 8;
+@@ -3054,33 +3097,44 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate)
+ 	return total_data_rate;
+ }
+ 
+-static void
++static int
+ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 		      struct skl_ddb_allocation *ddb /* out */)
+ {
++	struct drm_atomic_state *state = cstate->base.state;
+ 	struct drm_crtc *crtc = cstate->base.crtc;
+ 	struct drm_device *dev = crtc->dev;
+ 	struct drm_i915_private *dev_priv = to_i915(dev);
+ 	struct intel_wm_config *config = &dev_priv->wm.config;
+ 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ 	struct intel_plane *intel_plane;
++	struct drm_plane *plane;
++	struct drm_plane_state *pstate;
+ 	enum pipe pipe = intel_crtc->pipe;
+ 	struct skl_ddb_entry *alloc = &ddb->pipe[pipe];
+ 	uint16_t alloc_size, start, cursor_blocks;
+ 	uint16_t *minimum = cstate->wm.skl.minimum_blocks;
+ 	uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks;
+ 	unsigned int total_data_rate;
++	int num_active;
++	int id, i;
+ 
+-	skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc);
++	if (!cstate->base.active) {
++		ddb->pipe[pipe].start = ddb->pipe[pipe].end = 0;
++		memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));
++		memset(ddb->y_plane[pipe], 0, sizeof(ddb->y_plane[pipe]));
++		return 0;
++	}
++
++	skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc,
++					   &num_active);
+ 	alloc_size = skl_ddb_entry_size(alloc);
+ 	if (alloc_size == 0) {
+ 		memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));
+-		memset(&ddb->plane[pipe][PLANE_CURSOR], 0,
+-		       sizeof(ddb->plane[pipe][PLANE_CURSOR]));
+-		return;
++		return 0;
+ 	}
+ 
+-	cursor_blocks = skl_cursor_allocation(config);
++	cursor_blocks = skl_cursor_allocation(num_active);
+ 	ddb->plane[pipe][PLANE_CURSOR].start = alloc->end - cursor_blocks;
+ 	ddb->plane[pipe][PLANE_CURSOR].end = alloc->end;
+ 
+@@ -3088,21 +3142,55 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 	alloc->end -= cursor_blocks;
+ 
+ 	/* 1. Allocate the mininum required blocks for each active plane */
+-	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
+-		struct drm_plane *plane = &intel_plane->base;
+-		struct drm_framebuffer *fb = plane->state->fb;
+-		int id = skl_wm_plane_id(intel_plane);
++	/*
++	 * TODO: Remove support for already-committed state once we
++	 * only allocate DDB on in-flight states.
++	 */
++	if (state) {
++		for_each_plane_in_state(state, plane, pstate, i) {
++			intel_plane = to_intel_plane(plane);
++			id = skl_wm_plane_id(intel_plane);
+ 
+-		if (!to_intel_plane_state(plane->state)->visible)
+-			continue;
++			if (intel_plane->pipe != pipe)
++				continue;
+ 
+-		if (plane->type == DRM_PLANE_TYPE_CURSOR)
+-			continue;
++			if (!to_intel_plane_state(pstate)->visible) {
++				minimum[id] = 0;
++				y_minimum[id] = 0;
++				continue;
++			}
++			if (plane->type == DRM_PLANE_TYPE_CURSOR) {
++				minimum[id] = 0;
++				y_minimum[id] = 0;
++				continue;
++			}
++
++			minimum[id] = 8;
++			if (pstate->fb->pixel_format == DRM_FORMAT_NV12)
++				y_minimum[id] = 8;
++			else
++				y_minimum[id] = 0;
++		}
++	} else {
++		for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
++			struct drm_plane *plane = &intel_plane->base;
++			struct drm_framebuffer *fb = plane->state->fb;
++			int id = skl_wm_plane_id(intel_plane);
++
++			if (!to_intel_plane_state(plane->state)->visible)
++				continue;
++
++			if (plane->type == DRM_PLANE_TYPE_CURSOR)
++				continue;
++
++			minimum[id] = 8;
++			y_minimum[id] = (fb->pixel_format == DRM_FORMAT_NV12) ? 8 : 0;
++		}
++	}
+ 
+-		minimum[id] = 8;
+-		alloc_size -= minimum[id];
+-		y_minimum[id] = (fb->pixel_format == DRM_FORMAT_NV12) ? 8 : 0;
+-		alloc_size -= y_minimum[id];
++	for (i = 0; i < PLANE_CURSOR; i++) {
++		alloc_size -= minimum[i];
++		alloc_size -= y_minimum[i];
+ 	}
+ 
+ 	/*
+@@ -3113,21 +3201,14 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 	 */
+ 	total_data_rate = skl_get_total_relative_data_rate(cstate);
+ 	if (total_data_rate == 0)
+-		return;
++		return 0;
+ 
+ 	start = alloc->start;
+ 	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
+-		struct drm_plane *plane = &intel_plane->base;
+-		struct drm_plane_state *pstate = intel_plane->base.state;
+ 		unsigned int data_rate, y_data_rate;
+ 		uint16_t plane_blocks, y_plane_blocks = 0;
+ 		int id = skl_wm_plane_id(intel_plane);
+ 
+-		if (!to_intel_plane_state(pstate)->visible)
+-			continue;
+-		if (plane->type == DRM_PLANE_TYPE_CURSOR)
+-			continue;
+-
+ 		data_rate = cstate->wm.skl.plane_data_rate[id];
+ 
+ 		/*
+@@ -3139,8 +3220,11 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 		plane_blocks += div_u64((uint64_t)alloc_size * data_rate,
+ 					total_data_rate);
+ 
+-		ddb->plane[pipe][id].start = start;
+-		ddb->plane[pipe][id].end = start + plane_blocks;
++		/* Leave disabled planes at (0,0) */
++		if (data_rate) {
++			ddb->plane[pipe][id].start = start;
++			ddb->plane[pipe][id].end = start + plane_blocks;
++		}
+ 
+ 		start += plane_blocks;
+ 
+@@ -3153,12 +3237,15 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 		y_plane_blocks += div_u64((uint64_t)alloc_size * y_data_rate,
+ 					total_data_rate);
+ 
+-		ddb->y_plane[pipe][id].start = start;
+-		ddb->y_plane[pipe][id].end = start + y_plane_blocks;
++		if (y_data_rate) {
++			ddb->y_plane[pipe][id].start = start;
++			ddb->y_plane[pipe][id].end = start + y_plane_blocks;
++		}
+ 
+ 		start += y_plane_blocks;
+ 	}
+ 
++	return 0;
+ }
+ 
+ static uint32_t skl_pipe_pixel_rate(const struct intel_crtc_state *config)
+@@ -3649,7 +3736,7 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc,
+ 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ 	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
+ 
+-	skl_allocate_pipe_ddb(cstate, ddb);
++	WARN_ON(skl_allocate_pipe_ddb(cstate, ddb) != 0);
+ 	skl_build_pipe_wm(cstate, ddb, pipe_wm);
+ 
+ 	if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm)))
+-- 
+2.7.4
+

0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch

@@ -0,0 +1,84 @@
+From 7207eecfcb3095442bce30227b551003edc7b908 Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:06:02 -0700
+Subject: [PATCH 08/17] drm/i915: Add distrust_bios_wm flag to dev_priv (v2)
+
+SKL-style platforms can't fully trust the watermark/DDB settings
+programmed by the BIOS and need to do extra sanitization on their first
+atomic update.  Add a flag to dev_priv that is set during hardware
+readout and cleared at the end of the first commit.
+
+Note that for the somewhat common case where everything is turned off
+when the driver starts up, we don't need to bother with a recompute...we
+know exactly what the DDB should be (all zero's) so just setup the DDB
+directly in that case.
+
+v2:
+ - Move clearing of distrust_bios_wm up below the swap_state call since
+   it's a more natural / self-explanatory location.  (Maarten)
+ - Use dev_priv->active_crtcs to test whether any CRTC's are turned on
+   during HW WM readout rather than trying to count the active CRTC's
+   again ourselves.  (Maarten)
+
+Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-9-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/i915_drv.h      | 7 +++++++
+ drivers/gpu/drm/i915/intel_display.c | 1 +
+ drivers/gpu/drm/i915/intel_pm.c      | 8 ++++++++
+ 3 files changed, 16 insertions(+)
+
+diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
+index 611c128..e21960d 100644
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -1981,6 +1981,13 @@ struct drm_i915_private {
+ 		 * cstate->wm.need_postvbl_update.
+ 		 */
+ 		struct mutex wm_mutex;
++
++		/*
++		 * Set during HW readout of watermarks/DDB.  Some platforms
++		 * need to know when we're still using BIOS-provided values
++		 * (which we don't fully trust).
++		 */
++		bool distrust_bios_wm;
+ 	} wm;
+ 
+ 	struct i915_runtime_pm pm;
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index f26d1c5..a9d2e30 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -13621,6 +13621,7 @@ static int intel_atomic_commit(struct drm_device *dev,
+ 
+ 	drm_atomic_helper_swap_state(dev, state);
+ 	dev_priv->wm.config = intel_state->wm_config;
++	dev_priv->wm.distrust_bios_wm = false;
+ 	intel_shared_dpll_commit(state);
+ 
+ 	if (intel_state->modeset) {
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index f009d43..a49faa7 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -4026,6 +4026,14 @@ void skl_wm_get_hw_state(struct drm_device *dev)
+ 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
+ 		skl_pipe_wm_get_hw_state(crtc);
+ 
++	if (dev_priv->active_crtcs) {
++		/* Fully recompute DDB on first atomic commit */
++		dev_priv->wm.distrust_bios_wm = true;
++	} else {
++		/* Easy/common case; just sanitize DDB now if everything off */
++		memset(ddb, 0, sizeof(*ddb));
++	}
++
+ 	/* Calculate plane data rates */
+ 	for_each_intel_crtc(dev, intel_crtc) {
+ 		struct intel_crtc_state *cstate = intel_crtc->config;
+-- 
+2.7.4
+

0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch

@@ -0,0 +1,244 @@
+From fbf53d8f1b7d1bcea1411f1f2cd0df6a6cc95332 Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:06:03 -0700
+Subject: [PATCH 09/17] drm/i915/gen9: Compute DDB allocation at atomic check
+ time (v4)
+
+Calculate the DDB blocks needed to satisfy the current atomic
+transaction at atomic check time.  This is a prerequisite to calculating
+SKL watermarks during the 'check' phase and rejecting any configurations
+that we can't find valid watermarks for.
+
+Due to the nature of DDB allocation, it's possible for the addition of a
+new CRTC to make the watermark configuration already in use on another,
+unchanged CRTC become invalid.  A change in which CRTC's are active
+triggers a recompute of the entire DDB, which unfortunately means we
+need to disallow any other atomic commits from racing with such an
+update.  If the active CRTC's change, we need to grab the lock on all
+CRTC's and run all CRTC's through their 'check' handler to recompute and
+re-check their per-CRTC DDB allocations.
+
+Note that with this patch we only compute the DDB allocation but we
+don't actually use the computed values during watermark programming yet.
+For ease of review/testing/bisecting, we still recompute the DDB at
+watermark programming time and just WARN() if it doesn't match the
+precomputed values.  A future patch will switch over to using the
+precomputed values once we're sure they're being properly computed.
+
+Another clarifying note:  DDB allocation itself shouldn't ever fail with
+the algorithm we use today (i.e., we have enough DDB blocks on BXT to
+support the minimum needs of the worst-case scenario of every pipe/plane
+enabled at full size).  However the watermarks calculations based on the
+DDB may fail and we'll be moving those to the atomic check as well in
+future patches.
+
+v2:
+ - Skip DDB calculations in the rare case where our transaction doesn't
+   actually touch any CRTC's at all.  Assuming at least one CRTC state
+   is present in our transaction, then it means we can't race with any
+   transactions that would update dev_priv->active_crtcs (which requires
+   _all_ CRTC locks).
+
+v3:
+ - Also calculate DDB during initial hw readout, to prevent using
+   incorrect bios values. (Maarten)
+
+v4:
+ - Use new distrust_bios_wm flag instead of skip_initial_wm (which was
+   never actually set).
+ - Set intel_state->active_pipe_changes instead of just realloc_pipes
+
+Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Cc: Lyude Paul <cpaul@redhat.com>
+Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-10-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/i915_drv.h      |  5 +++
+ drivers/gpu/drm/i915/intel_display.c | 18 ++++++++
+ drivers/gpu/drm/i915/intel_drv.h     |  3 ++
+ drivers/gpu/drm/i915/intel_pm.c      | 79 ++++++++++++++++++++++++++++++++++++
+ 4 files changed, 105 insertions(+)
+
+diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
+index e21960d..b908a41 100644
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -339,6 +339,10 @@ struct i915_hotplug {
+ #define for_each_intel_crtc(dev, intel_crtc) \
+ 	list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head)
+ 
++#define for_each_intel_crtc_mask(dev, intel_crtc, crtc_mask) \
++	list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head) \
++		for_each_if ((crtc_mask) & (1 << drm_crtc_index(&intel_crtc->base)))
++
+ #define for_each_intel_encoder(dev, intel_encoder)		\
+ 	list_for_each_entry(intel_encoder,			\
+ 			    &(dev)->mode_config.encoder_list,	\
+@@ -594,6 +598,7 @@ struct drm_i915_display_funcs {
+ 				       struct intel_crtc_state *newstate);
+ 	void (*initial_watermarks)(struct intel_crtc_state *cstate);
+ 	void (*optimize_watermarks)(struct intel_crtc_state *cstate);
++	int (*compute_global_watermarks)(struct drm_atomic_state *state);
+ 	void (*update_wm)(struct drm_crtc *crtc);
+ 	int (*modeset_calc_cdclk)(struct drm_atomic_state *state);
+ 	void (*modeset_commit_cdclk)(struct drm_atomic_state *state);
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index a9d2e30..ecad0ef 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -13342,6 +13342,7 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
+ static void calc_watermark_data(struct drm_atomic_state *state)
+ {
+ 	struct drm_device *dev = state->dev;
++	struct drm_i915_private *dev_priv = to_i915(dev);
+ 	struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
+ 	struct drm_crtc *crtc;
+ 	struct drm_crtc_state *cstate;
+@@ -13371,6 +13372,10 @@ static void calc_watermark_data(struct drm_atomic_state *state)
+ 		    pstate->crtc_h != pstate->src_h >> 16)
+ 			intel_state->wm_config.sprites_scaled = true;
+ 	}
++
++	/* Is there platform-specific watermark information to calculate? */
++	if (dev_priv->display.compute_global_watermarks)
++		dev_priv->display.compute_global_watermarks(state);
+ }
+ 
+ /**
+@@ -13739,6 +13744,19 @@ static int intel_atomic_commit(struct drm_device *dev,
+ 		intel_modeset_verify_crtc(crtc, old_crtc_state, crtc->state);
+ 	}
+ 
++	/*
++	 * Temporary sanity check: make sure our pre-computed DDB matches the
++	 * one we actually wind up programming.
++	 *
++	 * Not a great place to put this, but the easiest place we have access
++	 * to both the pre-computed and final DDB's; we'll be removing this
++	 * check in the next patch anyway.
++	 */
++	WARN(IS_GEN9(dev) &&
++	     memcmp(&intel_state->ddb, &dev_priv->wm.skl_results.ddb,
++		    sizeof(intel_state->ddb)),
++	     "Pre-computed DDB does not match final DDB!\n");
++
+ 	if (intel_state->modeset)
+ 		intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
+ 
+diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
+index d19e83e..2218290 100644
+--- a/drivers/gpu/drm/i915/intel_drv.h
++++ b/drivers/gpu/drm/i915/intel_drv.h
+@@ -312,6 +312,9 @@ struct intel_atomic_state {
+ 	 * don't bother calculating intermediate watermarks.
+ 	 */
+ 	bool skip_intermediate_wm;
++
++	/* Gen9+ only */
++	struct skl_ddb_allocation ddb;
+ };
+ 
+ struct intel_plane_state {
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index a49faa7..cfa4f80 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -3812,6 +3812,84 @@ static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe)
+ 
+ }
+ 
++static int
++skl_compute_ddb(struct drm_atomic_state *state)
++{
++	struct drm_device *dev = state->dev;
++	struct drm_i915_private *dev_priv = to_i915(dev);
++	struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
++	struct intel_crtc *intel_crtc;
++	unsigned realloc_pipes = dev_priv->active_crtcs;
++	int ret;
++
++	/*
++	 * If this is our first atomic update following hardware readout,
++	 * we can't trust the DDB that the BIOS programmed for us.  Let's
++	 * pretend that all pipes switched active status so that we'll
++	 * ensure a full DDB recompute.
++	 */
++	if (dev_priv->wm.distrust_bios_wm)
++		intel_state->active_pipe_changes = ~0;
++
++	/*
++	 * If the modeset changes which CRTC's are active, we need to
++	 * recompute the DDB allocation for *all* active pipes, even
++	 * those that weren't otherwise being modified in any way by this
++	 * atomic commit.  Due to the shrinking of the per-pipe allocations
++	 * when new active CRTC's are added, it's possible for a pipe that
++	 * we were already using and aren't changing at all here to suddenly
++	 * become invalid if its DDB needs exceeds its new allocation.
++	 *
++	 * Note that if we wind up doing a full DDB recompute, we can't let
++	 * any other display updates race with this transaction, so we need
++	 * to grab the lock on *all* CRTC's.
++	 */
++	if (intel_state->active_pipe_changes)
++		realloc_pipes = ~0;
++
++	for_each_intel_crtc_mask(dev, intel_crtc, realloc_pipes) {
++		struct intel_crtc_state *cstate;
++
++		cstate = intel_atomic_get_crtc_state(state, intel_crtc);
++		if (IS_ERR(cstate))
++			return PTR_ERR(cstate);
++
++		ret = skl_allocate_pipe_ddb(cstate, &intel_state->ddb);
++		if (ret)
++			return ret;
++	}
++
++	return 0;
++}
++
++static int
++skl_compute_wm(struct drm_atomic_state *state)
++{
++	struct drm_crtc *crtc;
++	struct drm_crtc_state *cstate;
++	int ret, i;
++	bool changed = false;
++
++	/*
++	 * If this transaction isn't actually touching any CRTC's, don't
++	 * bother with watermark calculation.  Note that if we pass this
++	 * test, we're guaranteed to hold at least one CRTC state mutex,
++	 * which means we can safely use values like dev_priv->active_crtcs
++	 * since any racing commits that want to update them would need to
++	 * hold _all_ CRTC state mutexes.
++	 */
++	for_each_crtc_in_state(state, crtc, cstate, i)
++		changed = true;
++	if (!changed)
++		return 0;
++
++	ret = skl_compute_ddb(state);
++	if (ret)
++		return ret;
++
++	return 0;
++}
++
+ static void skl_update_wm(struct drm_crtc *crtc)
+ {
+ 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+@@ -7384,6 +7462,7 @@ void intel_init_pm(struct drm_device *dev)
+ 	if (INTEL_INFO(dev)->gen >= 9) {
+ 		skl_setup_wm_latency(dev);
+ 		dev_priv->display.update_wm = skl_update_wm;
++		dev_priv->display.compute_global_watermarks = skl_compute_wm;
+ 	} else if (HAS_PCH_SPLIT(dev)) {
+ 		ilk_setup_wm_latency(dev);
+ 
+-- 
+2.7.4
+

0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch

@@ -0,0 +1,379 @@
+From a9abdc6767855e1668301a1dcc4b5fa8bed1ddfa Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:06:04 -0700
+Subject: [PATCH 10/17] drm/i915/gen9: Drop re-allocation of DDB at atomic
+ commit (v2)
+
+Now that we're properly pre-allocating the DDB during the atomic check
+phase and we trust that the allocation is appropriate, let's actually
+use the allocation computed and not duplicate that work during the
+commit phase.
+
+v2:
+ - Significant rebasing now that we can use cached data rates and
+   minimum block allocations to avoid grabbing additional plane states.
+
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-11-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/intel_display.c |  14 +--
+ drivers/gpu/drm/i915/intel_pm.c      | 224 +++++++++++------------------------
+ 2 files changed, 67 insertions(+), 171 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index ecad0ef..4db10d7 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -13627,6 +13627,7 @@ static int intel_atomic_commit(struct drm_device *dev,
+ 	drm_atomic_helper_swap_state(dev, state);
+ 	dev_priv->wm.config = intel_state->wm_config;
+ 	dev_priv->wm.distrust_bios_wm = false;
++	dev_priv->wm.skl_results.ddb = intel_state->ddb;
+ 	intel_shared_dpll_commit(state);
+ 
+ 	if (intel_state->modeset) {
+@@ -13744,19 +13745,6 @@ static int intel_atomic_commit(struct drm_device *dev,
+ 		intel_modeset_verify_crtc(crtc, old_crtc_state, crtc->state);
+ 	}
+ 
+-	/*
+-	 * Temporary sanity check: make sure our pre-computed DDB matches the
+-	 * one we actually wind up programming.
+-	 *
+-	 * Not a great place to put this, but the easiest place we have access
+-	 * to both the pre-computed and final DDB's; we'll be removing this
+-	 * check in the next patch anyway.
+-	 */
+-	WARN(IS_GEN9(dev) &&
+-	     memcmp(&intel_state->ddb, &dev_priv->wm.skl_results.ddb,
+-		    sizeof(intel_state->ddb)),
+-	     "Pre-computed DDB does not match final DDB!\n");
+-
+ 	if (intel_state->modeset)
+ 		intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
+ 
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index cfa4f80..0f0d4e1 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -2849,7 +2849,6 @@ skl_wm_plane_id(const struct intel_plane *plane)
+ static void
+ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
+ 				   const struct intel_crtc_state *cstate,
+-				   struct intel_wm_config *config,
+ 				   struct skl_ddb_entry *alloc, /* out */
+ 				   int *num_active /* out */)
+ {
+@@ -2857,24 +2856,22 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
+ 	struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
+ 	struct drm_i915_private *dev_priv = to_i915(dev);
+ 	struct drm_crtc *for_crtc = cstate->base.crtc;
+-	struct drm_crtc *crtc;
+ 	unsigned int pipe_size, ddb_size;
+ 	int nth_active_pipe;
+ 	int pipe = to_intel_crtc(for_crtc)->pipe;
+ 
+-	if (intel_state && intel_state->active_pipe_changes)
+-		*num_active = hweight32(intel_state->active_crtcs);
+-	else if (intel_state)
+-		*num_active = hweight32(dev_priv->active_crtcs);
+-	else
+-		*num_active = config->num_pipes_active;
+-
+-	if (!cstate->base.active) {
++	if (WARN_ON(!state) || !cstate->base.active) {
+ 		alloc->start = 0;
+ 		alloc->end = 0;
++		*num_active = hweight32(dev_priv->active_crtcs);
+ 		return;
+ 	}
+ 
++	if (intel_state->active_pipe_changes)
++		*num_active = hweight32(intel_state->active_crtcs);
++	else
++		*num_active = hweight32(dev_priv->active_crtcs);
++
+ 	if (IS_BROXTON(dev))
+ 		ddb_size = BXT_DDB_SIZE;
+ 	else
+@@ -2883,50 +2880,23 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
+ 	ddb_size -= 4; /* 4 blocks for bypass path allocation */
+ 
+ 	/*
+-	 * FIXME: At the moment we may be called on either in-flight or fully
+-	 * committed cstate's.  Once we fully move DDB allocation in the check
+-	 * phase, we'll only be called on in-flight states and the 'else'
+-	 * branch here will go away.
+-	 *
+-	 * The 'else' branch is slightly racy here, but it was racy to begin
+-	 * with; since it's going away soon, no effort is made to address that.
++	 * If the state doesn't change the active CRTC's, then there's
++	 * no need to recalculate; the existing pipe allocation limits
++	 * should remain unchanged.  Note that we're safe from racing
++	 * commits since any racing commit that changes the active CRTC
++	 * list would need to grab _all_ crtc locks, including the one
++	 * we currently hold.
+ 	 */
+-	if (state) {
+-		/*
+-		 * If the state doesn't change the active CRTC's, then there's
+-		 * no need to recalculate; the existing pipe allocation limits
+-		 * should remain unchanged.  Note that we're safe from racing
+-		 * commits since any racing commit that changes the active CRTC
+-		 * list would need to grab _all_ crtc locks, including the one
+-		 * we currently hold.
+-		 */
+-		if (!intel_state->active_pipe_changes) {
+-			*alloc = dev_priv->wm.skl_hw.ddb.pipe[pipe];
+-			return;
+-		}
+-
+-		nth_active_pipe = hweight32(intel_state->active_crtcs &
+-					    (drm_crtc_mask(for_crtc) - 1));
+-		pipe_size = ddb_size / hweight32(intel_state->active_crtcs);
+-		alloc->start = nth_active_pipe * ddb_size / *num_active;
+-		alloc->end = alloc->start + pipe_size;
+-	} else {
+-		nth_active_pipe = 0;
+-		for_each_crtc(dev, crtc) {
+-			if (!to_intel_crtc(crtc)->active)
+-				continue;
+-
+-			if (crtc == for_crtc)
+-				break;
+-
+-			nth_active_pipe++;
+-		}
+-
+-		pipe_size = ddb_size / config->num_pipes_active;
+-		alloc->start = nth_active_pipe * ddb_size /
+-			config->num_pipes_active;
+-		alloc->end = alloc->start + pipe_size;
++	if (!intel_state->active_pipe_changes) {
++		*alloc = dev_priv->wm.skl_hw.ddb.pipe[pipe];
++		return;
+ 	}
++
++	nth_active_pipe = hweight32(intel_state->active_crtcs &
++				    (drm_crtc_mask(for_crtc) - 1));
++	pipe_size = ddb_size / hweight32(intel_state->active_crtcs);
++	alloc->start = nth_active_pipe * ddb_size / *num_active;
++	alloc->end = alloc->start + pipe_size;
+ }
+ 
+ static unsigned int skl_cursor_allocation(int num_active)
+@@ -3025,62 +2995,33 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate)
+ 	struct drm_crtc *crtc = cstate->crtc;
+ 	struct drm_device *dev = crtc->dev;
+ 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
++	const struct drm_plane *plane;
+ 	const struct intel_plane *intel_plane;
++	struct drm_plane_state *pstate;
+ 	unsigned int rate, total_data_rate = 0;
+ 	int id;
++	int i;
++
++	if (WARN_ON(!state))
++		return 0;
+ 
+ 	/* Calculate and cache data rate for each plane */
+-	/*
+-	 * FIXME: At the moment this function can be called on either an
+-	 * in-flight or a committed state object.  If it's in-flight then we
+-	 * only want to re-calculate the plane data rate for planes that are
+-	 * part of the transaction (i.e., we don't want to grab any additional
+-	 * plane states if we don't have to).  If we're operating on committed
+-	 * state, we'll just go ahead and recalculate the plane data rate for
+-	 * all planes.
+-	 *
+-	 * Once we finish moving our DDB allocation to the atomic check phase,
+-	 * we'll only be calling this function on in-flight state objects, so
+-	 * the 'else' branch here will go away.
+-	 */
+-	if (state) {
+-		struct drm_plane *plane;
+-		struct drm_plane_state *pstate;
+-		int i;
+-
+-		for_each_plane_in_state(state, plane, pstate, i) {
+-			intel_plane = to_intel_plane(plane);
+-			id = skl_wm_plane_id(intel_plane);
+-
+-			if (intel_plane->pipe != intel_crtc->pipe)
+-				continue;
+-
+-			/* packed/uv */
+-			rate = skl_plane_relative_data_rate(intel_cstate,
+-							    pstate, 0);
+-			intel_cstate->wm.skl.plane_data_rate[id] = rate;
+-
+-			/* y-plane */
+-			rate = skl_plane_relative_data_rate(intel_cstate,
+-							    pstate, 1);
+-			intel_cstate->wm.skl.plane_y_data_rate[id] = rate;
+-		}
+-	} else {
+-		for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
+-			const struct drm_plane_state *pstate =
+-				intel_plane->base.state;
+-			int id = skl_wm_plane_id(intel_plane);
++	for_each_plane_in_state(state, plane, pstate, i) {
++		id = skl_wm_plane_id(to_intel_plane(plane));
++		intel_plane = to_intel_plane(plane);
+ 
+-			/* packed/uv */
+-			rate = skl_plane_relative_data_rate(intel_cstate,
+-							    pstate, 0);
+-			intel_cstate->wm.skl.plane_data_rate[id] = rate;
++		if (intel_plane->pipe != intel_crtc->pipe)
++			continue;
+ 
+-			/* y-plane */
+-			rate = skl_plane_relative_data_rate(intel_cstate,
+-							    pstate, 1);
+-			intel_cstate->wm.skl.plane_y_data_rate[id] = rate;
+-		}
++		/* packed/uv */
++		rate = skl_plane_relative_data_rate(intel_cstate,
++						    pstate, 0);
++		intel_cstate->wm.skl.plane_data_rate[id] = rate;
++
++		/* y-plane */
++		rate = skl_plane_relative_data_rate(intel_cstate,
++						    pstate, 1);
++		intel_cstate->wm.skl.plane_y_data_rate[id] = rate;
+ 	}
+ 
+ 	/* Calculate CRTC's total data rate from cached values */
+@@ -3104,8 +3045,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 	struct drm_atomic_state *state = cstate->base.state;
+ 	struct drm_crtc *crtc = cstate->base.crtc;
+ 	struct drm_device *dev = crtc->dev;
+-	struct drm_i915_private *dev_priv = to_i915(dev);
+-	struct intel_wm_config *config = &dev_priv->wm.config;
+ 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ 	struct intel_plane *intel_plane;
+ 	struct drm_plane *plane;
+@@ -3119,6 +3058,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 	int num_active;
+ 	int id, i;
+ 
++	if (WARN_ON(!state))
++		return 0;
++
+ 	if (!cstate->base.active) {
+ 		ddb->pipe[pipe].start = ddb->pipe[pipe].end = 0;
+ 		memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));
+@@ -3126,8 +3068,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 		return 0;
+ 	}
+ 
+-	skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc,
+-					   &num_active);
++	skl_ddb_get_pipe_allocation_limits(dev, cstate, alloc, &num_active);
+ 	alloc_size = skl_ddb_entry_size(alloc);
+ 	if (alloc_size == 0) {
+ 		memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));
+@@ -3139,53 +3080,31 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
+ 	ddb->plane[pipe][PLANE_CURSOR].end = alloc->end;
+ 
+ 	alloc_size -= cursor_blocks;
+-	alloc->end -= cursor_blocks;
+ 
+ 	/* 1. Allocate the mininum required blocks for each active plane */
+-	/*
+-	 * TODO: Remove support for already-committed state once we
+-	 * only allocate DDB on in-flight states.
+-	 */
+-	if (state) {
+-		for_each_plane_in_state(state, plane, pstate, i) {
+-			intel_plane = to_intel_plane(plane);
+-			id = skl_wm_plane_id(intel_plane);
+-
+-			if (intel_plane->pipe != pipe)
+-				continue;
+-
+-			if (!to_intel_plane_state(pstate)->visible) {
+-				minimum[id] = 0;
+-				y_minimum[id] = 0;
+-				continue;
+-			}
+-			if (plane->type == DRM_PLANE_TYPE_CURSOR) {
+-				minimum[id] = 0;
+-				y_minimum[id] = 0;
+-				continue;
+-			}
+-
+-			minimum[id] = 8;
+-			if (pstate->fb->pixel_format == DRM_FORMAT_NV12)
+-				y_minimum[id] = 8;
+-			else
+-				y_minimum[id] = 0;
+-		}
+-	} else {
+-		for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
+-			struct drm_plane *plane = &intel_plane->base;
+-			struct drm_framebuffer *fb = plane->state->fb;
+-			int id = skl_wm_plane_id(intel_plane);
+-
+-			if (!to_intel_plane_state(plane->state)->visible)
+-				continue;
++	for_each_plane_in_state(state, plane, pstate, i) {
++		intel_plane = to_intel_plane(plane);
++		id = skl_wm_plane_id(intel_plane);
+ 
+-			if (plane->type == DRM_PLANE_TYPE_CURSOR)
+-				continue;
++		if (intel_plane->pipe != pipe)
++			continue;
+ 
+-			minimum[id] = 8;
+-			y_minimum[id] = (fb->pixel_format == DRM_FORMAT_NV12) ? 8 : 0;
++		if (!to_intel_plane_state(pstate)->visible) {
++			minimum[id] = 0;
++			y_minimum[id] = 0;
++			continue;
++		}
++		if (plane->type == DRM_PLANE_TYPE_CURSOR) {
++			minimum[id] = 0;
++			y_minimum[id] = 0;
++			continue;
+ 		}
++
++		minimum[id] = 8;
++		if (pstate->fb->pixel_format == DRM_FORMAT_NV12)
++			y_minimum[id] = 8;
++		else
++			y_minimum[id] = 0;
+ 	}
+ 
+ 	for (i = 0; i < PLANE_CURSOR; i++) {
+@@ -3736,7 +3655,6 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc,
+ 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ 	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
+ 
+-	WARN_ON(skl_allocate_pipe_ddb(cstate, ddb) != 0);
+ 	skl_build_pipe_wm(cstate, ddb, pipe_wm);
+ 
+ 	if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm)))
+@@ -3800,16 +3718,6 @@ static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe)
+ 	memset(watermarks->plane_trans[pipe],
+ 	       0, sizeof(uint32_t) * I915_MAX_PLANES);
+ 	watermarks->plane_trans[pipe][PLANE_CURSOR] = 0;
+-
+-	/* Clear ddb entries for pipe */
+-	memset(&watermarks->ddb.pipe[pipe], 0, sizeof(struct skl_ddb_entry));
+-	memset(&watermarks->ddb.plane[pipe], 0,
+-	       sizeof(struct skl_ddb_entry) * I915_MAX_PLANES);
+-	memset(&watermarks->ddb.y_plane[pipe], 0,
+-	       sizeof(struct skl_ddb_entry) * I915_MAX_PLANES);
+-	memset(&watermarks->ddb.plane[pipe][PLANE_CURSOR], 0,
+-	       sizeof(struct skl_ddb_entry));
+-
+ }
+ 
+ static int
+-- 
+2.7.4
+

0011-drm-i915-gen9-Calculate-plane-WM-s-from-state.patch

@@ -0,0 +1,81 @@
+From dede2d508785eda5affae9d3ac2e245e0d864144 Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:06:05 -0700
+Subject: [PATCH 11/17] drm/i915/gen9: Calculate plane WM's from state
+
+In a future patch we'll want to calculate plane watermarks for in-flight
+atomic state rather than the already-committed state.
+
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-12-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/intel_pm.c | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index 0f0d4e1..518178a 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -3240,16 +3240,14 @@ static bool skl_ddb_allocation_changed(const struct skl_ddb_allocation *new_ddb,
+ 
+ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
+ 				 struct intel_crtc_state *cstate,
+-				 struct intel_plane *intel_plane,
++				 struct intel_plane_state *intel_pstate,
+ 				 uint16_t ddb_allocation,
+ 				 int level,
+ 				 uint16_t *out_blocks, /* out */
+ 				 uint8_t *out_lines /* out */)
+ {
+-	struct drm_plane *plane = &intel_plane->base;
+-	struct drm_framebuffer *fb = plane->state->fb;
+-	struct intel_plane_state *intel_pstate =
+-					to_intel_plane_state(plane->state);
++	struct drm_plane_state *pstate = &intel_pstate->base;
++	struct drm_framebuffer *fb = pstate->fb;
+ 	uint32_t latency = dev_priv->wm.skl_latency[level];
+ 	uint32_t method1, method2;
+ 	uint32_t plane_bytes_per_line, plane_blocks_per_line;
+@@ -3264,7 +3262,7 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
+ 	width = drm_rect_width(&intel_pstate->src) >> 16;
+ 	height = drm_rect_height(&intel_pstate->src) >> 16;
+ 
+-	if (intel_rotation_90_or_270(plane->state->rotation))
++	if (intel_rotation_90_or_270(pstate->rotation))
+ 		swap(width, height);
+ 
+ 	cpp = drm_format_plane_cpp(fb->pixel_format, 0);
+@@ -3284,7 +3282,7 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
+ 	    fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) {
+ 		uint32_t min_scanlines = 4;
+ 		uint32_t y_tile_minimum;
+-		if (intel_rotation_90_or_270(plane->state->rotation)) {
++		if (intel_rotation_90_or_270(pstate->rotation)) {
+ 			int cpp = (fb->pixel_format == DRM_FORMAT_NV12) ?
+ 				drm_format_plane_cpp(fb->pixel_format, 1) :
+ 				drm_format_plane_cpp(fb->pixel_format, 0);
+@@ -3338,17 +3336,19 @@ static void skl_compute_wm_level(const struct drm_i915_private *dev_priv,
+ 	struct drm_device *dev = dev_priv->dev;
+ 	struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
+ 	struct intel_plane *intel_plane;
++	struct intel_plane_state *intel_pstate;
+ 	uint16_t ddb_blocks;
+ 	enum pipe pipe = intel_crtc->pipe;
+ 
+ 	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
+ 		int i = skl_wm_plane_id(intel_plane);
+ 
++		intel_pstate = to_intel_plane_state(intel_plane->base.state);
+ 		ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]);
+ 
+ 		result->plane_en[i] = skl_compute_plane_wm(dev_priv,
+ 						cstate,
+-						intel_plane,
++						intel_pstate,
+ 						ddb_blocks,
+ 						level,
+ 						&result->plane_res_b[i],
+-- 
+2.7.4
+

0012-drm-i915-gen9-Allow-watermark-calculation-on-in-flig.patch

@@ -0,0 +1,146 @@
+From 5f63c44c510f45953a6b2387799baac49da2ffb5 Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:06:06 -0700
+Subject: [PATCH 12/17] drm/i915/gen9: Allow watermark calculation on in-flight
+ atomic state (v3)
+
+In an upcoming patch we'll move this calculation to the atomic 'check'
+phase so that the display update can be rejected early if no valid
+watermark programming is possible.
+
+v2:
+ - Drop intel_pstate_for_cstate_plane() helper and add note about how
+   the code needs to evolve in the future if we start allowing more than
+   one pending commit against a CRTC.  (Maarten)
+
+v3:
+ - Only have skl_compute_wm_level calculate watermarks for enabled
+   planes; we can just set the other planes on a CRTC to disabled
+   without having to look at the plane state.  This is important because
+   despite our CRTC lock we can still have racing commits that modify
+   a disabled plane's property without turning it on.  (Maarten)
+
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-13-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/intel_pm.c | 61 ++++++++++++++++++++++++++++++++---------
+ 1 file changed, 48 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index 518178a..c9f050e 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -3327,23 +3327,56 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
+ 	return true;
+ }
+ 
+-static void skl_compute_wm_level(const struct drm_i915_private *dev_priv,
+-				 struct skl_ddb_allocation *ddb,
+-				 struct intel_crtc_state *cstate,
+-				 int level,
+-				 struct skl_wm_level *result)
++static int
++skl_compute_wm_level(const struct drm_i915_private *dev_priv,
++		     struct skl_ddb_allocation *ddb,
++		     struct intel_crtc_state *cstate,
++		     int level,
++		     struct skl_wm_level *result)
+ {
+ 	struct drm_device *dev = dev_priv->dev;
++	struct drm_atomic_state *state = cstate->base.state;
+ 	struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
++	struct drm_plane *plane;
+ 	struct intel_plane *intel_plane;
+ 	struct intel_plane_state *intel_pstate;
+ 	uint16_t ddb_blocks;
+ 	enum pipe pipe = intel_crtc->pipe;
+ 
+-	for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
++	/*
++	 * We'll only calculate watermarks for planes that are actually
++	 * enabled, so make sure all other planes are set as disabled.
++	 */
++	memset(result, 0, sizeof(*result));
++
++	for_each_intel_plane_mask(dev, intel_plane, cstate->base.plane_mask) {
+ 		int i = skl_wm_plane_id(intel_plane);
+ 
+-		intel_pstate = to_intel_plane_state(intel_plane->base.state);
++		plane = &intel_plane->base;
++		intel_pstate = NULL;
++		if (state)
++			intel_pstate =
++				intel_atomic_get_existing_plane_state(state,
++								      intel_plane);
++
++		/*
++		 * Note: If we start supporting multiple pending atomic commits
++		 * against the same planes/CRTC's in the future, plane->state
++		 * will no longer be the correct pre-state to use for the
++		 * calculations here and we'll need to change where we get the
++		 * 'unchanged' plane data from.
++		 *
++		 * For now this is fine because we only allow one queued commit
++		 * against a CRTC.  Even if the plane isn't modified by this
++		 * transaction and we don't have a plane lock, we still have
++		 * the CRTC's lock, so we know that no other transactions are
++		 * racing with us to update it.
++		 */
++		if (!intel_pstate)
++			intel_pstate = to_intel_plane_state(plane->state);
++
++		WARN_ON(!intel_pstate->base.fb);
++
+ 		ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]);
+ 
+ 		result->plane_en[i] = skl_compute_plane_wm(dev_priv,
+@@ -3354,6 +3387,8 @@ static void skl_compute_wm_level(const struct drm_i915_private *dev_priv,
+ 						&result->plane_res_b[i],
+ 						&result->plane_res_l[i]);
+ 	}
++
++	return 0;
+ }
+ 
+ static uint32_t
+@@ -3648,14 +3683,14 @@ static void skl_flush_wm_values(struct drm_i915_private *dev_priv,
+ 	}
+ }
+ 
+-static bool skl_update_pipe_wm(struct drm_crtc *crtc,
++static bool skl_update_pipe_wm(struct drm_crtc_state *cstate,
+ 			       struct skl_ddb_allocation *ddb, /* out */
+ 			       struct skl_pipe_wm *pipe_wm /* out */)
+ {
+-	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+-	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
++	struct intel_crtc *intel_crtc = to_intel_crtc(cstate->crtc);
++	struct intel_crtc_state *intel_cstate = to_intel_crtc_state(cstate);
+ 
+-	skl_build_pipe_wm(cstate, ddb, pipe_wm);
++	skl_build_pipe_wm(intel_cstate, ddb, pipe_wm);
+ 
+ 	if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm)))
+ 		return false;
+@@ -3695,7 +3730,7 @@ static void skl_update_other_pipe_wm(struct drm_device *dev,
+ 		if (!intel_crtc->active)
+ 			continue;
+ 
+-		wm_changed = skl_update_pipe_wm(&intel_crtc->base,
++		wm_changed = skl_update_pipe_wm(intel_crtc->base.state,
+ 						&r->ddb, &pipe_wm);
+ 
+ 		/*
+@@ -3813,7 +3848,7 @@ static void skl_update_wm(struct drm_crtc *crtc)
+ 
+ 	skl_clear_wm(results, intel_crtc->pipe);
+ 
+-	if (!skl_update_pipe_wm(crtc, &results->ddb, pipe_wm))
++	if (!skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm))
+ 		return;
+ 
+ 	skl_compute_wm_results(dev, pipe_wm, results, intel_crtc);
+-- 
+2.7.4
+

0013-drm-i915-gen9-Use-a-bitmask-to-track-dirty-pipe-wate.patch

@@ -0,0 +1,81 @@
+From bb7c6f4efe65f77ba2ed3a09e6d6bc4d021a395d Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:06:07 -0700
+Subject: [PATCH 13/17] drm/i915/gen9: Use a bitmask to track dirty pipe
+ watermarks
+
+Slightly easier to work with than an array of bools.
+
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-14-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/i915_drv.h |  2 +-
+ drivers/gpu/drm/i915/intel_pm.c | 10 +++++-----
+ 2 files changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
+index b908a41..e7bde72 100644
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -1591,7 +1591,7 @@ struct skl_ddb_allocation {
+ };
+ 
+ struct skl_wm_values {
+-	bool dirty[I915_MAX_PIPES];
++	unsigned dirty_pipes;
+ 	struct skl_ddb_allocation ddb;
+ 	uint32_t wm_linetime[I915_MAX_PIPES];
+ 	uint32_t plane[I915_MAX_PIPES][I915_MAX_PLANES][8];
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index c9f050e..cb6b6f4 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -3516,7 +3516,7 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv,
+ 		int i, level, max_level = ilk_wm_max_level(dev);
+ 		enum pipe pipe = crtc->pipe;
+ 
+-		if (!new->dirty[pipe])
++		if ((new->dirty_pipes & drm_crtc_mask(&crtc->base)) == 0)
+ 			continue;
+ 
+ 		I915_WRITE(PIPE_WM_LINETIME(pipe), new->wm_linetime[pipe]);
+@@ -3741,7 +3741,7 @@ static void skl_update_other_pipe_wm(struct drm_device *dev,
+ 		WARN_ON(!wm_changed);
+ 
+ 		skl_compute_wm_results(dev, &pipe_wm, r, intel_crtc);
+-		r->dirty[intel_crtc->pipe] = true;
++		r->dirty_pipes |= drm_crtc_mask(&intel_crtc->base);
+ 	}
+ }
+ 
+@@ -3844,7 +3844,7 @@ static void skl_update_wm(struct drm_crtc *crtc)
+ 
+ 
+ 	/* Clear all dirty flags */
+-	memset(results->dirty, 0, sizeof(bool) * I915_MAX_PIPES);
++	results->dirty_pipes = 0;
+ 
+ 	skl_clear_wm(results, intel_crtc->pipe);
+ 
+@@ -3852,7 +3852,7 @@ static void skl_update_wm(struct drm_crtc *crtc)
+ 		return;
+ 
+ 	skl_compute_wm_results(dev, pipe_wm, results, intel_crtc);
+-	results->dirty[intel_crtc->pipe] = true;
++	results->dirty_pipes |= drm_crtc_mask(&intel_crtc->base);
+ 
+ 	skl_update_other_pipe_wm(dev, crtc, results);
+ 	skl_write_wm_values(dev_priv, results);
+@@ -4011,7 +4011,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc)
+ 	if (!intel_crtc->active)
+ 		return;
+ 
+-	hw->dirty[pipe] = true;
++	hw->dirty_pipes |= drm_crtc_mask(crtc);
+ 
+ 	active->linetime = hw->wm_linetime[pipe];
+ 
+-- 
+2.7.4
+

0014-drm-i915-gen9-Propagate-watermark-calculation-failur.patch

@@ -0,0 +1,244 @@
+From 0830cf3698b5966d3409745f751fb6d3a555c254 Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:06:08 -0700
+Subject: [PATCH 14/17] drm/i915/gen9: Propagate watermark calculation failures
+ up the call chain
+
+Once we move watermark calculation to the atomic check phase, we'll want
+to start rejecting display configurations that exceed out watermark
+limits.  At the moment we just assume that there's always a valid set of
+watermarks, even though this may not actually be true.  Let's prepare by
+passing return codes up through the call stack in preparation.
+
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-15-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/intel_display.c | 10 ++--
+ drivers/gpu/drm/i915/intel_pm.c      | 90 ++++++++++++++++++++++--------------
+ 2 files changed, 61 insertions(+), 39 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index 4db10d7..2190bac 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -13339,7 +13339,7 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
+  * phase.  The code here should be run after the per-crtc and per-plane 'check'
+  * handlers to ensure that all derived state has been updated.
+  */
+-static void calc_watermark_data(struct drm_atomic_state *state)
++static int calc_watermark_data(struct drm_atomic_state *state)
+ {
+ 	struct drm_device *dev = state->dev;
+ 	struct drm_i915_private *dev_priv = to_i915(dev);
+@@ -13375,7 +13375,9 @@ static void calc_watermark_data(struct drm_atomic_state *state)
+ 
+ 	/* Is there platform-specific watermark information to calculate? */
+ 	if (dev_priv->display.compute_global_watermarks)
+-		dev_priv->display.compute_global_watermarks(state);
++		return dev_priv->display.compute_global_watermarks(state);
++
++	return 0;
+ }
+ 
+ /**
+@@ -13459,9 +13461,7 @@ static int intel_atomic_check(struct drm_device *dev,
+ 		return ret;
+ 
+ 	intel_fbc_choose_crtc(dev_priv, state);
+-	calc_watermark_data(state);
+-
+-	return 0;
++	return calc_watermark_data(state);
+ }
+ 
+ static int intel_atomic_prepare_commit(struct drm_device *dev,
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index cb6b6f4..342aa66 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -3238,13 +3238,14 @@ static bool skl_ddb_allocation_changed(const struct skl_ddb_allocation *new_ddb,
+ 	return false;
+ }
+ 
+-static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
+-				 struct intel_crtc_state *cstate,
+-				 struct intel_plane_state *intel_pstate,
+-				 uint16_t ddb_allocation,
+-				 int level,
+-				 uint16_t *out_blocks, /* out */
+-				 uint8_t *out_lines /* out */)
++static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
++				struct intel_crtc_state *cstate,
++				struct intel_plane_state *intel_pstate,
++				uint16_t ddb_allocation,
++				int level,
++				uint16_t *out_blocks, /* out */
++				uint8_t *out_lines, /* out */
++				bool *enabled /* out */)
+ {
+ 	struct drm_plane_state *pstate = &intel_pstate->base;
+ 	struct drm_framebuffer *fb = pstate->fb;
+@@ -3256,8 +3257,10 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
+ 	uint8_t cpp;
+ 	uint32_t width = 0, height = 0;
+ 
+-	if (latency == 0 || !cstate->base.active || !intel_pstate->visible)
+-		return false;
++	if (latency == 0 || !cstate->base.active || !intel_pstate->visible) {
++		*enabled = false;
++		return 0;
++	}
+ 
+ 	width = drm_rect_width(&intel_pstate->src) >> 16;
+ 	height = drm_rect_height(&intel_pstate->src) >> 16;
+@@ -3318,13 +3321,16 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
+ 			res_blocks++;
+ 	}
+ 
+-	if (res_blocks >= ddb_allocation || res_lines > 31)
+-		return false;
++	if (res_blocks >= ddb_allocation || res_lines > 31) {
++		*enabled = false;
++		return 0;
++	}
+ 
+ 	*out_blocks = res_blocks;
+ 	*out_lines = res_lines;
++	*enabled = true;
+ 
+-	return true;
++	return 0;
+ }
+ 
+ static int
+@@ -3342,6 +3348,7 @@ skl_compute_wm_level(const struct drm_i915_private *dev_priv,
+ 	struct intel_plane_state *intel_pstate;
+ 	uint16_t ddb_blocks;
+ 	enum pipe pipe = intel_crtc->pipe;
++	int ret;
+ 
+ 	/*
+ 	 * We'll only calculate watermarks for planes that are actually
+@@ -3379,13 +3386,16 @@ skl_compute_wm_level(const struct drm_i915_private *dev_priv,
+ 
+ 		ddb_blocks = skl_ddb_entry_size(&ddb->plane[pipe][i]);
+ 
+-		result->plane_en[i] = skl_compute_plane_wm(dev_priv,
+-						cstate,
+-						intel_pstate,
+-						ddb_blocks,
+-						level,
+-						&result->plane_res_b[i],
+-						&result->plane_res_l[i]);
++		ret = skl_compute_plane_wm(dev_priv,
++					   cstate,
++					   intel_pstate,
++					   ddb_blocks,
++					   level,
++					   &result->plane_res_b[i],
++					   &result->plane_res_l[i],
++					   &result->plane_en[i]);
++		if (ret)
++			return ret;
+ 	}
+ 
+ 	return 0;
+@@ -3422,21 +3432,26 @@ static void skl_compute_transition_wm(struct intel_crtc_state *cstate,
+ 	}
+ }
+ 
+-static void skl_build_pipe_wm(struct intel_crtc_state *cstate,
+-			      struct skl_ddb_allocation *ddb,
+-			      struct skl_pipe_wm *pipe_wm)
++static int skl_build_pipe_wm(struct intel_crtc_state *cstate,
++			     struct skl_ddb_allocation *ddb,
++			     struct skl_pipe_wm *pipe_wm)
+ {
+ 	struct drm_device *dev = cstate->base.crtc->dev;
+ 	const struct drm_i915_private *dev_priv = dev->dev_private;
+ 	int level, max_level = ilk_wm_max_level(dev);
++	int ret;
+ 
+ 	for (level = 0; level <= max_level; level++) {
+-		skl_compute_wm_level(dev_priv, ddb, cstate,
+-				     level, &pipe_wm->wm[level]);
++		ret = skl_compute_wm_level(dev_priv, ddb, cstate,
++					   level, &pipe_wm->wm[level]);
++		if (ret)
++			return ret;
+ 	}
+ 	pipe_wm->linetime = skl_compute_linetime_wm(cstate);
+ 
+ 	skl_compute_transition_wm(cstate, &pipe_wm->trans_wm);
++
++	return 0;
+ }
+ 
+ static void skl_compute_wm_results(struct drm_device *dev,
+@@ -3683,21 +3698,27 @@ static void skl_flush_wm_values(struct drm_i915_private *dev_priv,
+ 	}
+ }
+ 
+-static bool skl_update_pipe_wm(struct drm_crtc_state *cstate,
+-			       struct skl_ddb_allocation *ddb, /* out */
+-			       struct skl_pipe_wm *pipe_wm /* out */)
++static int skl_update_pipe_wm(struct drm_crtc_state *cstate,
++			      struct skl_ddb_allocation *ddb, /* out */
++			      struct skl_pipe_wm *pipe_wm, /* out */
++			      bool *changed /* out */)
+ {
+ 	struct intel_crtc *intel_crtc = to_intel_crtc(cstate->crtc);
+ 	struct intel_crtc_state *intel_cstate = to_intel_crtc_state(cstate);
++	int ret;
+ 
+-	skl_build_pipe_wm(intel_cstate, ddb, pipe_wm);
++	ret = skl_build_pipe_wm(intel_cstate, ddb, pipe_wm);
++	if (ret)
++		return ret;
+ 
+ 	if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm)))
+-		return false;
++		*changed = false;
++	else
++		*changed = true;
+ 
+ 	intel_crtc->wm.active.skl = *pipe_wm;
+ 
+-	return true;
++	return 0;
+ }
+ 
+ static void skl_update_other_pipe_wm(struct drm_device *dev,
+@@ -3730,8 +3751,8 @@ static void skl_update_other_pipe_wm(struct drm_device *dev,
+ 		if (!intel_crtc->active)
+ 			continue;
+ 
+-		wm_changed = skl_update_pipe_wm(intel_crtc->base.state,
+-						&r->ddb, &pipe_wm);
++		skl_update_pipe_wm(intel_crtc->base.state,
++				   &r->ddb, &pipe_wm, &wm_changed);
+ 
+ 		/*
+ 		 * If we end up re-computing the other pipe WM values, it's
+@@ -3841,14 +3862,15 @@ static void skl_update_wm(struct drm_crtc *crtc)
+ 	struct skl_wm_values *results = &dev_priv->wm.skl_results;
+ 	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
+ 	struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal;
+-
++	bool wm_changed;
+ 
+ 	/* Clear all dirty flags */
+ 	results->dirty_pipes = 0;
+ 
+ 	skl_clear_wm(results, intel_crtc->pipe);
+ 
+-	if (!skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm))
++	skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm, &wm_changed);
++	if (!wm_changed)
+ 		return;
+ 
+ 	skl_compute_wm_results(dev, pipe_wm, results, intel_crtc);
+-- 
+2.7.4
+

0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch

@@ -0,0 +1,302 @@
+From 664f87c5bfcc7798bd5b16e14792f1e9ba2956ea Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 15:11:40 -0700
+Subject: [PATCH 15/17] drm/i915/gen9: Calculate watermarks during atomic
+ 'check' (v2)
+
+Moving watermark calculation into the check phase will allow us to to
+reject display configurations for which there are no valid watermark
+values before we start trying to program the hardware (although those
+tests will come in a subsequent patch).
+
+Another advantage of moving this calculation to the check phase is that
+we can calculate the watermarks in a single shot as part of the atomic
+transaction.  The watermark interfaces we inherited from our legacy
+modesetting days are a bit broken in the atomic design because they use
+per-crtc entry points but actually re-calculate and re-program something
+that is really more of a global state.  That worked okay in the legacy
+modesetting world because operations only ever updated a single CRTC at
+a time.  However in the atomic world, a transaction can involve multiple
+CRTC's, which means we wind up computing and programming the watermarks
+NxN times (where N is the number of CRTC's involved).  With this patch
+we eliminate the redundant re-calculation of watermark data for atomic
+states (which was the cause of the WARN_ON(!wm_changed) problems that
+have plagued us for a while).
+
+We still need to work on the 'commit' side of watermark handling so that
+we aren't doing redundant NxN programming of watermarks, but that's
+content for future patches.
+
+v2:
+ - Bail out of skl_write_wm_values() if the CRTC isn't active.  Now that
+   we set dirty_pipes to ~0 if the active pipes change (because
+   we need to deal with DDB changes), we can now wind up here for
+   disabled pipes, whereas we couldn't before.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89055
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92181
+Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Tested-by: Daniel Stone <daniels@collabora.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463091100-13747-1-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/intel_display.c |   2 +-
+ drivers/gpu/drm/i915/intel_drv.h     |   2 +-
+ drivers/gpu/drm/i915/intel_pm.c      | 140 +++++++++++++----------------------
+ 3 files changed, 54 insertions(+), 90 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index 2190bac..a75daac 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -13627,7 +13627,7 @@ static int intel_atomic_commit(struct drm_device *dev,
+ 	drm_atomic_helper_swap_state(dev, state);
+ 	dev_priv->wm.config = intel_state->wm_config;
+ 	dev_priv->wm.distrust_bios_wm = false;
+-	dev_priv->wm.skl_results.ddb = intel_state->ddb;
++	dev_priv->wm.skl_results = intel_state->wm_results;
+ 	intel_shared_dpll_commit(state);
+ 
+ 	if (intel_state->modeset) {
+diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
+index 2218290..ab0be7a 100644
+--- a/drivers/gpu/drm/i915/intel_drv.h
++++ b/drivers/gpu/drm/i915/intel_drv.h
+@@ -314,7 +314,7 @@ struct intel_atomic_state {
+ 	bool skip_intermediate_wm;
+ 
+ 	/* Gen9+ only */
+-	struct skl_ddb_allocation ddb;
++	struct skl_wm_values wm_results;
+ };
+ 
+ struct intel_plane_state {
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index 342aa66..b072417 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -3221,23 +3221,6 @@ static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
+ 	return ret;
+ }
+ 
+-static bool skl_ddb_allocation_changed(const struct skl_ddb_allocation *new_ddb,
+-				       const struct intel_crtc *intel_crtc)
+-{
+-	struct drm_device *dev = intel_crtc->base.dev;
+-	struct drm_i915_private *dev_priv = dev->dev_private;
+-	const struct skl_ddb_allocation *cur_ddb = &dev_priv->wm.skl_hw.ddb;
+-
+-	/*
+-	 * If ddb allocation of pipes changed, it may require recalculation of
+-	 * watermarks
+-	 */
+-	if (memcmp(new_ddb->pipe, cur_ddb->pipe, sizeof(new_ddb->pipe)))
+-		return true;
+-
+-	return false;
+-}
+-
+ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
+ 				struct intel_crtc_state *cstate,
+ 				struct intel_plane_state *intel_pstate,
+@@ -3533,6 +3516,8 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv,
+ 
+ 		if ((new->dirty_pipes & drm_crtc_mask(&crtc->base)) == 0)
+ 			continue;
++		if (!crtc->active)
++			continue;
+ 
+ 		I915_WRITE(PIPE_WM_LINETIME(pipe), new->wm_linetime[pipe]);
+ 
+@@ -3716,66 +3701,9 @@ static int skl_update_pipe_wm(struct drm_crtc_state *cstate,
+ 	else
+ 		*changed = true;
+ 
+-	intel_crtc->wm.active.skl = *pipe_wm;
+-
+ 	return 0;
+ }
+ 
+-static void skl_update_other_pipe_wm(struct drm_device *dev,
+-				     struct drm_crtc *crtc,
+-				     struct skl_wm_values *r)
+-{
+-	struct intel_crtc *intel_crtc;
+-	struct intel_crtc *this_crtc = to_intel_crtc(crtc);
+-
+-	/*
+-	 * If the WM update hasn't changed the allocation for this_crtc (the
+-	 * crtc we are currently computing the new WM values for), other
+-	 * enabled crtcs will keep the same allocation and we don't need to
+-	 * recompute anything for them.
+-	 */
+-	if (!skl_ddb_allocation_changed(&r->ddb, this_crtc))
+-		return;
+-
+-	/*
+-	 * Otherwise, because of this_crtc being freshly enabled/disabled, the
+-	 * other active pipes need new DDB allocation and WM values.
+-	 */
+-	for_each_intel_crtc(dev, intel_crtc) {
+-		struct skl_pipe_wm pipe_wm = {};
+-		bool wm_changed;
+-
+-		if (this_crtc->pipe == intel_crtc->pipe)
+-			continue;
+-
+-		if (!intel_crtc->active)
+-			continue;
+-
+-		skl_update_pipe_wm(intel_crtc->base.state,
+-				   &r->ddb, &pipe_wm, &wm_changed);
+-
+-		/*
+-		 * If we end up re-computing the other pipe WM values, it's
+-		 * because it was really needed, so we expect the WM values to
+-		 * be different.
+-		 */
+-		WARN_ON(!wm_changed);
+-
+-		skl_compute_wm_results(dev, &pipe_wm, r, intel_crtc);
+-		r->dirty_pipes |= drm_crtc_mask(&intel_crtc->base);
+-	}
+-}
+-
+-static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe)
+-{
+-	watermarks->wm_linetime[pipe] = 0;
+-	memset(watermarks->plane[pipe], 0,
+-	       sizeof(uint32_t) * 8 * I915_MAX_PLANES);
+-	memset(watermarks->plane_trans[pipe],
+-	       0, sizeof(uint32_t) * I915_MAX_PLANES);
+-	watermarks->plane_trans[pipe][PLANE_CURSOR] = 0;
+-}
+-
+ static int
+ skl_compute_ddb(struct drm_atomic_state *state)
+ {
+@@ -3783,6 +3711,7 @@ skl_compute_ddb(struct drm_atomic_state *state)
+ 	struct drm_i915_private *dev_priv = to_i915(dev);
+ 	struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
+ 	struct intel_crtc *intel_crtc;
++	struct skl_ddb_allocation *ddb = &intel_state->wm_results.ddb;
+ 	unsigned realloc_pipes = dev_priv->active_crtcs;
+ 	int ret;
+ 
+@@ -3808,8 +3737,10 @@ skl_compute_ddb(struct drm_atomic_state *state)
+ 	 * any other display updates race with this transaction, so we need
+ 	 * to grab the lock on *all* CRTC's.
+ 	 */
+-	if (intel_state->active_pipe_changes)
++	if (intel_state->active_pipe_changes) {
+ 		realloc_pipes = ~0;
++		intel_state->wm_results.dirty_pipes = ~0;
++	}
+ 
+ 	for_each_intel_crtc_mask(dev, intel_crtc, realloc_pipes) {
+ 		struct intel_crtc_state *cstate;
+@@ -3818,7 +3749,7 @@ skl_compute_ddb(struct drm_atomic_state *state)
+ 		if (IS_ERR(cstate))
+ 			return PTR_ERR(cstate);
+ 
+-		ret = skl_allocate_pipe_ddb(cstate, &intel_state->ddb);
++		ret = skl_allocate_pipe_ddb(cstate, ddb);
+ 		if (ret)
+ 			return ret;
+ 	}
+@@ -3831,8 +3762,11 @@ skl_compute_wm(struct drm_atomic_state *state)
+ {
+ 	struct drm_crtc *crtc;
+ 	struct drm_crtc_state *cstate;
+-	int ret, i;
++	struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
++	struct skl_wm_values *results = &intel_state->wm_results;
++	struct skl_pipe_wm *pipe_wm;
+ 	bool changed = false;
++	int ret, i;
+ 
+ 	/*
+ 	 * If this transaction isn't actually touching any CRTC's, don't
+@@ -3847,10 +3781,45 @@ skl_compute_wm(struct drm_atomic_state *state)
+ 	if (!changed)
+ 		return 0;
+ 
++	/* Clear all dirty flags */
++	results->dirty_pipes = 0;
++
+ 	ret = skl_compute_ddb(state);
+ 	if (ret)
+ 		return ret;
+ 
++	/*
++	 * Calculate WM's for all pipes that are part of this transaction.
++	 * Note that the DDB allocation above may have added more CRTC's that
++	 * weren't otherwise being modified (and set bits in dirty_pipes) if
++	 * pipe allocations had to change.
++	 *
++	 * FIXME:  Now that we're doing this in the atomic check phase, we
++	 * should allow skl_update_pipe_wm() to return failure in cases where
++	 * no suitable watermark values can be found.
++	 */
++	for_each_crtc_in_state(state, crtc, cstate, i) {
++		struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
++		struct intel_crtc_state *intel_cstate =
++			to_intel_crtc_state(cstate);
++
++		pipe_wm = &intel_cstate->wm.skl.optimal;
++		ret = skl_update_pipe_wm(cstate, &results->ddb, pipe_wm,
++					 &changed);
++		if (ret)
++			return ret;
++
++		if (changed)
++			results->dirty_pipes |= drm_crtc_mask(crtc);
++
++		if ((results->dirty_pipes & drm_crtc_mask(crtc)) == 0)
++			/* This pipe's WM's did not change */
++			continue;
++
++		intel_cstate->update_wm_pre = true;
++		skl_compute_wm_results(crtc->dev, pipe_wm, results, intel_crtc);
++	}
++
+ 	return 0;
+ }
+ 
+@@ -3862,26 +3831,21 @@ static void skl_update_wm(struct drm_crtc *crtc)
+ 	struct skl_wm_values *results = &dev_priv->wm.skl_results;
+ 	struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
+ 	struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal;
+-	bool wm_changed;
+-
+-	/* Clear all dirty flags */
+-	results->dirty_pipes = 0;
+ 
+-	skl_clear_wm(results, intel_crtc->pipe);
+-
+-	skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm, &wm_changed);
+-	if (!wm_changed)
++	if ((results->dirty_pipes & drm_crtc_mask(crtc)) == 0)
+ 		return;
+ 
+-	skl_compute_wm_results(dev, pipe_wm, results, intel_crtc);
+-	results->dirty_pipes |= drm_crtc_mask(&intel_crtc->base);
++	intel_crtc->wm.active.skl = *pipe_wm;
++
++	mutex_lock(&dev_priv->wm.wm_mutex);
+ 
+-	skl_update_other_pipe_wm(dev, crtc, results);
+ 	skl_write_wm_values(dev_priv, results);
+ 	skl_flush_wm_values(dev_priv, results);
+ 
+ 	/* store the new configuration */
+ 	dev_priv->wm.skl_hw = *results;
++
++	mutex_unlock(&dev_priv->wm.wm_mutex);
+ }
+ 
+ static void ilk_compute_wm_config(struct drm_device *dev,
+-- 
+2.7.4
+

0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch

@@ -0,0 +1,53 @@
+From 2ad01780bf59b3a785975bf48a066645e5b6f7f5 Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:06:10 -0700
+Subject: [PATCH 16/17] drm/i915/gen9: Reject display updates that exceed wm
+ limitations (v2)
+
+If we can't find any valid level 0 watermark values for the requested
+atomic transaction, reject the configuration before we try to start
+programming the hardware.
+
+v2:
+ - Add extra debugging output when we reject level 0 watermarks so that
+   we can more easily debug how/why they were rejected.
+
+Cc: Lyude Paul <cpaul@redhat.com>
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-17-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/intel_pm.c | 17 ++++++++++++++++-
+ 1 file changed, 16 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
+index b072417..f764d28 100644
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -3306,7 +3306,22 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
+ 
+ 	if (res_blocks >= ddb_allocation || res_lines > 31) {
+ 		*enabled = false;
+-		return 0;
++
++		/*
++		 * If there are no valid level 0 watermarks, then we can't
++		 * support this display configuration.
++		 */
++		if (level) {
++			return 0;
++		} else {
++			DRM_DEBUG_KMS("Requested display configuration exceeds system watermark limitations\n");
++			DRM_DEBUG_KMS("Plane %d.%d: blocks required = %u/%u, lines required = %u/31\n",
++				      to_intel_crtc(cstate->base.crtc)->pipe,
++				      skl_wm_plane_id(to_intel_plane(pstate->plane)),
++				      res_blocks, ddb_allocation, res_lines);
++
++			return -EINVAL;
++		}
+ 	}
+ 
+ 	*out_blocks = res_blocks;
+-- 
+2.7.4
+

0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch

@@ -0,0 +1,105 @@
+From 73a35468564f4e47deade0a4a5eb7ec289611ebc Mon Sep 17 00:00:00 2001
+From: Matt Roper <matthew.d.roper@intel.com>
+Date: Thu, 12 May 2016 07:06:11 -0700
+Subject: [PATCH 17/17] drm/i915: Remove wm_config from
+ dev_priv/intel_atomic_state
+
+We calculate the watermark config into intel_atomic_state and then save
+it into dev_priv, but never actually use it from there.  This is
+left-over from some early ILK-style watermark programming designs that
+got changed over time.
+
+Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-18-git-send-email-matthew.d.roper@intel.com
+---
+ drivers/gpu/drm/i915/i915_drv.h      |  3 ---
+ drivers/gpu/drm/i915/intel_display.c | 31 -------------------------------
+ drivers/gpu/drm/i915/intel_drv.h     |  1 -
+ 3 files changed, 35 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
+index e7bde72..608f8e4 100644
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -1961,9 +1961,6 @@ struct drm_i915_private {
+ 		 */
+ 		uint16_t skl_latency[8];
+ 
+-		/* Committed wm config */
+-		struct intel_wm_config config;
+-
+ 		/*
+ 		 * The skl_wm_values structure is a bit too big for stack
+ 		 * allocation, so we keep the staging struct where we store
+diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
+index a75daac..9c109c6 100644
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -13343,35 +13343,6 @@ static int calc_watermark_data(struct drm_atomic_state *state)
+ {
+ 	struct drm_device *dev = state->dev;
+ 	struct drm_i915_private *dev_priv = to_i915(dev);
+-	struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
+-	struct drm_crtc *crtc;
+-	struct drm_crtc_state *cstate;
+-	struct drm_plane *plane;
+-	struct drm_plane_state *pstate;
+-
+-	/*
+-	 * Calculate watermark configuration details now that derived
+-	 * plane/crtc state is all properly updated.
+-	 */
+-	drm_for_each_crtc(crtc, dev) {
+-		cstate = drm_atomic_get_existing_crtc_state(state, crtc) ?:
+-			crtc->state;
+-
+-		if (cstate->active)
+-			intel_state->wm_config.num_pipes_active++;
+-	}
+-	drm_for_each_legacy_plane(plane, dev) {
+-		pstate = drm_atomic_get_existing_plane_state(state, plane) ?:
+-			plane->state;
+-
+-		if (!to_intel_plane_state(pstate)->visible)
+-			continue;
+-
+-		intel_state->wm_config.sprites_enabled = true;
+-		if (pstate->crtc_w != pstate->src_w >> 16 ||
+-		    pstate->crtc_h != pstate->src_h >> 16)
+-			intel_state->wm_config.sprites_scaled = true;
+-	}
+ 
+ 	/* Is there platform-specific watermark information to calculate? */
+ 	if (dev_priv->display.compute_global_watermarks)
+@@ -13625,7 +13596,6 @@ static int intel_atomic_commit(struct drm_device *dev,
+ 	}
+ 
+ 	drm_atomic_helper_swap_state(dev, state);
+-	dev_priv->wm.config = intel_state->wm_config;
+ 	dev_priv->wm.distrust_bios_wm = false;
+ 	dev_priv->wm.skl_results = intel_state->wm_results;
+ 	intel_shared_dpll_commit(state);
+@@ -15405,7 +15375,6 @@ retry:
+ 	}
+ 
+ 	/* Write calculated watermark values back */
+-	to_i915(dev)->wm.config = to_intel_atomic_state(state)->wm_config;
+ 	for_each_crtc_in_state(state, crtc, cstate, i) {
+ 		struct intel_crtc_state *cs = to_intel_crtc_state(cstate);
+ 
+diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
+index ab0be7a..8d73c20 100644
+--- a/drivers/gpu/drm/i915/intel_drv.h
++++ b/drivers/gpu/drm/i915/intel_drv.h
+@@ -305,7 +305,6 @@ struct intel_atomic_state {
+ 	unsigned int min_pixclk[I915_MAX_PIPES];
+ 
+ 	struct intel_shared_dpll_config shared_dpll[I915_NUM_PLLS];
+-	struct intel_wm_config wm_config;
+ 
+ 	/*
+ 	 * Current watermarks can't be trusted during hardware readout, so
+-- 
+2.7.4
+

07d5c17b80f67d1b2cc2c8243590e2abed4bd7ae..5d554ea4f287665b839975ecb11bd29d49a5c9b5.patch

@@ -0,0 +1,33 @@
+From 5d554ea4f287665b839975ecb11bd29d49a5c9b5 Mon Sep 17 00:00:00 2001
+From: Vinod Koul <vinod.koul@intel.com>
+Date: Fri, 8 Jul 2016 18:30:17 +0530
+Subject: ASoC: Intel: cht: fix uninit variable warning
+
+Kbuild bot reports that we might use dai_index uninitialized.
+
+sound/soc/intel/boards/cht_bsw_rt5645.c:391:37: warning: 'dai_index' may be used uninitialized in this function [-Wmaybe-uninitialized]
+
+Since it is theoretically possible, set it while initializing.
+
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ sound/soc/intel/boards/cht_bsw_rt5645.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/sound/soc/intel/boards/cht_bsw_rt5645.c b/sound/soc/intel/boards/cht_bsw_rt5645.c
+index f26c7b8..56056ed 100644
+--- a/sound/soc/intel/boards/cht_bsw_rt5645.c
++++ b/sound/soc/intel/boards/cht_bsw_rt5645.c
+@@ -357,7 +357,7 @@ static int snd_cht_mc_probe(struct platform_device *pdev)
+ 	char codec_name[16];
+ 	struct sst_acpi_mach *mach;
+ 	const char *i2c_name = NULL;
+-	int dai_index;
++	int dai_index = 0;
+ 
+ 	drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC);
+ 	if (!drv)
+-- 
+cgit v0.12
+

1-2-mwifiex-fix-PCIe-legacy-interrupt-problem.patch

@@ -0,0 +1,48 @@
+From patchwork Fri Jul 15 13:37:04 2016
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [1/2] mwifiex: fix PCIe legacy interrupt problem
+From: Amitkumar Karwar <akarwar@marvell.com>
+X-Patchwork-Id: 9232091
+Message-Id: <1468589825-9188-1-git-send-email-akarwar@marvell.com>
+To: <linux-wireless@vger.kernel.org>
+Cc: Cathy Luo <cluo@marvell.com>, Nishant Sarmukadam <nishants@marvell.com>,
+ Amitkumar Karwar <akarwar@marvell.com>
+Date: Fri, 15 Jul 2016 19:07:04 +0530
+
+In corner case, we may end up processing same interrupt twice.
+We have a logic to read pending interrupts at the end of interrupt
+processing routine. It has a race with interrupts read in interrupt
+handler. This patch solves the problem by ORing the interrupt bitmap
+in this case.
+
+The symptom for this bug is below messages in dmesg log.
+
+[   11.522123] mwifiex_pcie 0000:01:00.0: CMD_RESP: invalid cmd resp
+[   11.680412] mwifiex_pcie 0000:01:00.0: There is no command but got cmdrsp
+
+Link: https://bugzilla.kernel.org/show_bug.cgi?id=109681
+Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
+Signed-off-by: Cathy Luo <cluo@marvell.com>
+---
+ drivers/net/wireless/marvell/mwifiex/pcie.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.c b/drivers/net/wireless/marvell/mwifiex/pcie.c
+index d61d4ad..38bd62e 100644
+--- a/drivers/net/wireless/marvell/mwifiex/pcie.c
++++ b/drivers/net/wireless/marvell/mwifiex/pcie.c
+@@ -2300,6 +2300,12 @@ static int mwifiex_process_pcie_int(struct mwifiex_adapter *adapter)
+ 			}
+ 
+ 		}
++		if (!card->msi_enable) {
++			spin_lock_irqsave(&adapter->int_lock, flags);
++			pcie_ireg |= adapter->int_status;
++			adapter->int_status = 0;
++			spin_unlock_irqrestore(&adapter->int_lock, flags);
++		}
+ 	}
+ 	mwifiex_dbg(adapter, INTR,
+ 		    "info: cmd_sent=%d data_sent=%d\n",

2-2-mwifiex-update-command-response-skb-length-correctly.patch

@@ -0,0 +1,34 @@
+From patchwork Fri Jul 15 13:37:05 2016
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [2/2] mwifiex: update command response skb length correctly
+From: Amitkumar Karwar <akarwar@marvell.com>
+X-Patchwork-Id: 9232093
+Message-Id: <1468589825-9188-2-git-send-email-akarwar@marvell.com>
+To: <linux-wireless@vger.kernel.org>
+Cc: Cathy Luo <cluo@marvell.com>, Nishant Sarmukadam <nishants@marvell.com>,
+ Amitkumar Karwar <akarwar@marvell.com>
+Date: Fri, 15 Jul 2016 19:07:05 +0530
+
+Same skb is being reused for storing command response from firmware
+in PCIe chipsets. There was a bug while updating the skb length.
+This patch ensures skb length correctly gets updated based on rx_len.
+
+Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
+---
+ drivers/net/wireless/marvell/mwifiex/pcie.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.c b/drivers/net/wireless/marvell/mwifiex/pcie.c
+index 38bd62e..a6af85d 100644
+--- a/drivers/net/wireless/marvell/mwifiex/pcie.c
++++ b/drivers/net/wireless/marvell/mwifiex/pcie.c
+@@ -1616,6 +1616,7 @@ static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
+ 
+ 	pkt_len = *((__le16 *)skb->data);
+ 	rx_len = le16_to_cpu(pkt_len);
++	skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
+ 	skb_trim(skb, rx_len);
+ 	skb_pull(skb, INTF_HEADER_LEN);
+ 

473dfbfa09934cea0d08cc9023c749a5fce10cb0..d41376ca8ba74e954ba931c69271d0b29546a202.patch

@@ -0,0 +1,46 @@
+From d41376ca8ba74e954ba931c69271d0b29546a202 Mon Sep 17 00:00:00 2001
+From: Brian Norris <briannorris@chromium.org>
+Date: Thu, 30 Jun 2016 15:21:02 -0700
+Subject: mwifiex: mask PCIe interrupts before removal
+
+The PCIe driver didn't mask the host interrupts before trying to tear
+down. This causes lockups at reboot or rmmod when using MSI-X on 8997,
+since the MSI handler gets confused and locks up the system.
+
+Also tested on 8897, which does not support MSI-X (and wasn't
+experiencing this same bug). No regressions seen there.
+
+Signed-off-by: Brian Norris <briannorris@chromium.org>
+Tested-by: Douglas Anderson <dianders@chromium.org>
+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+---
+ drivers/net/wireless/marvell/mwifiex/pcie.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.c b/drivers/net/wireless/marvell/mwifiex/pcie.c
+index 012733c..c7f5df8 100644
+--- a/drivers/net/wireless/marvell/mwifiex/pcie.c
++++ b/drivers/net/wireless/marvell/mwifiex/pcie.c
+@@ -440,6 +440,11 @@ static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
+ 	return 0;
+ }
+ 
++static void mwifiex_pcie_disable_host_int_noerr(struct mwifiex_adapter *adapter)
++{
++	WARN_ON(mwifiex_pcie_disable_host_int(adapter));
++}
++
+ /*
+  * This function enables the host interrupt.
+  *
+@@ -2946,6 +2951,7 @@ static struct mwifiex_if_ops pcie_ops = {
+ 	.register_dev =			mwifiex_register_dev,
+ 	.unregister_dev =		mwifiex_unregister_dev,
+ 	.enable_int =			mwifiex_pcie_enable_host_int,
++	.disable_int =			mwifiex_pcie_disable_host_int_noerr,
+ 	.process_int_status =		mwifiex_process_int_status,
+ 	.host_to_card =			mwifiex_pcie_host_to_card,
+ 	.wakeup =			mwifiex_pm_wakeup_card,
+-- 
+cgit v0.12
+

5d554ea4f287665b839975ecb11bd29d49a5c9b5..24dad509ed5528bbbe31ff17f9fb39c0473ec8f4.patch

@@ -0,0 +1,32 @@
+From 24dad509ed5528bbbe31ff17f9fb39c0473ec8f4 Mon Sep 17 00:00:00 2001
+From: Vinod Koul <vinod.koul@intel.com>
+Date: Fri, 8 Jul 2016 18:30:18 +0530
+Subject: ASoC: Intel: atom: statify cht_quirk
+
+Sparse rightly warns:
+sound/soc/intel/atom/sst/sst_acpi.c:353:22: warning: symbol 'cht_quirk' was not declared. Should it be static?
+
+So statify this
+
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ sound/soc/intel/atom/sst/sst_acpi.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/sound/soc/intel/atom/sst/sst_acpi.c b/sound/soc/intel/atom/sst/sst_acpi.c
+index 82a374d..4d31849 100644
+--- a/sound/soc/intel/atom/sst/sst_acpi.c
++++ b/sound/soc/intel/atom/sst/sst_acpi.c
+@@ -350,7 +350,7 @@ static struct sst_acpi_mach cht_surface_mach = {
+ 	"10EC5640", "cht-bsw-rt5645", "intel/fw_sst_22a8.bin", "cht-bsw", NULL,
+ 								&chv_platform_data };
+ 
+-struct sst_acpi_mach *cht_quirk(void *arg)
++static struct sst_acpi_mach *cht_quirk(void *arg)
+ {
+ 	struct sst_acpi_mach *mach = arg;
+ 
+-- 
+cgit v0.12
+

6b3c33e985f20e7de07fc4b9b1a96dc452e37cb4..141bcf099076df1a74317a5b14dcd56c933b9de8.patch

@@ -0,0 +1,33 @@
+From 141bcf099076df1a74317a5b14dcd56c933b9de8 Mon Sep 17 00:00:00 2001
+From: Heinrich Schuchardt <xypron.glpk@gmx.de>
+Date: Wed, 18 May 2016 01:16:01 +0200
+Subject: mwiflex: avoid possible null pointer dereference
+
+Do not dereference card before checking against NULL value.
+
+Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+---
+ drivers/net/wireless/marvell/mwifiex/pcie.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.c b/drivers/net/wireless/marvell/mwifiex/pcie.c
+index 9246ce8..a35db02 100644
+--- a/drivers/net/wireless/marvell/mwifiex/pcie.c
++++ b/drivers/net/wireless/marvell/mwifiex/pcie.c
+@@ -2901,10 +2901,11 @@ static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
+ {
+ 	struct pcie_service_card *card = adapter->card;
+ 	const struct mwifiex_pcie_card_reg *reg;
+-	struct pci_dev *pdev = card->dev;
++	struct pci_dev *pdev;
+ 	int i;
+ 
+ 	if (card) {
++		pdev = card->dev;
+ 		if (card->msix_enable) {
+ 			for (i = 0; i < MWIFIEX_NUM_MSIX_VECTORS; i++)
+ 				synchronize_irq(card->msix_entries[i].vector);
+-- 
+cgit v0.12
+

ACPI-Limit-access-to-custom_method.patch

@@ -0,0 +1,31 @@
+From 4b85149b764cd024e3dd2aff9eb22a9e1aadd1fa Mon Sep 17 00:00:00 2001
+From: Matthew Garrett <matthew.garrett@nebula.com>
+Date: Fri, 9 Mar 2012 08:39:37 -0500
+Subject: [PATCH 04/20] ACPI: Limit access to custom_method
+
+custom_method effectively allows arbitrary access to system memory, making
+it possible for an attacker to circumvent restrictions on module loading.
+Disable it if any such restrictions have been enabled.
+
+Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
+---
+ drivers/acpi/custom_method.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/drivers/acpi/custom_method.c b/drivers/acpi/custom_method.c
+index c68e72414a67..4277938af700 100644
+--- a/drivers/acpi/custom_method.c
++++ b/drivers/acpi/custom_method.c
+@@ -29,6 +29,9 @@ static ssize_t cm_write(struct file *file, const char __user * user_buf,
+ 	struct acpi_table_header table;
+ 	acpi_status status;
+ 
++	if (secure_modules())
++		return -EPERM;
++
+ 	if (!(*ppos)) {
+ 		/* parse the table header to get the table length */
+ 		if (count <= sizeof(struct acpi_table_header))
+-- 
+2.4.3
+

ARM-tegra-usb-no-reset.patch

@@ -0,0 +1,28 @@
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Thu, 3 May 2012 20:27:11 +0100
+Subject: [PATCH] ARM: tegra: usb no reset
+
+Patch for disconnect issues with storage attached to a
+ tegra-ehci controller
+---
+ drivers/usb/core/hub.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
+index 43cb2f2e3b43..7f838ec11c81 100644
+--- a/drivers/usb/core/hub.c
++++ b/drivers/usb/core/hub.c
+@@ -4996,6 +4996,13 @@ static void hub_event(struct work_struct *work)
+ 			(u16) hub->change_bits[0],
+ 			(u16) hub->event_bits[0]);
+ 
++	/* Don't disconnect USB-SATA on TrimSlice */
++	if (strcmp(dev_name(hdev->bus->controller), "tegra-ehci.0") == 0) {
++		if ((hdev->state == 7) && (hub->change_bits[0] == 0) &&
++				(hub->event_bits[0] == 0x2))
++			hub->event_bits[0] = 0;
++	}
++
+ 	/* Lock the device, then check to see if we were
+ 	 * disconnected while waiting for the lock to succeed. */
+ 	usb_lock_device(hdev);

ASoC_Intel_Add_support_for_surface3_tablet.patch

@@ -0,0 +1,356 @@
+From vinod.koul@intel.com Fri Jul  8 12:03:22 2016
+Return-Path: <vinod.koul@intel.com>
+Delivered-To: hadess@hadess.net
+Received: from spool.mail.gandi.net (mspool1-d.mgt.gandi.net [10.0.21.131])
+	by nmboxes111.sd2.0x35.net (Postfix) with ESMTP id 79E3B21C96
+	for <hadess@hadess.net>; Fri,  8 Jul 2016 12:03:22 +0200 (CEST)
+Received: from mfilter40-d.gandi.net (mfilter40-d.gandi.net
+ [217.70.178.171]) by spool.mail.gandi.net (Postfix) with ESMTP id
+ 700992260FC for <hadess@hadess.net>; Fri,  8 Jul 2016 12:03:22 +0200 (CEST)
+X-Virus-Scanned: Debian amavisd-new at mfilter40-d.gandi.net
+Received: from spool.mail.gandi.net ([IPv6:::ffff:10.0.21.131]) by
+ mfilter40-d.gandi.net (mfilter40-d.gandi.net [::ffff:10.0.15.180])
+ (amavisd-new, port 10024) with ESMTP id qK5K-waPj4Ol for
+ <hadess@hadess.net>; Fri,  8 Jul 2016 12:03:20 +0200 (CEST)
+Received: from mga14.intel.com (mga14.intel.com [192.55.52.115])
+	by spool.mail.gandi.net (Postfix) with ESMTP id D6DE42260D7
+	for <bugzilla@hadess.net>; Fri,  8 Jul 2016 12:03:09 +0200 (CEST)
+Received: from fmsmga003.fm.intel.com ([10.253.24.29])
+  by fmsmga103.fm.intel.com with ESMTP; 08 Jul 2016 03:02:59 -0700
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+   d="scan'208";a="731352416"
+Received: from vkoul-udesk7.iind.intel.com ([10.223.84.143])
+  by FMSMGA003.fm.intel.com with ESMTP; 08 Jul 2016 03:02:55 -0700
+From: Vinod Koul <vinod.koul@intel.com>
+To: alsa-devel@alsa-project.org
+Cc: broonie@kernel.org,
+	liam.r.girdwood@linux.intel.com,
+	patches.audio@intel.com,
+	Stephen Just <stephenjust@gmail.com>,
+	Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>,
+	apterix@gmail.com,
+	bugzilla@hadess.net,
+	Vinod Koul <vinod.koul@intel.com>,
+	Sachin Mokashi <sachinx.mokashi@intel.com>
+Subject: [PATCH 1/3] ASoC: Intel: Atom: Add quirk for Surface 3
+Date: Fri,  8 Jul 2016 15:39:49 +0530
+Message-Id: <1467972591-29175-2-git-send-email-vinod.koul@intel.com>
+X-Mailer: git-send-email 1.9.1
+In-Reply-To: <1467972591-29175-1-git-send-email-vinod.koul@intel.com>
+References: <1467972591-29175-1-git-send-email-vinod.koul@intel.com>
+X-Evolution-Source: 1353784233.13280.3@sirocco.hadess.net
+Content-Transfer-Encoding: 8bit
+Mime-Version: 1.0
+
+Surface 3 is CHT based device which shows up with RT5645 codec. But the
+BIOS reports ACPI ID as 5640!
+
+To solve this, add a DMI overide for cht-5640 machine.
+
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=98001
+Signed-off-by: Sachin Mokashi <sachinx.mokashi@intel.com>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ sound/soc/intel/atom/sst/sst_acpi.c | 44 ++++++++++++++++++++++++++++++++++++-
+ sound/soc/intel/common/sst-acpi.h   |  2 +-
+ 2 files changed, 44 insertions(+), 2 deletions(-)
+
+diff --git a/sound/soc/intel/atom/sst/sst_acpi.c b/sound/soc/intel/atom/sst/sst_acpi.c
+index 3bc4b63b2f9d..82a374d885a7 100644
+--- a/sound/soc/intel/atom/sst/sst_acpi.c
++++ b/sound/soc/intel/atom/sst/sst_acpi.c
+@@ -28,6 +28,7 @@
+ #include <linux/firmware.h>
+ #include <linux/pm_runtime.h>
+ #include <linux/pm_qos.h>
++#include <linux/dmi.h>
+ #include <linux/acpi.h>
+ #include <asm/platform_sst_audio.h>
+ #include <sound/core.h>
+@@ -237,6 +238,9 @@ static int sst_acpi_probe(struct platform_device *pdev)
+ 		dev_err(dev, "No matching machine driver found\n");
+ 		return -ENODEV;
+ 	}
++	if (mach->machine_quirk)
++		mach = mach->machine_quirk(mach);
++
+ 	pdata = mach->pdata;
+ 
+ 	ret = kstrtouint(id->id, 16, &dev_id);
+@@ -320,6 +324,44 @@ static int sst_acpi_remove(struct platform_device *pdev)
+ 	return 0;
+ }
+ 
++static unsigned long cht_machine_id;
++
++#define CHT_SURFACE_MACH 1
++
++static int cht_surface_quirk_cb(const struct dmi_system_id *id)
++{
++	cht_machine_id = CHT_SURFACE_MACH;
++	return 1;
++}
++
++
++static const struct dmi_system_id cht_table[] = {
++	{
++		.callback = cht_surface_quirk_cb,
++		.matches = {
++			DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
++			DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"),
++		},
++	},
++};
++
++
++static struct sst_acpi_mach cht_surface_mach = {
++	"10EC5640", "cht-bsw-rt5645", "intel/fw_sst_22a8.bin", "cht-bsw", NULL,
++								&chv_platform_data };
++
++struct sst_acpi_mach *cht_quirk(void *arg)
++{
++	struct sst_acpi_mach *mach = arg;
++
++	dmi_check_system(cht_table);
++
++	if (cht_machine_id == CHT_SURFACE_MACH)
++		return &cht_surface_mach;
++	else
++		return mach;
++}
++
+ static struct sst_acpi_mach sst_acpi_bytcr[] = {
+ 	{"10EC5640", "bytcr_rt5640", "intel/fw_sst_0f28.bin", "bytcr_rt5640", NULL,
+ 						&byt_rvp_platform_data },
+@@ -343,7 +385,7 @@ static struct sst_acpi_mach sst_acpi_chv[] = {
+ 	{"193C9890", "cht-bsw-max98090", "intel/fw_sst_22a8.bin", "cht-bsw", NULL,
+ 						&chv_platform_data },
+ 	/* some CHT-T platforms rely on RT5640, use Baytrail machine driver */
+-	{"10EC5640", "bytcr_rt5640", "intel/fw_sst_22a8.bin", "bytcr_rt5640", NULL,
++	{"10EC5640", "bytcr_rt5640", "intel/fw_sst_22a8.bin", "bytcr_rt5640", cht_quirk,
+ 						&chv_platform_data },
+ 
+ 	{},
+diff --git a/sound/soc/intel/common/sst-acpi.h b/sound/soc/intel/common/sst-acpi.h
+index 8398cb227ba9..504b0e4fedd4 100644
+--- a/sound/soc/intel/common/sst-acpi.h
++++ b/sound/soc/intel/common/sst-acpi.h
+@@ -40,6 +40,6 @@ struct sst_acpi_mach {
+ 
+ 	/* board name */
+ 	const char *board;
+-	void (*machine_quirk)(void);
++	struct sst_acpi_mach * (*machine_quirk)(void *arg);
+ 	void *pdata;
+ };
+-- 
+1.9.1
+
+
+From vinod.koul@intel.com Fri Jul  8 12:03:22 2016
+Return-Path: <vinod.koul@intel.com>
+Delivered-To: hadess@hadess.net
+Received: from spool.mail.gandi.net (mspool1-d.mgt.gandi.net [10.0.21.131])
+	by nmboxes111.sd2.0x35.net (Postfix) with ESMTP id 94C7121C96
+	for <hadess@hadess.net>; Fri,  8 Jul 2016 12:03:22 +0200 (CEST)
+Received: from mfilter49-d.gandi.net (mfilter49-d.gandi.net
+ [217.70.178.180]) by spool.mail.gandi.net (Postfix) with ESMTP id
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+   d="scan'208";a="731352436"
+Received: from vkoul-udesk7.iind.intel.com ([10.223.84.143])
+  by FMSMGA003.fm.intel.com with ESMTP; 08 Jul 2016 03:02:58 -0700
+From: Vinod Koul <vinod.koul@intel.com>
+To: alsa-devel@alsa-project.org
+Cc: broonie@kernel.org,
+	liam.r.girdwood@linux.intel.com,
+	patches.audio@intel.com,
+	Stephen Just <stephenjust@gmail.com>,
+	Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>,
+	apterix@gmail.com,
+	bugzilla@hadess.net,
+	Vinod Koul <vinod.koul@intel.com>,
+	Sachin Mokashi <sachinx.mokashi@intel.com>
+Subject: [PATCH 2/3] ASoC: rt5645: Add ACPI ID 10EC5640
+Date: Fri,  8 Jul 2016 15:39:50 +0530
+Message-Id: <1467972591-29175-3-git-send-email-vinod.koul@intel.com>
+X-Mailer: git-send-email 1.9.1
+In-Reply-To: <1467972591-29175-1-git-send-email-vinod.koul@intel.com>
+References: <1467972591-29175-1-git-send-email-vinod.koul@intel.com>
+X-Evolution-Source: 1353784233.13280.3@sirocco.hadess.net
+Content-Transfer-Encoding: 8bit
+Mime-Version: 1.0
+
+Some CHT platforms use RT5645 codec which has entry 10EC5640 so add it.
+Also add DMI quirk for jack detection.
+
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=98001
+Signed-off-by: Sachin Mokashi <sachinx.mokashi@intel.com>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+[Jack detection]
+Suggested-by: Stephen Just <stephenjust@gmail.com>
+---
+ sound/soc/codecs/rt5645.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c
+index 3c6594da6c9c..761ca88c4cdd 100644
+--- a/sound/soc/codecs/rt5645.c
++++ b/sound/soc/codecs/rt5645.c
+@@ -3531,6 +3531,7 @@ MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
+ static const struct acpi_device_id rt5645_acpi_match[] = {
+ 	{ "10EC5645", 0 },
+ 	{ "10EC5650", 0 },
++	{ "10EC5640", 0 },
+ 	{},
+ };
+ MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
+@@ -3561,6 +3562,12 @@ static const struct dmi_system_id dmi_platform_intel_braswell[] = {
+ 			DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
+ 		},
+ 	},
++	{
++		.ident = "Microsoft Surface 3",
++		.matches = {
++			DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"),
++		},
++	},
+ 	{ }
+ };
+ 
+-- 
+1.9.1
+
+
+From vinod.koul@intel.com Fri Jul  8 12:03:25 2016
+Return-Path: <vinod.koul@intel.com>
+Delivered-To: hadess@hadess.net
+Received: from spool.mail.gandi.net (mspool7-d.mgt.gandi.net [10.0.21.138])
+	by nmboxes111.sd2.0x35.net (Postfix) with ESMTP id E535621C96
+	for <hadess@hadess.net>; Fri,  8 Jul 2016 12:03:25 +0200 (CEST)
+Received: from mfilter17-d.gandi.net (mfilter17-d.gandi.net
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+Received: from vkoul-udesk7.iind.intel.com ([10.223.84.143])
+  by FMSMGA003.fm.intel.com with ESMTP; 08 Jul 2016 03:03:02 -0700
+From: Vinod Koul <vinod.koul@intel.com>
+To: alsa-devel@alsa-project.org
+Cc: broonie@kernel.org,
+	liam.r.girdwood@linux.intel.com,
+	patches.audio@intel.com,
+	Stephen Just <stephenjust@gmail.com>,
+	Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>,
+	apterix@gmail.com,
+	bugzilla@hadess.net,
+	Vinod Koul <vinod.koul@intel.com>,
+	Sachin Mokashi <sachinx.mokashi@intel.com>
+Subject: [PATCH 3/3] ASoC: Intel: Add surface3 entry in CHT-RT5645 machine
+Date: Fri,  8 Jul 2016 15:39:51 +0530
+Message-Id: <1467972591-29175-4-git-send-email-vinod.koul@intel.com>
+X-Mailer: git-send-email 1.9.1
+In-Reply-To: <1467972591-29175-1-git-send-email-vinod.koul@intel.com>
+References: <1467972591-29175-1-git-send-email-vinod.koul@intel.com>
+X-Evolution-Source: 1353784233.13280.3@sirocco.hadess.net
+Content-Transfer-Encoding: 8bit
+Mime-Version: 1.0
+
+Surface3 device is a CHT machine, so add entry for it.
+Also update the HID from BIOS.
+
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=98001
+Signed-off-by: Sachin Mokashi <sachinx.mokashi@intel.com>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ sound/soc/intel/boards/cht_bsw_rt5645.c | 20 +++++++++++++++++++-
+ 1 file changed, 19 insertions(+), 1 deletion(-)
+
+diff --git a/sound/soc/intel/boards/cht_bsw_rt5645.c b/sound/soc/intel/boards/cht_bsw_rt5645.c
+index d7ef292c402d..f26c7b8545ae 100644
+--- a/sound/soc/intel/boards/cht_bsw_rt5645.c
++++ b/sound/soc/intel/boards/cht_bsw_rt5645.c
+@@ -30,6 +30,7 @@
+ #include <sound/jack.h>
+ #include "../../codecs/rt5645.h"
+ #include "../atom/sst-atom-controls.h"
++#include "../common/sst-acpi.h"
+ 
+ #define CHT_PLAT_CLK_3_HZ	19200000
+ #define CHT_CODEC_DAI	"rt5645-aif1"
+@@ -340,10 +341,13 @@ static struct snd_soc_card snd_soc_card_chtrt5650 = {
+ };
+ 
+ static struct cht_acpi_card snd_soc_cards[] = {
++	{"10EC5640", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645},
+ 	{"10EC5645", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645},
+ 	{"10EC5650", CODEC_TYPE_RT5650, &snd_soc_card_chtrt5650},
+ };
+ 
++static char cht_rt5640_codec_name[16]; /* i2c-<HID>:00 with HID being 8 chars */
++
+ static int snd_cht_mc_probe(struct platform_device *pdev)
+ {
+ 	int ret_val = 0;
+@@ -351,6 +355,9 @@ static int snd_cht_mc_probe(struct platform_device *pdev)
+ 	struct cht_mc_private *drv;
+ 	struct snd_soc_card *card = snd_soc_cards[0].soc_card;
+ 	char codec_name[16];
++	struct sst_acpi_mach *mach;
++	const char *i2c_name = NULL;
++	int dai_index;
+ 
+ 	drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC);
+ 	if (!drv)
+@@ -366,12 +373,23 @@ static int snd_cht_mc_probe(struct platform_device *pdev)
+ 		}
+ 	}
+ 	card->dev = &pdev->dev;
++	mach = card->dev->platform_data;
+ 	sprintf(codec_name, "i2c-%s:00", drv->acpi_card->codec_id);
+ 
+ 	/* set correct codec name */
+ 	for (i = 0; i < ARRAY_SIZE(cht_dailink); i++)
+-		if (!strcmp(card->dai_link[i].codec_name, "i2c-10EC5645:00"))
++		if (!strcmp(card->dai_link[i].codec_name, "i2c-10EC5645:00")) {
+ 			card->dai_link[i].codec_name = kstrdup(codec_name, GFP_KERNEL);
++			dai_index = i;
++		}
++
++	/* fixup codec name based on HID */
++	i2c_name = sst_acpi_find_name_from_hid(mach->id);
++	if (i2c_name != NULL) {
++		snprintf(cht_rt5640_codec_name, sizeof(cht_rt5640_codec_name),
++			"%s%s", "i2c-", i2c_name);
++		cht_dailink[dai_index].codec_name = cht_rt5640_codec_name;
++	}
+ 
+ 	snd_soc_card_set_drvdata(card, drv);
+ 	ret_val = devm_snd_soc_register_card(&pdev->dev, card);
+-- 
+1.9.1
+
+

Add-EFI-signature-data-types.patch

@@ -0,0 +1,57 @@
+From 5216de8394ff599e41c8540c0572368c18c51459 Mon Sep 17 00:00:00 2001
+From: Dave Howells <dhowells@redhat.com>
+Date: Tue, 23 Oct 2012 09:30:54 -0400
+Subject: [PATCH 4/9] Add EFI signature data types
+
+Add the data types that are used for containing hashes, keys and certificates
+for cryptographic verification.
+
+Bugzilla: N/A
+Upstream-status: Fedora mustard for now
+
+Signed-off-by: David Howells <dhowells@redhat.com>
+---
+ include/linux/efi.h | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+
+diff --git a/include/linux/efi.h b/include/linux/efi.h
+index 8cb38cfcba74..8c274b4ea8e6 100644
+--- a/include/linux/efi.h
++++ b/include/linux/efi.h
+@@ -647,6 +647,12 @@ void efi_native_runtime_setup(void);
+ 	EFI_GUID(0x4a67b082, 0x0a4c, 0x41cf, \
+ 		 0xb6, 0xc7, 0x44, 0x0b, 0x29, 0xbb, 0x8c, 0x4f)
+ 
++#define EFI_CERT_SHA256_GUID \
++    EFI_GUID(  0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28 )
++
++#define EFI_CERT_X509_GUID \
++    EFI_GUID(  0xa5c059a1, 0x94e4, 0x4aa7, 0x87, 0xb5, 0xab, 0x15, 0x5c, 0x2b, 0xf0, 0x72 )
++
+ typedef struct {
+ 	efi_guid_t guid;
+ 	u64 table;
+@@ -879,6 +885,20 @@ typedef struct {
+ 	efi_memory_desc_t entry[0];
+ } efi_memory_attributes_table_t;
+ 
++typedef struct  {
++	efi_guid_t signature_owner;
++	u8 signature_data[];
++} efi_signature_data_t;
++
++typedef struct {
++	efi_guid_t signature_type;
++	u32 signature_list_size;
++	u32 signature_header_size;
++	u32 signature_size;
++	u8 signature_header[];
++	/* efi_signature_data_t signatures[][] */
++} efi_signature_list_t;
++
+ /*
+  * All runtime access to EFI goes through this structure:
+  */
+-- 
+2.5.5
+

Add-an-EFI-signature-blob-parser-and-key-loader.patch

@@ -0,0 +1,179 @@
+From e36a2d65e25fdf42b50aa5dc17583d7bfd09c4c4 Mon Sep 17 00:00:00 2001
+From: Dave Howells <dhowells@redhat.com>
+Date: Tue, 23 Oct 2012 09:36:28 -0400
+Subject: [PATCH 5/9] Add an EFI signature blob parser and key loader.
+
+X.509 certificates are loaded into the specified keyring as asymmetric type
+keys.
+
+[labbott@fedoraproject.org: Drop KEY_ALLOC_TRUSTED]
+Signed-off-by: David Howells <dhowells@redhat.com>
+---
+ crypto/asymmetric_keys/Kconfig      |   8 +++
+ crypto/asymmetric_keys/Makefile     |   1 +
+ crypto/asymmetric_keys/efi_parser.c | 108 ++++++++++++++++++++++++++++++++++++
+ include/linux/efi.h                 |   4 ++
+ 4 files changed, 121 insertions(+)
+ create mode 100644 crypto/asymmetric_keys/efi_parser.c
+
+diff --git a/crypto/asymmetric_keys/Kconfig b/crypto/asymmetric_keys/Kconfig
+index e28e912000a7..94024e8aedaa 100644
+--- a/crypto/asymmetric_keys/Kconfig
++++ b/crypto/asymmetric_keys/Kconfig
+@@ -60,4 +60,12 @@ config SIGNED_PE_FILE_VERIFICATION
+ 	  This option provides support for verifying the signature(s) on a
+ 	  signed PE binary.
+ 
++config EFI_SIGNATURE_LIST_PARSER
++	bool "EFI signature list parser"
++	depends on EFI
++	select X509_CERTIFICATE_PARSER
++	help
++	  This option provides support for parsing EFI signature lists for
++	  X.509 certificates and turning them into keys.
++
+ endif # ASYMMETRIC_KEY_TYPE
+diff --git a/crypto/asymmetric_keys/Makefile b/crypto/asymmetric_keys/Makefile
+index 6516855bec18..c099fe15ed6d 100644
+--- a/crypto/asymmetric_keys/Makefile
++++ b/crypto/asymmetric_keys/Makefile
+@@ -10,6 +10,7 @@ asymmetric_keys-y := \
+ 	signature.o
+ 
+ obj-$(CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o
++obj-$(CONFIG_EFI_SIGNATURE_LIST_PARSER) += efi_parser.o
+ 
+ #
+ # X.509 Certificate handling
+diff --git a/crypto/asymmetric_keys/efi_parser.c b/crypto/asymmetric_keys/efi_parser.c
+new file mode 100644
+index 000000000000..636feb18b733
+--- /dev/null
++++ b/crypto/asymmetric_keys/efi_parser.c
+@@ -0,0 +1,108 @@
++/* EFI signature/key/certificate list parser
++ *
++ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
++ * Written by David Howells (dhowells@redhat.com)
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public Licence
++ * as published by the Free Software Foundation; either version
++ * 2 of the Licence, or (at your option) any later version.
++ */
++
++#define pr_fmt(fmt) "EFI: "fmt
++#include <linux/module.h>
++#include <linux/printk.h>
++#include <linux/err.h>
++#include <linux/efi.h>
++#include <keys/asymmetric-type.h>
++
++static __initdata efi_guid_t efi_cert_x509_guid = EFI_CERT_X509_GUID;
++
++/**
++ * parse_efi_signature_list - Parse an EFI signature list for certificates
++ * @data: The data blob to parse
++ * @size: The size of the data blob
++ * @keyring: The keyring to add extracted keys to
++ */
++int __init parse_efi_signature_list(const void *data, size_t size, struct key *keyring)
++{
++	unsigned offs = 0;
++	size_t lsize, esize, hsize, elsize;
++
++	pr_devel("-->%s(,%zu)\n", __func__, size);
++
++	while (size > 0) {
++		efi_signature_list_t list;
++		const efi_signature_data_t *elem;
++		key_ref_t key;
++
++		if (size < sizeof(list))
++			return -EBADMSG;
++
++		memcpy(&list, data, sizeof(list));
++		pr_devel("LIST[%04x] guid=%pUl ls=%x hs=%x ss=%x\n",
++			 offs,
++			 list.signature_type.b, list.signature_list_size,
++			 list.signature_header_size, list.signature_size);
++
++		lsize = list.signature_list_size;
++		hsize = list.signature_header_size;
++		esize = list.signature_size;
++		elsize = lsize - sizeof(list) - hsize;
++
++		if (lsize > size) {
++			pr_devel("<--%s() = -EBADMSG [overrun @%x]\n",
++				 __func__, offs);
++			return -EBADMSG;
++		}
++		if (lsize < sizeof(list) ||
++		    lsize - sizeof(list) < hsize ||
++		    esize < sizeof(*elem) ||
++		    elsize < esize ||
++		    elsize % esize != 0) {
++			pr_devel("- bad size combo @%x\n", offs);
++			return -EBADMSG;
++		}
++
++		if (efi_guidcmp(list.signature_type, efi_cert_x509_guid) != 0) {
++			data += lsize;
++			size -= lsize;
++			offs += lsize;
++			continue;
++		}
++
++		data += sizeof(list) + hsize;
++		size -= sizeof(list) + hsize;
++		offs += sizeof(list) + hsize;
++
++		for (; elsize > 0; elsize -= esize) {
++			elem = data;
++
++			pr_devel("ELEM[%04x]\n", offs);
++
++			key = key_create_or_update(
++				make_key_ref(keyring, 1),
++				"asymmetric",
++				NULL,
++				&elem->signature_data,
++				esize - sizeof(*elem),
++				(KEY_POS_ALL & ~KEY_POS_SETATTR) |
++				KEY_USR_VIEW,
++				KEY_ALLOC_NOT_IN_QUOTA);
++
++			if (IS_ERR(key))
++				pr_err("Problem loading in-kernel X.509 certificate (%ld)\n",
++				       PTR_ERR(key));
++			else
++				pr_notice("Loaded cert '%s' linked to '%s'\n",
++					  key_ref_to_ptr(key)->description,
++					  keyring->description);
++
++			data += esize;
++			size -= esize;
++			offs += esize;
++		}
++	}
++
++	return 0;
++}
+diff --git a/include/linux/efi.h b/include/linux/efi.h
+index 8c274b4ea8e6..ff1877145aa4 100644
+--- a/include/linux/efi.h
++++ b/include/linux/efi.h
+@@ -1044,6 +1044,10 @@ extern int efi_memattr_apply_permissions(struct mm_struct *mm,
+ char * __init efi_md_typeattr_format(char *buf, size_t size,
+ 				     const efi_memory_desc_t *md);
+ 
++struct key;
++extern int __init parse_efi_signature_list(const void *data, size_t size,
++					   struct key *keyring);
++
+ /**
+  * efi_range_is_wc - check the WC bit on an address range
+  * @start: starting kvirt address
+-- 
+2.5.5
+

Add-option-to-automatically-enforce-module-signature.patch

@@ -0,0 +1,217 @@
+From 0000dc9edd5997cc49b8893a9d5407f89dfa1307 Mon Sep 17 00:00:00 2001
+From: Matthew Garrett <matthew.garrett@nebula.com>
+Date: Fri, 9 Aug 2013 18:36:30 -0400
+Subject: [PATCH] Add option to automatically enforce module signatures when in
+ Secure Boot mode
+
+UEFI Secure Boot provides a mechanism for ensuring that the firmware will
+only load signed bootloaders and kernels. Certain use cases may also
+require that all kernel modules also be signed. Add a configuration option
+that enforces this automatically when enabled.
+
+Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
+---
+ Documentation/x86/zero-page.txt       |  2 ++
+ arch/x86/Kconfig                      | 11 ++++++
+ arch/x86/boot/compressed/eboot.c      | 66 +++++++++++++++++++++++++++++++++++
+ arch/x86/include/uapi/asm/bootparam.h |  3 +-
+ arch/x86/kernel/setup.c               |  6 ++++
+ include/linux/module.h                |  6 ++++
+ kernel/module.c                       |  7 ++++
+ 7 files changed, 100 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/x86/zero-page.txt b/Documentation/x86/zero-page.txt
+index 95a4d34af3fd..b8527c6b7646 100644
+--- a/Documentation/x86/zero-page.txt
++++ b/Documentation/x86/zero-page.txt
+@@ -31,6 +31,8 @@ Offset	Proto	Name		Meaning
+ 1E9/001	ALL	eddbuf_entries	Number of entries in eddbuf (below)
+ 1EA/001	ALL	edd_mbr_sig_buf_entries	Number of entries in edd_mbr_sig_buffer
+ 				(below)
++1EB/001	ALL     kbd_status      Numlock is enabled
++1EC/001	ALL     secure_boot	Secure boot is enabled in the firmware
+ 1EF/001	ALL	sentinel	Used to detect broken bootloaders
+ 290/040	ALL	edd_mbr_sig_buffer EDD MBR signatures
+ 2D0/A00	ALL	e820_map	E820 memory map table
+diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
+index 0a7b885964ba..29b8ba9ae713 100644
+--- a/arch/x86/Kconfig
++++ b/arch/x86/Kconfig
+@@ -1776,6 +1776,17 @@ config EFI_MIXED
+ 
+ 	   If unsure, say N.
+ 
++config EFI_SECURE_BOOT_SIG_ENFORCE
++	def_bool n
++	depends on EFI
++	prompt "Force module signing when UEFI Secure Boot is enabled"
++	---help---
++	  UEFI Secure Boot provides a mechanism for ensuring that the
++	  firmware will only load signed bootloaders and kernels. Certain
++	  use cases may also require that all kernel modules also be signed.
++	  Say Y here to automatically enable module signature enforcement
++	  when a system boots with UEFI Secure Boot enabled.
++
+ config SECCOMP
+ 	def_bool y
+ 	prompt "Enable seccomp to safely compute untrusted bytecode"
+diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c
+index 52fef606bc54..6b8b9a775b46 100644
+--- a/arch/x86/boot/compressed/eboot.c
++++ b/arch/x86/boot/compressed/eboot.c
+@@ -12,6 +12,7 @@
+ #include <asm/efi.h>
+ #include <asm/setup.h>
+ #include <asm/desc.h>
++#include <asm/bootparam_utils.h>
+ 
+ #include "../string.h"
+ #include "eboot.h"
+@@ -571,6 +572,67 @@ free_handle:
+ 	efi_call_early(free_pool, pci_handle);
+ }
+ 
++static int get_secure_boot(void)
++{
++	u8 sb, setup;
++	unsigned long datasize = sizeof(sb);
++	efi_guid_t var_guid = EFI_GLOBAL_VARIABLE_GUID;
++	efi_status_t status;
++
++	status = efi_early->call((unsigned long)sys_table->runtime->get_variable,
++				L"SecureBoot", &var_guid, NULL, &datasize, &sb);
++
++	if (status != EFI_SUCCESS)
++		return 0;
++
++	if (sb == 0)
++		return 0;
++
++
++	status = efi_early->call((unsigned long)sys_table->runtime->get_variable,
++				L"SetupMode", &var_guid, NULL, &datasize,
++				&setup);
++
++	if (status != EFI_SUCCESS)
++		return 0;
++
++	if (setup == 1)
++		return 0;
++
++	return 1;
++}
++
++
++/*
++ * See if we have Graphics Output Protocol
++ */
++static efi_status_t setup_gop(struct screen_info *si, efi_guid_t *proto,
++			      unsigned long size)
++{
++	efi_status_t status;
++	void **gop_handle = NULL;
++
++	status = efi_call_early(allocate_pool, EFI_LOADER_DATA,
++				size, (void **)&gop_handle);
++	if (status != EFI_SUCCESS)
++		return status;
++
++	status = efi_call_early(locate_handle,
++				EFI_LOCATE_BY_PROTOCOL,
++				proto, NULL, &size, gop_handle);
++	if (status != EFI_SUCCESS)
++		goto free_handle;
++
++	if (efi_early->is64)
++		status = setup_gop64(si, proto, size, gop_handle);
++	else
++		status = setup_gop32(si, proto, size, gop_handle);
++
++free_handle:
++	efi_call_early(free_pool, gop_handle);
++	return status;
++}
++
+ static efi_status_t
+ setup_uga32(void **uga_handle, unsigned long size, u32 *width, u32 *height)
+ {
+@@ -1126,6 +1188,10 @@ struct boot_params *efi_main(struct efi_config *c,
+ 	else
+ 		setup_boot_services32(efi_early);
+ 
++	sanitize_boot_params(boot_params);
++
++	boot_params->secure_boot = get_secure_boot();
++
+ 	setup_graphics(boot_params);
+ 
+ 	setup_efi_pci(boot_params);
+diff --git a/arch/x86/include/uapi/asm/bootparam.h b/arch/x86/include/uapi/asm/bootparam.h
+index c18ce67495fa..2b3e5427097b 100644
+--- a/arch/x86/include/uapi/asm/bootparam.h
++++ b/arch/x86/include/uapi/asm/bootparam.h
+@@ -134,7 +134,8 @@ struct boot_params {
+ 	__u8  eddbuf_entries;				/* 0x1e9 */
+ 	__u8  edd_mbr_sig_buf_entries;			/* 0x1ea */
+ 	__u8  kbd_status;				/* 0x1eb */
+-	__u8  _pad5[3];					/* 0x1ec */
++	__u8  secure_boot;				/* 0x1ec */
++	__u8  _pad5[2];					/* 0x1ed */
+ 	/*
+ 	 * The sentinel is set to a nonzero value (0xff) in header.S.
+ 	 *
+diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
+index c4e7b3991b60..bdb9881c7afd 100644
+--- a/arch/x86/kernel/setup.c
++++ b/arch/x86/kernel/setup.c
+@@ -1152,6 +1152,12 @@ void __init setup_arch(char **cmdline_p)
+ 
+ 	io_delay_init();
+ 
++#ifdef CONFIG_EFI_SECURE_BOOT_SIG_ENFORCE
++	if (boot_params.secure_boot) {
++		enforce_signed_modules();
++	}
++#endif
++
+ 	/*
+ 	 * Parse the ACPI tables for possible boot-time SMP configuration.
+ 	 */
+diff --git a/include/linux/module.h b/include/linux/module.h
+index 082298a09df1..38d0597f7615 100644
+--- a/include/linux/module.h
++++ b/include/linux/module.h
+@@ -273,6 +273,12 @@ const struct exception_table_entry *search_exception_tables(unsigned long add);
+ 
+ struct notifier_block;
+ 
++#ifdef CONFIG_MODULE_SIG
++extern void enforce_signed_modules(void);
++#else
++static inline void enforce_signed_modules(void) {};
++#endif
++
+ #ifdef CONFIG_MODULES
+ 
+ extern int modules_disabled; /* for sysctl */
+diff --git a/kernel/module.c b/kernel/module.c
+index 3c384968f553..ea484f3a35b2 100644
+--- a/kernel/module.c
++++ b/kernel/module.c
+@@ -4200,6 +4200,13 @@ void module_layout(struct module *mod,
+ EXPORT_SYMBOL(module_layout);
+ #endif
+ 
++#ifdef CONFIG_MODULE_SIG
++void enforce_signed_modules(void)
++{
++	sig_enforce = true;
++}
++#endif
++
+ bool secure_modules(void)
+ {
+ #ifdef CONFIG_MODULE_SIG
+-- 
+2.5.5
+

Add-secure_modules-call.patch

@@ -0,0 +1,63 @@
+From 0f6eec5ca124baf1372fb4edeacd11a002378f5e Mon Sep 17 00:00:00 2001
+From: Matthew Garrett <matthew.garrett@nebula.com>
+Date: Fri, 9 Aug 2013 17:58:15 -0400
+Subject: [PATCH 01/20] Add secure_modules() call
+
+Provide a single call to allow kernel code to determine whether the system
+has been configured to either disable module loading entirely or to load
+only modules signed with a trusted key.
+
+Bugzilla: N/A
+Upstream-status: Fedora mustard.  Replaced by securelevels, but that was nak'd
+
+Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
+---
+ include/linux/module.h |  6 ++++++
+ kernel/module.c        | 10 ++++++++++
+ 2 files changed, 16 insertions(+)
+
+diff --git a/include/linux/module.h b/include/linux/module.h
+index 3daf2b3..082298a 100644
+--- a/include/linux/module.h
++++ b/include/linux/module.h
+@@ -655,6 +655,8 @@ static inline bool is_livepatch_module(struct module *mod)
+ }
+ #endif /* CONFIG_LIVEPATCH */
+ 
++extern bool secure_modules(void);
++
+ #else /* !CONFIG_MODULES... */
+ 
+ /* Given an address, look for it in the exception tables. */
+@@ -771,6 +773,10 @@ static inline bool module_requested_async_probing(struct module *module)
+ 	return false;
+ }
+ 
++static inline bool secure_modules(void)
++{
++	return false;
++}
+ #endif /* CONFIG_MODULES */
+ 
+ #ifdef CONFIG_SYSFS
+diff --git a/kernel/module.c b/kernel/module.c
+index 5f71aa6..3c38496 100644
+--- a/kernel/module.c
++++ b/kernel/module.c
+@@ -4199,3 +4199,13 @@ void module_layout(struct module *mod,
+ }
+ EXPORT_SYMBOL(module_layout);
+ #endif
++
++bool secure_modules(void)
++{
++#ifdef CONFIG_MODULE_SIG
++	return (sig_enforce || modules_disabled);
++#else
++	return modules_disabled;
++#endif
++}
++EXPORT_SYMBOL(secure_modules);
+-- 
+2.5.5
+

Add-sysrq-option-to-disable-secure-boot-mode.patch

@@ -0,0 +1,246 @@
+From e27a9a98dcf3ff95568593026da065a72ad21b92 Mon Sep 17 00:00:00 2001
+From: Kyle McMartin <kyle@redhat.com>
+Date: Fri, 30 Aug 2013 09:28:51 -0400
+Subject: [PATCH 9/9] Add sysrq option to disable secure boot mode
+
+Bugzilla: N/A
+Upstream-status: Fedora mustard
+---
+ arch/x86/kernel/setup.c     | 36 ++++++++++++++++++++++++++++++++++++
+ drivers/input/misc/uinput.c |  1 +
+ drivers/tty/sysrq.c         | 19 +++++++++++++------
+ include/linux/input.h       |  5 +++++
+ include/linux/sysrq.h       |  8 +++++++-
+ kernel/debug/kdb/kdb_main.c |  2 +-
+ kernel/module.c             |  2 +-
+ 7 files changed, 64 insertions(+), 9 deletions(-)
+
+diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
+index a666b6c29c77..7732c769937b 100644
+--- a/arch/x86/kernel/setup.c
++++ b/arch/x86/kernel/setup.c
+@@ -70,6 +70,11 @@
+ #include <linux/tboot.h>
+ #include <linux/jiffies.h>
+ 
++#include <linux/fips.h>
++#include <linux/cred.h>
++#include <linux/sysrq.h>
++#include <linux/init_task.h>
++
+ #include <video/edid.h>
+ 
+ #include <asm/mtrr.h>
+@@ -1286,6 +1291,37 @@ void __init i386_reserve_resources(void)
+ 
+ #endif /* CONFIG_X86_32 */
+ 
++#ifdef CONFIG_MAGIC_SYSRQ
++#ifdef CONFIG_MODULE_SIG
++extern bool sig_enforce;
++#endif
++
++static void sysrq_handle_secure_boot(int key)
++{
++	if (!efi_enabled(EFI_SECURE_BOOT))
++		return;
++
++	pr_info("Secure boot disabled\n");
++#ifdef CONFIG_MODULE_SIG
++	sig_enforce = fips_enabled;
++#endif
++}
++static struct sysrq_key_op secure_boot_sysrq_op = {
++	.handler	=	sysrq_handle_secure_boot,
++	.help_msg	=	"unSB(x)",
++	.action_msg	=	"Disabling Secure Boot restrictions",
++	.enable_mask	=	SYSRQ_DISABLE_USERSPACE,
++};
++static int __init secure_boot_sysrq(void)
++{
++	if (efi_enabled(EFI_SECURE_BOOT))
++		register_sysrq_key('x', &secure_boot_sysrq_op);
++	return 0;
++}
++late_initcall(secure_boot_sysrq);
++#endif /*CONFIG_MAGIC_SYSRQ*/
++
++
+ static struct notifier_block kernel_offset_notifier = {
+ 	.notifier_call = dump_kernel_offset
+ };
+diff --git a/drivers/input/misc/uinput.c b/drivers/input/misc/uinput.c
+index abe1a927b332..f4126fcec10c 100644
+--- a/drivers/input/misc/uinput.c
++++ b/drivers/input/misc/uinput.c
+@@ -379,6 +379,7 @@ static int uinput_allocate_device(struct uinput_device *udev)
+ 	if (!udev->dev)
+ 		return -ENOMEM;
+ 
++	udev->dev->flags |= INPUTDEV_FLAGS_SYNTHETIC;
+ 	udev->dev->event = uinput_dev_event;
+ 	input_set_drvdata(udev->dev, udev);
+ 
+diff --git a/drivers/tty/sysrq.c b/drivers/tty/sysrq.c
+index e5139402e7f8..5ef2e04a03ad 100644
+--- a/drivers/tty/sysrq.c
++++ b/drivers/tty/sysrq.c
+@@ -478,6 +478,7 @@ static struct sysrq_key_op *sysrq_key_table[36] = {
+ 	/* x: May be registered on mips for TLB dump */
+ 	/* x: May be registered on ppc/powerpc for xmon */
+ 	/* x: May be registered on sparc64 for global PMU dump */
++	/* x: May be registered on x86_64 for disabling secure boot */
+ 	NULL,				/* x */
+ 	/* y: May be registered on sparc64 for global register dump */
+ 	NULL,				/* y */
+@@ -521,7 +522,7 @@ static void __sysrq_put_key_op(int key, struct sysrq_key_op *op_p)
+                 sysrq_key_table[i] = op_p;
+ }
+ 
+-void __handle_sysrq(int key, bool check_mask)
++void __handle_sysrq(int key, int from)
+ {
+ 	struct sysrq_key_op *op_p;
+ 	int orig_log_level;
+@@ -541,11 +542,15 @@ void __handle_sysrq(int key, bool check_mask)
+ 
+         op_p = __sysrq_get_key_op(key);
+         if (op_p) {
++		/* Ban synthetic events from some sysrq functionality */
++		if ((from == SYSRQ_FROM_PROC || from == SYSRQ_FROM_SYNTHETIC) &&
++		    op_p->enable_mask & SYSRQ_DISABLE_USERSPACE)
++			printk("This sysrq operation is disabled from userspace.\n");
+ 		/*
+ 		 * Should we check for enabled operations (/proc/sysrq-trigger
+ 		 * should not) and is the invoked operation enabled?
+ 		 */
+-		if (!check_mask || sysrq_on_mask(op_p->enable_mask)) {
++		if (from == SYSRQ_FROM_KERNEL || sysrq_on_mask(op_p->enable_mask)) {
+ 			pr_cont("%s\n", op_p->action_msg);
+ 			console_loglevel = orig_log_level;
+ 			op_p->handler(key);
+@@ -577,7 +582,7 @@ void __handle_sysrq(int key, bool check_mask)
+ void handle_sysrq(int key)
+ {
+ 	if (sysrq_on())
+-		__handle_sysrq(key, true);
++		__handle_sysrq(key, SYSRQ_FROM_KERNEL);
+ }
+ EXPORT_SYMBOL(handle_sysrq);
+ 
+@@ -658,7 +663,7 @@ static void sysrq_do_reset(unsigned long _state)
+ static void sysrq_handle_reset_request(struct sysrq_state *state)
+ {
+ 	if (state->reset_requested)
+-		__handle_sysrq(sysrq_xlate[KEY_B], false);
++		__handle_sysrq(sysrq_xlate[KEY_B], SYSRQ_FROM_KERNEL);
+ 
+ 	if (sysrq_reset_downtime_ms)
+ 		mod_timer(&state->keyreset_timer,
+@@ -809,8 +814,10 @@ static bool sysrq_handle_keypress(struct sysrq_state *sysrq,
+ 
+ 	default:
+ 		if (sysrq->active && value && value != 2) {
++			int from = sysrq->handle.dev->flags & INPUTDEV_FLAGS_SYNTHETIC ?
++					SYSRQ_FROM_SYNTHETIC : 0;
+ 			sysrq->need_reinject = false;
+-			__handle_sysrq(sysrq_xlate[code], true);
++			__handle_sysrq(sysrq_xlate[code], from);
+ 		}
+ 		break;
+ 	}
+@@ -1094,7 +1101,7 @@ static ssize_t write_sysrq_trigger(struct file *file, const char __user *buf,
+ 
+ 		if (get_user(c, buf))
+ 			return -EFAULT;
+-		__handle_sysrq(c, false);
++		__handle_sysrq(c, SYSRQ_FROM_PROC);
+ 	}
+ 
+ 	return count;
+diff --git a/include/linux/input.h b/include/linux/input.h
+index 1e967694e9a5..2b56c6f9673c 100644
+--- a/include/linux/input.h
++++ b/include/linux/input.h
+@@ -42,6 +42,7 @@ struct input_value {
+  * @phys: physical path to the device in the system hierarchy
+  * @uniq: unique identification code for the device (if device has it)
+  * @id: id of the device (struct input_id)
++ * @flags: input device flags (SYNTHETIC, etc.)
+  * @propbit: bitmap of device properties and quirks
+  * @evbit: bitmap of types of events supported by the device (EV_KEY,
+  *	EV_REL, etc.)
+@@ -124,6 +125,8 @@ struct input_dev {
+ 	const char *uniq;
+ 	struct input_id id;
+ 
++	unsigned int flags;
++
+ 	unsigned long propbit[BITS_TO_LONGS(INPUT_PROP_CNT)];
+ 
+ 	unsigned long evbit[BITS_TO_LONGS(EV_CNT)];
+@@ -190,6 +193,8 @@ struct input_dev {
+ };
+ #define to_input_dev(d) container_of(d, struct input_dev, dev)
+ 
++#define	INPUTDEV_FLAGS_SYNTHETIC	0x000000001
++
+ /*
+  * Verify that we are in sync with input_device_id mod_devicetable.h #defines
+  */
+diff --git a/include/linux/sysrq.h b/include/linux/sysrq.h
+index 387fa7d05c98..4b07e30b3279 100644
+--- a/include/linux/sysrq.h
++++ b/include/linux/sysrq.h
+@@ -28,6 +28,8 @@
+ #define SYSRQ_ENABLE_BOOT	0x0080
+ #define SYSRQ_ENABLE_RTNICE	0x0100
+ 
++#define SYSRQ_DISABLE_USERSPACE	0x00010000
++
+ struct sysrq_key_op {
+ 	void (*handler)(int);
+ 	char *help_msg;
+@@ -42,8 +44,12 @@ struct sysrq_key_op {
+  * are available -- else NULL's).
+  */
+ 
++#define SYSRQ_FROM_KERNEL	0x0001
++#define SYSRQ_FROM_PROC		0x0002
++#define SYSRQ_FROM_SYNTHETIC	0x0004
++
+ void handle_sysrq(int key);
+-void __handle_sysrq(int key, bool check_mask);
++void __handle_sysrq(int key, int from);
+ int register_sysrq_key(int key, struct sysrq_key_op *op);
+ int unregister_sysrq_key(int key, struct sysrq_key_op *op);
+ struct sysrq_key_op *__sysrq_get_key_op(int key);
+diff --git a/kernel/debug/kdb/kdb_main.c b/kernel/debug/kdb/kdb_main.c
+index 2a20c0dfdafc..3d17205dab77 100644
+--- a/kernel/debug/kdb/kdb_main.c
++++ b/kernel/debug/kdb/kdb_main.c
+@@ -1968,7 +1968,7 @@ static int kdb_sr(int argc, const char **argv)
+ 		return KDB_ARGCOUNT;
+ 
+ 	kdb_trap_printk++;
+-	__handle_sysrq(*argv[1], check_mask);
++	__handle_sysrq(*argv[1], check_mask & SYSRQ_FROM_KERNEL);
+ 	kdb_trap_printk--;
+ 
+ 	return 0;
+diff --git a/kernel/module.c b/kernel/module.c
+index ea484f3a35b2..84b00659b0ee 100644
+--- a/kernel/module.c
++++ b/kernel/module.c
+@@ -269,7 +269,7 @@ static void module_assert_mutex_or_preempt(void)
+ #endif
+ }
+ 
+-static bool sig_enforce = IS_ENABLED(CONFIG_MODULE_SIG_FORCE);
++bool sig_enforce = IS_ENABLED(CONFIG_MODULE_SIG_FORCE);
+ #ifndef CONFIG_MODULE_SIG_FORCE
+ module_param(sig_enforce, bool_enable_only, 0644);
+ #endif /* !CONFIG_MODULE_SIG_FORCE */
+-- 
+2.5.5
+

Input-synaptics-pin-3-touches-when-the-firmware-repo.patch

@@ -0,0 +1,47 @@
+From: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+Date: Thu, 16 Apr 2015 13:01:46 -0400
+Subject: [PATCH] Input - synaptics: pin 3 touches when the firmware reports 3
+ fingers
+
+Synaptics PS/2 touchpad can send only 2 touches in a report. They can
+detect 4 or 5 and this information is valuable.
+
+In commit 63c4fda (Input: synaptics - allocate 3 slots to keep stability
+in image sensors), we allocate 3 slots, but we still continue to report
+the 2 available fingers. That means that the client sees 2 used slots while
+there is a total of 3 fingers advertised by BTN_TOOL_TRIPLETAP.
+
+For old kernels this is not a problem because max_slots was 2 and libinput/
+xorg-synaptics knew how to deal with that. Now that max_slot is 3, the
+clients ignore BTN_TOOL_TRIPLETAP and count the actual used slots (so 2).
+It then gets confused when receiving the BTN_TOOL_TRIPLETAP and DOUBLETAP
+information, and goes wild.
+
+We can pin the 3 slots until we get a total number of fingers below 2.
+
+Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1212230
+
+Signed-off-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
+---
+ drivers/input/mouse/synaptics.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c
+index 3a32caf06bf1..58102970f94f 100644
+--- a/drivers/input/mouse/synaptics.c
++++ b/drivers/input/mouse/synaptics.c
+@@ -940,6 +940,14 @@ static void synaptics_report_mt_data(struct psmouse *psmouse,
+ 		input_report_abs(dev, ABS_MT_PRESSURE, hw[i]->z);
+ 	}
+ 
++	/* keep (slot count <= num_fingers) by pinning all slots */
++	if (num_fingers >= 3) {
++		for (i = 0; i < 3; i++) {
++			input_mt_slot(dev, i);
++			input_mt_report_slot_state(dev, MT_TOOL_FINGER, true);
++		}
++	}
++
+ 	input_mt_drop_unused(dev);
+ 
+ 	/* Don't use active slot count to generate BTN_TOOL events. */

KEYS-Add-a-system-blacklist-keyring.patch

@@ -0,0 +1,102 @@
+From 096da19de900a115ee3610b666ecb7e55926623d Mon Sep 17 00:00:00 2001
+From: Josh Boyer <jwboyer@fedoraproject.org>
+Date: Fri, 26 Oct 2012 12:36:24 -0400
+Subject: [PATCH 6/9] KEYS: Add a system blacklist keyring
+
+This adds an additional keyring that is used to store certificates that
+are blacklisted.  This keyring is searched first when loading signed modules
+and if the module's certificate is found, it will refuse to load.  This is
+useful in cases where third party certificates are used for module signing.
+
+Signed-off-by: Josh Boyer <jwboyer@fedoraproject.org>
+---
+ certs/system_keyring.c        | 22 ++++++++++++++++++++++
+ include/keys/system_keyring.h |  4 ++++
+ init/Kconfig                  |  9 +++++++++
+ 3 files changed, 35 insertions(+)
+
+diff --git a/certs/system_keyring.c b/certs/system_keyring.c
+index 50979d6dcecd..787eeead2f57 100644
+--- a/certs/system_keyring.c
++++ b/certs/system_keyring.c
+@@ -22,6 +22,9 @@ static struct key *builtin_trusted_keys;
+ #ifdef CONFIG_SECONDARY_TRUSTED_KEYRING
+ static struct key *secondary_trusted_keys;
+ #endif
++#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING
++struct key *system_blacklist_keyring;
++#endif
+ 
+ extern __initconst const u8 system_certificate_list[];
+ extern __initconst const unsigned long system_certificate_list_size;
+@@ -99,6 +102,16 @@ static __init int system_trusted_keyring_init(void)
+ 	if (key_link(secondary_trusted_keys, builtin_trusted_keys) < 0)
+ 		panic("Can't link trusted keyrings\n");
+ #endif
++#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING
++	system_blacklist_keyring = keyring_alloc(".system_blacklist_keyring",
++			KUIDT_INIT(0), KGIDT_INIT(0), current_cred(),
++			((KEY_POS_ALL & ~KEY_POS_SETATTR) |
++			 KEY_USR_VIEW | KEY_USR_READ | KEY_USR_SEARCH),
++			KEY_ALLOC_NOT_IN_QUOTA,
++			NULL, NULL);
++	if (IS_ERR(system_blacklist_keyring))
++		panic("Can't allocate system blacklist keyring\n");
++#endif
+ 
+ 	return 0;
+ }
+@@ -214,6 +227,15 @@ int verify_pkcs7_signature(const void *data, size_t len,
+ 		trusted_keys = builtin_trusted_keys;
+ #endif
+ 	}
++#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING
++	ret = pkcs7_validate_trust(pkcs7, system_blacklist_keyring);
++	if (!ret) {
++		/* module is signed with a cert in the blacklist.  reject */
++		pr_err("Module key is in the blacklist\n");
++		ret = -EKEYREJECTED;
++		goto error;
++	}
++#endif
+ 	ret = pkcs7_validate_trust(pkcs7, trusted_keys);
+ 	if (ret < 0) {
+ 		if (ret == -ENOKEY)
+diff --git a/include/keys/system_keyring.h b/include/keys/system_keyring.h
+index fbd4647767e9..5bc291a3d261 100644
+--- a/include/keys/system_keyring.h
++++ b/include/keys/system_keyring.h
+@@ -33,6 +33,10 @@ extern int restrict_link_by_builtin_and_secondary_trusted(
+ #define restrict_link_by_builtin_and_secondary_trusted restrict_link_by_builtin_trusted
+ #endif
+ 
++#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING
++extern struct key *system_blacklist_keyring;
++#endif
++
+ #ifdef CONFIG_IMA_BLACKLIST_KEYRING
+ extern struct key *ima_blacklist_keyring;
+ 
+diff --git a/init/Kconfig b/init/Kconfig
+index a9c4aefd5436..e5449d5aeff9 100644
+--- a/init/Kconfig
++++ b/init/Kconfig
+@@ -1829,6 +1829,15 @@ config SYSTEM_DATA_VERIFICATION
+ 	  module verification, kexec image verification and firmware blob
+ 	  verification.
+ 
++config SYSTEM_BLACKLIST_KEYRING
++	bool "Provide system-wide ring of blacklisted keys"
++	depends on KEYS
++	help
++	  Provide a system keyring to which blacklisted keys can be added.
++	  Keys in the keyring are considered entirely untrusted.  Keys in this
++	  keyring are used by the module signature checking to reject loading
++	  of modules signed with a blacklisted key.
++
+ config PROFILING
+ 	bool "Profiling support"
+ 	help
+-- 
+2.5.5
+

Kbuild-Add-an-option-to-enable-GCC-VTA.patch

@@ -0,0 +1,89 @@
+From: Josh Stone <jistone@redhat.com>
+Date: Fri, 21 Nov 2014 10:40:00 -0800
+Subject: [PATCH] Kbuild: Add an option to enable GCC VTA
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Due to recent codegen issues, gcc -fvar-tracking-assignments was
+unconditionally disabled in commit 2062afb4f804a ("Fix gcc-4.9.0
+miscompilation of load_balance() in scheduler").  However, this reduces
+the debuginfo coverage for variable locations, especially in inline
+functions.  VTA is certainly not perfect either in those cases, but it
+is much better than without.  With compiler versions that have fixed the
+codegen bugs, we would prefer to have the better details for SystemTap,
+and surely other debuginfo consumers like perf will benefit as well.
+
+This patch simply makes CONFIG_DEBUG_INFO_VTA an option.  I considered
+Frank and Linus's discussion of a cc-option-like -fcompare-debug test,
+but I'm convinced that a narrow test of an arch-specific codegen issue
+is not really useful.  GCC has their own regression tests for this, so
+I'd suggest GCC_COMPARE_DEBUG=-fvar-tracking-assignments-toggle is more
+useful for kernel developers to test confidence.
+
+In fact, I ran into a couple more issues when testing for this patch[1],
+although neither of those had any codegen impact.
+ [1] https://bugzilla.redhat.com/show_bug.cgi?id=1140872
+
+With gcc-4.9.2-1.fc22, I can now build v3.18-rc5 with Fedora's i686 and
+x86_64 configs, and this is completely clean with GCC_COMPARE_DEBUG.
+
+Cc: Frank Ch. Eigler <fche@redhat.com>
+Cc: Jakub Jelinek <jakub@redhat.com>
+Cc: Josh Boyer <jwboyer@fedoraproject.org>
+Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Cc: Linus Torvalds <torvalds@linux-foundation.org>
+Cc: Andrew Morton <akpm@linux-foundation.org>
+Cc: Markus Trippelsdorf <markus@trippelsdorf.de>
+Cc: Michel Dänzer <michel@daenzer.net>
+Signed-off-by: Josh Stone <jistone@redhat.com>
+---
+ Makefile          |  4 ++++
+ lib/Kconfig.debug | 18 +++++++++++++++++-
+ 2 files changed, 21 insertions(+), 1 deletion(-)
+
+diff --git a/Makefile b/Makefile
+index 257ef5892ab7..3cc6f4477e78 100644
+--- a/Makefile
++++ b/Makefile
+@@ -701,7 +701,11 @@ KBUILD_CFLAGS	+= -fomit-frame-pointer
+ endif
+ endif
+ 
++ifdef CONFIG_DEBUG_INFO_VTA
++KBUILD_CFLAGS   += $(call cc-option, -fvar-tracking-assignments)
++else
+ KBUILD_CFLAGS   += $(call cc-option, -fno-var-tracking-assignments)
++endif
+ 
+ ifdef CONFIG_DEBUG_INFO
+ ifdef CONFIG_DEBUG_INFO_SPLIT
+diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
+index e2894b23efb6..d98afe18f704 100644
+--- a/lib/Kconfig.debug
++++ b/lib/Kconfig.debug
+@@ -165,7 +165,23 @@ config DEBUG_INFO_DWARF4
+ 	  Generate dwarf4 debug info. This requires recent versions
+ 	  of gcc and gdb. It makes the debug information larger.
+ 	  But it significantly improves the success of resolving
+-	  variables in gdb on optimized code.
++	  variables in gdb on optimized code.  The gcc docs also
++	  recommend enabling -fvar-tracking-assignments for maximum
++	  benefit. (see DEBUG_INFO_VTA)
++
++config DEBUG_INFO_VTA
++	bool "Enable var-tracking-assignments for debuginfo"
++	depends on DEBUG_INFO
++	help
++	  Enable gcc -fvar-tracking-assignments for improved debug
++	  information on variable locations in optimized code.  Per
++	  gcc, DEBUG_INFO_DWARF4 is recommended for best use of VTA.
++
++	  VTA has been implicated in codegen bugs (gcc PR61801,
++	  PR61904), so this may deserve some caution.  One can set
++	  GCC_COMPARE_DEBUG=-fvar-tracking-assignments-toggle in the
++	  environment to automatically compile everything both ways,
++	  generating an error if anything differs.
+ 
+ config GDB_SCRIPTS
+ 	bool "Provide GDB scripts for kernel debugging"

MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch

@@ -0,0 +1,231 @@
+From ba2b209daf984514229626803472e0b055832345 Mon Sep 17 00:00:00 2001
+From: Josh Boyer <jwboyer@fedoraproject.org>
+Date: Fri, 26 Oct 2012 12:42:16 -0400
+Subject: [PATCH] MODSIGN: Import certificates from UEFI Secure Boot
+
+Secure Boot stores a list of allowed certificates in the 'db' variable.
+This imports those certificates into the system trusted keyring.  This
+allows for a third party signing certificate to be used in conjunction
+with signed modules.  By importing the public certificate into the 'db'
+variable, a user can allow a module signed with that certificate to
+load.  The shim UEFI bootloader has a similar certificate list stored
+in the 'MokListRT' variable.  We import those as well.
+
+In the opposite case, Secure Boot maintains a list of disallowed
+certificates in the 'dbx' variable.  We load those certificates into
+the newly introduced system blacklist keyring and forbid any module
+signed with those from loading.
+
+Signed-off-by: Josh Boyer <jwboyer@fedoraproject.org>
+---
+ certs/system_keyring.c        | 13 ++++++
+ include/keys/system_keyring.h |  1 +
+ include/linux/efi.h           |  6 +++
+ init/Kconfig                  |  9 ++++
+ kernel/Makefile               |  3 ++
+ kernel/modsign_uefi.c         | 99 +++++++++++++++++++++++++++++++++++++++++++
+ 6 files changed, 131 insertions(+)
+ create mode 100644 kernel/modsign_uefi.c
+
+diff --git a/certs/system_keyring.c b/certs/system_keyring.c
+index 787eeead2f57..4d9123ed5c07 100644
+--- a/certs/system_keyring.c
++++ b/certs/system_keyring.c
+@@ -30,6 +30,19 @@ extern __initconst const u8 system_certificate_list[];
+ extern __initconst const unsigned long system_certificate_list_size;
+ 
+ /**
++ * get_system_keyring - Return a pointer to the system keyring
++ *
++ */
++struct key *get_system_keyring(void)
++{
++	struct key *system_keyring = NULL;
++
++	system_keyring = builtin_trusted_keys;
++	return system_keyring;
++}
++EXPORT_SYMBOL_GPL(get_system_keyring);
++
++/**
+  * restrict_link_to_builtin_trusted - Restrict keyring addition by built in CA
+  *
+  * Restrict the addition of keys into a keyring based on the key-to-be-added
+diff --git a/include/keys/system_keyring.h b/include/keys/system_keyring.h
+index 5bc291a3d261..56ff5715ab67 100644
+--- a/include/keys/system_keyring.h
++++ b/include/keys/system_keyring.h
+@@ -36,6 +36,7 @@ extern int restrict_link_by_builtin_and_secondary_trusted(
+ #ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING
+ extern struct key *system_blacklist_keyring;
+ #endif
++extern struct key *get_system_keyring(void);
+ 
+ #ifdef CONFIG_IMA_BLACKLIST_KEYRING
+ extern struct key *ima_blacklist_keyring;
+diff --git a/include/linux/efi.h b/include/linux/efi.h
+index ff1877145aa4..2483de19c719 100644
+--- a/include/linux/efi.h
++++ b/include/linux/efi.h
+@@ -658,6 +658,12 @@ typedef struct {
+ 	u64 table;
+ } efi_config_table_64_t;
+ 
++#define EFI_IMAGE_SECURITY_DATABASE_GUID \
++    EFI_GUID(  0xd719b2cb, 0x3d3a, 0x4596, 0xa3, 0xbc, 0xda, 0xd0, 0x0e, 0x67, 0x65, 0x6f )
++
++#define EFI_SHIM_LOCK_GUID \
++    EFI_GUID(  0x605dab50, 0xe046, 0x4300, 0xab, 0xb6, 0x3d, 0xd8, 0x10, 0xdd, 0x8b, 0x23 )
++
+ typedef struct {
+ 	efi_guid_t guid;
+ 	u32 table;
+diff --git a/init/Kconfig b/init/Kconfig
+index e5449d5aeff9..5408c96f6604 100644
+--- a/init/Kconfig
++++ b/init/Kconfig
+@@ -1979,6 +1979,15 @@ config MODULE_SIG_ALL
+ comment "Do not forget to sign required modules with scripts/sign-file"
+ 	depends on MODULE_SIG_FORCE && !MODULE_SIG_ALL
+ 
++config MODULE_SIG_UEFI
++	bool "Allow modules signed with certs stored in UEFI"
++	depends on MODULE_SIG && SYSTEM_BLACKLIST_KEYRING && EFI
++	select EFI_SIGNATURE_LIST_PARSER
++	help
++	  This will import certificates stored in UEFI and allow modules
++	  signed with those to be loaded.  It will also disallow loading
++	  of modules stored in the UEFI dbx variable.
++
+ choice
+ 	prompt "Which hash algorithm should modules be signed with?"
+ 	depends on MODULE_SIG
+diff --git a/kernel/Makefile b/kernel/Makefile
+index e2ec54e2b952..8dab549985d8 100644
+--- a/kernel/Makefile
++++ b/kernel/Makefile
+@@ -57,6 +57,7 @@ endif
+ obj-$(CONFIG_UID16) += uid16.o
+ obj-$(CONFIG_MODULES) += module.o
+ obj-$(CONFIG_MODULE_SIG) += module_signing.o
++obj-$(CONFIG_MODULE_SIG_UEFI) += modsign_uefi.o
+ obj-$(CONFIG_KALLSYMS) += kallsyms.o
+ obj-$(CONFIG_BSD_PROCESS_ACCT) += acct.o
+ obj-$(CONFIG_KEXEC_CORE) += kexec_core.o
+@@ -113,6 +114,8 @@ obj-$(CONFIG_MEMBARRIER) += membarrier.o
+ 
+ obj-$(CONFIG_HAS_IOMEM) += memremap.o
+ 
++$(obj)/modsign_uefi.o: KBUILD_CFLAGS += -fshort-wchar
++
+ $(obj)/configs.o: $(obj)/config_data.h
+ 
+ # config_data.h contains the same information as ikconfig.h but gzipped.
+diff --git a/kernel/modsign_uefi.c b/kernel/modsign_uefi.c
+new file mode 100644
+index 000000000000..fe4a6f2bf10a
+--- /dev/null
++++ b/kernel/modsign_uefi.c
+@@ -0,0 +1,99 @@
++#include <linux/kernel.h>
++#include <linux/sched.h>
++#include <linux/cred.h>
++#include <linux/err.h>
++#include <linux/efi.h>
++#include <linux/slab.h>
++#include <keys/asymmetric-type.h>
++#include <keys/system_keyring.h>
++#include "module-internal.h"
++
++static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, unsigned long *size)
++{
++	efi_status_t status;
++	unsigned long lsize = 4;
++	unsigned long tmpdb[4];
++	void *db = NULL;
++
++	status = efi.get_variable(name, guid, NULL, &lsize, &tmpdb);
++	if (status != EFI_BUFFER_TOO_SMALL) {
++		pr_err("Couldn't get size: 0x%lx\n", status);
++		return NULL;
++	}
++
++	db = kmalloc(lsize, GFP_KERNEL);
++	if (!db) {
++		pr_err("Couldn't allocate memory for uefi cert list\n");
++		goto out;
++	}
++
++	status = efi.get_variable(name, guid, NULL, &lsize, db);
++	if (status != EFI_SUCCESS) {
++		kfree(db);
++		db = NULL;
++		pr_err("Error reading db var: 0x%lx\n", status);
++	}
++out:
++	*size = lsize;
++	return db;
++}
++
++/*
++ *  * Load the certs contained in the UEFI databases
++ *   */
++static int __init load_uefi_certs(void)
++{
++	efi_guid_t secure_var = EFI_IMAGE_SECURITY_DATABASE_GUID;
++	efi_guid_t mok_var = EFI_SHIM_LOCK_GUID;
++	void *db = NULL, *dbx = NULL, *mok = NULL;
++	unsigned long dbsize = 0, dbxsize = 0, moksize = 0;
++	int rc = 0;
++	struct key *keyring = NULL;
++
++	/* Check if SB is enabled and just return if not */
++	if (!efi_enabled(EFI_SECURE_BOOT))
++		return 0;
++
++	keyring = get_system_keyring();
++	if (!keyring) {
++		pr_err("MODSIGN: Couldn't get system keyring\n");
++		return -EINVAL;
++	}
++
++	/* Get db, MokListRT, and dbx.  They might not exist, so it isn't
++	 * an error if we can't get them.
++	 */
++	db = get_cert_list(L"db", &secure_var, &dbsize);
++	if (!db) {
++		pr_err("MODSIGN: Couldn't get UEFI db list\n");
++	} else {
++		rc = parse_efi_signature_list(db, dbsize, keyring);
++		if (rc)
++			pr_err("Couldn't parse db signatures: %d\n", rc);
++		kfree(db);
++	}
++
++	mok = get_cert_list(L"MokListRT", &mok_var, &moksize);
++	if (!mok) {
++		pr_info("MODSIGN: Couldn't get UEFI MokListRT\n");
++	} else {
++		rc = parse_efi_signature_list(mok, moksize, keyring);
++		if (rc)
++			pr_err("Couldn't parse MokListRT signatures: %d\n", rc);
++		kfree(mok);
++	}
++
++	dbx = get_cert_list(L"dbx", &secure_var, &dbxsize);
++	if (!dbx) {
++		pr_info("MODSIGN: Couldn't get UEFI dbx list\n");
++	} else {
++		rc = parse_efi_signature_list(dbx, dbxsize,
++			system_blacklist_keyring);
++		if (rc)
++			pr_err("Couldn't parse dbx signatures: %d\n", rc);
++		kfree(dbx);
++	}
++
++	return rc;
++}
++late_initcall(load_uefi_certs);
+-- 
+2.5.5
+

MODSIGN-Support-not-importing-certs-from-db.patch

@@ -0,0 +1,86 @@
+From 7ce860189df19a38176c1510f4e5615bf35495c1 Mon Sep 17 00:00:00 2001
+From: Josh Boyer <jwboyer@fedoraproject.org>
+Date: Thu, 3 Oct 2013 10:14:23 -0400
+Subject: [PATCH 2/2] MODSIGN: Support not importing certs from db
+
+If a user tells shim to not use the certs/hashes in the UEFI db variable
+for verification purposes, shim will set a UEFI variable called MokIgnoreDB.
+Have the uefi import code look for this and not import things from the db
+variable.
+
+Signed-off-by: Josh Boyer <jwboyer@fedoraproject.org>
+---
+ kernel/modsign_uefi.c | 40 +++++++++++++++++++++++++++++++---------
+ 1 file changed, 31 insertions(+), 9 deletions(-)
+
+diff --git a/kernel/modsign_uefi.c b/kernel/modsign_uefi.c
+index 03f601a0052c..321c79a3b282 100644
+--- a/kernel/modsign_uefi.c
++++ b/kernel/modsign_uefi.c
+@@ -8,6 +8,23 @@
+ #include <keys/system_keyring.h>
+ #include "module-internal.h"
+ 
++static __init int check_ignore_db(void)
++{
++	efi_status_t status;
++	unsigned int db = 0;
++	unsigned long size = sizeof(db);
++	efi_guid_t guid = EFI_SHIM_LOCK_GUID;
++
++	/* Check and see if the MokIgnoreDB variable exists.  If that fails
++	 * then we don't ignore DB.  If it succeeds, we do.
++	 */
++	status = efi.get_variable(L"MokIgnoreDB", &guid, NULL, &size, &db);
++	if (status != EFI_SUCCESS)
++		return 0;
++
++	return 1;
++}
++
+ static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, unsigned long *size)
+ {
+ 	efi_status_t status;
+@@ -47,7 +64,7 @@ static int __init load_uefi_certs(void)
+ 	efi_guid_t mok_var = EFI_SHIM_LOCK_GUID;
+ 	void *db = NULL, *dbx = NULL, *mok = NULL;
+ 	unsigned long dbsize = 0, dbxsize = 0, moksize = 0;
+-	int rc = 0;
++	int ignore_db, rc = 0;
+ 	struct key *keyring = NULL;
+ 
+ 	/* Check if SB is enabled and just return if not */
+@@ -60,17 +77,22 @@ static int __init load_uefi_certs(void)
+ 		return -EINVAL;
+ 	}
+ 
++	/* See if the user has setup Ignore DB mode */
++	ignore_db = check_ignore_db();
++
+ 	/* Get db, MokListRT, and dbx.  They might not exist, so it isn't
+ 	 * an error if we can't get them.
+ 	 */
+-	db = get_cert_list(L"db", &secure_var, &dbsize);
+-	if (!db) {
+-		pr_err("MODSIGN: Couldn't get UEFI db list\n");
+-	} else {
+-		rc = parse_efi_signature_list(db, dbsize, keyring);
+-		if (rc)
+-			pr_err("Couldn't parse db signatures: %d\n", rc);
+-		kfree(db);
++	if (!ignore_db) {
++		db = get_cert_list(L"db", &secure_var, &dbsize);
++		if (!db) {
++			pr_err("MODSIGN: Couldn't get UEFI db list\n");
++		} else {
++			rc = parse_efi_signature_list(db, dbsize, keyring);
++			if (rc)
++				pr_err("Couldn't parse db signatures: %d\n", rc);
++			kfree(db);
++		}
+ 	}
+ 
+ 	mok = get_cert_list(L"MokListRT", &mok_var, &moksize);
+-- 
+2.5.5
+

Makefile

@@ -0,0 +1,124 @@
+# Makefile for source rpm: kernel
+SPECFILE := kernel.spec
+
+# we only check the .sign signatures
+UPSTREAM_CHECKS = sign
+
+.PHONY: help
+help:
+%:
+	@echo "Try fedpkg $@ or something like that"
+	@exit 1
+
+include Makefile.config
+
+prep:
+	fedpkg -v prep
+
+noarch:
+	fedpkg -v local --arch=noarch
+
+# 'make local' also needs to build the noarch firmware package
+local:
+	fedpkg -v local
+
+extremedebug:
+	@perl -pi -e 's/# CONFIG_DEBUG_PAGEALLOC is not set/CONFIG_DEBUG_PAGEALLOC=y/' config-nodebug
+
+debug:
+	@perl -pi -e 's/# CONFIG_LOCK_STAT is not set/CONFIG_LOCK_STAT=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_STACK_USAGE is not set/CONFIG_DEBUG_STACK_USAGE=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_SLAB is not set/CONFIG_DEBUG_SLAB=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_MUTEXES is not set/CONFIG_DEBUG_MUTEXES=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_RT_MUTEXES is not set/CONFIG_DEBUG_RT_MUTEXES=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_LOCK_ALLOC is not set/CONFIG_DEBUG_LOCK_ALLOC=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_LOCK_TORTURE_TEST is not set/CONFIG_LOCK_TORTURE_TEST=m/' config-nodebug
+	@perl -pi -e 's/# CONFIG_PROVE_LOCKING is not set/CONFIG_PROVE_LOCKING=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_PROVE_RCU is not set/CONFIG_PROVE_RCU=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_SPINLOCK is not set/CONFIG_DEBUG_SPINLOCK=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_VM is not set/CONFIG_DEBUG_VM=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_VM_PGFLAGS is not set/CONFIG_DEBUG_VM_PGFLAGS=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_FAULT_INJECTION is not set/CONFIG_FAULT_INJECTION=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_FAILSLAB is not set/CONFIG_FAILSLAB=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_FAIL_PAGE_ALLOC is not set/CONFIG_FAIL_PAGE_ALLOC=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_FAIL_IO_TIMEOUT is not set/CONFIG_FAIL_IO_TIMEOUT=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_FAIL_MAKE_REQUEST is not set/CONFIG_FAIL_MAKE_REQUEST=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_FAIL_MMC_REQUEST is not set/CONFIG_FAIL_MMC_REQUEST=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_FAULT_INJECTION_DEBUG_FS is not set/CONFIG_FAULT_INJECTION_DEBUG_FS=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_FAULT_INJECTION_STACKTRACE_FILTER is not set/CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_SG is not set/CONFIG_DEBUG_SG=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_PI_LIST is not set/CONFIG_DEBUG_PI_LIST=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_OBJECTS is not set/CONFIG_DEBUG_OBJECTS=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_OBJECTS_FREE is not set/CONFIG_DEBUG_OBJECTS_FREE=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_OBJECTS_TIMERS is not set/CONFIG_DEBUG_OBJECTS_TIMERS=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_OBJECTS_WORK is not set/CONFIG_DEBUG_OBJECTS_WORK=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER is not set/CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_OBJECTS_RCU_HEAD is not set/CONFIG_DEBUG_OBJECTS_RCU_HEAD=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_X86_PTDUMP is not set/CONFIG_X86_PTDUMP=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_ARM64_PTDUMP is not set/CONFIG_ARM64_PTDUMP=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_EFI_PGT_DUMP is not set/CONFIG_EFI_PGT_DUMP=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_CAN_DEBUG_DEVICES is not set/CONFIG_CAN_DEBUG_DEVICES=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_MODULE_FORCE_UNLOAD is not set/CONFIG_MODULE_FORCE_UNLOAD=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_NOTIFIERS is not set/CONFIG_DEBUG_NOTIFIERS=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DMA_API_DEBUG is not set/CONFIG_DMA_API_DEBUG=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_PM_TEST_SUSPEND is not set/CONFIG_PM_TEST_SUSPEND=y/' config-generic
+	@perl -pi -e 's/# CONFIG_PM_ADVANCED_DEBUG is not set/CONFIG_PM_ADVANCED_DEBUG=y/' config-generic
+	@perl -pi -e 's/# CONFIG_B43_DEBUG is not set/CONFIG_B43_DEBUG=y/' config-generic
+	@perl -pi -e 's/# CONFIG_B43LEGACY_DEBUG is not set/CONFIG_B43LEGACY_DEBUG=y/' config-generic
+	@perl -pi -e 's/# CONFIG_MMIOTRACE is not set/CONFIG_MMIOTRACE=y/' config-nodebug
+	@perl -pi -e 's/CONFIG_STRIP_ASM_SYMS=y/# CONFIG_STRIP_ASM_SYMS is not set/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_CREDENTIALS is not set/CONFIG_DEBUG_CREDENTIALS=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set/CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_ACPI_DEBUG is not set/CONFIG_ACPI_DEBUG=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_EXT4_DEBUG is not set/CONFIG_EXT4_DEBUG=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_PERF_USE_VMALLOC is not set/CONFIG_DEBUG_PERF_USE_VMALLOC=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_JBD2_DEBUG is not set/CONFIG_JBD2_DEBUG=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_NFSD_FAULT_INJECTION is not set/CONFIG_NFSD_FAULT_INJECTION=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_BLK_CGROUP is not set/CONFIG_DEBUG_BLK_CGROUP=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DRBD_FAULT_INJECTION is not set/CONFIG_DRBD_FAULT_INJECTION=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_ATH_DEBUG is not set/CONFIG_ATH_DEBUG=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_CARL9170_DEBUGFS is not set/CONFIG_CARL9170_DEBUGFS=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_IWLWIFI_DEVICE_TRACING is not set/CONFIG_IWLWIFI_DEVICE_TRACING=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DMADEVICES_DEBUG is not set/CONFIG_DMADEVICES_DEBUG=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_CEPH_LIB_PRETTYDEBUG is not set/CONFIG_CEPH_LIB_PRETTYDEBUG=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_QUOTA_DEBUG is not set/CONFIG_QUOTA_DEBUG=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_KGDB_KDB is not set/CONFIG_KGDB_KDB=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_KDB_KEYBOARD is not set/CONFIG_KDB_KEYBOARD=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_CPU_NOTIFIER_ERROR_INJECT is not set/CONFIG_CPU_NOTIFIER_ERROR_INJECT=m/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_PER_CPU_MAPS is not set/CONFIG_DEBUG_PER_CPU_MAPS=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_TEST_LIST_SORT is not set/CONFIG_TEST_LIST_SORT=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_ATOMIC_SLEEP is not set/CONFIG_DEBUG_ATOMIC_SLEEP=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DETECT_HUNG_TASK is not set/CONFIG_DETECT_HUNG_TASK=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_WQ_WATCHDOG is not set/CONFIG_WQ_WATCHDOG=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set/CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y/' config-nodebug
+	@perl -pi -e 's/# CONFIG_DEBUG_KMEMLEAK is not set/CONFIG_DEBUG_KMEMLEAK=y/' config-nodebug
+
+	@# just in case we're going from extremedebug -> debug
+	@perl -pi -e 's/CONFIG_DEBUG_PAGEALLOC=y/# CONFIG_DEBUG_PAGEALLOC is not set/' config-nodebug
+
+	@perl -pi -e 's/# CONFIG_MAXSMP is not set/CONFIG_MAXSMP=y/' config-x86-generic
+
+	@perl -pi -e 's/^%define debugbuildsenabled 1/%define debugbuildsenabled 0/' kernel.spec
+	@rpmdev-bumpspec -c "Reenable debugging options." kernel.spec
+
+nodebuginfo:
+	@perl -pi -e 's/^%define with_debuginfo %\{\?_without_debuginfo: 0\} %\{\?\!_without_debuginfo: 1\}/%define with_debuginfo %\{\?_without_debuginfo: 0\} %\{\?\!_without_debuginfo: 0\}/' kernel.spec
+nodebug: release
+	@perl -pi -e 's/^%define debugbuildsenabled 1/%define debugbuildsenabled 0/' kernel.spec
+release: config-release
+	@perl -pi -e 's/^%define debugbuildsenabled 0/%define debugbuildsenabled 1/' kernel.spec
+	@rpmdev-bumpspec -c "Disable debugging options." kernel.spec
+
+include Makefile.release
+
+unused-kernel-patches:
+	@for f in *.patch; do if [ -e $$f ]; then (egrep -q "^Patch[[:digit:]]+:[[:space:]]+$$f" $(SPECFILE) || echo "Unused:    $$f") && egrep -q "^ApplyPatch[[:space:]]+$$f|^ApplyOptionalPatch[[:space:]]+$$f" $(SPECFILE) || echo "Unapplied: $$f"; fi; done
+
+ifeq ($(MAKECMDGOALS),me a sandwich)
+.PHONY: me a sandwich
+me a:
+	@:
+
+sandwich:
+	@[ `id -u` -ne 0 ] && echo "What? Make it yourself." || echo Okay.
+endif

Makefile.config

@@ -0,0 +1,129 @@
+# Make rules for configuration files.
+#
+# $Id$
+
+CFG		= kernel-$(VERSION)
+
+CONFIGFILES	= \
+	$(CFG)-i686.config $(CFG)-i686-debug.config \
+	$(CFG)-i686-PAE.config $(CFG)-i686-PAEdebug.config \
+	$(CFG)-x86_64.config $(CFG)-x86_64-debug.config \
+	$(CFG)-s390x.config \
+	$(CFG)-armv7hl.config $(CFG)-armv7hl-lpae.config \
+	$(CFG)-aarch64.config \
+	$(CFG)-ppc64.config $(CFG)-ppc64p7.config $(CFG)-ppc64-debug.config \
+	$(CFG)-ppc64le.config $(CFG)-ppc64le-debug.config
+
+PLATFORMS	= x86 x86_64 powerpc s390x arm arm64
+TEMPFILES	= $(addprefix temp-, $(addsuffix -generic, $(PLATFORMS)))
+
+configs: $(CONFIGFILES)
+	@rm -f kernel-*-config
+	@rm -f $(TEMPFILES)
+	@rm -f temp-generic temp-*-generic temp-*-generic-tmp
+
+# Augment the clean target to clean up our own cruft
+clean ::
+	@rm -fv $(CONFIGFILES) $(TEMPFILES) temp-generic kernel-$(VERSION)*config
+
+temp-generic: config-generic config-nodebug
+	cat $^ > temp-generic
+
+temp-debug-generic: config-generic config-debug
+	cat $^ > temp-debug-generic
+
+temp-no-extra-generic: config-no-extra temp-generic
+	perl merge.pl $^ > $@
+
+temp-arm-generic: config-arm-generic temp-no-extra-generic
+	perl merge.pl $^ > $@
+
+temp-armv7-generic: config-armv7-generic temp-arm-generic
+	perl merge.pl $^ > $@
+
+temp-armv7: config-armv7 temp-armv7-generic
+	perl merge.pl $^ > $@
+
+temp-armv7-lpae: config-armv7-lpae temp-armv7-generic
+	perl merge.pl $^ > $@
+
+temp-arm-debug-generic: temp-arm-generic temp-debug-generic
+	perl merge.pl $^ > $@
+
+temp-arm64: config-arm64 temp-arm-generic
+	perl merge.pl $^ > $@
+
+temp-arm64-debug: config-arm64 temp-arm-debug-generic
+	perl merge.pl $^ > $@
+
+temp-x86-32: config-x86-32-generic config-x86-generic
+	perl merge.pl $^  > $@
+
+temp-x86-32-generic: temp-x86-32 temp-generic
+	perl merge.pl $^  > $@
+
+temp-x86-debug-generic: temp-x86-32 temp-debug-generic
+	perl merge.pl $^  > $@
+
+temp-x86-64: config-x86_64-generic config-x86-generic
+	perl merge.pl $^  > $@
+
+temp-x86_64-generic: temp-x86-64 temp-generic
+	perl merge.pl $^  > $@
+
+temp-x86_64-debug-generic: temp-x86-64 temp-debug-generic
+	perl merge.pl $^  > $@
+
+temp-powerpc64-generic: config-powerpc64-generic temp-generic
+	perl merge.pl $^  > $@
+
+temp-powerpc64-debug-generic: config-powerpc64-generic temp-debug-generic
+	perl merge.pl $^  > $@
+
+temp-s390-generic: config-s390x temp-generic
+	perl merge.pl $^ > $@
+
+$(CFG)-i686-PAE.config: config-i686-PAE temp-x86-32-generic
+	perl merge.pl $^ i386 > $@
+
+$(CFG)-i686-PAEdebug.config: config-i686-PAE temp-x86-debug-generic
+	perl merge.pl $^ i386 > $@
+
+$(CFG)-i686.config: /dev/null temp-x86-32-generic
+	perl merge.pl $^ i386 > $@
+
+$(CFG)-i686-debug.config: /dev/null temp-x86-debug-generic
+	perl merge.pl $^ i386 > $@
+
+$(CFG)-x86_64.config: /dev/null temp-x86_64-generic
+	perl merge.pl $^ x86_64 > $@
+
+$(CFG)-x86_64-debug.config: /dev/null temp-x86_64-debug-generic
+	perl merge.pl $^ x86_64 > $@
+
+$(CFG)-ppc64.config: config-powerpc64 temp-powerpc64-generic
+	perl merge.pl $^ powerpc > $@
+
+$(CFG)-ppc64-debug.config: config-powerpc64 temp-powerpc64-debug-generic
+	perl merge.pl $^ powerpc > $@
+
+$(CFG)-ppc64p7.config: config-powerpc64p7 temp-powerpc64-generic
+	perl merge.pl $^ powerpc > $@
+
+$(CFG)-ppc64le.config: config-powerpc64le temp-powerpc64-generic
+	perl merge.pl $^ powerpc > $@
+
+$(CFG)-ppc64le-debug.config: config-powerpc64le temp-powerpc64-debug-generic
+	perl merge.pl $^ powerpc > $@
+
+$(CFG)-s390x.config: config-s390x temp-s390-generic
+	perl merge.pl $^ s390 > $@
+
+$(CFG)-armv7hl.config: /dev/null temp-armv7
+	perl merge.pl $^ arm > $@
+
+$(CFG)-armv7hl-lpae.config: /dev/null temp-armv7-lpae
+	perl merge.pl $^ arm > $@
+
+$(CFG)-aarch64.config: /dev/null temp-arm64
+	perl merge.pl $^ arm64 > $@

Makefile.release

@@ -0,0 +1,84 @@
+# Make rules for configuration files.
+#
+# $Id$
+
+# This file contains only entries that change the config files.
+# Anything that changes kernel.spec itself should go in the main Makefile.
+
+config-release:
+	@perl -pi -e 's/CONFIG_LOCK_STAT=y/# CONFIG_LOCK_STAT is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_STACK_USAGE=y/# CONFIG_DEBUG_STACK_USAGE is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_SLAB=y/# CONFIG_DEBUG_SLAB is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_MUTEXES=y/# CONFIG_DEBUG_MUTEXES is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_RT_MUTEXES=y/# CONFIG_DEBUG_RT_MUTEXES is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_LOCK_ALLOC=y/# CONFIG_DEBUG_LOCK_ALLOC is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_LOCK_TORTURE_TEST=m/# CONFIG_LOCK_TORTURE_TEST is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_PROVE_LOCKING=y/# CONFIG_PROVE_LOCKING is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_PROVE_RCU=y/# CONFIG_PROVE_RCU is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_SPINLOCK=y/# CONFIG_DEBUG_SPINLOCK is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_VM=y/# CONFIG_DEBUG_VM is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_VM_PGFLAGS=y/# CONFIG_DEBUG_VM_PGFLAGS is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_FAULT_INJECTION=y/# CONFIG_FAULT_INJECTION is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_FAILSLAB=y/# CONFIG_FAILSLAB is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_FAIL_PAGE_ALLOC=y/# CONFIG_FAIL_PAGE_ALLOC is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_FAIL_IO_TIMEOUT=y/# CONFIG_FAIL_IO_TIMEOUT is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_FAIL_MAKE_REQUEST=y/# CONFIG_FAIL_MAKE_REQUEST is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_FAIL_MMC_REQUEST=y/# CONFIG_FAIL_MMC_REQUEST is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_FAULT_INJECTION_DEBUG_FS=y/# CONFIG_FAULT_INJECTION_DEBUG_FS is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y/# CONFIG_FAULT_INJECTION_STACKTRACE_FILTER is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_SG=y/# CONFIG_DEBUG_SG is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_PI_LIST=y/# CONFIG_DEBUG_PI_LIST is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_OBJECTS=y/# CONFIG_DEBUG_OBJECTS is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_OBJECTS_FREE=y/# CONFIG_DEBUG_OBJECTS_FREE is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_OBJECTS_TIMERS=y/# CONFIG_DEBUG_OBJECTS_TIMERS is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_OBJECTS_WORK=y/# CONFIG_DEBUG_OBJECTS_WORK is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER=y/# CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_OBJECTS_RCU_HEAD=y/# CONFIG_DEBUG_OBJECTS_RCU_HEAD is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_ARM64_PTDUMP=y/# CONFIG_ARM64_PTDUMP is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_EFI_PGT_DUMP=y/# CONFIG_EFI_PGT_DUMP is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_CAN_DEBUG_DEVICES=y/# CONFIG_CAN_DEBUG_DEVICES is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_MODULE_FORCE_UNLOAD=y/# CONFIG_MODULE_FORCE_UNLOAD is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_NOTIFIERS=y/# CONFIG_DEBUG_NOTIFIERS is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DMA_API_DEBUG=y/# CONFIG_DMA_API_DEBUG is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_PM_TEST_SUSPEND=y/# CONFIG_PM_TEST_SUSPEND is not set/' config-generic
+	@perl -pi -e 's/CONFIG_PM_ADVANCED_DEBUG=y/# CONFIG_PM_ADVANCED_DEBUG is not set/' config-generic
+	@perl -pi -e 's/CONFIG_B43_DEBUG=y/# CONFIG_B43_DEBUG is not set/' config-generic
+	@perl -pi -e 's/CONFIG_B43LEGACY_DEBUG=y/# CONFIG_B43LEGACY_DEBUG is not set/' config-generic
+	@perl -pi -e 's/CONFIG_MMIOTRACE=y/# CONFIG_MMIOTRACE is not set/' config-nodebug
+	@perl -pi -e 's/# CONFIG_STRIP_ASM_SYMS is not set/CONFIG_STRIP_ASM_SYMS=y/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_CREDENTIALS=y/# CONFIG_DEBUG_CREDENTIALS is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y/# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_ACPI_DEBUG=y/# CONFIG_ACPI_DEBUG is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_EXT4_DEBUG=y/# CONFIG_EXT4_DEBUG is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_PERF_USE_VMALLOC=y/# CONFIG_DEBUG_PERF_USE_VMALLOC is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_JBD2_DEBUG=y/# CONFIG_JBD2_DEBUG is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_NFSD_FAULT_INJECTION=y/# CONFIG_NFSD_FAULT_INJECTION is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_BLK_CGROUP=y/# CONFIG_DEBUG_BLK_CGROUP is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DRBD_FAULT_INJECTION=y/# CONFIG_DRBD_FAULT_INJECTION is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_ATH_DEBUG=y/# CONFIG_ATH_DEBUG is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_CARL9170_DEBUGFS=y/# CONFIG_CARL9170_DEBUGFS is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_IWLWIFI_DEVICE_TRACING=y/# CONFIG_IWLWIFI_DEVICE_TRACING is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DMADEVICES_DEBUG=y/# CONFIG_DMADEVICES_DEBUG is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_CEPH_LIB_PRETTYDEBUG=y/# CONFIG_CEPH_LIB_PRETTYDEBUG is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_QUOTA_DEBUG=y/# CONFIG_QUOTA_DEBUG is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_CPU_NOTIFIER_ERROR_INJECT=m/# CONFIG_CPU_NOTIFIER_ERROR_INJECT is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_PER_CPU_MAPS=y/# CONFIG_DEBUG_PER_CPU_MAPS is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_PERCPU_TEST=m/# CONFIG_PERCPU_TEST is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_TEST_LIST_SORT=y/# CONFIG_TEST_LIST_SORT is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_TEST_STRING_HELPERS=m/# CONFIG_TEST_STRING_HELPERS is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_ATOMIC_SLEEP=y/# CONFIG_DEBUG_ATOMIC_SLEEP is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DETECT_HUNG_TASK=y/# CONFIG_DETECT_HUNG_TASK is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_WQ_WATCHDOG=y/# CONFIG_WQ_WATCHDOG is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y/# CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_DEBUG_KMEMLEAK=y/# CONFIG_DEBUG_KMEMLEAK is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_MAC80211_MESSAGE_TRACING=y/# CONFIG_MAC80211_MESSAGE_TRACING is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_XFS_WARN=y/# CONFIG_XFS_WARN is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_EDAC_DEBUG=y/# CONFIG_EDAC_DEBUG is not set/' config-nodebug
+	@perl -pi -e 's/CONFIG_RTLWIFI_DEBUG=y/# CONFIG_RTLWIFI_DEBUG is not set/' config-nodebug
+
+	@# Undo anything that make extremedebug might have set
+	@perl -pi -e 's/CONFIG_DEBUG_PAGEALLOC=y/# CONFIG_DEBUG_PAGEALLOC is not set/' config-debug
+	@perl -pi -e 's/CONFIG_DEBUG_PAGEALLOC=y/# CONFIG_DEBUG_PAGEALLOC is not set/' config-nodebug
+
+	@# Change defaults back to sane things.
+	@perl -pi -e 's/CONFIG_MAXSMP=y/# CONFIG_MAXSMP is not set/' config-x86-generic

Makefile.rhelver

@@ -1,45 +0,0 @@
-RHEL_MAJOR = 8
-RHEL_MINOR = 99
-
-#
-# RHEL_RELEASE
-# -------------
-#
-# Represents build number in 'release' part of RPM's name-version-release.
-#   name is <package_name>, e.g. kernel
-#   version is upstream kernel version this kernel is based on, e.g. 4.18.0
-#   release is <RHEL_RELEASE>.<dist_tag>[<buildid>], e.g. 100.el8
-#
-# Use this spot to avoid future merge conflicts.
-# Do not trim this comment.
-RHEL_RELEASE = 122
-
-#
-# Early y+1 numbering
-# --------------------
-#
-# In early y+1 process, RHEL_RELEASE consists of 2 numbers: x.y
-# First is RHEL_RELEASE inherited/merged from y as-is, second number
-# is incremented with each build starting from 1. After merge from y,
-# it resets back to 1. This way y+1 nvr reflects status of last merge.
-#
-# Example:
-#
-# rhel8.0                        rhel-8.1
-#   kernel-4.18.0-58.el8   -->     kernel-4.18.0-58.1.el8
-#                                  kernel-4.18.0-58.2.el8
-#   kernel-4.18.0-59.el8           kernel-4.18.0-59.1.el8
-#   kernel-4.18.0-60.el8
-#   kernel-4.18.0-61.el8   -->     kernel-4.18.0-61.1.el8
-#
-#
-# Use this spot to avoid future merge conflicts.
-# Do not trim this comment.
-EARLY_YSTREAM ?= no
-EARLY_YBUILD:=
-EARLY_YRELEASE:=
-ifneq ("$(ZSTREAM)", "yes")
-  ifeq ("$(EARLY_YSTREAM)","yes")
-    RHEL_RELEASE:=$(RHEL_RELEASE).$(EARLY_YRELEASE)
-  endif
-endif

PCI-Lock-down-BAR-access-when-module-security-is-ena.patch

@@ -0,0 +1,118 @@
+From 655fbf360e1481db4f06001f893d388c15ac307f Mon Sep 17 00:00:00 2001
+From: Matthew Garrett <matthew.garrett@nebula.com>
+Date: Thu, 8 Mar 2012 10:10:38 -0500
+Subject: [PATCH 02/20] PCI: Lock down BAR access when module security is
+ enabled
+
+Any hardware that can potentially generate DMA has to be locked down from
+userspace in order to avoid it being possible for an attacker to modify
+kernel code, allowing them to circumvent disabled module loading or module
+signing. Default to paranoid - in future we can potentially relax this for
+sufficiently IOMMU-isolated devices.
+
+Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
+---
+ drivers/pci/pci-sysfs.c | 10 ++++++++++
+ drivers/pci/proc.c      |  8 +++++++-
+ drivers/pci/syscall.c   |  3 ++-
+ 3 files changed, 19 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
+index 312f23a8429c..93e6ac103dd0 100644
+--- a/drivers/pci/pci-sysfs.c
++++ b/drivers/pci/pci-sysfs.c
+@@ -30,6 +30,7 @@
+ #include <linux/vgaarb.h>
+ #include <linux/pm_runtime.h>
+ #include <linux/of.h>
++#include <linux/module.h>
+ #include "pci.h"
+ 
+ static int sysfs_initialized;	/* = 0 */
+@@ -710,6 +711,9 @@ static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
+ 	loff_t init_off = off;
+ 	u8 *data = (u8 *) buf;
+ 
++	if (secure_modules())
++		return -EPERM;
++
+ 	if (off > dev->cfg_size)
+ 		return 0;
+ 	if (off + count > dev->cfg_size) {
+@@ -1004,6 +1008,9 @@ static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
+ 	resource_size_t start, end;
+ 	int i;
+ 
++	if (secure_modules())
++		return -EPERM;
++
+ 	for (i = 0; i < PCI_ROM_RESOURCE; i++)
+ 		if (res == &pdev->resource[i])
+ 			break;
+@@ -1105,6 +1112,9 @@ static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
+ 				     struct bin_attribute *attr, char *buf,
+ 				     loff_t off, size_t count)
+ {
++	if (secure_modules())
++		return -EPERM;
++
+ 	return pci_resource_io(filp, kobj, attr, buf, off, count, true);
+ }
+ 
+diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
+index 3f155e78513f..4265ea07e3b0 100644
+--- a/drivers/pci/proc.c
++++ b/drivers/pci/proc.c
+@@ -116,6 +116,9 @@ static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf,
+ 	int size = dev->cfg_size;
+ 	int cnt;
+ 
++	if (secure_modules())
++		return -EPERM;
++
+ 	if (pos >= size)
+ 		return 0;
+ 	if (nbytes >= size)
+@@ -195,6 +198,9 @@ static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
+ #endif /* HAVE_PCI_MMAP */
+ 	int ret = 0;
+ 
++	if (secure_modules())
++		return -EPERM;
++
+ 	switch (cmd) {
+ 	case PCIIOC_CONTROLLER:
+ 		ret = pci_domain_nr(dev->bus);
+@@ -233,7 +239,7 @@ static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
+ 	struct pci_filp_private *fpriv = file->private_data;
+ 	int i, ret;
+ 
+-	if (!capable(CAP_SYS_RAWIO))
++	if (!capable(CAP_SYS_RAWIO) || secure_modules())
+ 		return -EPERM;
+ 
+ 	/* Make sure the caller is mapping a real resource for this device */
+diff --git a/drivers/pci/syscall.c b/drivers/pci/syscall.c
+index b91c4da68365..98f5637304d1 100644
+--- a/drivers/pci/syscall.c
++++ b/drivers/pci/syscall.c
+@@ -10,6 +10,7 @@
+ #include <linux/errno.h>
+ #include <linux/pci.h>
+ #include <linux/syscalls.h>
++#include <linux/module.h>
+ #include <asm/uaccess.h>
+ #include "pci.h"
+ 
+@@ -92,7 +93,7 @@ SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn,
+ 	u32 dword;
+ 	int err = 0;
+ 
+-	if (!capable(CAP_SYS_ADMIN))
++	if (!capable(CAP_SYS_ADMIN) || secure_modules())
+ 		return -EPERM;
+ 
+ 	dev = pci_get_bus_and_slot(bus, dfn);
+-- 
+2.4.3
+

PatchList.txt

@@ -0,0 +1,52 @@
+**** Backports and patches headed/already upsteram *****************************
+
+* cpupower-Fix-segfault-due-to-incorrect-getopt_long-a.patch (rhbz 1000439)
+  - Queued for next upstream release I believe.  Fixes a segfault in cpupower
+
+* dm-cache-policy-mq_fix-large-scale-table-allocation-bug.patch (rhbz 993744)
+  - Still pending upstream
+
+* ath9k_rx_dma_stop_check.patch (rhbz 892811)
+  - Fixes some DMA issue on specific hardware.  Taken from
+https://dev.openwrt.org/browser/trunk/package/mac80211/patches/552-ath9k_rx_dma_stop_check.patch?rev=34910
+
+* secure-modules.patch
+* modsign-uefi.patch
+* sb-hibernate.patch
+* sysrq-secure-boot.patch
+  - Fedora secure boot support.
+  - Dear Matthew, this is your fault.  Run sed already and get a new set out.
+
+**** Other stuff that should go upstream (in decreasing likelyhood) ************
+
+* defaults-acpi-video.patch
+* disable-i8042-check-on-apple-mac.patch
+* no-pcspkr-modalias.patch
+* die-floppy-die.patch
+	Fedora policy decisions
+	Turn into CONFIG_ options and upstream ?
+
+* input-kill-stupid-messages.patch
+* silence-fbcon-logo.patch
+* silence-noise.patch
+	Fedora local 'hush' patches.  (TODO: push more upstream)
+
+* makefile-after_link.patch
+  Rolandware that is used by the debuginfo generation.
+  Possibly upstreamable ?
+
+* serial-460800.patch
+	Probably not upstreamable.
+	http://marc.theaimsgroup.com/?l=linux-kernel&m=112687270832687&w=2
+	https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=126403
+	http://lkml.org/lkml/2006/8/2/208
+
+********************************************************************************
+
+'MUSTARD' patches.  Fedora local patches that are very unlikely to go upstream.
+
+* crash-driver.patch
+	Unlikely to go upstream.
+	https://bugzilla.redhat.com/show_bug.cgi?id=492803
+
+********************************************************************************

Patchlist.changelog

@@ -1,228 +0,0 @@
-https://gitlab.com/cki-project/kernel-ark/-/commit/8773e8c6039ff74d1426cc80de30de759cd0c2a2
- 8773e8c6039ff74d1426cc80de30de759cd0c2a2 irq: export irq_check_status_bit
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/e187313e5f0086538fefe0925ef84480f99616d8
- e187313e5f0086538fefe0925ef84480f99616d8 gcc-plugins: fix gcc 11 indigestion with plugins...
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/0c84b348e33ab9d7df5c3c5acc7fbc07fd96fafc
- 0c84b348e33ab9d7df5c3c5acc7fbc07fd96fafc Fix up bad merge with efi: generalize efi_get_secureboot
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/364788093bdf437c33753d327136c363be8f756c
- 364788093bdf437c33753d327136c363be8f756c Fix up a merge issue with rxe.c
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/a4d554ce883e24df77cce42bc2deec527028c213
- a4d554ce883e24df77cce42bc2deec527028c213 Filter out LTO build options from the perl ccopts
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/17b0f7f1d49df30661b517d668715ff5ee1bab09
- 17b0f7f1d49df30661b517d668715ff5ee1bab09 Fixes "acpi: prefer booting with ACPI over DTS" to be RHEL only
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/e7c009cd91ababdbb5f726ef592c7800f0682d3a
- e7c009cd91ababdbb5f726ef592c7800f0682d3a arch/x86: Remove vendor specific CPU ID checks
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/7120b2a26fc4c7954fd0395973dc6739c110e091
- 7120b2a26fc4c7954fd0395973dc6739c110e091 redhat: Replace hardware.redhat.com link in Unsupported message
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/7a28e2fde653a161913abb8eee943cdacb5ff2ae
- 7a28e2fde653a161913abb8eee943cdacb5ff2ae x86: Fix compile issues with rh_check_supported()
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/45f64c1a24e73af7987cffec3ea941e29364f87f
- 45f64c1a24e73af7987cffec3ea941e29364f87f e1000e: bump up timeout to wait when ME un-configure ULP mode
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/6c14763b1ce98698949ff45135c15e333aa6416d
- 6c14763b1ce98698949ff45135c15e333aa6416d drm/sun4i: sun6i_mipi_dsi: fix horizontal timing calculation
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/67a19b16012b12cffba0b515c6503e5f8cdbb798
- 67a19b16012b12cffba0b515c6503e5f8cdbb798 drm: panel: add Xingbangda XBD599 panel
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/d220dbf98cef820367b5a2a2eeaacebee958bdd4
- d220dbf98cef820367b5a2a2eeaacebee958bdd4 dt-bindings: panel: add binding for Xingbangda XBD599 panel
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/80660062260dec4bdca9540922577542c16145e8
- 80660062260dec4bdca9540922577542c16145e8 ARM: fix __get_user_check() in case uaccess_* calls are not inlined
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/24d8743613b2a6a585fc68cfe95078d9a3d5b389
- 24d8743613b2a6a585fc68cfe95078d9a3d5b389 mm/kmemleak: skip late_init if not skip disable
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/b697ff5e26974fee8fcd31a1e221e9dd41515efc
- b697ff5e26974fee8fcd31a1e221e9dd41515efc KEYS: Make use of platform keyring for module signature verify
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/081d2185e22479b449586c4e9843602ca0d49806
- 081d2185e22479b449586c4e9843602ca0d49806 Drop that for now
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/5ef51389cf6673a0e9e004909c7be1dc785050b2
- 5ef51389cf6673a0e9e004909c7be1dc785050b2 Input: rmi4 - remove the need for artificial IRQ in case of HID
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/c1788012ebf8de46e9dc80d18051ed0c77c811b6
- c1788012ebf8de46e9dc80d18051ed0c77c811b6 ARM: tegra: usb no reset
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/577365feaa909db4c0949eabfcda7e4a972b8e54
- 577365feaa909db4c0949eabfcda7e4a972b8e54 arm: make CONFIG_HIGHPTE optional without CONFIG_EXPERT
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/331be9c5a436057ee852075c102d9d90a9046a30
- 331be9c5a436057ee852075c102d9d90a9046a30 redhat: rh_kabi: deduplication friendly structs
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/34d79fbfb327f732ebf3ece4db21a14f81fedf03
- 34d79fbfb327f732ebf3ece4db21a14f81fedf03 redhat: rh_kabi add a comment with warning about RH_KABI_EXCLUDE usage
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/93a4b5f12d5a1c2d62cf1d7c440b31d9847eab07
- 93a4b5f12d5a1c2d62cf1d7c440b31d9847eab07 redhat: rh_kabi: introduce RH_KABI_EXTEND_WITH_SIZE
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/8e5c06356457f5351289e9f687b991189d163dae
- 8e5c06356457f5351289e9f687b991189d163dae redhat: rh_kabi: Indirect EXTEND macros so nesting of other macros will resolve.
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/212cbccda77cc81fcb60123907eabdac8ad5adb7
- 212cbccda77cc81fcb60123907eabdac8ad5adb7 redhat: rh_kabi: Fix RH_KABI_SET_SIZE to use dereference operator
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/6f7744b412e1fb86a67d8761e64df69cf891b4ad
- 6f7744b412e1fb86a67d8761e64df69cf891b4ad redhat: rh_kabi: Add macros to size and extend structs
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/049623d33998be30d79692c69b34acb502c496e3
- 049623d33998be30d79692c69b34acb502c496e3 Removing Obsolete hba pci-ids from rhel8
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/43ef1d631ecfe84084db3572c9ed1bedbdceb0f8
- 43ef1d631ecfe84084db3572c9ed1bedbdceb0f8 mptsas: pci-id table changes
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/e5726695109dd1a73da92487b75de6a51d54c015
- e5726695109dd1a73da92487b75de6a51d54c015 mptsas: Taint kernel if mptsas is loaded
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/ee4dcd6f04ca76ad35ab0f38c436ab2f7de53f16
- ee4dcd6f04ca76ad35ab0f38c436ab2f7de53f16 mptspi: pci-id table changes
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/bd305f716d8b64be1926bc7aebe02468ac6bf599
- bd305f716d8b64be1926bc7aebe02468ac6bf599 qla2xxx: Remove PCI IDs of deprecated adapter
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/803ff9a2c660c094e14d246ef05019bf6008d503
- 803ff9a2c660c094e14d246ef05019bf6008d503 be2iscsi: remove unsupported device IDs
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/2cb24399321f555f18b0804d3fe02cf53949fba1
- 2cb24399321f555f18b0804d3fe02cf53949fba1 mptspi: Taint kernel if mptspi is loaded
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/ad1740551ff4af49f1ef10a130783d9369e955a0
- ad1740551ff4af49f1ef10a130783d9369e955a0 hpsa: remove old cciss-based smartarray pci ids
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/4197ba3e766656eea9175c11ed05903620d98a28
- 4197ba3e766656eea9175c11ed05903620d98a28 qla4xxx: Remove deprecated PCI IDs from RHEL 8
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/7e285aec22ab1213639afda877902db363473cb0
- 7e285aec22ab1213639afda877902db363473cb0 aacraid: Remove depreciated device and vendor PCI id's
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/846109a16be92155e69731c36dde48761d375153
- 846109a16be92155e69731c36dde48761d375153 megaraid_sas: remove deprecated pci-ids
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/6fd2019d01cee7ff36dc047d3ecdb504b968f222
- 6fd2019d01cee7ff36dc047d3ecdb504b968f222 mpt*: remove certain deprecated pci-ids
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/dddcd5c1129b275ff160324036a662739db51fc3
- dddcd5c1129b275ff160324036a662739db51fc3 kernel: add SUPPORT_REMOVED kernel taint
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/08d77161dba915d1ed0d9fede658085440ab4474
- 08d77161dba915d1ed0d9fede658085440ab4474 Rename RH_DISABLE_DEPRECATED to RHEL_DIFFERENCES
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/e2dc2ca6a25a445bf22ceb6a8e38e02706605341
- e2dc2ca6a25a445bf22ceb6a8e38e02706605341 Add option of 13 for FORCE_MAX_ZONEORDER
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/2384646bf71d8c282cf49bb20321fdf802c61cce
- 2384646bf71d8c282cf49bb20321fdf802c61cce s390: Lock down the kernel when the IPL secure flag is set
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/5850c93175b9d2e1081873f4bbe08dead202cb08
- 5850c93175b9d2e1081873f4bbe08dead202cb08 efi: Lock down the kernel if booted in secure boot mode
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/53250b991f841be025fa4d264850dadc0fae2861
- 53250b991f841be025fa4d264850dadc0fae2861 efi: Add an EFI_SECURE_BOOT flag to indicate secure boot mode
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/72223fd1241cc5c70b96a491db14d54c83beadd8
- 72223fd1241cc5c70b96a491db14d54c83beadd8 security: lockdown: expose a hook to lock the kernel down
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/7ba28f03674fa9346610c3fea7fc93bc58f06d2a
- 7ba28f03674fa9346610c3fea7fc93bc58f06d2a Make get_cert_list() use efi_status_to_str() to print error messages.
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/2ae9082db0b54d831a9b3782c049d9917e37d89f
- 2ae9082db0b54d831a9b3782c049d9917e37d89f Add efi_status_to_str() and rework efi_status_to_err().
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/cee1461ada1b7e4b92cd154e7ec241119afcd644
- cee1461ada1b7e4b92cd154e7ec241119afcd644 Add support for deprecating processors
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/2420149f8f5fa9dd1e2dc793765b498022922a81
- 2420149f8f5fa9dd1e2dc793765b498022922a81 arm: aarch64: Drop the EXPERT setting from ARM64_FORCE_52BIT
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/1d69b30b98b60aff639351f5788d20a3b17f6e27
- 1d69b30b98b60aff639351f5788d20a3b17f6e27 iommu/arm-smmu: workaround DMA mode issues
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/6b2e73e508e7a117b1db91596097c00e5570f64a
- 6b2e73e508e7a117b1db91596097c00e5570f64a rh_kabi: introduce RH_KABI_EXCLUDE
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/ecb9206bce179eb600c52642a6753012a69ce4a2
- ecb9206bce179eb600c52642a6753012a69ce4a2 ipmi: do not configure ipmi for HPE m400
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/473be59fe72afa9969cf8d10609ef3f14f594631
- 473be59fe72afa9969cf8d10609ef3f14f594631 IB/rxe: Mark Soft-RoCE Transport driver as tech-preview
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/b94117795261f9c074a7addca2252238871b5081
- b94117795261f9c074a7addca2252238871b5081 scsi: smartpqi: add inspur advantech ids
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/cae871558c333880c1687cab6f2a71accf40d105
- cae871558c333880c1687cab6f2a71accf40d105 ice: mark driver as tech-preview
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/7d9cb007404211ea6638bde4a28dd0fbe8d95de0
- 7d9cb007404211ea6638bde4a28dd0fbe8d95de0 kABI: Add generic kABI macros to use for kABI workarounds
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/bd353e9aae8877dd490e6c92b67849e0dcfbab25
- bd353e9aae8877dd490e6c92b67849e0dcfbab25 add pci_hw_vendor_status()
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/41a259999969bbdfe9f556ce71f2c3c07d7454f4
- 41a259999969bbdfe9f556ce71f2c3c07d7454f4 ahci: thunderx2: Fix for errata that affects stop engine
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/2a107343529ce648c11bff62e9f72bbeec738f3f
- 2a107343529ce648c11bff62e9f72bbeec738f3f Vulcan: AHCI PCI bar fix for Broadcom Vulcan early silicon
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/03e48a48f400a51a182a1254cf22ff0c08706d76
- 03e48a48f400a51a182a1254cf22ff0c08706d76 bpf: Add tech preview taint for syscall
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/607f0e89af7ef5682f79f2eea0a99638a1bc0c4f
- 607f0e89af7ef5682f79f2eea0a99638a1bc0c4f bpf: set unprivileged_bpf_disabled to 1 by default, add a boot parameter
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/31da227877eb734ddb484bc519aae85ce200802e
- 31da227877eb734ddb484bc519aae85ce200802e add Red Hat-specific taint flags
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/7a2e2c83be0230667756cccb5bc3687419dfbb8b
- 7a2e2c83be0230667756cccb5bc3687419dfbb8b kdump: fix a grammar issue in a kernel message
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/d345d54d33e7d496c9d845e4723550dd37cb3f88
- d345d54d33e7d496c9d845e4723550dd37cb3f88 tags.sh: Ignore redhat/rpm
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/5c67dc1eb0783a5c4ca4eb5c545ff6fe05facff0
- 5c67dc1eb0783a5c4ca4eb5c545ff6fe05facff0 put RHEL info into generated headers
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/ce12884c009ec3bed11100c9d19f6d97628cf8ae
- ce12884c009ec3bed11100c9d19f6d97628cf8ae kdump: add support for crashkernel=auto
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/18fb1389afccdc5535977a10669b49a37829b55a
- 18fb1389afccdc5535977a10669b49a37829b55a kdump: round up the total memory size to 128M for crashkernel reservation
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/5fb9821441cc0b77101ad9c0dfaa747957a4cce4
- 5fb9821441cc0b77101ad9c0dfaa747957a4cce4 acpi: prefer booting with ACPI over DTS
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/0cf21a40db6fca5d89cf3d65808117c8c14e524e
- 0cf21a40db6fca5d89cf3d65808117c8c14e524e aarch64: acpi scan: Fix regression related to X-Gene UARTs
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/de13e14cc2388478d9a2c68c5d90affd92098f11
- de13e14cc2388478d9a2c68c5d90affd92098f11 ACPI / irq: Workaround firmware issue on X-Gene based m400
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/71c098f4afa38a15a95495c14f71fb087ab27308
- 71c098f4afa38a15a95495c14f71fb087ab27308 modules: add rhelversion MODULE_INFO tag
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/3247f9c838f4aa91aa5d08c152b385d61554d4b5
- 3247f9c838f4aa91aa5d08c152b385d61554d4b5 ACPI: APEI: arm64: Ignore broken HPE moonshot APEI support
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/e80982feaa68226ff60d2f83dace2016c35270d3
- e80982feaa68226ff60d2f83dace2016c35270d3 Add Red Hat tainting
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/2987f9a606df106f5bdfa4113eb55356a21085a6
- 2987f9a606df106f5bdfa4113eb55356a21085a6 Introduce CONFIG_RH_DISABLE_DEPRECATED
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/a99885a5e77af594dfdce586cc83e5911d8401ce
- a99885a5e77af594dfdce586cc83e5911d8401ce Pull the RHEL version defines out of the Makefile
-
-https://gitlab.com/cki-project/kernel-ark/-/commit/cd3a5d30570279538623ea8a1255db0ee4b728f7
- cd3a5d30570279538623ea8a1255db0ee4b728f7 [initial commit] Add Red Hat variables in the top level makefile
-

README.rst

@@ -1,25 +0,0 @@
-===================
-The Kernel dist-git
-===================
-
-The kernel is maintained in a `source tree`_ rather than directly in dist-git.
-The specfile is maintained as a `template`_ in the source tree along with a set
-of build scripts to generate configurations, (S)RPMs, and to populate the
-dist-git repository.
-
-The `documentation`_ for the source tree covers how to contribute and maintain
-the tree.
-
-If you're looking for the downstream patch set it's available in the source
-tree with "git log master..ark-patches" or
-`online`_.
-
-Each release in dist-git is tagged in the source repository so you can easily
-check out the source tree for a build. The tags are in the format
-name-version-release, but note release doesn't contain the dist tag since the
-source can be built in different build roots (Fedora, CentOS, etc.)
-
-.. _source tree: https://gitlab.com/cki-project/kernel-ark.git
-.. _template: https://gitlab.com/cki-project/kernel-ark/-/blob/os-build/redhat/kernel.spec.template
-.. _documentation: https://gitlab.com/cki-project/kernel-ark/-/wikis/home
-.. _online: https://gitlab.com/cki-project/kernel-ark/-/commits/ark-patches

README.txt

@@ -0,0 +1,82 @@
+
+		Kernel package tips & tricks.
+		~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The kernel is one of the more complicated packages in the distro, and
+for the newcomer, some of the voodoo in the spec file can be somewhat scary.
+This file attempts to document some of the magic.
+
+
+Speeding up make prep
+---------------------
+The kernel is nearly 500MB of source code, and as such, 'make prep'
+takes a while. The spec file employs some trickery so that repeated
+invocations of make prep don't take as long.  Ordinarily the %prep
+phase of a package will delete the tree it is about to untar/patch.
+The kernel %prep keeps around an unpatched version of the tree,
+and makes a symlink tree clone of that clean tree and than applies
+the patches listed in the spec to the symlink tree.
+This makes a huge difference if you're doing multiple make preps a day.
+As an added bonus, doing a diff between the clean tree and the symlink
+tree is slightly faster than it would be doing two proper copies of the tree.
+
+
+build logs.
+-----------
+There's a convenience helper script in scripts/grab-logs.sh
+that will grab the build logs from koji for the kernel version reported
+by make verrel
+
+
+config heirarchy.
+-----------------
+Instead of having to maintain a config file for every arch variant we build on,
+the kernel spec uses a nested system of configs.  At the top level, is
+config-generic. Add options here that should be present in every possible
+config on all architectures.
+
+Beneath this are per-arch overrides. For example config-x86-generic add
+additional x86 specific options, and also _override_ any options that were
+set in config-generic.
+
+The heirarchy looks like this..
+
+                           config-generic
+                                 |
+                         config-x86-generic
+                         |                |
+             config-x86-32-generic   config-x86-64-generic
+
+An option set in a lower level will override the same option set in one
+of the higher levels.
+
+
+There exist two additional overrides, config-debug, and config-nodebug,
+which override -generic, and the per-arch overrides. It is documented
+further below.
+
+
+debug options.
+--------------
+This is a little complicated, as the purpose & meaning of this changes
+depending on where we are in the release cycle.
+If we are building for a current stable release, 'make release' has
+typically been run already, which sets up the following..
+- Two builds occur, a 'kernel' and a 'kernel-debug' flavor.
+- kernel-debug will get various heavyweight debugging options like
+  lockdep etc turned on.
+
+If we are building for rawhide, 'make debug' has been run, which changes
+the status quo to:
+- We only build one kernel 'kernel'
+- The debug options from 'config-debug' are always turned on.
+This is done to increase coverage testing, as not many people actually
+run kernel-debug.
+
+To add new debug options, add an option to _both_ config-debug and config-nodebug,
+and also new stanzas to the Makefile 'debug' and 'release' targets.
+
+Sometimes debug options get added to config-generic, or per-arch overrides
+instead of config-[no]debug. In this instance, the options should have no
+discernable performance impact, otherwise they belong in the debug files.
+

Restrict-dev-mem-and-dev-kmem-when-module-loading-is.patch

@@ -0,0 +1,42 @@
+From d4ae417828427de74e9f857f9caa49580aecf1fe Mon Sep 17 00:00:00 2001
+From: Matthew Garrett <matthew.garrett@nebula.com>
+Date: Fri, 9 Mar 2012 09:28:15 -0500
+Subject: [PATCH 06/20] Restrict /dev/mem and /dev/kmem when module loading is
+ restricted
+
+Allowing users to write to address space makes it possible for the kernel
+to be subverted, avoiding module loading restrictions. Prevent this when
+any restrictions have been imposed on loading modules.
+
+Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
+---
+ drivers/char/mem.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+diff --git a/drivers/char/mem.c b/drivers/char/mem.c
+index 53fe675f9bd7..b52c88860532 100644
+--- a/drivers/char/mem.c
++++ b/drivers/char/mem.c
+@@ -167,6 +167,9 @@ static ssize_t write_mem(struct file *file, const char __user *buf,
+ 	if (p != *ppos)
+ 		return -EFBIG;
+ 
++	if (secure_modules())
++		return -EPERM;
++
+ 	if (!valid_phys_addr_range(p, count))
+ 		return -EFAULT;
+ 
+@@ -513,6 +516,9 @@ static ssize_t write_kmem(struct file *file, const char __user *buf,
+ 	char *kbuf; /* k-addr because vwrite() takes vmlist_lock rwlock */
+ 	int err = 0;
+ 
++	if (secure_modules())
++		return -EPERM;
++
+ 	if (p < (unsigned long) high_memory) {
+ 		unsigned long to_write = min_t(unsigned long, count,
+ 					       (unsigned long)high_memory - p);
+-- 
+2.4.3
+

TODO

@@ -0,0 +1,10 @@
+Config TODOs:
+* review & disable a bunch of the I2C, RTC, DVB, SOUND options.
+
+Spec file TODOs:
+
+* modules-extra: Do a few more things to make it a bit more robust.
+  - Allow for comments in the mod-extra.list file.
+  - Don't fail the build if a module is listed but not built (maybe).
+  - See if it can be tied into Kconfig instead of module names.
+

acpi-Ignore-acpi_rsdp-kernel-parameter-when-module-l.patch

@@ -0,0 +1,39 @@
+From 32d3dc2147823a32c8a7771d8fe0f2d1ef057c6a Mon Sep 17 00:00:00 2001
+From: Josh Boyer <jwboyer@redhat.com>
+Date: Mon, 25 Jun 2012 19:57:30 -0400
+Subject: [PATCH 07/20] acpi: Ignore acpi_rsdp kernel parameter when module
+ loading is restricted
+
+This option allows userspace to pass the RSDP address to the kernel, which
+makes it possible for a user to circumvent any restrictions imposed on
+loading modules. Disable it in that case.
+
+Signed-off-by: Josh Boyer <jwboyer@redhat.com>
+---
+ drivers/acpi/osl.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
+index 739a4a6b3b9b..9ef2a020a7a9 100644
+--- a/drivers/acpi/osl.c
++++ b/drivers/acpi/osl.c
+@@ -40,6 +40,7 @@
+ #include <linux/list.h>
+ #include <linux/jiffies.h>
+ #include <linux/semaphore.h>
++#include <linux/module.h>
+ 
+ #include <asm/io.h>
+ #include <asm/uaccess.h>
+@@ -253,7 +254,7 @@ early_param("acpi_rsdp", setup_acpi_rsdp);
+ acpi_physical_address __init acpi_os_get_root_pointer(void)
+ {
+ #ifdef CONFIG_KEXEC
+-	if (acpi_rsdp)
++	if (acpi_rsdp && !secure_modules())
+ 		return acpi_rsdp;
+ #endif
+ 
+-- 
+2.4.3
+

arm-i.MX6-Utilite-device-dtb.patch

@@ -0,0 +1,354 @@
+From: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
+
+The CompuLab Utilite Pro is a miniature fanless desktop pc based on
+the i.MX6 Quad powered cm-fx6 module. It features two serial ports,
+USB OTG, 4x USB, analog audio and S/PDIF, 2x Gb Ethernet, HDMI and
+DVI ports, an on-board 32GB SSD, a mmc slot, and on-board wifi/bt.
+
+Add initial support for it including USB, Ethernet (both ports), sata
+and HDMI support.
+
+Signed-off-by: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
+---
+ arch/arm/boot/dts/Makefile              |   1 +
+ arch/arm/boot/dts/imx6q-utilite-pro.dts | 128 ++++++++++++++++++++++++++++++++
+ 2 files changed, 129 insertions(+)
+ create mode 100644 arch/arm/boot/dts/imx6q-utilite-pro.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 515a428..287044c 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -369,6 +369,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
+ 	imx6q-tx6q-1110.dtb \
+ 	imx6q-tx6q-11x0-mb7.dtb \
+ 	imx6q-udoo.dtb \
++	imx6q-utilite-pro.dtb \
+ 	imx6q-wandboard.dtb \
+ 	imx6q-wandboard-revb1.dtb \
+ 	imx6qp-nitrogen6_max.dtb \
+diff --git a/arch/arm/boot/dts/imx6q-utilite-pro.dts b/arch/arm/boot/dts/imx6q-utilite-pro.dts
+new file mode 100644
+index 0000000..bcd8e0d
+--- /dev/null
++++ b/arch/arm/boot/dts/imx6q-utilite-pro.dts
+@@ -0,0 +1,128 @@
++/*
++ * Copyright 2016 Christopher Spinrath
++ * Copyright 2013 CompuLab Ltd.
++ *
++ * Based on the GPLv2 licensed devicetree distributed with the vendor
++ * kernel for the Utilite Pro:
++ *	Copyright 2013 CompuLab Ltd.
++ *	Author: Valentin Raevsky <valentin@xxxxxxxxxxxxxx>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include "imx6q-cm-fx6.dts"
++
++/ {
++	model = "CompuLab Utilite Pro";
++	compatible = "compulab,utilite-pro", "compulab,cm-fx6", "fsl,imx6q";
++
++	aliases {
++		ethernet1 = &eth1;
++		rtc0 = &em3027;
++		rtc1 = &snvs_rtc;
++	};
++
++	gpio-keys {
++		compatible = "gpio-keys";
++		power {
++			label = "Power Button";
++			gpios = <&gpio1 29 1>;
++			linux,code = <116>; /* KEY_POWER */
++			gpio-key,wakeup;
++		};
++	};
++};
++
++&hdmi {
++	ddc-i2c-bus = <&i2c2>;
++	status = "okay";
++};
++
++&i2c1 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c1>;
++	status = "okay";
++
++	eeprom@50 {
++		compatible = "at24,24c02";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
++
++	em3027: rtc@56 {
++		compatible = "emmicro,em3027";
++		reg = <0x56>;
++	};
++};
++
++&i2c2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c2>;
++	status = "okay";
++};
++
++&iomuxc {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hog>;
++
++	hog {
++		pinctrl_hog: hoggrp {
++			fsl,pins = <
++				/* power button */
++				MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
++			>;
++		};
++	};
++
++	imx6q-utilite-pro {
++		pinctrl_i2c1: i2c1grp {
++			fsl,pins = <
++				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
++				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
++			>;
++		};
++
++		pinctrl_i2c2: i2c2grp {
++			fsl,pins = <
++				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
++				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
++			>;
++		};
++
++		pinctrl_uart2: uart2grp {
++			fsl,pins = <
++				MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1
++				MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1
++				MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
++				MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
++			>;
++		};
++	};
++};
++
++&pcie {
++	pcie@0,0 {
++		reg = <0x000000 0 0 0 0>;
++		#address-cells = <3>;
++		#size-cells = <2>;
++
++		/* non-removable i211 ethernet card */
++		eth1: intel,i211@pcie0,0 {
++			reg = <0x010000 0 0 0 0>;
++		};
++	};
++};
++
++&uart2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_uart2>;
++	fsl,uart-has-rtscts;
++	dma-names = "rx", "tx";
++	dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
++	status = "okay";
++};
+-- 
+2.8.2
+From: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
+
+The cm-fx6 module has an on-board spi-flash chip for its firmware, an
+eeprom (containing e.g. the mac address of the on-board Ethernet),
+a sata port, a pcie controller, an USB hub, and an USB otg port.
+Enable support for them. In addition, enable syscon poweroff support.
+
+Signed-off-by: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
+---
+ arch/arm/boot/dts/imx6q-cm-fx6.dts | 136 +++++++++++++++++++++++++++++++++++++
+ 1 file changed, 136 insertions(+)
+
+diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
+index 99b46f8..f4fc22e 100644
+--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts
++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts
+@@ -31,6 +31,61 @@
+ 			linux,default-trigger = "heartbeat";
+ 		};
+ 	};
++
++	regulators {
++		compatible = "simple-bus";
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		reg_usb_otg_vbus: usb_otg_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_otg_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			gpio = <&gpio3 22 0>;
++			enable-active-high;
++		};
++
++		reg_usb_h1_vbus: usb_h1_vbus {
++			compatible = "regulator-fixed";
++			regulator-name = "usb_h1_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			gpio = <&gpio7 8 0>;
++			enable-active-high;
++		};
++	};
++};
++
++&ecspi1 {
++	fsl,spi-num-chipselects = <2>;
++	cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_ecspi1>;
++	status = "okay";
++
++	flash: m25p80@0 {
++		#address-cells = <1>;
++		#size-cells = <1>;
++		compatible = "st,m25p", "jedec,spi-nor";
++		spi-max-frequency = <20000000>;
++		reg = <0>;
++
++		partition@0 {
++			label = "uboot";
++			reg = <0x0 0xc0000>;
++		};
++
++		partition@c0000 {
++			label = "uboot environment";
++			reg = <0xc0000 0x40000>;
++		};
++
++		partition@100000 {
++			label = "reserved";
++			reg = <0x100000 0x100000>;
++		};
++	};
+ };
+ 
+ &fec {
+@@ -46,8 +101,31 @@
+ 	status = "okay";
+ };
+ 
++&i2c3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_i2c3>;
++	status = "okay";
++	clock-frequency = <100000>;
++
++	eeprom@50 {
++		compatible = "at24,24c02";
++		reg = <0x50>;
++		pagesize = <16>;
++	};
++};
++
+ &iomuxc {
+ 	imx6q-cm-fx6 {
++		pinctrl_ecspi1: ecspi1grp {
++			fsl,pins = <
++				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		 0x100b1
++				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		 0x100b1
++				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		 0x100b1
++				MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x100b1
++				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x100b1
++			>;
++		};
++
+ 		pinctrl_enet: enetgrp {
+ 			fsl,pins = <
+ 				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
+@@ -91,17 +169,75 @@
+ 			>;
+ 		};
+ 
++		pinctrl_i2c3: i2c3grp {
++			fsl,pins = <
++				MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
++				MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
++			>;
++		};
++
++		pinctrl_pcie: pciegrp {
++			fsl,pins = <
++				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000
++				MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
++			>;
++		};
++
+ 		pinctrl_uart4: uart4grp {
+ 			fsl,pins = <
+ 				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
+ 				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
+ 			>;
+ 		};
++
++		pinctrl_usbh1: usbh1grp {
++			fsl,pins = <
++				MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000
++			>;
++		};
++
++		pinctrl_usbotg: usbotggrp {
++			fsl,pins = <
++				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
++				MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
++			>;
++		};
+ 	};
+ };
+ 
++&pcie {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_pcie>;
++	reset-gpio = <&gpio1 26 0>;
++	power-on-gpio = <&gpio2 24 0>;
++	status = "okay";
++};
++
++&sata {
++	status = "okay";
++};
++
++&snvs_poweroff {
++	status = "okay";
++};
++
+ &uart4 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&pinctrl_uart4>;
+ 	status = "okay";
+ };
++
++&usbotg {
++	vbus-supply = <&reg_usb_otg_vbus>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usbotg>;
++	dr_mode = "otg";
++	status = "okay";
++};
++
++&usbh1 {
++	vbus-supply = <&reg_usb_h1_vbus>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_usbh1>;
++	status = "okay";
++};
+-- 
+2.8.2
+

arm64-avoid-needing-console-to-enable-serial-console.patch

@@ -0,0 +1,46 @@
+From ce7a9e482dcf66d155e74b39ada1708cf6d9cb25 Mon Sep 17 00:00:00 2001
+From: Mark Salter <msalter@redhat.com>
+Date: Wed, 25 Mar 2015 14:17:50 -0400
+Subject: [PATCH] arm64: avoid needing console= to enable serial console
+
+Tell kernel to prefer one of the serial ports for console on
+platforms currently supported (pl011 or 8250). console= on
+command line will override these assumed preferences. This is
+just a hack to get the behavior we want from DT provided by
+firmware.
+
+Signed-off-by: Mark Salter <msalter@redhat.com>
+---
+ arch/arm64/kernel/setup.c | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+
+diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
+index 9dc67769b6a4..dfac33b47423 100644
+--- a/arch/arm64/kernel/setup.c
++++ b/arch/arm64/kernel/setup.c
+@@ -417,3 +417,22 @@ static int __init register_kernel_offset_dumper(void)
+ 	return 0;
+ }
+ __initcall(register_kernel_offset_dumper);
++
++/*
++ * Temporary hack to avoid need for console= on command line
++ */
++static int __init arm64_console_setup(void)
++{
++	/* Allow cmdline to override our assumed preferences */
++	if (console_set_on_cmdline)
++		return 0;
++
++	if (IS_ENABLED(CONFIG_SERIAL_AMBA_PL011))
++		add_preferred_console("ttyAMA", 0, "115200");
++
++	if (IS_ENABLED(CONFIG_SERIAL_8250))
++		add_preferred_console("ttyS", 0, "115200");
++
++	return 0;
++}
++early_initcall(arm64_console_setup);
+-- 
+2.5.0
+

asus-wmi-Restrict-debugfs-interface-when-module-load.patch

@@ -0,0 +1,54 @@
+From 32f701d40657cc3c982b8cba4bf73452ccdd6697 Mon Sep 17 00:00:00 2001
+From: Matthew Garrett <matthew.garrett@nebula.com>
+Date: Fri, 9 Mar 2012 08:46:50 -0500
+Subject: [PATCH 05/20] asus-wmi: Restrict debugfs interface when module
+ loading is restricted
+
+We have no way of validating what all of the Asus WMI methods do on a
+given machine, and there's a risk that some will allow hardware state to
+be manipulated in such a way that arbitrary code can be executed in the
+kernel, circumventing module loading restrictions. Prevent that if any of
+these features are enabled.
+
+Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
+---
+ drivers/platform/x86/asus-wmi.c | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/drivers/platform/x86/asus-wmi.c b/drivers/platform/x86/asus-wmi.c
+index efbc3f0c592b..071171be4b7f 100644
+--- a/drivers/platform/x86/asus-wmi.c
++++ b/drivers/platform/x86/asus-wmi.c
+@@ -1868,6 +1868,9 @@ static int show_dsts(struct seq_file *m, void *data)
+ 	int err;
+ 	u32 retval = -1;
+ 
++	if (secure_modules())
++		return -EPERM;
++
+ 	err = asus_wmi_get_devstate(asus, asus->debug.dev_id, &retval);
+ 
+ 	if (err < 0)
+@@ -1884,6 +1887,9 @@ static int show_devs(struct seq_file *m, void *data)
+ 	int err;
+ 	u32 retval = -1;
+ 
++	if (secure_modules())
++		return -EPERM;
++
+ 	err = asus_wmi_set_devstate(asus->debug.dev_id, asus->debug.ctrl_param,
+ 				    &retval);
+ 
+@@ -1908,6 +1914,9 @@ static int show_call(struct seq_file *m, void *data)
+ 	union acpi_object *obj;
+ 	acpi_status status;
+ 
++	if (secure_modules())
++		return -EPERM;
++
+ 	status = wmi_evaluate_method(ASUS_WMI_MGMT_GUID,
+ 				     1, asus->debug.method_id,
+ 				     &input, &output);
+-- 
+2.4.3
+

ath9k-rx-dma-stop-check.patch

@@ -0,0 +1,38 @@
+From: "kernel-team@fedoraproject.org" <kernel-team@fedoraproject.org>
+Date: Wed, 6 Feb 2013 09:57:47 -0500
+Subject: [PATCH] ath9k: rx dma stop check
+
+---
+ drivers/net/wireless/ath/ath9k/mac.c | 12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c
+index bba85d1a6cd1..ebbee8f17130 100644
+--- a/drivers/net/wireless/ath/ath9k/mac.c
++++ b/drivers/net/wireless/ath/ath9k/mac.c
+@@ -693,7 +693,7 @@ bool ath9k_hw_stopdmarecv(struct ath_hw *ah, bool *reset)
+ {
+ #define AH_RX_STOP_DMA_TIMEOUT 10000   /* usec */
+ 	struct ath_common *common = ath9k_hw_common(ah);
+-	u32 mac_status, last_mac_status = 0;
++	u32 mac_status = 0, last_mac_status = 0;
+ 	int i;
+ 
+ 	/* Enable access to the DMA observation bus */
+@@ -723,6 +723,16 @@ bool ath9k_hw_stopdmarecv(struct ath_hw *ah, bool *reset)
+ 	}
+ 
+ 	if (i == 0) {
++		if (!AR_SREV_9300_20_OR_LATER(ah) &&
++		    (mac_status & 0x700) == 0) {
++			/*
++			 * DMA is idle but the MAC is still stuck
++			 * processing events
++			 */
++			*reset = true;
++			return true;
++		}
++
+ 		ath_err(common,
+ 			"DMA failed to stop in %d ms AR_CR=0x%08x AR_DIAG_SW=0x%08x DMADBG_7=0x%08x\n",
+ 			AH_RX_STOP_DMA_TIMEOUT / 1000,

c18b104dd2495da60ec92f40e14559591644cc3a..473dfbfa09934cea0d08cc9023c749a5fce10cb0.patch

@@ -0,0 +1,72 @@
+From 473dfbfa09934cea0d08cc9023c749a5fce10cb0 Mon Sep 17 00:00:00 2001
+From: Amitkumar Karwar <akarwar@marvell.com>
+Date: Thu, 30 Jun 2016 22:24:57 +0530
+Subject: mwifiex: Change default firmware for PCIe8997 chipset
+
+PCIe-USB8997 variant is being used in the product. Let's change default
+firmware from PCIe-UART to PCIe-USB. So by default PCIe-USB firmware would
+be downloaded if version register doesn't give any information.
+
+Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+---
+ drivers/net/wireless/marvell/mwifiex/pcie.c | 12 ++++++------
+ drivers/net/wireless/marvell/mwifiex/pcie.h |  4 ++--
+ 2 files changed, 8 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.c b/drivers/net/wireless/marvell/mwifiex/pcie.c
+index 1b1e266..012733c 100644
+--- a/drivers/net/wireless/marvell/mwifiex/pcie.c
++++ b/drivers/net/wireless/marvell/mwifiex/pcie.c
+@@ -2841,20 +2841,20 @@ static void mwifiex_pcie_get_fw_name(struct mwifiex_adapter *adapter)
+ 		version &= 0x7;
+ 		switch (revision_id) {
+ 		case PCIE8997_V2:
+-			if (version == CHIP_VER_PCIEUSB)
++			if (version == CHIP_VER_PCIEUART)
+ 				strcpy(adapter->fw_name,
+-				       PCIEUSB8997_FW_NAME_V2);
++				       PCIEUART8997_FW_NAME_V2);
+ 			else
+ 				strcpy(adapter->fw_name,
+-				       PCIEUART8997_FW_NAME_V2);
++				       PCIEUSB8997_FW_NAME_V2);
+ 			break;
+ 		case PCIE8997_Z:
+-			if (version == CHIP_VER_PCIEUSB)
++			if (version == CHIP_VER_PCIEUART)
+ 				strcpy(adapter->fw_name,
+-				       PCIEUSB8997_FW_NAME_Z);
++				       PCIEUART8997_FW_NAME_Z);
+ 			else
+ 				strcpy(adapter->fw_name,
+-				       PCIEUART8997_FW_NAME_Z);
++				       PCIEUSB8997_FW_NAME_Z);
+ 			break;
+ 		default:
+ 			strcpy(adapter->fw_name, PCIE8997_DEFAULT_FW_NAME);
+diff --git a/drivers/net/wireless/marvell/mwifiex/pcie.h b/drivers/net/wireless/marvell/mwifiex/pcie.h
+index 9c00c7e..f05061c 100644
+--- a/drivers/net/wireless/marvell/mwifiex/pcie.h
++++ b/drivers/net/wireless/marvell/mwifiex/pcie.h
+@@ -32,7 +32,7 @@
+ #define PCIE8897_DEFAULT_FW_NAME "mrvl/pcie8897_uapsta.bin"
+ #define PCIE8897_A0_FW_NAME "mrvl/pcie8897_uapsta_a0.bin"
+ #define PCIE8897_B0_FW_NAME "mrvl/pcie8897_uapsta.bin"
+-#define PCIE8997_DEFAULT_FW_NAME "mrvl/pcieuart8997_combo_v2.bin"
++#define PCIE8997_DEFAULT_FW_NAME "mrvl/pcieusb8997_combo_v2.bin"
+ #define PCIEUART8997_FW_NAME_Z "mrvl/pcieuart8997_combo.bin"
+ #define PCIEUART8997_FW_NAME_V2 "mrvl/pcieuart8997_combo_v2.bin"
+ #define PCIEUSB8997_FW_NAME_Z "mrvl/pcieusb8997_combo.bin"
+@@ -48,7 +48,7 @@
+ #define PCIE8897_B0	0x1200
+ #define PCIE8997_Z	0x0
+ #define PCIE8997_V2	0x471
+-#define CHIP_VER_PCIEUSB	0x2
++#define CHIP_VER_PCIEUART	0x3
+ 
+ /* Constants for Buffer Descriptor (BD) rings */
+ #define MWIFIEX_MAX_TXRX_BD			0x20
+-- 
+cgit v0.12
+

check-kabi

@@ -1,149 +0,0 @@
-#!/usr/bin/python3
-#
-# check-kabi - Red Hat kABI reference checking tool
-#
-# We use this script to check against reference Module.kabi files.
-#
-# Author: Jon Masters <jcm@redhat.com>
-# Copyright (C) 2007-2009 Red Hat, Inc.
-#
-# This software may be freely redistributed under the terms of the GNU
-# General Public License (GPL).
-
-# Changelog:
-#
-# 2018/06/01 - Update for python3 by Petr Oros.
-# 2009/08/15 - Updated for use in RHEL6.
-# 2007/06/13 - Initial rewrite in python by Jon Masters.
-
-__author__ = "Jon Masters <jcm@redhat.com>"
-__version__ = "2.0"
-__date__ = "2009/08/15"
-__copyright__ = "Copyright (C) 2007-2009 Red Hat, Inc"
-__license__ = "GPL"
-
-import getopt
-import string
-import sys
-
-true = 1
-false = 0
-
-
-def load_symvers(symvers, filename):
-    """Load a Module.symvers file."""
-
-    symvers_file = open(filename, "r")
-
-    while true:
-        in_line = symvers_file.readline()
-        if in_line == "":
-            break
-        if in_line == "\n":
-            continue
-        checksum, symbol, directory, type = in_line.split()
-
-        symvers[symbol] = in_line[0:-1]
-
-
-def load_kabi(kabi, filename):
-    """Load a Module.kabi file."""
-
-    kabi_file = open(filename, "r")
-
-    while true:
-        in_line = kabi_file.readline()
-        if in_line == "":
-            break
-        if in_line == "\n":
-            continue
-        checksum, symbol, directory, type = in_line.split()
-
-        kabi[symbol] = in_line[0:-1]
-
-
-def check_kabi(symvers, kabi):
-    """Check Module.kabi and Module.symvers files."""
-
-    fail = 0
-    warn = 0
-    changed_symbols = []
-    moved_symbols = []
-
-    for symbol in kabi:
-        abi_hash, abi_sym, abi_dir, abi_type = kabi[symbol].split()
-        if symbol in symvers:
-            sym_hash, sym_sym, sym_dir, sym_type = symvers[symbol].split()
-            if abi_hash != sym_hash:
-                fail = 1
-                changed_symbols.append(symbol)
-
-            if abi_dir != sym_dir:
-                warn = 1
-                moved_symbols.append(symbol)
-        else:
-            fail = 1
-            changed_symbols.append(symbol)
-
-    if fail:
-        print("*** ERROR - ABI BREAKAGE WAS DETECTED ***")
-        print("")
-        print("The following symbols have been changed (this will cause an ABI breakage):")
-        print("")
-        for symbol in changed_symbols:
-            print(symbol)
-        print("")
-
-    if warn:
-        print("*** WARNING - ABI SYMBOLS MOVED ***")
-        print("")
-        print("The following symbols moved (typically caused by moving a symbol from being")
-        print("provided by the kernel vmlinux out to a loadable module):")
-        print("")
-        for symbol in moved_symbols:
-            print(symbol)
-        print("")
-
-    """Halt the build, if we got errors and/or warnings. In either case,
-       double-checkig is required to avoid introducing / concealing
-       KABI inconsistencies."""
-    if fail or warn:
-        sys.exit(1)
-    sys.exit(0)
-
-
-def usage():
-    print("""
-check-kabi: check Module.kabi and Module.symvers files.
-
-    check-kabi [ -k Module.kabi ] [ -s Module.symvers ]
-
-""")
-
-
-if __name__ == "__main__":
-
-    symvers_file = ""
-    kabi_file = ""
-
-    opts, args = getopt.getopt(sys.argv[1:], 'hk:s:')
-
-    for o, v in opts:
-        if o == "-s":
-            symvers_file = v
-        if o == "-h":
-            usage()
-            sys.exit(0)
-        if o == "-k":
-            kabi_file = v
-
-    if (symvers_file == "") or (kabi_file == ""):
-        usage()
-        sys.exit(1)
-
-    symvers = {}
-    kabi = {}
-
-    load_symvers(symvers, symvers_file)
-    load_kabi(kabi, kabi_file)
-    check_kabi(symvers, kabi)

config-arm-generic

@@ -0,0 +1,651 @@
+CONFIG_KUSER_HELPERS=y
+# CONFIG_VDSO is not set
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+CONFIG_COMMON_CLK=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST=y
+CONFIG_FB_SSD1307=m
+CONFIG_HW_PERF_EVENTS=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_ARMTHUMB=y
+
+CONFIG_SCHED_MC=y
+CONFIG_SCHED_SMT=y
+
+CONFIG_CC_STACKPROTECTOR=y
+
+# CONFIG_PID_IN_CONTEXTIDR is not set
+
+# CONFIG_CPU_BIG_ENDIAN is not set
+# CONFIG_BIG_LITTLE is not set
+# CONFIG_IWMMXT is not set
+
+CONFIG_RESET_CONTROLLER=y
+CONFIG_RESET_GPIO=y
+
+CONFIG_RCU_FANOUT_LEAF=16
+CONFIG_BACKLIGHT_PWM=m
+CONFIG_BACKLIGHT_GENERIC=m
+CONFIG_INPUT_PWM_BEEPER=m
+CONFIG_ARM_SP805_WATCHDOG=m
+CONFIG_ARM_ARCH_TIMER=y
+CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
+CONFIG_NR_CPUS=8
+
+CONFIG_SWIOTLB=y
+CONFIG_DMA_VIRTUAL_CHANNELS=y
+CONFIG_FB_SIMPLE=y
+
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+
+CONFIG_ARM_PMU=y
+
+# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
+
+# ARM AMBA generic HW
+CONFIG_ARM_AMBA=y
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_ARM_CCI=y
+CONFIG_ARM_CCN=y
+CONFIG_ARM_CCI400_PMU=y
+CONFIG_ARM_CCI5xx_PMU=y
+CONFIG_ARM_DMA_USE_IOMMU=y
+CONFIG_ARM_DMA_IOMMU_ALIGNMENT=8
+CONFIG_ARM_GIC=y
+CONFIG_ARM_GIC_V2M=y
+CONFIG_ARM_GIC_V3=y
+CONFIG_ARM_GIC_V3_ITS=y
+CONFIG_ARM_GLOBAL_TIMER=y
+CONFIG_ARM_SMMU=y
+CONFIG_MMC_ARMMMCI=y
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIO_AMBAKMI=y
+CONFIG_FB_ARMCLCD=y
+CONFIG_RTC_DRV_PL031=y
+CONFIG_PL330_DMA=m
+CONFIG_GPIO_PL061=y
+CONFIG_USB_ISP1760=m
+CONFIG_ARM_PL172_MPMC=m
+CONFIG_DRM_HDLCD=m
+# CONFIG_DRM_HDLCD_SHOW_UNDERRUN is not set
+
+# HW crypto and rng
+CONFIG_ARM_CRYPTO=y
+CONFIG_CRYPTO_AES_ARM=y
+CONFIG_CRYPTO_AES_ARM_BS=y
+CONFIG_CRYPTO_SHA1_ARM=y
+CONFIG_CRYPTO_SHA256_ARM=y
+CONFIG_CRYPTO_SHA1_ARM_NEON=y
+CONFIG_CRYPTO_SHA512_ARM=y
+
+# EDAC
+CONFIG_EDAC=y
+CONFIG_EDAC_MM_EDAC=m
+CONFIG_EDAC_LEGACY_SYSFS=y
+
+# Regulators
+CONFIG_REGULATOR=y
+CONFIG_RFKILL_REGULATOR=m
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_VIRTUAL_CONSUMER=m
+CONFIG_REGULATOR_USERSPACE_CONSUMER=m
+CONFIG_REGULATOR_GPIO=m
+CONFIG_REGULATOR_PWM=m
+
+# ARM VExpress
+CONFIG_ARCH_VEXPRESS=y
+CONFIG_MFD_VEXPRESS_SYSREG=y
+CONFIG_VEXPRESS_SYSCFG=y
+CONFIG_COMMON_CLK_VERSATILE=y
+CONFIG_ARM_TIMER_SP804=y
+CONFIG_CLK_SP810=y
+CONFIG_CLK_VEXPRESS_OSC=y
+CONFIG_I2C_VERSATILE=m
+CONFIG_POWER_RESET_VEXPRESS=y
+CONFIG_REGULATOR_VEXPRESS=m
+CONFIG_SENSORS_VEXPRESS=m
+CONFIG_CLKSRC_VERSATILE=y
+CONFIG_POWER_RESET_VERSATILE=y
+# CONFIG_ARM_CHARLCD is not set
+
+# Marvell EBU
+CONFIG_ARCH_MVEBU=y
+CONFIG_SERIAL_MVEBU_UART=y
+CONFIG_SERIAL_MVEBU_CONSOLE=y
+CONFIG_MVEBU_DEVBUS=y
+CONFIG_MVEBU_MBUS=y
+CONFIG_PCI_MVEBU=y
+CONFIG_PCIE_ARMADA_8K=y
+CONFIG_MV_XOR=y
+CONFIG_CRYPTO_DEV_MV_CESA=m
+CONFIG_CRYPTO_DEV_MARVELL_CESA=m
+CONFIG_ARMADA_THERMAL=m
+CONFIG_MMC_SDHCI_PXAV3=m
+CONFIG_MV643XX_ETH=m
+CONFIG_PINCTRL_MVEBU=y
+CONFIG_EDAC_MV64X60=m
+CONFIG_RTC_DRV_S35390A=m
+CONFIG_RTC_DRV_88PM80X=m
+CONFIG_RTC_DRV_ISL12057=m
+CONFIG_RTC_DRV_MV=m
+CONFIG_RTC_DRV_ARMADA38X=m
+CONFIG_MVNETA=m
+CONFIG_MVNETA_BM_ENABLE=m
+CONFIG_GPIO_MVEBU=y
+CONFIG_MVEBU_CLK_CORE=y
+CONFIG_MVEBU_CLK_COREDIV=y
+CONFIG_MMC_MVSDIO=m
+CONFIG_SPI_ORION=m
+CONFIG_USB_MV_UDC=m
+CONFIG_USB_XHCI_MVEBU=m
+CONFIG_PHY_MVEBU_SATA=y
+CONFIG_AHCI_MVEBU=m
+# CONFIG_CACHE_FEROCEON_L2 is not set
+# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
+
+# Rockchips
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_I2C_RK3X=m
+CONFIG_SPI_ROCKCHIP=m
+CONFIG_PWM_ROCKCHIP=m
+CONFIG_ROCKCHIP_SARADC=m
+CONFIG_ROCKCHIP_IODOMAIN=m
+CONFIG_MMC_DW_ROCKCHIP=m
+CONFIG_EMAC_ROCKCHIP=m
+CONFIG_MFD_RK808=m
+CONFIG_COMMON_CLK_RK808=m
+CONFIG_REGULATOR_RK808=m
+CONFIG_RTC_DRV_RK808=m
+CONFIG_RTC_DRV_HYM8563=m
+CONFIG_ROCKCHIP_SARADC=m
+CONFIG_ROCKCHIP_IOMMU=y
+CONFIG_ROCKCHIP_THERMAL=m
+CONFIG_DRM_ROCKCHIP=m
+CONFIG_ROCKCHIP_ANALOGIX_DP=m
+CONFIG_ROCKCHIP_DW_HDMI=m
+CONFIG_ROCKCHIP_DW_MIPI_DSI=m
+CONFIG_ROCKCHIP_INNO_HDMI=m
+CONFIG_DRM_ANALOGIX_DP=m
+CONFIG_PHY_ROCKCHIP_USB=m
+CONFIG_DWMAC_ROCKCHIP=m
+CONFIG_SND_SOC_ROCKCHIP=m
+CONFIG_SND_SOC_ROCKCHIP_I2S=m
+CONFIG_SND_SOC_ROCKCHIP_MAX98090=m
+CONFIG_SND_SOC_ROCKCHIP_RT5645=m
+CONFIG_SND_SOC_ROCKCHIP_SPDIF=m
+CONFIG_REGULATOR_ACT8865=m
+CONFIG_ROCKCHIP_PM_DOMAINS=y
+CONFIG_CRYPTO_DEV_ROCKCHIP=m
+CONFIG_ROCKCHIP_EFUSE=m
+CONFIG_PHY_ROCKCHIP_EMMC=m
+CONFIG_PHY_ROCKCHIP_DP=m
+CONFIG_ROCKCHIP_MBOX=y
+
+# Tegra
+CONFIG_TEGRA_MC=y
+CONFIG_TEGRA124_EMC=y
+CONFIG_TEGRA_IOMMU_SMMU=y
+CONFIG_TEGRA_AHB=y
+CONFIG_TEGRA20_APB_DMA=y
+CONFIG_TRUSTED_FOUNDATIONS=y
+CONFIG_SERIAL_TEGRA=y
+CONFIG_PCI_TEGRA=y
+CONFIG_AHCI_TEGRA=m
+CONFIG_MMC_SDHCI_TEGRA=m
+CONFIG_TEGRA_WATCHDOG=m
+CONFIG_I2C_TEGRA=m
+CONFIG_SPI_TEGRA114=m
+CONFIG_PWM_TEGRA=m
+CONFIG_KEYBOARD_TEGRA=m
+CONFIG_USB_EHCI_TEGRA=m
+CONFIG_RTC_DRV_TEGRA=m
+CONFIG_ARM_TEGRA_DEVFREQ=m
+CONFIG_ARM_TEGRA124_CPUFREQ=m
+CONFIG_TEGRA_SOCTHERM=m
+CONFIG_PHY_TEGRA_XUSB=m
+CONFIG_USB_XHCI_TEGRA=m
+
+CONFIG_TEGRA_HOST1X=m
+CONFIG_TEGRA_HOST1X_FIREWALL=y
+CONFIG_DRM_TEGRA=m
+# CONFIG_DRM_TEGRA_DEBUG is not set
+CONFIG_DRM_TEGRA_STAGING=y
+CONFIG_NOUVEAU_PLATFORM_DRIVER=y
+CONFIG_SND_HDA_TEGRA=m
+
+# CONFIG_ARM_TEGRA20_CPUFREQ is not set
+# CONFIG_MFD_NVEC is not set
+
+# Qualcomm - Don't currently support IPQ router devices
+# CONFIG_IPQ_GCC_806X is not set
+# CONFIG_IPQ_LCC_806X is not set
+# CONFIG_IPQ_GCC_4019 is not set
+# CONFIG_PHY_QCOM_IPQ806X_SATA is not set
+# CONFIG_DWMAC_IPQ806X is not set
+# CONFIG_PINCTRL_IPQ8064 is not set
+# CONFIG_PINCTRL_IPQ4019 is not set
+# CONFIG_REGULATOR_QCOM_SPMI is not set
+# CONFIG_QCOM_SPMI_IADC is not set
+# CONFIG_QCOM_SPMI_VADC is not set
+
+# Virt
+CONFIG_PARAVIRT=y
+CONFIG_PARAVIRT_TIME_ACCOUNTING=y
+
+CONFIG_EFI=y
+CONFIG_EFI_VARS=y
+CONFIG_EFIVAR_FS=y
+CONFIG_EFI_VARS_PSTORE=y
+CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y
+# CONFIG_EFI_BOOTLOADER_CONTROL is not set
+# CONFIG_EFI_CAPSULE_LOADER is not set
+
+# Power management / thermal / cpu scaling
+CONFIG_PM_OPP=y
+CONFIG_ARM_PSCI=y
+CONFIG_THERMAL=y
+CONFIG_CLOCK_THERMAL=y
+CONFIG_CPUFREQ_DT=m
+CONFIG_CPUFREQ_DT_PLATDEV=y
+CONFIG_DEVFREQ_THERMAL=y
+# CONFIG_ARM_CPUIDLE is not set
+# CONFIG_ARM_DT_BL_CPUFREQ is not set
+# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set
+CONFIG_SPMI=m
+CONFIG_MFD_SPMI_PMIC=m
+CONFIG_REGMAP_SPMI=m
+
+# Device tree
+CONFIG_DTC=y
+CONFIG_DMA_OF=y
+CONFIG_OF=y
+# CONFIG_OF_UNITTEST is not set
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_DYNAMIC=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IOMMU=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_MTD=y
+CONFIG_OF_NET=y
+CONFIG_OF_OVERLAY=y
+CONFIG_OF_PCI_IRQ=m
+CONFIG_OF_PCI=m
+CONFIG_PCI_HOST_GENERIC=y
+# CONFIG_PCIE_IPROC is not set
+CONFIG_OF_RESERVED_MEM=y
+CONFIG_OF_RESOLVE=y
+CONFIG_PM_GENERIC_DOMAINS_OF=y
+CONFIG_PATA_OF_PLATFORM=m
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_THERMAL_OF=y
+
+# CONFIG_OF_MDIO is not set
+# CONFIG_MDIO_BUS_MUX_GPIO is not set
+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
+
+# Mailbox
+CONFIG_MAILBOX=y
+CONFIG_ARM_MHU=m
+# CONFIG_PL320_MBOX is not set
+CONFIG_ARM_SCPI_PROTOCOL=m
+
+# NVMem
+CONFIG_NVMEM=m
+
+# SPI
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_GPIO=m
+CONFIG_SPI_SPIDEV=m
+CONFIG_SPI_BITBANG=m
+CONFIG_SPI_DESIGNWARE=m
+# CONFIG_SPI_CADENCE is not set
+# CONFIG_SPI_SUN4I is not set
+# CONFIG_SPI_SUN6I is not set
+# CONFIG_SPI_TEGRA20_SFLASH is not set
+# CONFIG_SPI_TEGRA20_SLINK is not set
+# CONFIG_SPI_ZYNQMP_GQSPI is not set
+
+CONFIG_PWM=y
+CONFIG_PWM_SYSFS=y
+# CONFIG_PWM_FSL_FTM is not set
+
+# USB
+CONFIG_USB_OHCI_HCD_PLATFORM=m
+CONFIG_USB_EHCI_HCD_PLATFORM=m
+CONFIG_USB_XHCI_PLATFORM=m
+CONFIG_USB_ULPI=y
+
+# usb gadget
+CONFIG_USB_OTG=y
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_GADGET=m
+CONFIG_USB_GADGET_VBUS_DRAW=100
+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
+CONFIG_U_SERIAL_CONSOLE=y
+CONFIG_USB_MUSB_HDRC=m
+CONFIG_USB_MUSB_DUAL_ROLE=y
+CONFIG_USB_MUSB_DSPS=m
+# CONFIG_MUSB_PIO_ONLY is not set
+# CONFIG_USB_MUSB_TUSB6010 is not set
+# CONFIG_USB_MUSB_UX500 is not set
+CONFIG_USB_GPIO_VBUS=m
+CONFIG_USB_CONFIGFS=m
+CONFIG_USB_CONFIGFS_ACM=y
+CONFIG_USB_CONFIGFS_ECM=y
+CONFIG_USB_CONFIGFS_ECM_SUBSET=y
+CONFIG_USB_CONFIGFS_EEM=y
+CONFIG_USB_CONFIGFS_F_TCM=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_CONFIGFS_NCM=y
+CONFIG_USB_CONFIGFS_OBEX=y
+# CONFIG_USB_CONFIGFS_RNDIS is not set
+CONFIG_USB_CONFIGFS_SERIAL=y
+# CONFIG_USB_CONFIGFS_F_LB_SS is not set
+# CONFIG_USB_CONFIGFS_F_FS is not set
+# CONFIG_USB_CONFIGFS_F_UAC1 is not set
+# CONFIG_USB_CONFIGFS_F_UAC2 is not set
+# CONFIG_USB_CONFIGFS_F_MIDI is not set
+# CONFIG_USB_CONFIGFS_F_HID is not set
+# CONFIG_USB_CONFIGFS_F_UVC is not set
+# CONFIG_USB_CONFIGFS_F_PRINTER is not set
+
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+# CONFIG_USB_GADGET_XILINX is not set
+# CONFIG_USB_FUSB300 is not set
+# CONFIG_USB_FOTG210_UDC is not set
+# CONFIG_USB_R8A66597 is not set
+# CONFIG_USB_PXA27X is not set
+# CONFIG_USB_MV_UDC is not set
+# CONFIG_USB_MV_U3D is not set
+# CONFIG_USB_BDC_UDC is not set
+# CONFIG_USB_M66592 is not set
+# CONFIG_USB_AMD5536UDC is not set
+# CONFIG_USB_NET2272 is not set
+# CONFIG_USB_NET2280 is not set
+# CONFIG_USB_GOKU is not set
+# CONFIG_USB_EG20T is not set
+# CONFIG_USB_DUMMY_HCD is not set
+# CONFIG_USB_ZERO_HNPTEST is not set
+
+# MMC/SD
+CONFIG_MMC_SPI=m
+CONFIG_MMC_SDHCI_OF_ARASAN=m
+
+# LCD Panels
+CONFIG_DRM_PANEL=y
+CONFIG_DRM_PANEL_SIMPLE=m
+CONFIG_DRM_PANEL_LG_LG4573=m
+CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m
+CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m
+CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m
+CONFIG_DRM_PANEL_SAMSUNG_LD9040=m
+CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
+
+# Designware (used by numerous devices)
+CONFIG_MMC_DW=m
+CONFIG_MMC_DW_PLTFM=m
+CONFIG_MMC_DW_K3=m
+CONFIG_MMC_DW_PCI=m
+CONFIG_SPI_DW_MMIO=m
+CONFIG_SPI_DW_PCI=m
+# CONFIG_SPI_DW_MID_DMA is not set
+# CONFIG_MMC_QCOM_DML is not set
+CONFIG_USB_DWC2=m
+CONFIG_USB_DWC2_DUAL_ROLE=y
+CONFIG_USB_DWC2_PCI=m
+# CONFIG_USB_DWC2_DEBUG is not set
+# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set
+CONFIG_USB_DWC3=m
+CONFIG_USB_DWC3_DUAL_ROLE=y
+CONFIG_USB_DWC3_PCI=m
+CONFIG_USB_DWC3_OF_SIMPLE=m
+CONFIG_USB_DWC3_ULPI=y
+CONFIG_DW_WATCHDOG=m
+CONFIG_PCIE_DW=y
+# CONFIG_MMC_DW_EXYNOS is not set
+CONFIG_I2C_DESIGNWARE_CORE=m
+CONFIG_I2C_DESIGNWARE_PLATFORM=m
+CONFIG_GPIO_DWAPB=m
+
+# External Connectors
+CONFIG_EXTCON=m
+CONFIG_EXTCON_GPIO=m
+CONFIG_EXTCON_ADC_JACK=m
+CONFIG_EXTCON_USB_GPIO=m
+# CONFIG_EXTCON_MAX3355 is not set
+# CONFIG_EXTCON_SM5502 is not set
+# CONFIG_EXTCON_RT8973A is not set
+
+# MTD
+# CONFIG_MTD_AFS_PARTS is not set
+CONFIG_MTD_BLKDEVS=m
+CONFIG_MTD_BLOCK=m
+CONFIG_MTD_CFI=m
+CONFIG_MTD_CFI_INTELEXT=m
+CONFIG_MTD_CFI_AMDSTD=m
+CONFIG_MTD_CFI_STAA=m
+CONFIG_MTD_OF_PARTS=m
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_PHYSMAP=m
+CONFIG_MTD_PHYSMAP_OF=m
+CONFIG_MTD_PHYSMAP_OF_VERSATILE=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_LPDDR2_NVM is not set
+
+# GPIO
+CONFIG_GPIO_DEVRES=y
+CONFIG_GPIO_GENERIC=m
+CONFIG_GPIO_GENERIC_PLATFORM=m
+CONFIG_GPIO_WATCHDOG=m
+CONFIG_GPIOLIB=y
+CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_BACKLIGHT_GPIO=m
+CONFIG_KEYBOARD_GPIO=m
+CONFIG_KEYBOARD_GPIO_POLLED=m
+CONFIG_INPUT_SOC_BUTTON_ARRAY=m
+CONFIG_POWER_RESET_GPIO=y
+CONFIG_POWER_RESET_GPIO_RESTART=y
+CONFIG_POWER_RESET_RESTART=y
+# CONFIG_GPIO_74XX_MMIO is not set
+
+# Pin stuff
+CONFIG_PINMUX=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL=y
+CONFIG_GENERIC_PINCONF=y
+CONFIG_PINCTRL_SINGLE=y
+
+# gpio
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_PCA953X_IRQ=y
+
+#i2c
+CONFIG_I2C_ARB_GPIO_CHALLENGE=m
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_GPIO=m
+CONFIG_I2C_MUX=m
+CONFIG_I2C_MUX_GPIO=m
+CONFIG_I2C_MUX_PINCTRL=m
+CONFIG_I2C_MUX_PCA9541=m
+CONFIG_I2C_MUX_PCA954x=m
+CONFIG_I2C_MUX_REG=m
+CONFIG_I2C_MV64XXX=m
+
+# spi
+CONFIG_SPI_PL022=m
+
+# Sensors
+CONFIG_SENSORS_IIO_HWMON=m
+CONFIG_IIO_SYSFS_TRIGGER=m
+CONFIG_SENSORS_ARM_SCPI=m
+
+# PHY framework
+CONFIG_GENERIC_PHY=y
+
+CONFIG_SMC91X=m
+CONFIG_SMC911X=m
+
+CONFIG_CPU_THERMAL=y
+CONFIG_THERMAL_GOV_USER_SPACE=y
+
+# Contiguous Memory Allocator
+CONFIG_CMA=y
+CONFIG_DMA_CMA=y
+# CONFIG_CMA_DEBUG is not set
+CONFIG_CMA_DEBUGFS=y
+CONFIG_CMA_SIZE_MBYTES=16
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
+# CONFIG_CMA_SIZE_SEL_MIN is not set
+# CONFIG_CMA_SIZE_SEL_MAX is not set
+CONFIG_CMA_ALIGNMENT=8
+CONFIG_CMA_AREAS=7
+
+# VFIO
+CONFIG_VFIO_PLATFORM=m
+CONFIG_VFIO_AMBA=m
+# CONFIG_VFIO_PLATFORM_CALXEDAXGMAC_RESET is not set
+
+# CONFIG_CRYPTO_TEST is not set
+# CONFIG_TRANSPARENT_HUGEPAGE is not set
+# CONFIG_XEN is not set
+# CONFIG_DRM_RCAR_DU is not set
+# CONFIG_I2C_RCAR is not set
+# CONFIG_DRM_SHMOBILE is not set
+# CONFIG_I2C_SH_MOBILE is not set
+# CONFIG_I2C_NOMADIK is not set
+# CONFIG_IRQ_DOMAIN_DEBUG is not set
+# CONFIG_LOCK_STAT is not set
+
+# CONFIG_CADENCE_WATCHDOG is not set
+
+# CONFIG_DRM_ARMADA is not set
+
+# CONFIG_COMMON_CLK_SI570 is not set
+# CONFIG_COMMON_CLK_QCOM is not set
+CONFIG_COMMON_CLK_SCPI=m
+
+# CONFIG_ARM_PTDUMP is not set
+
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_KEYBOARD_OMAP4 is not set
+# CONFIG_KEYBOARD_BCM is not set
+# CONFIG_PHY_SAMSUNG_USB2 is not set
+# CONFIG_OMAP_GPMC_DEBUG is not set
+
+### turn off things which make no sense on embedded SoC
+
+# core
+
+# CONFIG_ISDN is not set
+# CONFIG_PCMCIA is not set
+# CONFIG_PARPORT is not set
+# CONFIG_FIREWIRE is not set
+# CONFIG_ATM_DRIVERS is not set
+# CONFIG_ISDN is not set
+# CONFIG_GAMEPORT is not set
+# CONFIG_AGP is not set
+
+# netdrv
+
+CONFIG_NET_VENDOR_MELLANOX=y
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_ADAPTEC is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_BROCADE is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_CISCO is not set
+# CONFIG_NET_VENDOR_DEC is not set
+# CONFIG_NET_VENDOR_EMULEX is not set
+# CONFIG_NET_VENDOR_EXAR is not set
+# CONFIG_NET_VENDOR_QLOGIC is not set
+# CONFIG_NET_VENDOR_SUN is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+# CONFIG_NET_VENDOR_XIRCOM is not set
+# CONFIG_TLAN is not set
+
+# scsi
+
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_SCSI_3W_SAS is not set
+# CONFIG_SCSI_PM8001 is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_BFA_FC is not set
+# CONFIG_FUSION is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_MPT2SAS is not set
+# CONFIG_SCSI_MPT3SAS is not set
+
+# serial
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX310X is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+
+# regulator
+# CONFIG_REGULATOR_AD5398 is not set
+# CONFIG_REGULATOR_ANATOP is not set
+# CONFIG_REGULATOR_DA9210 is not set
+# CONFIG_REGULATOR_DA9211 is not set
+# CONFIG_REGULATOR_FAN53555 is not set
+# CONFIG_REGULATOR_ISL9305 is not set
+# CONFIG_REGULATOR_ISL6271A is not set
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_LP3972 is not set
+# CONFIG_REGULATOR_LP872X is not set
+# CONFIG_REGULATOR_LP8755 is not set
+# CONFIG_REGULATOR_LTC3589 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+# CONFIG_REGULATOR_MAX8649 is not set
+# CONFIG_REGULATOR_MAX8660 is not set
+# CONFIG_REGULATOR_MAX8952 is not set
+# CONFIG_REGULATOR_MAX8973 is not set
+# CONFIG_REGULATOR_MT6311 is not set
+# CONFIG_REGULATOR_PFUZE100 is not set
+# CONFIG_REGULATOR_PV88060 is not set
+# CONFIG_REGULATOR_PV88080 is not set
+# CONFIG_REGULATOR_PV88090 is not set
+# CONFIG_REGULATOR_TPS51632 is not set
+# CONFIG_REGULATOR_TPS62360 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+# CONFIG_REGULATOR_TPS6524X is not set
+
+# drm
+# CONFIG_DRM_VMWGFX is not set
+# CONFIG_IMX_IPUV3_CORE is not set
+
+# CONFIG_DEBUG_SET_MODULE_RONX is not set
+# CONFIG_CORESIGHT is not set
+# CONFIG_LATTICE_ECP3_CONFIG is not set
+# CONFIG_BMP085_SPI is not set
+# CONFIG_TI_DAC7512 is not set
+
+# https://fedoraproject.org/wiki/Features/Checkpoint_Restore
+CONFIG_CHECKPOINT_RESTORE=y
+
+# Bad Intel shit we don't care about
+# CONFIG_PINCTRL_BAYTRAIL is not set
+# CONFIG_PINCTRL_CHERRYVIEW is not set
+# CONFIG_PINCTRL_BROXTON is not set
+# CONFIG_PINCTRL_SUNRISEPOINT is not set
+
+# CONFIG_HW_RANDOM_HISI is not set
+# CONFIG_HISILICON_IRQ_MBIGEN is not set
+# CONFIG_QRTR is not set
+
+# This Xilinx option is now built for arm64 as well as ARM
+CONFIG_XILINX_VDMA=m

config-arm64

@@ -0,0 +1,291 @@
+CONFIG_64BIT=y
+CONFIG_ARM64=y
+
+# arm64 only SoCs
+CONFIG_ARCH_HISI=y
+CONFIG_ARCH_QCOM=y
+CONFIG_ARCH_SEATTLE=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_ARCH_TEGRA=y
+CONFIG_ARCH_XGENE=y
+# CONFIG_ARCH_ALPINE is not set
+# CONFIG_ARCH_BCM_IPROC is not set
+# CONFIG_ARCH_BERLIN is not set
+# CONFIG_ARCH_EXYNOS is not set
+# CONFIG_ARCH_LAYERSCAPE is not set
+# CONFIG_ARCH_MEDIATEK is not set
+# CONFIG_ARCH_MESON is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_SPRD is not set
+# CONFIG_ARCH_STRATIX10 is not set
+# CONFIG_ARCH_THUNDER is not set
+# CONFIG_ARCH_VULCAN is not set
+# CONFIG_ARCH_ZYNQMP is not set
+# CONFIG_ARCH_UNIPHIER is not set
+# CONFIG_ARCH_LG1K is not set
+
+# Erratum
+CONFIG_ARM64_ERRATUM_826319=y
+CONFIG_ARM64_ERRATUM_827319=y
+CONFIG_ARM64_ERRATUM_824069=y
+CONFIG_ARM64_ERRATUM_819472=y
+CONFIG_ARM64_ERRATUM_832075=y
+CONFIG_ARM64_ERRATUM_843419=y
+CONFIG_ARM64_ERRATUM_834220=y
+CONFIG_CAVIUM_ERRATUM_22375=y
+CONFIG_CAVIUM_ERRATUM_23154=y
+CONFIG_CAVIUM_ERRATUM_27456=y
+
+# AMBA / VExpress
+# CONFIG_RTC_DRV_PL030 is not set
+# CONFIG_SERIAL_AMBA_PL010 is not set
+# CONFIG_AMBA_PL08X is not set
+CONFIG_ARM_SMMU_V3=y
+
+CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_ARM64_64K_PAGES=y
+
+CONFIG_ARM64_HW_AFDBM=y
+CONFIG_ARM64_PAN=y
+CONFIG_ARM64_LSE_ATOMICS=y
+CONFIG_ARM64_VHE=y
+CONFIG_ARM64_UAO=y
+
+# Have ARM team revisit
+# CONFIG_RELOCATABLE is not set
+# CONFIG_RANDOMIZE_BASE is not set
+
+CONFIG_ARM64_ACPI_PARKING_PROTOCOL=y
+
+CONFIG_BCMA_POSSIBLE=y
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_BRCMUTIL=m
+CONFIG_BUG=y
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CMDLINE="console=ttyAMA0"
+# CONFIG_CMDLINE_FORCE is not set
+CONFIG_CONSOLE_TRANSLATIONS=y
+
+CONFIG_HAVE_64BIT_ALIGNED_ACCESS=y
+CONFIG_HVC_DRIVER=y
+# CONFIG_HVC_DCC is not set
+CONFIG_HZ=100
+
+CONFIG_KVM=y
+CONFIG_KVM_NEW_VGIC=y
+
+CONFIG_RCU_FANOUT=64
+CONFIG_SPARSE_IRQ=y
+CONFIG_SPARSEMEM_VMEMMAP=y
+
+# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
+
+# CONFIG_SYS_HYPERVISOR is not set
+
+CONFIG_ARM_SBSA_WATCHDOG=m
+CONFIG_RTC_DRV_EFI=y
+
+CONFIG_ACPI=y
+CONFIG_ACPI_PROCFS_POWER=y
+CONFIG_ACPI_EC_DEBUGFS=y
+CONFIG_ACPI_BUTTON=m
+CONFIG_ACPI_FAN=m
+CONFIG_ACPI_DOCK=y
+CONFIG_ACPI_IPMI=y
+CONFIG_ACPI_CONTAINER=y
+CONFIG_ACPI_HED=m
+CONFIG_ACPI_CUSTOM_METHOD=m
+CONFIG_ACPI_NFIT=m
+# CONFIG_ACPI_NFIT_DEBUG is not set
+CONFIG_PCC=y
+CONFIG_ACPI_CPPC_CPUFREQ=y
+CONFIG_ACPI_PROCESSOR=y
+CONFIG_ACPI_THERMAL=y
+CONFIG_I2C_SCMI=m
+CONFIG_SENSORS_ACPI_POWER=m
+
+CONFIG_ARM64_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM64_CE=y
+CONFIG_CRYPTO_SHA2_ARM64_CE=y
+CONFIG_CRYPTO_GHASH_ARM64_CE=m
+CONFIG_CRYPTO_AES_ARM64_CE=y
+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
+CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
+CONFIG_CRYPTO_CRC32_ARM64=m
+CONFIG_CRYPTO_DEV_CCP=y
+CONFIG_CRYPTO_DEV_CCP_DD=m
+CONFIG_CRYPTO_DEV_CCP_CRYPTO=m
+
+# APM Xgene
+CONFIG_POWER_RESET_XGENE=y
+CONFIG_COMMON_CLK_XGENE=y
+CONFIG_AHCI_XGENE=y
+CONFIG_PHY_XGENE=y
+CONFIG_NET_XGENE=m
+CONFIG_RTC_DRV_XGENE=m
+CONFIG_HW_RANDOM_XGENE=m
+CONFIG_GPIO_XGENE=y
+CONFIG_GPIO_XGENE_SB=m
+CONFIG_XGENE_DMA=m
+CONFIG_EDAC_XGENE=m
+CONFIG_PCI_XGENE=y
+CONFIG_PCI_XGENE_MSI=y
+CONFIG_I2C_XGENE_SLIMPRO=m
+CONFIG_XGENE_SLIMPRO_MBOX=m
+
+# AMD Seattle
+CONFIG_NET_SB1000=y
+CONFIG_AMD_XGBE=m
+CONFIG_AMD_XGBE_DCB=y
+CONFIG_VFIO_PLATFORM_AMDXGBE_RESET=m
+CONFIG_PINCTRL_AMD=y
+
+# HiSilicon
+CONFIG_HISILICON_IRQ_MBIGEN=y
+CONFIG_COMMON_CLK_HI6220=y
+CONFIG_PCI_HISI=y
+CONFIG_POWER_RESET_HISI=y
+CONFIG_HISI_THERMAL=m
+CONFIG_STUB_CLK_HI6220=y
+CONFIG_REGULATOR_HI655X=m
+CONFIG_PHY_HI6220_USB=m
+CONFIG_COMMON_RESET_HI6220=m
+CONFIG_HI6220_MBOX=m
+CONFIG_RESET_HISI=y
+CONFIG_MFD_HI655X_PMIC=m
+CONFIG_DRM_HISI_KIRIN=m
+CONFIG_HISI_KIRIN_DW_DSI=m
+
+# Tegra
+CONFIG_ARCH_TEGRA_132_SOC=y
+CONFIG_ARCH_TEGRA_210_SOC=y
+CONFIG_TEGRA210_ADMA=y
+CONFIG_MFD_MAX77620=y
+CONFIG_REGULATOR_MAX77620=m
+
+# AllWinner
+CONFIG_MACH_SUN50I=y
+CONFIG_SUNXI_RSB=m
+CONFIG_AHCI_SUNXI=m
+CONFIG_NET_VENDOR_ALLWINNER=y
+# CONFIG_SUN4I_EMAC is not set
+# CONFIG_MDIO_SUN4I is not set
+# CONFIG_KEYBOARD_SUN4I_LRADC is not set
+# CONFIG_TOUCHSCREEN_SUN4I is not set
+# CONFIG_SERIO_SUN4I_PS2 is not set
+CONFIG_SUNXI_WATCHDOG=m
+CONFIG_MFD_SUN6I_PRCM=y
+CONFIG_IR_SUNXI=m
+CONFIG_MMC_SUNXI=m
+CONFIG_RTC_DRV_SUN6I=m
+CONFIG_PWM_SUN4I=m
+# CONFIG_PHY_SUN4I_USB is not set
+# CONFIG_PHY_SUN9I_USB is not set
+CONFIG_NVMEM_SUNXI_SID=m
+
+# qcom
+# MSM8996 = SD-820, MSM8916 = SD-410
+CONFIG_SERIAL_MSM=y
+CONFIG_SERIAL_MSM_CONSOLE=y
+CONFIG_QCOM_GSBI=y
+CONFIG_PCIE_QCOM=y
+CONFIG_POWER_RESET_MSM=y
+CONFIG_MMC_SDHCI_MSM=m
+CONFIG_I2C_QUP=m
+CONFIG_SPI_QUP=m
+CONFIG_QCOM_WDT=m
+CONFIG_MFD_QCOM_RPM=m
+CONFIG_PINCTRL_MSM=y
+CONFIG_PINCTRL_MSM8916=y
+CONFIG_PINCTRL_MSM8996=y
+CONFIG_REGULATOR_QCOM_RPM=m
+CONFIG_REGULATOR_QCOM_SMD_RPM=m
+CONFIG_QCOM_BAM_DMA=y
+CONFIG_HWSPINLOCK_QCOM=m
+CONFIG_HW_RANDOM_MSM=m
+CONFIG_CRYPTO_DEV_QCE=m
+CONFIG_RTC_DRV_PM8XXX=m
+CONFIG_QCOM_QFPROM=m
+CONFIG_QCOM_SMEM=m
+CONFIG_QCOM_SMP2P=m
+CONFIG_QCOM_SMSM=m
+CONFIG_QCOM_SMD=m
+CONFIG_QCOM_SMD_RPM=m
+CONFIG_PINCTRL_QCOM_SPMI_PMIC=m
+CONFIG_REGULATOR_QCOM_SPMI=m
+CONFIG_QCOM_SPMI_TEMP_ALARM=m
+CONFIG_QCOM_SPMI_IADC=m
+CONFIG_QCOM_SPMI_VADC=m
+CONFIG_SPMI_MSM_PMIC_ARB=m
+CONFIG_USB_QCOM_8X16_PHY=m
+CONFIG_USB_EHCI_MSM=m
+CONFIG_USB_CHIPIDEA=m
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_MSM_OTG=m
+CONFIG_DRM_MSM=m
+# CONFIG_DRM_MSM_DSI is not set
+CONFIG_DRM_MSM_HDMI_HDCP=y
+# CONFIG_DRM_MSM_REGISTER_LOGGING is not set
+CONFIG_QCOM_WCNSS_CTRL=m
+CONFIG_QCOM_COINCELL=m
+# CONFIG_PHY_QCOM_APQ8064_SATA is not set
+# CONFIG_PHY_QCOM_UFS is not set
+# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set
+# CONFIG_PINCTRL_APQ8064 is not set
+# CONFIG_PINCTRL_APQ8084 is not set
+# CONFIG_PINCTRL_MSM8660 is not set
+# CONFIG_PINCTRL_MSM8960 is not set
+# CONFIG_PINCTRL_MSM8X74 is not set
+# CONFIG_PINCTRL_QDF2XXX is not set
+# CONFIG_INPUT_PM8941_PWRKEY is not set
+# CONFIG_INPUT_REGULATOR_HAPTIC is not set
+# CONFIG_CHARGER_MANAGER is not set
+# CONFIG_SENSORS_LTC2978_REGULATOR is not set
+
+# ThunderX
+# CONFIG_MDIO_OCTEON is not set
+# CONFIG_MDIO_THUNDER is not set
+# CONFIG_PCI_HOST_THUNDER_PEM is not set
+# CONFIG_PCI_HOST_THUNDER_ECAM is not set
+
+CONFIG_DMI=y
+CONFIG_DMIID=y
+CONFIG_DMI_SYSFS=y
+
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_SATA_AHCI_SEATTLE=m
+
+CONFIG_LIBNVDIMM=m
+CONFIG_BTT=y
+CONFIG_ND_BTT=m
+CONFIG_ND_BLK=m
+
+# CONFIG_PMIC_OPREGION is not set
+# CONFIG_DEBUG_RODATA is not set
+
+CONFIG_DEBUG_SECTION_MISMATCH=y
+
+# CONFIG_SND_SOC is not set
+
+# busted build for various reasons
+#  uses pci_* for some reason to allocate DMA buffers
+# CONFIG_DVB_B2C2_FLEXCOP_USB is not set
+#  weird include chain resulting in missing u64 type
+# CONFIG_USB_SPEEDTOUCH is not set
+#  dma issues in headers
+# CONFIG_PARPORT_PC is not set
+# CONFIG_VGA_CONSOLE is not set
+
+# CONFIG_HOTPLUG_PCI_SHPC is not set
+
+# CONFIG_FSL_MC_BUS is not set
+# CONFIG_FUJITSU_ES is not set
+# CONFIG_IMX_THERMAL is not set
+# CONFIG_PNP_DEBUG_MESSAGES is not set
+
+# Will probably need to be changed later
+# CONFIG_NUMA is not set
+

config-armv7

@@ -0,0 +1,624 @@
+# ARM unified arch kernel
+
+# CONFIG_ARCH_BERLIN is not set
+# CONFIG_ARCH_KEYSTONE is not set
+CONFIG_ARCH_MXC=y
+CONFIG_ARCH_MMP=y
+CONFIG_ARCH_OMAP3=y
+CONFIG_ARCH_OMAP4=y
+CONFIG_ARCH_QCOM=y
+CONFIG_ARCH_TEGRA=y
+CONFIG_ARCH_ZYNQ=y
+
+# These are supported in the LPAE kernel
+# CONFIG_ARM_LPAE is not set
+# CONFIG_XEN is not set
+# CONFIG_ARM_VIRT_EXT is not set
+# CONFIG_VIRTUALIZATION is not set
+
+# omap 
+CONFIG_ARCH_OMAP2PLUS_TYPICAL=y
+CONFIG_SOC_OMAP5=y
+# CONFIG_SOC_DRA7XX is not set
+CONFIG_SOC_OMAP3430=y
+CONFIG_SOC_TI81XX=y
+# CONFIG_MACH_NOKIA_RX51 is not set
+# CONFIG_MACH_OMAP_LDP is not set
+# CONFIG_MACH_OMAP3517EVM is not set
+# CONFIG_MACH_OMAP3_PANDORA is not set
+CONFIG_OMAP5_ERRATA_801819=y
+
+CONFIG_SOC_HAS_REALTIME_COUNTER=y
+CONFIG_OMAP_RESET_CLOCKS=y
+CONFIG_OMAP_MUX=y
+CONFIG_OMAP_MUX_WARNINGS=y
+CONFIG_OMAP_32K_TIMER=y
+CONFIG_OMAP_PACKAGE_CBB=y
+CONFIG_OMAP_PACKAGE_CUS=y
+# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set
+
+CONFIG_OMAP2PLUS_MBOX=m
+CONFIG_OMAP_MBOX_KFIFO_SIZE=256
+CONFIG_DMA_OMAP=m
+CONFIG_OMAP_IOMMU=y
+CONFIG_HWSPINLOCK_OMAP=m
+# CONFIG_OMAP3_SDRC_AC_TIMING is not set
+# CONFIG_PHY_DM816X_USB is not set
+
+CONFIG_SERIAL_OMAP=y
+CONFIG_SERIAL_OMAP_CONSOLE=y
+CONFIG_SERIAL_8250_OMAP=m
+
+# Needed by omap_hsmmc for card detect on at least the am33xx (BBone) platforms (changed in 4.2)
+CONFIG_GPIO_OMAP=y
+CONFIG_GPIO_TWL4030=m
+CONFIG_GPIO_TWL6040=m
+CONFIG_I2C_OMAP=m
+CONFIG_CHARGER_TWL4030=m
+CONFIG_CHARGER_ISP1704=m
+CONFIG_CHARGER_BQ2415X=m
+CONFIG_OMAP_WATCHDOG=m
+CONFIG_TWL4030_CORE=y
+CONFIG_TWL4030_MADC=m
+CONFIG_TWL4030_POWER=y
+CONFIG_TWL4030_WATCHDOG=m
+CONFIG_BATTERY_TWL4030_MADC=m
+CONFIG_BATTERY_BQ27XXX=m
+CONFIG_BATTERY_BQ27XXX_I2C=y
+CONFIG_OMAP_USB2=m
+CONFIG_OMAP_CONTROL_PHY=m
+CONFIG_TI_PIPE3=m
+CONFIG_PCI_DRA7XX=y
+CONFIG_TWL4030_USB=m
+CONFIG_TWL6030_USB=m
+CONFIG_TWL6040_CORE=y
+CONFIG_CLK_TWL6040=m
+# DM814x such as hp-t410
+CONFIG_COMMON_CLK_TI_ADPLL=m
+CONFIG_OMAP_INTERCONNECT=m
+CONFIG_MFD_OMAP_USB_HOST=y
+CONFIG_HDQ_MASTER_OMAP=m
+CONFIG_REGULATOR_TWL4030=y
+CONFIG_BACKLIGHT_PANDORA=m
+CONFIG_OMAP_OCP2SCP=m
+CONFIG_USB_EHCI_HCD_OMAP=m
+CONFIG_USB_OHCI_HCD_OMAP3=m
+CONFIG_USB_MUSB_AM35X=m
+CONFIG_USB_MUSB_OMAP2PLUS=m
+CONFIG_USB_INVENTRA_DMA=y
+CONFIG_USB_DWC3_OMAP=m
+CONFIG_MMC_OMAP=m
+CONFIG_RTC_DRV_MAX8907=m
+# CONFIG_RTC_DRV_TWL92330 is not set
+CONFIG_RTC_DRV_TWL4030=y
+CONFIG_RTC_DRV_OMAP=y
+CONFIG_SENSORS_TWL4030_MADC=m
+CONFIG_TWL6030_GPADC=m
+CONFIG_BATTERY_RX51=m
+# CONFIG_IR_RX51 is not set
+
+# OMAP5 (possibly other devices too)
+CONFIG_MFD_PALMAS=y
+CONFIG_EXTCON_PALMAS=m
+CONFIG_GPIO_PALMAS=y
+CONFIG_PINCTRL_PALMAS=y
+CONFIG_REGULATOR_PALMAS=y
+CONFIG_REGULATOR_PBIAS=m
+CONFIG_RTC_DRV_PALMAS=m
+CONFIG_OMAP5_DSS_HDMI=y
+CONFIG_COMMON_CLK_PALMAS=m
+CONFIG_INPUT_PALMAS_PWRBUTTON=m
+CONFIG_PALMAS_GPADC=m
+
+CONFIG_MFD_WL1273_CORE=m
+CONFIG_NFC_WILINK=m
+
+CONFIG_MTD_ONENAND_OMAP2=m
+CONFIG_MTD_NAND_OMAP2=m
+CONFIG_MTD_NAND_OMAP_BCH=y
+CONFIG_SPI_OMAP24XX=m
+CONFIG_SPI_TI_QSPI=m
+
+CONFIG_INPUT_TWL4030_PWRBUTTON=m
+CONFIG_INPUT_TWL4030_VIBRA=m
+CONFIG_INPUT_TWL6040_VIBRA=m
+CONFIG_KEYBOARD_OMAP4=m
+CONFIG_KEYBOARD_TWL4030=m
+CONFIG_LEDS_TCA6507=m
+
+# OMAP thermal temp.
+CONFIG_OMAP4_THERMAL=y
+CONFIG_OMAP5_THERMAL=y
+
+# OMAP3 thermal/power
+CONFIG_POWER_AVS=y
+CONFIG_POWER_AVS_OMAP=y
+CONFIG_POWER_AVS_OMAP_CLASS3=y
+# CPUFREQ_CPU0 is used for scaling on DT OMAP
+# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
+
+CONFIG_PWM_TIECAP=m
+CONFIG_PWM_TIEHRPWM=m
+CONFIG_PWM_TWL=m
+CONFIG_PWM_TWL_LED=m
+CONFIG_PWM_OMAP_DMTIMER=m
+
+CONFIG_CRYPTO_DEV_OMAP_SHAM=m
+CONFIG_CRYPTO_DEV_OMAP_AES=m
+CONFIG_CRYPTO_DEV_OMAP_DES=m
+CONFIG_HW_RANDOM_OMAP=m
+CONFIG_HW_RANDOM_OMAP3_ROM=m
+
+CONFIG_DRM_OMAP=m
+CONFIG_DRM_OMAP_NUM_CRTCS=2
+CONFIG_OMAP2_VRFB=y
+# CONFIG_FB_OMAP2 is not set
+# CONFIG_FB_DA8XX is not set
+
+CONFIG_OMAP2_DSS=m
+# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set
+CONFIG_OMAP2_DSS_DPI=y
+CONFIG_OMAP2_DSS_RFBI=y
+CONFIG_OMAP2_DSS_VENC=y
+CONFIG_OMAP4_DSS_HDMI=y
+CONFIG_OMAP2_DSS_SDI=y
+CONFIG_OMAP2_DSS_DSI=y
+CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0
+CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET=y
+
+CONFIG_DISPLAY_ENCODER_OPA362=m
+CONFIG_DISPLAY_ENCODER_TFP410=m
+CONFIG_DISPLAY_ENCODER_TPD12S015=m
+CONFIG_DISPLAY_CONNECTOR_DVI=m
+CONFIG_DISPLAY_CONNECTOR_HDMI=m
+CONFIG_DISPLAY_CONNECTOR_ANALOG_TV=m
+CONFIG_DISPLAY_PANEL_DPI=m
+CONFIG_DISPLAY_PANEL_DSI_CM=m
+CONFIG_DISPLAY_PANEL_SONY_ACX565AKM=m
+CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02=m
+CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01=m
+CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1=m
+CONFIG_DISPLAY_PANEL_NEC_NL8048HL11=m
+CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1=m
+
+# Enable V4L2 drivers for OMAP2+
+CONFIG_V4L_PLATFORM_DRIVERS=y
+# CONFIG_VIDEO_OMAP2_VOUT is not set
+CONFIG_VIDEO_OMAP3=m
+CONFIG_VIDEO_ADP1653=m
+# CONFIG_VIDEO_OMAP4 is not set
+# The ones below are for TI Davinci
+# CONFIG_VIDEO_DM6446_CCDC is not set
+# CONFIG_VIDEO_DM355_CCDC is not set
+
+CONFIG_SND_OMAP_SOC=m
+CONFIG_SND_SOC_I2C_AND_SPI=m
+CONFIG_SND_OMAP_SOC_AM3517EVM=m
+CONFIG_SND_OMAP_SOC_DMIC=m
+CONFIG_SND_OMAP_SOC_HDMI_AUDIO=m
+CONFIG_SND_OMAP_SOC_MCBSP=m
+CONFIG_SND_OMAP_SOC_MCPDM=m
+CONFIG_SND_OMAP_SOC_OMAP_ABE_TWL6040=m
+CONFIG_SND_OMAP_SOC_OMAP_TWL4030=m
+CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=m
+CONFIG_SND_OMAP_SOC_RX51=m
+CONFIG_SND_SOC_TLV320AIC23=m
+CONFIG_SND_SOC_TLV320AIC23_I2C=m
+CONFIG_SND_SOC_TLV320AIC23_SPI=m
+CONFIG_SND_SOC_TLV320AIC3X=m
+CONFIG_SND_SOC_TLV320AIC31XX=m
+CONFIG_SND_SOC_TPA6130A2=m
+CONFIG_SND_SOC_TWL4030=m
+CONFIG_SND_SOC_TWL6040=m
+CONFIG_RADIO_WL128X=m
+
+CONFIG_OMAP_REMOTEPROC=m
+
+# CONFIG_OMAP2_DSS_DEBUGFS is not set
+# CONFIG_OMAP_IOMMU_DEBUG is not set
+# CONFIG_OMAP_MUX_DEBUG is not set
+# CONFIG_VIDEO_OMAP3_DEBUG is not set
+
+# AM33xx/43xx
+CONFIG_SOC_AM33XX=y
+CONFIG_SOC_AM43XX=y
+CONFIG_AM335X_CONTROL_USB=m
+CONFIG_AM335X_PHY_USB=m
+CONFIG_USB_MUSB_AM335X_CHILD=m
+CONFIG_TI_CPPI41=m
+CONFIG_USB_TI_CPPI41_DMA=y
+CONFIG_MFD_TI_AM335X_TSCADC=m
+CONFIG_TI_ST=m
+CONFIG_TI_DAC7512=m
+CONFIG_TI_DAVINCI_CPDMA=m
+CONFIG_TI_DAVINCI_EMAC=m
+CONFIG_TI_DAVINCI_MDIO=m
+CONFIG_TI_CPSW=m
+CONFIG_TI_CPSW_PHY_SEL=y
+CONFIG_TI_CPSW_ALE=m
+CONFIG_TI_CPTS=y
+CONFIG_TI_EMIF=m
+CONFIG_DRM_TILCDC=m
+# CONFIG_COMMON_CLK_TI_ADPLL is not set
+# We only need this until the BBB dts is actually updated
+CONFIG_DRM_TILCDC_SLAVE_COMPAT=y
+CONFIG_SPI_DAVINCI=m
+CONFIG_SND_DAVINCI_SOC=m
+CONFIG_SND_DAVINCI_SOC_I2S=m
+CONFIG_SND_DAVINCI_SOC_MCASP=m
+CONFIG_SND_DAVINCI_SOC_VCIF=m
+CONFIG_SND_DAVINCI_SOC_GENERIC_EVM=m
+CONFIG_SND_EDMA_SOC=m
+CONFIG_SND_AM33XX_SOC_EVM=m
+CONFIG_REGULATOR_TI_ABB=m
+CONFIG_TI_ADC081C=m
+CONFIG_TI_AM335X_ADC=m
+CONFIG_PWM_TIPWMSS=y
+CONFIG_MFD_TPS65218=m
+CONFIG_REGULATOR_TPS65218=m
+CONFIG_INPUT_TPS65218_PWRBUTTON=m
+CONFIG_VIDEO_AM437X_VPFE=m
+CONFIG_UIO_PRUSS=m
+CONFIG_WKUP_M3_RPROC=m
+CONFIG_WKUP_M3_IPC=m
+
+# Builtin needed for BBone White
+CONFIG_MFD_TPS65217=y
+CONFIG_REGULATOR_TPS65217=y
+CONFIG_CHARGER_TPS65217=m
+CONFIG_BACKLIGHT_TPS65217=m
+CONFIG_REGULATOR_TPS65217=m
+
+CONFIG_CAN_C_CAN=m
+CONFIG_CAN_C_CAN_PLATFORM=m
+
+# QCom
+CONFIG_ARCH_MSM8X60=y
+CONFIG_ARCH_MSM8960=y
+CONFIG_ARCH_MSM8974=y
+CONFIG_SERIAL_MSM=y
+CONFIG_SERIAL_MSM_CONSOLE=y
+CONFIG_PINCTRL_APQ8064=m
+CONFIG_PINCTRL_APQ8084=m
+CONFIG_PINCTRL_MSM8660=m
+CONFIG_PINCTRL_MSM8960=m
+CONFIG_PINCTRL_MSM8X74=m
+CONFIG_PINCTRL_MSM8916=m
+CONFIG_PINCTRL_QCOM_SPMI_PMIC=m
+CONFIG_PINCTRL_QCOM_SSBI_PMIC=m
+CONFIG_COMMON_CLK_QCOM=m
+# CONFIG_MSM_GCC_8916 is not set
+# CONFIG_MSM_LCC_8960 is not set
+CONFIG_MFD_QCOM_RPM=m
+CONFIG_MFD_PM8921_CORE=m
+CONFIG_REGULATOR_QCOM_RPM=m
+CONFIG_REGULATOR_QCOM_SPMI=m
+CONFIG_APQ_GCC_8084=m
+CONFIG_APQ_MMCC_8084=m
+CONFIG_MSM_GCC_8660=m
+CONFIG_MSM_GCC_8960=m
+CONFIG_MSM_MMCC_8960=m
+CONFIG_MSM_GCC_8974=m
+CONFIG_MSM_MMCC_8974=m
+CONFIG_MSM_GCC_8996=m
+CONFIG_MSM_MMCC_8996=m
+CONFIG_HW_RANDOM_MSM=m
+CONFIG_I2C_QUP=m
+CONFIG_SPI_QUP=m
+CONFIG_POWER_RESET_MSM=y
+CONFIG_USB_MSM_OTG=m
+CONFIG_MMC_SDHCI_MSM=m
+CONFIG_MMC_QCOM_DML=m
+CONFIG_QCOM_BAM_DMA=m
+CONFIG_QCOM_GSBI=m
+CONFIG_QCOM_PM=y
+CONFIG_PHY_QCOM_APQ8064_SATA=m
+CONFIG_USB_DWC3_QCOM=m
+CONFIG_CRYPTO_DEV_QCE=m
+CONFIG_DRM_MSM=m
+# CONFIG_DRM_MSM_DSI is not set
+CONFIG_DRM_MSM_HDMI_HDCP=y
+# CONFIG_DRM_MSM_REGISTER_LOGGING is not set
+CONFIG_USB_EHCI_MSM=m
+CONFIG_MFD_PM8XXX=m
+CONFIG_KEYBOARD_PMIC8XXX=m
+CONFIG_INPUT_PM8XXX_VIBRATOR=m
+CONFIG_INPUT_PMIC8XXX_PWRKEY=m
+CONFIG_INPUT_PM8941_PWRKEY=m
+CONFIG_RTC_DRV_PM8XXX=m
+CONFIG_QCOM_WDT=m
+CONFIG_SPMI_MSM_PMIC_ARB=m
+CONFIG_QCOM_SPMI_IADC=m
+CONFIG_QCOM_SPMI_VADC=m
+CONFIG_SND_SOC_QCOM=m
+CONFIG_SND_SOC_LPASS_CPU=m
+CONFIG_SND_SOC_LPASS_PLATFORM=m
+CONFIG_SND_SOC_STORM=m
+CONFIG_PHY_QCOM_UFS=m
+CONFIG_HWSPINLOCK_QCOM=m
+CONFIG_QCOM_COINCELL=m
+CONFIG_USB_QCOM_8X16_PHY=m
+CONFIG_QCOM_SMD=m
+CONFIG_QCOM_SMD_RPM=m
+CONFIG_QCOM_SMEM=m
+CONFIG_REGULATOR_QCOM_SMD_RPM=m
+CONFIG_QCOM_SMEM=m
+CONFIG_QCOM_QFPROM=m
+CONFIG_QCOM_WCNSS_CTRL=m
+CONFIG_QCOM_SMSM=y
+CONFIG_QCOM_SMP2P=m
+CONFIG_PCIE_QCOM=y
+CONFIG_MTD_NAND_QCOM=m
+
+# i.MX
+# CONFIG_MXC_DEBUG_BOARD is not set
+CONFIG_SOC_IMX50=y
+CONFIG_SOC_IMX51=y
+CONFIG_SOC_IMX53=y
+CONFIG_SOC_IMX6=y
+CONFIG_SOC_IMX6Q=y
+CONFIG_SOC_IMX6SL=y
+CONFIG_SOC_IMX6SX=y
+CONFIG_SOC_IMX6UL=y
+CONFIG_SOC_IMX7D=y
+# CONFIG_SOC_LS1021A is not set
+# CONFIG_SOC_VF610 is not set
+CONFIG_ARM_IMX6Q_CPUFREQ=m
+CONFIG_POWER_RESET_IMX=y
+CONFIG_PCI_IMX6=y
+CONFIG_IMX_GPCV2=y
+CONFIG_IMX_THERMAL=m
+CONFIG_IMX_SDMA=m
+CONFIG_IMX_DMA=m
+CONFIG_MXS_DMA=y
+CONFIG_AHCI_IMX=m
+CONFIG_PATA_IMX=m
+CONFIG_USB_EHCI_MXC=m
+CONFIG_USB_CHIPIDEA=m
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_FSL_USB2=m
+CONFIG_NET_VENDOR_FREESCALE=y
+# CONFIG_GIANFAR is not set
+CONFIG_FEC=m
+# CONFIG_FSL_PQ_MDIO is not set
+# CONFIG_FSL_XGMAC_MDIO is not set
+CONFIG_KEYBOARD_SNVS_PWRKEY=m
+CONFIG_KEYBOARD_IMX=m
+CONFIG_KEYBOARD_STMPE=m
+CONFIG_TOUCHSCREEN_STMPE=m
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+CONFIG_PINCTRL_IMX6SL=y
+CONFIG_I2C_IMX=m
+CONFIG_STMPE_I2C=y
+CONFIG_SPI_IMX=m
+CONFIG_SPI_FSL_QUADSPI=m
+CONFIG_STMPE_SPI=y
+CONFIG_MFD_MC13XXX_SPI=m
+CONFIG_MFD_STMPE=y
+CONFIG_MTD_NAND_GPMI_NAND=m
+CONFIG_W1_MASTER_MXC=m
+CONFIG_IMX_WEIM=y
+CONFIG_IMX2_WDT=m
+CONFIG_HW_RANDOM_MXC_RNGA=m
+CONFIG_CRYPTO_DEV_SAHARA=m
+CONFIG_CRYPTO_DEV_FSL_CAAM=m
+CONFIG_CRYPTO_DEV_FSL_CAAM_JR=m
+CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=3
+CONFIG_CRYPTO_DEV_FSL_CAAM_INTC=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD=8
+CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD=8192
+CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=m
+CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=m
+CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=m
+# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set
+# CONFIG_CRYPTO_DEV_MXS_DCP is not set
+# CONFIG_CRYPTO_DEV_MXC_SCC is not set
+CONFIG_RTC_DRV_SNVS=m
+CONFIG_FB_MXS=m
+# CONFIG_FB_MX3 is not set
+# CONFIG_FB_IMX is not set
+CONFIG_TOUCHSCREEN_IMX6UL_TSC=m
+CONFIG_NVMEM_IMX_OCOTP=m
+
+CONFIG_SND_IMX_SOC=m
+CONFIG_SND_SOC_FSL_ASOC_CARD=m
+CONFIG_SND_SOC_FSL_ASRC=m
+CONFIG_SND_SOC_FSL_ESAI=m
+CONFIG_SND_SOC_FSL_SAI=m
+CONFIG_SND_SOC_FSL_SPDIF=m
+CONFIG_SND_SOC_FSL_SSI=m
+CONFIG_SND_SOC_FSL_UTILS=m
+CONFIG_SND_SOC_IMX_SSI=m
+CONFIG_SND_SOC_IMX_AUDMUX=m
+CONFIG_SND_SOC_IMX_ES8328=m
+CONFIG_SND_SOC_IMX_PCM_FIQ=m
+CONFIG_SND_SOC_IMX_PCM_DMA=m
+CONFIG_SND_SOC_IMX_SGTL5000=m
+CONFIG_SND_SOC_IMX_WM8962=m
+CONFIG_SND_SOC_IMX_MC13783=m
+CONFIG_SND_SOC_IMX_SPDIF=m
+CONFIG_SND_SOC_CS42XX8_I2C=m
+CONFIG_SND_SOC_ES8328=m
+CONFIG_SND_SOC_ES8328_I2C=m
+CONFIG_SND_SOC_ES8328_SPI=m
+CONFIG_SND_SOC_EUKREA_TLV320=m
+CONFIG_SND_SOC_SGTL5000=m
+CONFIG_SND_SOC_WM8731=m
+CONFIG_SND_SOC_WM8962=m
+
+CONFIG_USB_IMX21_HCD=m
+CONFIG_USB_MXS_PHY=m
+CONFIG_MMC_SDHCI_ESDHC_IMX=m
+CONFIG_MMC_MXC=m
+CONFIG_SPI_MXS=m
+CONFIG_RTC_DRV_IMXDI=m
+CONFIG_RTC_DRV_MXC=m
+# CONFIG_MX3_IPU is not set
+# CONFIG_MX3_IPU_IRQS is not set
+
+CONFIG_PWM_IMX=m
+CONFIG_DRM_IMX=m
+CONFIG_DRM_IMX_HDMI=m
+CONFIG_IMX_IPUV3_CORE=m
+CONFIG_DRM_IMX_IPUV3=m
+CONFIG_DRM_IMX_LDB=m
+CONFIG_DRM_IMX_PARALLEL_DISPLAY=m
+CONFIG_DRM_IMX_TVE=m
+CONFIG_DRM_ETNAVIV=m
+# CONFIG_DRM_ETNAVIV_REGISTER_LOGGING is not set
+CONFIG_VIDEO_CODA=m
+
+CONFIG_IMX7D_ADC=m
+CONFIG_SENSORS_MC13783_ADC=m
+CONFIG_REGULATOR_ANATOP=m
+CONFIG_REGULATOR_MC13783=m
+CONFIG_REGULATOR_MC13892=m
+CONFIG_LEDS_MC13783=m
+CONFIG_RTC_DRV_MC13XXX=m
+CONFIG_CAN_FLEXCAN=m
+
+CONFIG_INPUT_PWM_BEEPER=m
+CONFIG_INPUT_88PM80X_ONKEY=m
+
+# i.MX6Q (and likely Samsung among others) 
+CONFIG_MFD_DA9052_I2C=y
+CONFIG_MFD_DA9052_SPI=y
+CONFIG_MFD_DA9055=y
+CONFIG_TOUCHSCREEN_DA9052=m
+CONFIG_INPUT_DA9052_ONKEY=m
+CONFIG_INPUT_DA9055_ONKEY=m
+CONFIG_GPIO_DA9052=m
+CONFIG_GPIO_DA9055=m
+CONFIG_GPIO_STMPE=y
+CONFIG_BATTERY_DA9052=m
+CONFIG_SENSORS_DA9052_ADC=m
+CONFIG_SENSORS_DA9055=m
+CONFIG_DA9052_WATCHDOG=m
+CONFIG_DA9055_WATCHDOG=m
+CONFIG_BACKLIGHT_DA9052=m
+CONFIG_LEDS_DA9052=m
+CONFIG_RTC_DRV_DA9052=m
+CONFIG_RTC_DRV_DA9055=m
+CONFIG_REGULATOR_DA9052=m
+CONFIG_REGULATOR_DA9055=m
+
+# picoxcell
+# CONFIG_CRYPTO_DEV_PICOXCELL is not set
+
+# MMP XO 1.75
+# CONFIG_MACH_BROWNSTONE is not set
+# CONFIG_MACH_FLINT is not set
+# CONFIG_MACH_MARVELL_JASPER is not set
+CONFIG_MACH_MMP2_DT=y
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_KEYBOARD_PXA27x=y
+CONFIG_I2C_PXA=m
+# CONFIG_I2C_PXA_SLAVE is not set
+CONFIG_SND_MMP_SOC=y
+CONFIG_SND_PXA910_SOC=m
+CONFIG_MMC_SDHCI_PXAV2=m
+CONFIG_MMP_PDMA=y
+CONFIG_MMP_TDMA=y
+CONFIG_PXA_DMA=y
+CONFIG_SERIO_OLPC_APSP=m
+
+# Exynos 4
+CONFIG_ARCH_EXYNOS4=y
+CONFIG_SOC_EXYNOS4212=y
+CONFIG_SOC_EXYNOS4412=y
+CONFIG_SOC_EXYNOS4415=y
+CONFIG_AK8975=m
+CONFIG_CM36651=m
+CONFIG_KEYBOARD_SAMSUNG=m
+
+# Allwinner
+CONFIG_MACH_SUN4I=y
+CONFIG_MACH_SUN5I=y
+
+# Tegra (non A15)
+CONFIG_ARCH_TEGRA_2x_SOC=y
+CONFIG_ARCH_TEGRA_3x_SOC=y
+CONFIG_TEGRA20_MC=y
+CONFIG_TEGRA_IOMMU_GART=y
+CONFIG_SPI_TEGRA20_SFLASH=m
+CONFIG_SPI_TEGRA20_SLINK=m
+CONFIG_MFD_MAX8907=m
+CONFIG_SND_SOC_TEGRA_ALC5632=m
+CONFIG_SND_SOC_TEGRA_TRIMSLICE=m
+CONFIG_SND_SOC_TEGRA_WM8753=m
+CONFIG_SND_SOC_TEGRA_WM8903=m
+CONFIG_SND_SOC_TEGRA_WM9712=m
+CONFIG_SND_SOC_TEGRA20_AC97=m
+CONFIG_SND_SOC_TEGRA20_DAS=m
+CONFIG_SND_SOC_TEGRA20_SPDIF=m
+
+# AC100 (PAZ00)
+CONFIG_MFD_NVEC=y
+CONFIG_MFD_TPS80031=y
+CONFIG_KEYBOARD_NVEC=y
+CONFIG_SERIO_NVEC_PS2=y
+CONFIG_NVEC_POWER=y
+CONFIG_NVEC_PAZ00=y
+CONFIG_MFD_TPS6586X=y
+CONFIG_GPIO_TPS6586X=y
+CONFIG_RTC_DRV_TPS6586X=m
+
+# Zynq-7xxx
+CONFIG_SERIAL_UARTLITE=y
+CONFIG_SERIAL_UARTLITE_CONSOLE=y
+CONFIG_SERIAL_XILINX_PS_UART=y
+CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
+CONFIG_COMMON_CLK_AXI_CLKGEN=m
+CONFIG_COMMON_CLK_SI570=m
+CONFIG_COMMON_CLK_XLNX_CLKWZRD=m
+# CONFIG_ARM_ZYNQ_CPUIDLE is not set
+CONFIG_LATTICE_ECP3_CONFIG=m
+CONFIG_NET_VENDOR_XILINX=y
+CONFIG_XILINX_EMACLITE=m
+CONFIG_GPIO_XILINX=y
+CONFIG_GPIO_ZYNQ=m
+CONFIG_I2C_XILINX=m
+CONFIG_SPI_XILINX=m
+CONFIG_SPI_CADENCE=m
+CONFIG_I2C_CADENCE=m
+CONFIG_XILINX_WATCHDOG=m
+CONFIG_XILINX_XADC=m
+CONFIG_SND_SOC_ADI=m
+CONFIG_SND_SOC_ADI_AXI_I2S=m
+CONFIG_SND_SOC_ADI_AXI_SPDIF=m
+CONFIG_XILLYBUS_OF=m
+CONFIG_GS_FPGABOOT=m
+CONFIG_USB_GADGET_XILINX=m
+CONFIG_PCIE_XILINX=y
+CONFIG_CADENCE_WATCHDOG=m
+CONFIG_REGULATOR_ISL9305=m
+CONFIG_PINCTRL_ZYNQ=y
+CONFIG_AXI_DMAC=m
+CONFIG_EDAC_SYNOPSYS=m
+
+# Multi function devices
+CONFIG_MFD_88PM800=m
+CONFIG_MFD_88PM805=m
+CONFIG_MFD_T7L66XB=y
+CONFIG_MFD_TC6387XB=y
+
+# Generic drivers
+CONFIG_REMOTEPROC=m
+
+# Regulator drivers
+CONFIG_REGULATOR_FAN53555=m
+# CONFIG_REGULATOR_88PM800 is not set
+CONFIG_REGULATOR_AD5398=m
+CONFIG_REGULATOR_ISL6271A=m
+CONFIG_REGULATOR_LP3971=m
+CONFIG_REGULATOR_LP3972=m
+CONFIG_REGULATOR_LP872X=y
+CONFIG_REGULATOR_LP8755=m
+CONFIG_REGULATOR_MAX1586=m
+CONFIG_REGULATOR_MAX8649=m
+CONFIG_REGULATOR_MAX8660=m
+CONFIG_REGULATOR_MAX8907=m
+CONFIG_REGULATOR_MAX8952=m

config-armv7-generic

@@ -0,0 +1,803 @@
+# arm configs for sharing between armv7 and armv7-lpae
+# Generic ARM config options
+CONFIG_ARM=y
+
+# CONFIG_ARCH_MULTI_V6 is not set
+CONFIG_ARCH_MULTI_V7=y
+
+CONFIG_CMDLINE=""
+CONFIG_CMDLINE_FROM_BOOTLOADER=y
+CONFIG_HAVE_ARM_ARCH_TIMER=y
+CONFIG_HAVE_ARM_TWD=y
+CONFIG_AEABI=y
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_NEON=y
+CONFIG_IWMMXT=y
+
+CONFIG_ARM_UNWIND=y
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_THUMBEE=y
+CONFIG_ARM_ASM_UNIFIED=y
+CONFIG_ARM_PATCH_IDIV=y
+CONFIG_ARM_CPU_TOPOLOGY=y
+CONFIG_ARM_DMA_MEM_BUFFERABLE=y
+CONFIG_SWP_EMULATE=y
+CONFIG_CACHE_L2X0=y
+CONFIG_HIGHPTE=y
+CONFIG_AUTO_ZRELADDR=y
+CONFIG_ATAGS=y
+CONFIG_ATAGS_PROC=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARCH_HAS_TICK_BROADCAST=y
+CONFIG_IRQ_CROSSBAR=y
+CONFIG_IOMMU_IO_PGTABLE_LPAE=y
+CONFIG_CPU_SW_DOMAIN_PAN=y
+CONFIG_ARM_CPU_SUSPEND=y
+
+# CONFIG_MCPM is not set
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_APM_EMULATION is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+# CONFIG_DMA_CACHE_RWFO is not set
+# CONFIG_THUMB2_KERNEL is not set
+# CONFIG_HVC_DCC is not set
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_ARM_VIRT_EXT is not set
+
+# CONFIG_DEBUG_RODATA is not set
+# CONFIG_DEBUG_ALIGN_RODATA is not set
+
+# Platforms enabled/disabled globally on ARMv7
+CONFIG_ARCH_BCM=y
+CONFIG_ARCH_BCM2835=y
+CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_HIGHBANK=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_ARCH_TEGRA=y
+CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA=y
+CONFIG_ARCH_VIRT=y
+# CONFIG_ARCH_ARTPEC is not set
+# CONFIG_ARCH_BCM_CYGNUS is not set
+# CONFIG_ARCH_BCM_NSP is not set
+# CONFIG_ARCH_BCM_5301X is not set
+# CONFIG_ARCH_BCM_281XX is not set
+# CONFIG_ARCH_BCM_21664 is not set
+# CONFIG_ARCH_BCM_63XX is not set
+# CONFIG_ARCH_BRCMSTB is not set
+# CONFIG_ARCH_BERLIN is not set
+# CONFIG_ARCH_BCM_CYGNUS is not set
+# CONFIG_ARCH_BCM_NSP is not set
+# CONFIG_ARCH_BCM_5301X is not set
+# CONFIG_ARCH_BCM_281XX is not set
+# CONFIG_ARCH_BCM_21664 is not set
+# CONFIG_ARCH_BCM_63XX is not set
+# CONFIG_ARCH_BRCMSTB is not set
+# CONFIG_ARCH_BERLIN is not set
+# CONFIG_ARCH_HI3xxx is not set
+# CONFIG_ARCH_HISI is not set
+# CONFIG_ARCH_MEDIATEK is not set
+# CONFIG_ARCH_MESON is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_QCOM is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_S5PV210 is not set
+# CONFIG_ARCH_SHMOBILE_MULTI is not set
+# CONFIG_ARCH_SIRF is not set
+# CONFIG_ARCH_SOCFPGA is not set
+# CONFIG_PLAT_SPEAR is not set
+# CONFIG_ARCH_STI is not set
+# CONFIG_ARCH_TANGO is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_VEXPRESS_SPC is not set
+# CONFIG_ARCH_WM8850 is not set
+# CONFIG_ARCH_DIGICOLOR is not set
+# CONFIG_ARCH_ALPINE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_UNIPHIER is not set
+# CONFIG_ARCH_ZX is not set
+# CONFIG_SOC_BRCMSTB is not set
+
+# errata
+# v5/v6
+# CONFIG_ARM_ERRATA_326103 is not set
+# CONFIG_ARM_ERRATA_411920 is not set
+# Cortex-A8
+CONFIG_ARM_ERRATA_430973=y
+# The following two don't work with MP
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+# Cortex-A9
+CONFIG_ARM_ERRATA_643719=y
+CONFIG_ARM_ERRATA_720789=y
+CONFIG_ARM_ERRATA_742230=y
+CONFIG_ARM_ERRATA_742231=y
+CONFIG_ARM_ERRATA_743622=y
+CONFIG_ARM_ERRATA_751472=y
+CONFIG_ARM_ERRATA_754322=y
+CONFIG_ARM_ERRATA_754327=y
+CONFIG_ARM_ERRATA_764369=y
+CONFIG_ARM_ERRATA_775420=y
+# Disabled due to causing highbank to crash
+# CONFIG_PL310_ERRATA_588369 is not set
+# CONFIG_PL310_ERRATA_727915 is not set
+CONFIG_PL310_ERRATA_753970=y
+CONFIG_PL310_ERRATA_769419=y
+CONFIG_PJ4B_ERRATA_4742=y
+# Cortex-A15
+# CONFIG_ARM_ERRATA_798181 is not set
+# CONFIG_ARM_ERRATA_773022 is not set
+
+# generic that deviates from or should be merged into config-generic
+CONFIG_SMP_ON_UP=y
+CONFIG_HIGHMEM=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ARM_MODULE_PLTS is not set
+
+CONFIG_RCU_FANOUT=32
+
+# Dynamic Voltage and Frequency Scaling
+CONFIG_PM_DEVFREQ=y
+CONFIG_PM_DEVFREQ_EVENT=y
+CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
+CONFIG_DEVFREQ_GOV_PERFORMANCE=y
+CONFIG_DEVFREQ_GOV_POWERSAVE=y
+CONFIG_DEVFREQ_GOV_USERSPACE=y
+
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_LSM_MMAP_MIN_ADDR=32768
+
+# CONFIG_PCI_LAYERSCAPE is not set
+
+# Do NOT enable this, it breaks stuff and makes things go slow
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+CONFIG_LBDAF=y
+
+# GRR, needed for MFD_AS3722
+CONFIG_I2C=y
+
+# Device tree
+CONFIG_USE_OF=y
+CONFIG_ARM_ATAG_DTB_COMPAT=y
+CONFIG_ARM_APPENDED_DTB=y
+
+# General vexpress ARM drivers
+CONFIG_SERIO_AMBAKMI=m
+CONFIG_SERIAL_AMBA_PL010=y
+CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
+
+CONFIG_RTC_DRV_PL030=y
+CONFIG_AMBA_PL08X=y
+CONFIG_SND_ARMAACI=m
+
+# highbank
+CONFIG_EDAC_HIGHBANK_MC=m
+CONFIG_EDAC_HIGHBANK_L2=m
+CONFIG_SATA_HIGHBANK=m
+CONFIG_ARM_HIGHBANK_CPUFREQ=m
+# CONFIG_ARM_HIGHBANK_CPUIDLE is not set
+CONFIG_PL320_MBOX=y
+CONFIG_VFIO_PLATFORM_CALXEDAXGMAC_RESET=m
+
+# AllWinner
+# CONFIG_MACH_SUN4I is not set
+# CONFIG_MACH_SUN5I is not set
+CONFIG_MACH_SUN6I=y
+CONFIG_MACH_SUN7I=y
+CONFIG_MACH_SUN8I=y
+# CONFIG_MACH_SUN9I is not set
+# CONFIG_MACH_SUN50I is not set
+CONFIG_SUNXI_SRAM=y
+CONFIG_DMA_SUN4I=m
+CONFIG_DMA_SUN6I=m
+CONFIG_DRM_SUN4I=m
+CONFIG_SUNXI_WATCHDOG=m
+CONFIG_NET_VENDOR_ALLWINNER=y
+CONFIG_RTC_DRV_SUNXI=m
+CONFIG_PHY_SUN4I_USB=m
+# CONFIG_PHY_SUN9I_USB is not set
+CONFIG_AHCI_SUNXI=m
+CONFIG_SPI_SUN4I=m
+CONFIG_SPI_SUN6I=m
+CONFIG_MMC_SUNXI=m
+CONFIG_I2C_SUN6I_P2WI=m
+CONFIG_GPIO_PCF857X=m
+CONFIG_TOUCHSCREEN_SUN4I=m
+CONFIG_MFD_AXP20X=y
+CONFIG_MFD_AXP20X_I2C=m
+CONFIG_MFD_AXP20X_RSB=m
+CONFIG_AXP20X_POWER=m
+CONFIG_INPUT_AXP20X_PEK=m
+CONFIG_REGULATOR_AXP20X=m
+CONFIG_AXP288_FUEL_GAUGE=m
+CONFIG_AXP288_ADC=m
+CONFIG_EXTCON_AXP288=m
+CONFIG_AXP288_CHARGER=m
+CONFIG_TOUCHSCREEN_CHIPONE_ICN8318=m
+CONFIG_IR_SUNXI=m
+CONFIG_MDIO_SUN4I=m
+CONFIG_DWMAC_SUNXI=m
+CONFIG_SUN4I_EMAC=m
+CONFIG_RTC_DRV_SUN6I=m
+CONFIG_MTD_NAND_SUNXI=m
+CONFIG_SERIO_SUN4I_PS2=m
+CONFIG_KEYBOARD_SUN4I_LRADC=m
+CONFIG_PWM_SUN4I=m
+CONFIG_CAN_SUN4I=m
+CONFIG_USB_MUSB_SUNXI=m
+CONFIG_CRYPTO_DEV_SUN4I_SS=m
+CONFIG_SND_SUN4I_CODEC=m
+CONFIG_SND_SUN4I_SPDIF=m
+CONFIG_SUNXI_RSB=m
+CONFIG_NVMEM_SUNXI_SID=m
+
+# BCM 283x
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_8250_BCM2835AUX=y
+CONFIG_DMA_BCM2835=m
+# CONFIG_MMC_SDHCI_BCM2835 is not set
+CONFIG_MMC_SDHCI_IPROC=m
+CONFIG_BCM2835_MBOX=m
+CONFIG_PWM_BCM2835=m
+CONFIG_HW_RANDOM_BCM2835=m
+CONFIG_I2C_BCM2835=m
+CONFIG_SPI_BCM2835=m
+CONFIG_SPI_BCM2835AUX=m
+CONFIG_BCM2835_WDT=m
+CONFIG_SND_BCM2835_SOC_I2S=m
+CONFIG_DRM_VC4=m
+CONFIG_RASPBERRYPI_FIRMWARE=y
+CONFIG_RASPBERRYPI_POWER=y
+
+# Exynos
+CONFIG_ARCH_EXYNOS3=y
+# CONFIG_ARCH_EXYNOS4 is not set
+CONFIG_ARCH_EXYNOS5=y
+CONFIG_SOC_EXYNOS3250=y
+CONFIG_SOC_EXYNOS5250=y
+CONFIG_SOC_EXYNOS5420=y
+CONFIG_SOC_EXYNOS5440=y
+CONFIG_SOC_EXYNOS5260=y
+CONFIG_SOC_EXYNOS5410=y
+CONFIG_SOC_EXYNOS5800=y
+CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_CONSOLE=y
+CONFIG_ARM_EXYNOS5440_CPUFREQ=m
+# CONFIG_ARM_EXYNOS_CPUIDLE is not set
+CONFIG_ARM_EXYNOS5_BUS_DEVFREQ=m
+# CONFIG_ARM_EXYNOS_BUS_DEVFREQ is not set
+# CONFIG_EXYNOS5420_MCPM not set
+CONFIG_DEVFREQ_EVENT_EXYNOS_PPMU=y
+# CONFIG_DEVFREQ_EVENT_EXYNOS_NOCP is not set
+
+CONFIG_I2C_EXYNOS5=m
+CONFIG_I2C_S3C2410=m
+CONFIG_SPI_S3C64XX=m
+CONFIG_EXYNOS_THERMAL=m
+CONFIG_EXYNOS_ADC=m
+CONFIG_MMC_SDHCI_S3C=m
+CONFIG_MMC_SDHCI_S3C_DMA=y
+CONFIG_MMC_DW_EXYNOS=m
+# CONFIG_EXYNOS_IOMMU is not set
+CONFIG_PCI_EXYNOS=y
+CONFIG_PHY_EXYNOS5_USBDRD=m
+CONFIG_SAMSUNG_USBPHY=m
+CONFIG_PHY_SAMSUNG_USB2=m
+CONFIG_USB_EHCI_EXYNOS=m
+CONFIG_USB_OHCI_EXYNOS=m
+CONFIG_USB_DWC3_EXYNOS=m
+CONFIG_PHY_EXYNOS5250_SATA=m
+CONFIG_HW_RANDOM_EXYNOS=m
+CONFIG_CRYPTO_DEV_S5P=m
+CONFIG_PWM_SAMSUNG=m
+CONFIG_S3C2410_WATCHDOG=m
+CONFIG_MFD_SEC_CORE=y
+CONFIG_REGULATOR_S2MPS11=m
+CONFIG_REGULATOR_S5M8767=m
+CONFIG_TCG_TIS_I2C_INFINEON=m
+CONFIG_RTC_DRV_S5M=m
+CONFIG_RTC_DRV_S3C=m
+CONFIG_MFD_WM8994=m
+CONFIG_GPIO_WM8994=m
+CONFIG_REGULATOR_WM8994=m
+
+CONFIG_EXYNOS_VIDEO=y
+CONFIG_EXYNOS_MIPI_DSI=y
+CONFIG_DRM_EXYNOS=m
+CONFIG_DRM_EXYNOS_DP=y
+CONFIG_DRM_EXYNOS_DPI=y
+CONFIG_DRM_EXYNOS_DSI=y
+CONFIG_DRM_EXYNOS_FIMC=y
+CONFIG_DRM_EXYNOS_FIMD=y
+CONFIG_DRM_EXYNOS5433_DECON=y
+CONFIG_DRM_EXYNOS_MIC=y
+CONFIG_DRM_EXYNOS7_DECON=y
+CONFIG_DRM_EXYNOS_G2D=y
+CONFIG_DRM_EXYNOS_GSC=y
+CONFIG_DRM_EXYNOS_HDMI=y
+# CONFIG_DRM_EXYNOS_IOMMU is not set
+CONFIG_DRM_EXYNOS_IPP=y
+CONFIG_DRM_EXYNOS_ROTATOR=y
+CONFIG_DRM_EXYNOS_VIDI=y
+CONFIG_DRM_EXYNOS_MIXER=y
+CONFIG_PHY_EXYNOS_DP_VIDEO=m
+CONFIG_PHY_EXYNOS_MIPI_VIDEO=m
+# CONFIG_FB_S3C is not set
+CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS=y
+CONFIG_VIDEO_EXYNOS_FIMC_LITE=m
+CONFIG_VIDEO_EXYNOS4_FIMC_IS=m
+CONFIG_VIDEO_EXYNOS4_ISP_DMA_CAPTURE=y
+CONFIG_VIDEO_S5P_FIMC=m
+CONFIG_VIDEO_S5P_MIPI_CSIS=m
+CONFIG_VIDEO_SAMSUNG_S5P_G2D=m
+CONFIG_VIDEO_SAMSUNG_S5P_JPEG=m
+CONFIG_VIDEO_SAMSUNG_S5P_MFC=m
+# CONFIG_VIDEO_SAMSUNG_S5P_TV is not set
+CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m
+
+CONFIG_SND_SOC_SAMSUNG=m
+CONFIG_SND_SOC_SAMSUNG_SMDK_SPDIF=m
+CONFIG_SND_SOC_SAMSUNG_SMDK_WM8994=m
+CONFIG_SND_SOC_SMDK_WM8994_PCM=m
+CONFIG_SND_SOC_SNOW=m
+CONFIG_SND_SOC_ODROIDX2=m
+# CONFIG_EXYNOS_IOMMU_DEBUG is not set
+# CONFIG_SAMSUNG_PM_DEBUG is not set
+# CONFIG_SAMSUNG_PM_CHECK is not set
+
+# Arndale/Origen
+CONFIG_MFD_MAX8997=y
+CONFIG_MFD_MAX77686=y
+CONFIG_REGULATOR_MAX8997=m
+CONFIG_REGULATOR_MAX77686=m
+CONFIG_REGULATOR_S2MPA01=m
+CONFIG_REGULATOR_S5M8767=m
+CONFIG_COMMON_CLK_MAX77686=m
+CONFIG_COMMON_CLK_MAX77802=m
+CONFIG_COMMON_CLK_S2MPS11=m
+CONFIG_INPUT_MAX8997_HAPTIC=m
+CONFIG_CHARGER_MAX8997=m
+CONFIG_LEDS_MAX8997=m
+CONFIG_RTC_DRV_MAX8997=m
+CONFIG_RTC_DRV_MAX77686=m
+CONFIG_EXTCON_MAX8997=m
+
+# Tegra
+CONFIG_ARCH_TEGRA_114_SOC=y
+CONFIG_ARCH_TEGRA_124_SOC=y
+CONFIG_SND_SOC_TEGRA=m
+CONFIG_SND_SOC_TEGRA30_AHUB=m
+CONFIG_SND_SOC_TEGRA30_I2S=m
+CONFIG_SND_SOC_TEGRA_MAX98090=m
+CONFIG_SND_SOC_TEGRA_RT5640=m
+CONFIG_SND_SOC_TEGRA_RT5677=m
+CONFIG_AD525X_DPOT=m
+CONFIG_AD525X_DPOT_I2C=m
+CONFIG_AD525X_DPOT_SPI=m
+
+# Jetson TK1
+CONFIG_PINCTRL_AS3722=y
+CONFIG_POWER_RESET_AS3722=y
+CONFIG_MFD_AS3722=y
+CONFIG_REGULATOR_AS3722=m
+CONFIG_RTC_DRV_AS3722=y
+
+# TI Generic
+CONFIG_TI_SOC_THERMAL=m
+CONFIG_TI_THERMAL=y
+# CONFIG_OMAP3_THERMAL is not set
+CONFIG_MMC_OMAP_HS=m
+
+# mvebu
+CONFIG_MACH_ARMADA_370=y
+CONFIG_MACH_ARMADA_375=y
+CONFIG_MACH_ARMADA_38X=y
+CONFIG_MACH_ARMADA_39X=y
+CONFIG_MACH_ARMADA_XP=y
+CONFIG_MACH_DOVE=y
+
+CONFIG_CACHE_TAUROS2=y
+CONFIG_PINCTRL_ARMADA_370=y
+CONFIG_PINCTRL_ARMADA_XP=y
+# CONFIG_ARM_MVEBU_V7_CPUIDLE is not set
+CONFIG_PINCTRL_DOVE=y
+CONFIG_MMC_SDHCI_DOVE=m
+CONFIG_DOVE_THERMAL=m
+CONFIG_DRM_ARMADA=m
+CONFIG_ORION_WATCHDOG=m
+CONFIG_SND_KIRKWOOD_SOC=m
+CONFIG_SND_KIRKWOOD_SOC_ARMADA370_DB=m
+CONFIG_USB_EHCI_HCD_ORION=m
+CONFIG_MVPP2=m
+CONFIG_COMMON_CLK_SI5351=m
+CONFIG_RTC_DRV_ARMADA38X=m
+# CONFIG_CACHE_FEROCEON_L2 is not set
+# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
+CONFIG_LEDS_NS2=m
+CONFIG_SERIAL_MVEBU_UART=y
+# CONFIG_SERIAL_MVEBU_CONSOLE is not set
+# CONFIG_PCIE_ARMADA_8K is not set
+
+# DRM panels
+CONFIG_DRM_PANEL=y
+CONFIG_DRM_PANEL_SIMPLE=m
+CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m
+CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m
+CONFIG_DRM_PANEL_LG_LG4573=m
+CONFIG_DRM_PANEL_SAMSUNG_LD9040=m
+CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m
+CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
+CONFIG_DRM_DW_HDMI=m
+CONFIG_DRM_DW_HDMI_AHB_AUDIO=m
+
+# regmap
+CONFIG_REGMAP_SPI=m
+CONFIG_REGMAP_MMIO=m
+CONFIG_REGMAP_IRQ=y
+
+# usb net
+CONFIG_AX88796=m
+CONFIG_AX88796_93CX6=y
+
+# Multifunction Devices
+CONFIG_MFD_TPS65090=y
+CONFIG_MFD_TPS65910=y
+CONFIG_MFD_TPS65912=y
+CONFIG_MFD_TPS65912_I2C=y
+CONFIG_MFD_TPS65912_SPI=y
+# CONFIG_MFD_DA9052_SPI is not set
+# CONFIG_MFD_ARIZONA_SPI is not set
+# CONFIG_MFD_WM831X_SPI is not set
+# CONFIG_MFD_MC13XXX_SPI is not set
+# CONFIG_MFD_PM8921_CORE is not set
+# CONFIG_MFD_DA9052_I2C is not set
+# CONFIG_MFD_DA9055 is not set
+# CONFIG_MFD_88PM800 is not set
+# CONFIG_MFD_88PM805 is not set
+# CONFIG_MFD_PALMAS is not set
+# CONFIG_MFD_TPS80031 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_TWL6040_CORE is not set
+# 
+
+# Pin stuff
+# CONFIG_PINCTRL_AMD is not set
+# CONFIG_PINCTRL_SAMSUNG is not set
+# CONFIG_PINCTRL_MSM8X74 is not set
+# CONFIG_PINCTRL_BCM281XX is not set
+# CONFIG_PINCTRL_APQ8064 is not set
+# CONFIG_PINCTRL_APQ8084 is not set
+# CONFIG_PINCTRL_MSM8960 is not set
+# CONFIG_PINCTRL_MSM8660 is not set
+# CONFIG_PINCTRL_MSM8996 is not set
+
+# GPIO
+# CONFIG_GPIO_EM is not set
+CONFIG_GPIO_74X164=m
+CONFIG_GPIO_MAX7301=m
+CONFIG_GPIO_MC33880=m
+CONFIG_GPIO_TPS65910=y
+CONFIG_GPIO_TPS65912=m
+# CONFIG_GPIO_ZEVIO is not set
+CONFIG_LEDS_GPIO=m
+CONFIG_LEDS_GPIO_REGISTER=y
+CONFIG_MDIO_BUS_MUX=m
+CONFIG_MDIO_BUS_MUX_GPIO=m
+CONFIG_MDIO_BUS_MUX_MMIOREG=m
+CONFIG_INPUT_GPIO=m
+CONFIG_INPUT_GPIO_BEEPER=m
+CONFIG_INPUT_GPIO_TILT_POLLED=m
+CONFIG_INPUT_MATRIXKMAP=m
+CONFIG_KEYBOARD_MATRIX=m
+# CONFIG_GPIO_RCAR is not set
+CONFIG_W1_MASTER_GPIO=m
+
+# HW crypto and rng
+# CONFIG_CRYPTO_SHA1_ARM_CE is not set
+# CONFIG_CRYPTO_SHA2_ARM_CE is not set
+# CONFIG_CRYPTO_AES_ARM_CE is not set
+# CONFIG_CRYPTO_GHASH_ARM_CE is not set
+
+# DMA
+CONFIG_TI_EDMA=y
+
+# MTD
+# CONFIG_MG_DISK is not set
+CONFIG_MTD_DATAFLASH=m
+CONFIG_MTD_DATAFLASH_WRITE_VERIFY=y
+CONFIG_MTD_DATAFLASH_OTP=y
+CONFIG_MTD_M25P80=m
+CONFIG_MTD_NAND=m
+CONFIG_MTD_NAND_CAFE=m
+# CONFIG_MTD_NAND_DENALI is not set
+CONFIG_MTD_NAND_DOCG4=m
+CONFIG_MTD_NAND_ECC_SMC=y
+CONFIG_MTD_NAND_FSMC=m
+CONFIG_MTD_NAND_GPIO=m
+CONFIG_MTD_NAND_MXC=m
+CONFIG_MTD_NAND_NANDSIM=m
+CONFIG_MTD_NAND_ORION=m
+CONFIG_MTD_NAND_PLATFORM=m
+CONFIG_MTD_NAND_PXA3xx=m
+CONFIG_MTD_NAND_RICOH=m
+CONFIG_MTD_NAND_TMIO=m
+# CONFIG_MTD_NAND_BRCMNAND is not set
+# CONFIG_MTD_MT81xx_NOR is not set
+CONFIG_MTD_SPI_NOR=m
+# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
+CONFIG_MTD_SPINAND_MT29F=m
+CONFIG_MTD_SPINAND_ONDIEECC=y
+CONFIG_MTD_SST25L=m
+CONFIG_MTD_ST_SPI_FSM=m
+CONFIG_EEPROM_AT25=m
+CONFIG_EEPROM_93XX46=m
+
+# Sound
+CONFIG_SND_ARM=y
+CONFIG_SND_SOC_AC97_BUS=y
+CONFIG_SND_SOC_AC97_CODEC=y
+
+# RTC
+CONFIG_RTC_DRV_DS1305=m
+CONFIG_RTC_DRV_DS1390=m
+CONFIG_RTC_DRV_M41T93=m
+CONFIG_RTC_DRV_M41T94=m
+CONFIG_RTC_DRV_MAX6902=m
+CONFIG_RTC_DRV_R9701=m
+CONFIG_RTC_DRV_RS5C348=m
+CONFIG_RTC_DRV_RX4581=m
+CONFIG_RTC_DRV_TPS65910=m
+CONFIG_RTC_DRV_TPS80031=m
+# CONFIG_RTC_DRV_DS1347 is not set
+# CONFIG_RTC_DRV_DS1343 is not set
+# CONFIG_RTC_DRV_MCP795 is not set
+# CONFIG_RTC_DRV_XGENE  is not set
+
+# Regulators
+# CONFIG_REGULATOR_ACT8865 is not set
+CONFIG_REGULATOR_AD5398=m
+CONFIG_REGULATOR_DA9210=m
+CONFIG_REGULATOR_FAN53555=m
+CONFIG_REGULATOR_ISL6271A=m
+CONFIG_REGULATOR_LP3971=m
+CONFIG_REGULATOR_LP3972=m
+CONFIG_REGULATOR_LP872X=m
+CONFIG_REGULATOR_LP8755=m
+CONFIG_REGULATOR_MAX1586=m
+CONFIG_REGULATOR_MAX8649=m
+CONFIG_REGULATOR_MAX8660=m
+CONFIG_REGULATOR_MAX8952=m
+CONFIG_REGULATOR_MAX8973=m
+CONFIG_REGULATOR_PFUZE100=m
+CONFIG_REGULATOR_PV88060=m
+CONFIG_REGULATOR_PV88090=m
+CONFIG_REGULATOR_TPS51632=m
+CONFIG_REGULATOR_TPS62360=m
+CONFIG_REGULATOR_TPS65023=m
+CONFIG_REGULATOR_TPS6507X=m
+CONFIG_REGULATOR_TPS65090=m
+CONFIG_REGULATOR_TPS65217=m
+CONFIG_REGULATOR_TPS6524X=m
+CONFIG_REGULATOR_TPS6586X=m
+CONFIG_REGULATOR_TPS65910=m
+CONFIG_REGULATOR_TPS65912=m
+CONFIG_REGULATOR_TPS80031=m
+CONFIG_REGULATOR_LTC3589=m
+CONFIG_REGULATOR_ANATOP=m
+CONFIG_REGULATOR_DA9211=m
+CONFIG_REGULATOR_ISL9305=m
+CONFIG_REGULATOR_MAX77802=m
+# CONFIG_REGULATOR_MT6311 is not set
+# CONFIG_REGULATOR_PV88080 is not set
+CONFIG_SENSORS_LTC2978_REGULATOR=y
+
+CONFIG_POWER_AVS=y
+CONFIG_CHARGER_MANAGER=y
+CONFIG_CHARGER_BQ2415X=m
+CONFIG_CHARGER_BQ24190=m
+CONFIG_CHARGER_BQ24735=m
+CONFIG_CHARGER_GPIO=m
+CONFIG_CHARGER_TPS65090=m
+CONFIG_PDA_POWER=m
+CONFIG_GENERIC_ADC_BATTERY=m
+CONFIG_BATTERY_SBS=m
+
+# Sensors
+CONFIG_TMP006=m
+CONFIG_BMP085=y
+CONFIG_BMP085_I2C=m
+CONFIG_BMP085_SPI=m
+CONFIG_BMP280=m
+CONFIG_SENSORS_AD7314=m
+CONFIG_SENSORS_ADCXX=m
+CONFIG_SENSORS_ADS7871=m
+CONFIG_SENSORS_BH1780=m
+CONFIG_SENSORS_GPIO_FAN=m
+CONFIG_SENSORS_ISL29018=m
+CONFIG_SENSORS_ISL29028=m
+CONFIG_SENSORS_LIS3_SPI=m
+CONFIG_SENSORS_LM70=m
+CONFIG_SENSORS_MAX1111=m
+CONFIG_MPL115=m
+CONFIG_MPL3115=m
+CONFIG_SI7005=m
+CONFIG_SI7020=m
+
+CONFIG_LCD_L4F00242T03=m
+CONFIG_LCD_LMS283GF05=m
+CONFIG_LCD_LTV350QV=m
+CONFIG_LCD_ILI922X=m
+CONFIG_LCD_ILI9320=m
+CONFIG_LCD_TDO24M=m
+CONFIG_LCD_VGG2432A4=m
+CONFIG_LCD_S6E63M0=m
+CONFIG_LCD_LD9040=m
+CONFIG_LCD_AMS369FG06=m
+CONFIG_LCD_LMS501KF03=m
+CONFIG_LCD_HX8357=m
+
+# Input
+CONFIG_INPUT_GP2A=m
+CONFIG_INPUT_ARIZONA_HAPTICS=m
+CONFIG_INPUT_MC13783_PWRBUTTON=m
+
+CONFIG_TOUCHSCREEN_ADS7846=m
+CONFIG_TOUCHSCREEN_AD7877=m
+CONFIG_TOUCHSCREEN_MC13783=m
+CONFIG_TOUCHSCREEN_TSC2005=m
+
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_DAC124S085=m
+CONFIG_LEDS_PWM=m
+CONFIG_LEDS_SYSCON=y
+CONFIG_BMP085_SPI=m
+
+CONFIG_MFD_SYSCON=y
+CONFIG_GPIO_SYSCON=m
+CONFIG_POWER_RESET_SYSCON=y
+
+CONFIG_SRAM=y
+
+# Ethernet
+CONFIG_KS8851=m
+CONFIG_KS8851_MLL=m
+CONFIG_ENC28J60=m
+CONFIG_LIBERTAS_SPI=m
+CONFIG_P54_SPI=m
+CONFIG_P54_SPI_DEFAULT_EEPROM=n
+CONFIG_MICREL_KS8995MA=m
+CONFIG_IEEE802154_MRF24J40=m
+
+CONFIG_ARM_KPROBES_TEST=m
+
+# jffs2
+CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+CONFIG_JFFS2_FS_POSIX_ACL=y
+CONFIG_JFFS2_FS_SECURITY=y
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+CONFIG_JFFS2_FS_XATTR=y
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_RTIME=y
+CONFIG_JFFS2_RUBIN=y
+CONFIG_JFFS2_SUMMARY=y
+CONFIG_JFFS2_ZLIB=y
+
+CONFIG_UBIFS_FS=m
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+
+# Chromebook
+CONFIG_MFD_CROS_EC=m
+CONFIG_MFD_CROS_EC_I2C=m
+CONFIG_MFD_CROS_EC_SPI=m
+CONFIG_KEYBOARD_CROS_EC=m
+CONFIG_I2C_CROS_EC_TUNNEL=m
+CONFIG_SND_SOC_TS3A227E=m
+CONFIG_CROS_EC_CHARDEV=m
+CONFIG_CROS_EC_PROTO=y
+
+# This newly introduced mess needs to be fixed upstream :-(
+CONFIG_STMMAC_PLATFORM=m
+CONFIG_DWMAC_GENERIC=m
+# CONFIG_DWMAC_LPC18XX is not set
+# CONFIG_DWMAC_MESON is not set
+# CONFIG_DWMAC_SOCFPGA is not set
+# CONFIG_DWMAC_STI is not set
+
+CONFIG_R8188EU=m
+
+# CONFIG_88EU_AP_MODE is not set
+
+# CAN drivers
+# CONFIG_CAN_TI_HECC is not set
+# CONFIG_CAN_FLEXCAN is not set
+# CONFIG_CAN_RCAR is not set
+
+# Needs work/investigation
+# CONFIG_ARM_KPROBES_TEST is not set
+
+# HW Enabled in armv7 not lpae
+# CONFIG_DRM_TILCDC is not set
+# CONFIG_DRM_IMX is not set
+# CONFIG_DRM_STI is not set
+# CONFIG_DRM_FSL_DCU is not set
+# CONFIG_AHCI_IMX is not set
+# CONFIG_IMX_THERMAL is not set
+# CONFIG_TI_DAC7512 is not set
+
+# Not needed on ARMv7
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_CS89x0 is not set
+# CONFIG_DM9000 is not set
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_SPI_PXA2XX is not set
+# CONFIG_DEPRECATED_PARAM_STRUCT is not set
+# CONFIG_LATTICE_ECP3_CONFIG is not set
+# CONFIG_SERIAL_8250_EM is not set
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX310X is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_BCM63XX is not set
+# CONFIG_SERIAL_STM32 is not set
+# CONFIG_SERIAL_MPS2_UART is not set
+# CONFIG_FB_XILINX is not set
+# CONFIG_BRCMSTB_GISB_ARB is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_ATM_HE is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SFC is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_POWER_RESET_QNAP is not set
+# CONFIG_MMC_TMIO is not set
+# CONFIG_PINCTRL_IMX35 is not set
+# CONFIG_DVB_USB_PCTV452E is not set
+
+# CONFIG_MFD_LP8788 is not set
+# CONFIG_MFD_MAX77693 is not set
+# CONFIG_MFD_MAX14577 is not set
+# CONFIG_MFD_AAT2870_CORE is not set
+# CONFIG_MFD_RC5T583 is not set
+# CONFIG_MFD_SMSC is not set
+# CONFIG_MFD_AS3711 is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_INPUT_REGULATOR_HAPTIC is not set
+# CONFIG_POWER_RESET_BRCMSTB is not set
+# CONFIG_INPUT_TPS65218_PWRBUTTON is not set
+# CONFIG_CLK_QORIQ is not set
+# CONFIG_QORIQ_CPUFREQ is not set
+# CONFIG_QCOM_SPMI_TEMP_ALARM is not set
+# CONFIG_SND_SOC_APQ8016_SBC is not set
+# CONFIG_SND_SOC_TAS571X is not set
+
+# CONFIG_VFIO_PLATFORM_AMDXGBE_RESET is not set
+
+# Altera?
+# CONFIG_PCIE_ALTERA is not set
+
+# Debug options. We need to deal with them at some point like x86
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DMADEVICES_VDEBUG is not set
+# CONFIG_DMADEVICES_DEBUG is not set
+# CONFIG_SERIAL_SAMSUNG_DEBUG is not set
+# CONFIG_OMAP2_DSS_DEBUG is not set
+# CONFIG_CRYPTO_DEV_UX500_DEBUG is not set
+# CONFIG_AB8500_DEBUG is not set
+# CONFIG_DEBUG_LL is not set

config-armv7-lpae

@@ -0,0 +1,95 @@
+# ARM A15 lpae unified arch kernel
+CONFIG_ARCH_KEYSTONE=y
+
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_OMAP3 is not set
+# CONFIG_ARCH_OMAP4 is not set
+# CONFIG_SOC_OMAP5 is not set
+# CONFIG_SOC_AM33XX is not set
+# CONFIG_SOC_AM43XX is not set
+# CONFIG_SOC_DRA7XX is not set
+# CONFIG_ARCH_ZYNQ is not set
+# CONFIG_ARCH_AXXIA is not set
+
+CONFIG_ARM_LPAE=y
+# CONFIG_CPU_SW_DOMAIN_PAN is not set
+CONFIG_SYS_SUPPORTS_HUGETLBFS=y
+CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
+CONFIG_ARM_VIRT_EXT=y
+CONFIG_ARM_DMA_IOMMU_ALIGNMENT=8
+
+CONFIG_CMA_SIZE_SEL_MBYTES=y
+CONFIG_CMA_SIZE_MBYTES=64
+
+# Cortex-A15
+CONFIG_ARM_ERRATA_798181=y
+CONFIG_ARM_ERRATA_773022=y
+
+# Little.BIG
+CONFIG_BIG_LITTLE=y
+CONFIG_BL_SWITCHER=y
+CONFIG_EXYNOS5420_MCPM=y
+CONFIG_ARCH_VEXPRESS_DCSCB=y
+CONFIG_ARCH_VEXPRESS_TC2_PM=y
+CONFIG_ARM_BIG_LITTLE_CPUFREQ=m
+CONFIG_ARM_SCPI_CPUFREQ=m
+CONFIG_ARM_VEXPRESS_SPC_CPUFREQ=m
+# CONFIG_BL_SWITCHER_DUMMY_IF is not set
+
+CONFIG_KVM=y
+CONFIG_KVM_ARM_HOST=y
+CONFIG_KVM_NEW_VGIC=y
+
+# CONFIG_XEN is not set
+CONFIG_XEN_FBDEV_FRONTEND=y
+CONFIG_INPUT_XEN_KBDDEV_FRONTEND=m
+CONFIG_XEN_BLKDEV_FRONTEND=m
+CONFIG_XEN_BLKDEV_BACKEND=m
+CONFIG_XEN_NETDEV_FRONTEND=m
+CONFIG_XEN_NETDEV_BACKEND=m
+CONFIG_HVC_XEN=y
+CONFIG_HVC_XEN_FRONTEND=y
+CONFIG_XEN_DEV_EVTCHN=m
+CONFIG_XEN_BACKEND=y
+CONFIG_XENFS=m
+CONFIG_XEN_COMPAT_XENFS=y
+CONFIG_XEN_SYS_HYPERVISOR=y
+CONFIG_XEN_GNTDEV=y
+CONFIG_XEN_GRANT_DEV_ALLOC=m
+CONFIG_XEN_WDT=m
+# CONFIG_XEN_BALLOON is not set
+
+# TI Keystone
+CONFIG_KEYSTONE_USB_PHY=m
+CONFIG_USB_DWC3_KEYSTONE=m
+CONFIG_GPIO_DAVINCI=y
+# CONFIG_I2C_DAVINCI is not set
+CONFIG_TI_AEMIF=m
+CONFIG_POWER_RESET_KEYSTONE=y
+CONFIG_DAVINCI_WATCHDOG=m
+CONFIG_SPI_DAVINCI=m
+CONFIG_TI_DAVINCI_MDIO=m
+CONFIG_KEYSTONE_IRQ=m
+CONFIG_PCI_KEYSTONE=y
+CONFIG_MTD_NAND_DAVINCI=m
+CONFIG_GPIO_SYSCON=m
+CONFIG_TI_MESSAGE_MANAGER=m
+
+# Tegra (non A15 device options)
+# CONFIG_ARCH_TEGRA_2x_SOC is not set
+# CONFIG_ARCH_TEGRA_3x_SOC is not set
+# CONFIG_TEGRA20_MC is not set
+# CONFIG_TEGRA_IOMMU_GART is not set
+# CONFIG_SPI_TEGRA20_SFLASH is not set
+# CONFIG_SPI_TEGRA20_SLINK is not set
+# CONFIG_MFD_MAX8907 is not set
+# CONFIG_SND_SOC_TEGRA_ALC5632 is not set
+# CONFIG_SND_SOC_TEGRA_TRIMSLICE is not set
+# CONFIG_SND_SOC_TEGRA_WM8753 is not set
+# CONFIG_SND_SOC_TEGRA_WM8903 is not set
+# CONFIG_SND_SOC_TEGRA_WM9712 is not set
+# CONFIG_SND_SOC_TEGRA20_AC97 is not set
+# CONFIG_SND_SOC_TEGRA20_DAS is not set
+# CONFIG_SND_SOC_TEGRA20_SPDIF is not set
+# CONFIG_DRM_OMAP is not set
+# CONFIG_AM335X_PHY_USB is not set

config-debug

@@ -0,0 +1,131 @@
+CONFIG_SND_VERBOSE_PRINTK=y
+CONFIG_SND_DEBUG=y
+CONFIG_SND_PCM_XRUN_DEBUG=y
+
+CONFIG_DEBUG_ATOMIC_SLEEP=y
+
+CONFIG_DEBUG_MUTEXES=y
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_LOCK_ALLOC=y
+CONFIG_LOCK_TORTURE_TEST=m
+CONFIG_PROVE_LOCKING=y
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_PROVE_RCU=y
+# CONFIG_PROVE_RCU_REPEATEDLY is not set
+CONFIG_DEBUG_PER_CPU_MAPS=y
+CONFIG_CPUMASK_OFFSTACK=y
+
+CONFIG_CPU_NOTIFIER_ERROR_INJECT=m
+
+CONFIG_FAULT_INJECTION=y
+CONFIG_FAILSLAB=y
+CONFIG_FAIL_PAGE_ALLOC=y
+CONFIG_FAIL_MAKE_REQUEST=y
+CONFIG_FAULT_INJECTION_DEBUG_FS=y
+CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
+CONFIG_FAIL_IO_TIMEOUT=y
+CONFIG_FAIL_MMC_REQUEST=y
+# CONFIG_F2FS_FAULT_INJECTION is not set
+
+CONFIG_LOCK_STAT=y
+
+CONFIG_DEBUG_STACK_USAGE=y
+
+CONFIG_ACPI_DEBUG=y
+# CONFIG_ACPI_DEBUGGER is not set
+CONFIG_DEBUG_SG=y
+CONFIG_DEBUG_PI_LIST=y
+
+# CONFIG_PAGE_EXTENSION is not set
+# CONFIG_PAGE_OWNER is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+
+CONFIG_DEBUG_OBJECTS=y
+# CONFIG_DEBUG_OBJECTS_SELFTEST is not set
+CONFIG_DEBUG_OBJECTS_FREE=y
+CONFIG_DEBUG_OBJECTS_TIMERS=y
+CONFIG_DEBUG_OBJECTS_RCU_HEAD=y
+CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1
+
+CONFIG_X86_PTDUMP=y
+CONFIG_ARM64_PTDUMP=y
+CONFIG_EFI_PGT_DUMP=y
+
+CONFIG_CAN_DEBUG_DEVICES=y
+
+CONFIG_MODULE_FORCE_UNLOAD=y
+
+
+CONFIG_DEBUG_NOTIFIERS=y
+
+CONFIG_DMA_API_DEBUG=y
+
+CONFIG_MMIOTRACE=y
+
+CONFIG_DEBUG_CREDENTIALS=y
+
+CONFIG_EXT4_DEBUG=y
+
+CONFIG_XFS_WARN=y
+
+CONFIG_DEBUG_PERF_USE_VMALLOC=y
+
+# off in both production debug and nodebug builds,
+#  on in rawhide nodebug builds
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+
+CONFIG_JBD2_DEBUG=y
+
+CONFIG_NFSD_FAULT_INJECTION=y
+
+CONFIG_DEBUG_BLK_CGROUP=y
+
+CONFIG_DRBD_FAULT_INJECTION=y
+
+CONFIG_ATH_DEBUG=y
+CONFIG_CARL9170_DEBUGFS=y
+CONFIG_IWLWIFI_DEVICE_TRACING=y
+
+CONFIG_RTLWIFI_DEBUG=y
+
+CONFIG_DEBUG_OBJECTS_WORK=y
+
+CONFIG_DMADEVICES_DEBUG=y
+# CONFIG_DMADEVICES_VDEBUG is not set
+
+CONFIG_PM_ADVANCED_DEBUG=y
+
+CONFIG_CEPH_LIB_PRETTYDEBUG=y
+CONFIG_QUOTA_DEBUG=y
+
+
+CONFIG_KGDB_KDB=y
+CONFIG_KDB_KEYBOARD=y
+CONFIG_KDB_DEFAULT_ENABLE=0x1
+CONFIG_KDB_CONTINUE_CATASTROPHIC=0
+
+CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER=y
+CONFIG_PERCPU_TEST=m
+CONFIG_TEST_LIST_SORT=y
+CONFIG_TEST_STRING_HELPERS=m
+
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+
+CONFIG_WQ_WATCHDOG=y
+
+CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
+
+CONFIG_DEBUG_KMEMLEAK=y
+CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE=1024
+# CONFIG_DEBUG_KMEMLEAK_TEST is not set
+CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y
+
+CONFIG_MAC80211_MESSAGE_TRACING=y
+
+CONFIG_EDAC_DEBUG=y
+
+CONFIG_SPI_DEBUG=y
+
+CONFIG_DEBUG_VM_PGFLAGS=y

config-i686-PAE

@@ -0,0 +1,8 @@
+# CONFIG_HIGHMEM4G is not set
+CONFIG_HIGHMEM64G=y
+
+CONFIG_XEN_DEV_EVTCHN=m
+CONFIG_XEN_SYS_HYPERVISOR=y
+
+# I2O only works on non-PAE 32-bit x86
+# CONFIG_I2O is not set

config-no-extra

@@ -0,0 +1,27 @@
+### config-no-extra: only (to a first approximation) modules listed in
+###   mod-extra.list should be listed here. 
+
+# CONFIG_ISDN is not set
+# CONFIG_RDS is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATALK is not set
+# CONFIG_HAMRADIO is not set
+
+# CONFIG_DEV_APPLETALK is not set
+
+# CONFIG_FUSION is not set
+# CONFIG_I2O is not set
+
+# CONFIG_NET_TULIP is not set
+
+# CONFIG_HERMES is not set
+
+# CONFIG_OCFS2_FS is not set
+# CONFIG_CUSE is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set

config-nodebug

@@ -0,0 +1,131 @@
+CONFIG_SND_VERBOSE_PRINTK=y
+CONFIG_SND_DEBUG=y
+CONFIG_SND_PCM_XRUN_DEBUG=y
+
+# CONFIG_DEBUG_ATOMIC_SLEEP is not set
+
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_LOCK_TORTURE_TEST is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_PROVE_RCU is not set
+# CONFIG_PROVE_RCU_REPEATEDLY is not set
+# CONFIG_DEBUG_PER_CPU_MAPS is not set
+CONFIG_CPUMASK_OFFSTACK=y
+
+# CONFIG_CPU_NOTIFIER_ERROR_INJECT is not set
+
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_FAILSLAB is not set
+# CONFIG_FAIL_PAGE_ALLOC is not set
+# CONFIG_FAIL_MAKE_REQUEST is not set
+# CONFIG_FAULT_INJECTION_DEBUG_FS is not set
+# CONFIG_FAULT_INJECTION_STACKTRACE_FILTER is not set
+# CONFIG_FAIL_IO_TIMEOUT is not set
+# CONFIG_FAIL_MMC_REQUEST is not set
+# CONFIG_F2FS_FAULT_INJECTION is not set
+
+# CONFIG_LOCK_STAT is not set
+
+# CONFIG_DEBUG_STACK_USAGE is not set
+
+# CONFIG_ACPI_DEBUG is not set
+# CONFIG_ACPI_DEBUGGER is not set
+
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_PI_LIST is not set
+
+# CONFIG_PAGE_EXTENSION is not set
+# CONFIG_PAGE_OWNER is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_OBJECTS_SELFTEST is not set
+# CONFIG_DEBUG_OBJECTS_FREE is not set
+# CONFIG_DEBUG_OBJECTS_TIMERS is not set
+# CONFIG_DEBUG_OBJECTS_RCU_HEAD is not set
+CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1
+
+CONFIG_X86_PTDUMP=y
+# CONFIG_ARM64_PTDUMP is not set
+# CONFIG_EFI_PGT_DUMP is not set
+
+# CONFIG_CAN_DEBUG_DEVICES is not set
+
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+
+
+# CONFIG_DEBUG_NOTIFIERS is not set
+
+# CONFIG_DMA_API_DEBUG is not set
+
+# CONFIG_MMIOTRACE is not set
+
+# CONFIG_DEBUG_CREDENTIALS is not set
+
+# off in both production debug and nodebug builds,
+#  on in rawhide nodebug builds
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+
+# CONFIG_EXT4_DEBUG is not set
+
+# CONFIG_XFS_WARN is not set
+
+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
+
+# CONFIG_JBD2_DEBUG is not set
+
+# CONFIG_NFSD_FAULT_INJECTION is not set
+
+# CONFIG_DEBUG_BLK_CGROUP is not set
+
+# CONFIG_DRBD_FAULT_INJECTION is not set
+
+# CONFIG_ATH_DEBUG is not set
+# CONFIG_CARL9170_DEBUGFS is not set
+# CONFIG_IWLWIFI_DEVICE_TRACING is not set
+
+# CONFIG_RTLWIFI_DEBUG is not set
+
+# CONFIG_DEBUG_OBJECTS_WORK is not set
+
+# CONFIG_DMADEVICES_DEBUG is not set
+# CONFIG_DMADEVICES_VDEBUG is not set
+
+CONFIG_PM_ADVANCED_DEBUG=y
+
+# CONFIG_CEPH_LIB_PRETTYDEBUG is not set
+# CONFIG_QUOTA_DEBUG is not set
+
+
+CONFIG_KGDB_KDB=y
+CONFIG_KDB_DEFAULT_ENABLE=0x0
+CONFIG_KDB_KEYBOARD=y
+CONFIG_KDB_CONTINUE_CATASTROPHIC=0
+
+# CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER is not set
+# CONFIG_PERCPU_TEST is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_TEST_STRING_HELPERS is not set
+
+# CONFIG_DETECT_HUNG_TASK is not set
+CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+# CONFIG_WQ_WATCHDOG is not set
+
+# CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK is not set
+
+# CONFIG_DEBUG_KMEMLEAK is not set
+CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE=1024
+# CONFIG_DEBUG_KMEMLEAK_TEST is not set
+CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y
+
+# CONFIG_MAC80211_MESSAGE_TRACING is not set
+
+# CONFIG_EDAC_DEBUG is not set
+
+# CONFIG_SPI_DEBUG is not set
+
+# CONFIG_DEBUG_VM_PGFLAGS is not set

config-powerpc64

@@ -0,0 +1,109 @@
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+
+CONFIG_PPC_MAPLE=y
+CONFIG_PPC_PMAC=y
+CONFIG_PPC_PMAC64=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+# CONFIG_BLK_DEV_IDE_SATA is not set
+# CONFIG_BLK_DEV_IDECS is not set
+CONFIG_BLK_DEV_IDECD=m
+# CONFIG_BLK_DEV_IDETAPE is not set
+CONFIG_BLK_DEV_IDEDMA=y
+CONFIG_BLK_DEV_GENERIC=y
+CONFIG_BLK_DEV_DELKIN=m
+CONFIG_IDE_TASK_IOCTL=y
+CONFIG_IDE_PROC_FS=y
+# CONFIG_IDEPCI_PCIBUS_ORDER is not set
+
+#
+# IDE chipset support/bugfixes
+#
+# CONFIG_IDE_GENERIC is not set
+# CONFIG_BLK_DEV_IDEPNP is not set
+# CONFIG_BLK_DEV_IDEPCI is not set
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_TRIFLEX is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_CS5520 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_JMICRON is not set
+# CONFIG_BLK_DEV_SC1200 is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_IT821X is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SIIMAGE is not set
+# CONFIG_BLK_DEV_SL82C105 is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+# CONFIG_BLK_DEV_VIA82CXXX is not set
+# CONFIG_BLK_DEV_IDE_PMAC is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_BLK_DEV_OPTI621 is not set
+# CONFIG_BLK_DEV_OFFBOARD is not set
+# CONFIG_BLK_DEV_IT8213 is not set
+# CONFIG_BLK_DEV_TC86C001 is not set
+
+CONFIG_IDE_GD=y
+CONFIG_IDE_GD_ATA=y
+CONFIG_IDE_GD_ATAPI=y
+
+CONFIG_PATA_PLATFORM=m
+CONFIG_PATA_OF_PLATFORM=m
+
+# Power970 / G5
+CONFIG_EDAC_CPC925=m
+
+# Maple
+CONFIG_CPU_FREQ_MAPLE=y
+CONFIG_EDAC_AMD8111=m
+CONFIG_EDAC_AMD8131=m
+CONFIG_HW_RANDOM_AMD=m
+CONFIG_MMIO_NVRAM=y
+
+# Apple G5
+CONFIG_MACINTOSH_DRIVERS=y
+CONFIG_ADB=y
+CONFIG_ADB_PMU=y
+CONFIG_ADB_PMU_LED=y
+CONFIG_ADB_PMU_LED_IDE=y
+CONFIG_I2C_POWERMAC=y
+CONFIG_PMAC_RACKMETER=m
+CONFIG_PMAC_APM_EMU=m
+CONFIG_APM_EMULATION=m
+CONFIG_PMAC_SMU=y
+CONFIG_APPLE_AIRPORT=m
+CONFIG_SND_POWERMAC=m
+CONFIG_SND_POWERMAC_AUTO_DRC=y
+CONFIG_MAC_EMUMOUSEBTN=y
+CONFIG_PATA_MACIO=y
+CONFIG_WINDFARM=y
+CONFIG_WINDFARM_RM31=y
+CONFIG_WINDFARM_PM72=y
+CONFIG_WINDFARM_PM81=y
+CONFIG_WINDFARM_PM91=y
+CONFIG_WINDFARM_PM112=y
+CONFIG_WINDFARM_PM121=y
+CONFIG_CPU_FREQ_PMAC64=y
+CONFIG_SERIAL_PMACZILOG=m
+# CONFIG_SERIAL_PMACZILOG_TTYS is not set
+CONFIG_AGP_UNINORTH=y
+# CONFIG_PMAC_BACKLIGHT_LEGACY is not set
+
+CONFIG_SND_AOA=m
+CONFIG_SND_AOA_SOUNDBUS=m
+CONFIG_SND_AOA_FABRIC_LAYOUT=m
+CONFIG_SND_AOA_ONYX=m
+CONFIG_SND_AOA_TAS=m
+CONFIG_SND_AOA_TOONIE=m
+CONFIG_SND_AOA_SOUNDBUS_I2S=m

config-powerpc64-generic

@@ -0,0 +1,376 @@
+CONFIG_PPC=y
+CONFIG_PPC64=y
+
+CONFIG_PPC_POWERNV=y
+CONFIG_PPC_PSERIES=y
+# CONFIG_PPC_82xx is not set
+# CONFIG_PPC_83xx is not set
+# CONFIG_PPC_86xx is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_IBM_CELL_BLADE is not set
+# CONFIG_PPC_MAPLE is not set
+# CONFIG_PPC_PASEMI is not set
+# CONFIG_PPC_PMAC is not set
+# CONFIG_PPC_PMAC64 is not set
+# CONFIG_PPC_PS3 is not set
+CONFIG_HIBERNATION=n
+CONFIG_PPC_RADIX_MMU=y
+# CONFIG_FSL_LBC is not set
+
+CONFIG_EXTRA_TARGETS=""
+
+CONFIG_NR_CPUS=1024
+
+CONFIG_NR_IRQS=512
+CONFIG_SPARSE_IRQ=y
+CONFIG_IRQ_ALL_CPUS=y
+CONFIG_IRQSTACKS=y
+
+CONFIG_DEBUG_STACKOVERFLOW=y
+CONFIG_DEBUGGER=y
+CONFIG_PPC_DENORMALISATION=y
+# CONFIG_PPC_EARLY_DEBUG is not set
+CONFIG_PPC_OF_BOOT_TRAMPOLINE=y
+
+CONFIG_FRAME_WARN=2048
+
+CONFIG_FORCE_MAX_ZONEORDER=9
+
+CONFIG_XMON=y
+# CONFIG_XMON_DEFAULT is not set
+CONFIG_XMON_DISASSEMBLY=y
+
+CONFIG_BOOTX_TEXT=y
+
+CONFIG_ALTIVEC=y
+CONFIG_VSX=y
+
+CONFIG_HZ=100
+CONFIG_HZ_100=y
+# CONFIG_HZ_1000 is not set
+
+CONFIG_NUMA=y
+CONFIG_NUMA_BALANCING=y
+CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y
+CONFIG_PPC_64K_PAGES=y
+CONFIG_PPC_SUBPAGE_PROT=y
+CONFIG_SCHED_SMT=y
+CONFIG_MEMORY_HOTPLUG=y
+CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y
+CONFIG_MEMORY_HOTREMOVE=y
+CONFIG_PPC64_SUPPORTS_MEMORY_FAILURE=y
+
+CONFIG_CGROUP_HUGETLB=y
+CONFIG_MEM_SOFT_DIRTY=y
+
+CONFIG_RCU_FANOUT=64
+CONFIG_RCU_FANOUT_LEAF=16
+
+CONFIG_FA_DUMP=y
+CONFIG_RELOCATABLE=y
+
+CONFIG_CPU_IDLE=y
+# CONFIG_CPU_IDLE_GOV_LADDER is not set
+CONFIG_POWERNV_CPUIDLE=y
+CONFIG_PSERIES_CPUIDLE=y
+
+CONFIG_HW_RANDOM_PSERIES=m
+CONFIG_CRYPTO_DEV_NX=y
+CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
+CONFIG_CRYPTO_DEV_NX_COMPRESS=m
+CONFIG_CRYPTO_DEV_NX_COMPRESS_PSERIES=m
+CONFIG_CRYPTO_DEV_NX_COMPRESS_POWERNV=m
+CONFIG_CRYPTO_DEV_VMX=y
+CONFIG_CRYPTO_DEV_VMX_ENCRYPT=m
+
+CONFIG_XZ_DEC_POWERPC=y
+
+# HW Virt
+CONFIG_CMA=y
+# CONFIG_CMA_DEBUG is not set
+# CONFIG_CMA_DEBUGFS is not set
+CONFIG_CMA_AREAS=7
+CONFIG_KVM_GUEST=y
+CONFIG_KVM_BOOK3S_64=m
+CONFIG_KVM_BOOK3S_64_HV=m
+CONFIG_KVM_BOOK3S_64_PR=m
+# CONFIG_KVM_BOOK3S_HV_EXIT_TIMING is not set
+# CONFIG_KVM_EXIT_TIMING is not set
+CONFIG_KVM_XICS=y
+# CONFIG_HCALL_STATS is not set
+CONFIG_PPC_SPLPAR=y
+CONFIG_LPARCFG=y
+#-- active memory sharing
+CONFIG_PPC_SMLPAR=y
+CONFIG_CMM=y
+CONFIG_HV_PERF_CTRS=y
+#-- DLPAR memory remove
+CONFIG_SPARSEMEM_VMEMMAP=y
+
+# Power NV
+CONFIG_HVC_CONSOLE=y
+CONFIG_HVCS=m
+CONFIG_HVC_RTAS=y
+CONFIG_HVC_OPAL=y
+CONFIG_I2C_OPAL=m
+CONFIG_RTC_DRV_OPAL=m
+CONFIG_SENSORS_IBMPOWERNV=y
+CONFIG_HW_RANDOM_POWERNV=m
+CONFIG_POWERNV_CPUFREQ=m
+CONFIG_IPMI_POWERNV=m
+CONFIG_RTAS_FLASH=y
+CONFIG_OPAL_PRD=m
+CONFIG_MTD_POWERNV_FLASH=m
+
+# Power 7 and later
+CONFIG_PPC_TRANSACTIONAL_MEM=y
+CONFIG_BLK_DEV_RSXX=m
+CONFIG_CXL=m
+CONFIG_CXLFLASH=m
+CONFIG_IBMEBUS=y
+CONFIG_EHEA=m
+CONFIG_PPC_ICSWX=y
+# CONFIG_PPC_ICSWX_PID is not set
+# CONFIG_PPC_ICSWX_USE_SIGILL is not set
+
+# pSeries
+# CONFIG_SCSI_IBMVFC_TRACE is not set
+CONFIG_IBM_BSR=m
+CONFIG_IBMVETH=m
+CONFIG_PSERIES_ENERGY=m
+# CONFIG_HVC_OLD_HVSI is not set
+CONFIG_SCOM_DEBUGFS=y
+CONFIG_SCANLOG=y
+CONFIG_RTAS_PROC=y
+CONFIG_WATCHDOG_RTAS=m
+# CONFIG_UDBG_RTAS_CONSOLE is not set
+CONFIG_IO_EVENT_IRQ=y
+
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_GEN_RTC_X is not set
+CONFIG_RTC_DRV_GENERIC=y
+# CONFIG_CMDLINE_BOOL is not set
+
+CONFIG_HOTPLUG_PCI_SHPC=m
+CONFIG_HOTPLUG_PCI_RPA=m
+CONFIG_HOTPLUG_PCI_RPA_DLPAR=y
+
+CONFIG_SCSI_IBMVFC=m
+CONFIG_SCSI_IBMVSCSI=m
+CONFIG_SCSI_IPR=m
+CONFIG_SCSI_IPR_TRACE=y
+CONFIG_SCSI_IPR_DUMP=y
+
+CONFIG_SERIAL_ICOM=m
+# CONFIG_SERIAL_8250 is not set
+
+# Things we might want to review for newer architectures
+# CONFIG_PCIEPORTBUS is not set
+
+CONFIG_FB_OF=y
+# CONFIG_FB_CONTROL is not set
+# CONFIG_FB_CT65550 is not set
+CONFIG_FB_IBM_GXT4500=y
+CONFIG_FB_MATROX=y
+CONFIG_FB_MATROX_G=y
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_MB862XX_PCI_GDC is not set
+# CONFIG_FB_MB862XX_LIME is not set
+# CONFIG_FB_MB862XX_I2C is not set
+# CONFIG_FB_PLATINUM is not set
+# CONFIG_FB_VALKYRIE is not set
+# CONFIG_FB_VGA16 is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+
+# CONFIG_SND_SOC is not set
+# CONFIG_INPUT_PCSPKR is not set
+# CONFIG_SND_HDA_INTEL is not set
+
+CONFIG_CAPI_EICON=y
+
+# CONFIG_SCSI_AHA1542 is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_NI65 is not set
+# CONFIG_LANCE is not set
+# CONFIG_3C515 is not set
+# CONFIG_BLK_DEV_PLATFORM is not set
+
+# Stuff which wants bus_to_virt() or virt_to_bus()
+# CONFIG_VIDEO_ZORAN is not set
+# CONFIG_ATM_HORIZON is not set
+# CONFIG_ATM_FIRESTREAM is not set
+# CONFIG_ATM_AMBASSADOR is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+
+CONFIG_LEDS_TRIGGER_TIMER=m
+CONFIG_LEDS_TRIGGER_HEARTBEAT=m
+CONFIG_LEDS_TRIGGER_GPIO=m
+CONFIG_LEDS_POWERNV=m
+
+CONFIG_USB_EHCI_HCD_PPC_OF=y
+CONFIG_USB_OHCI_HCD_PCI=y
+CONFIG_USB_OHCI_HCD_PPC_OF=y
+CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
+CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
+
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+# CONFIG_EDAC_CPC925 is not set
+
+
+CONFIG_EDAC=y
+CONFIG_EDAC_MM_EDAC=m
+CONFIG_EDAC_LEGACY_SYSFS=y
+
+# CONFIG_AXON_RAM is not set
+
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_IDEPCI_PCIBUS_ORDER is not set
+
+# CONFIG_MPC5121_ADS is not set
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_NAND_FSL_ELBC is not set
+CONFIG_THERMAL=y
+
+# CONFIG_MEMORY_HOTREMOVE is not set
+
+CONFIG_DMADEVICES=y
+# CONFIG_FSL_DMA is not set
+
+CONFIG_SND_PPC=y
+
+# CONFIG_CODE_PATCHING_SELFTEST is not set
+# CONFIG_FTR_FIXUP_SELFTEST is not set
+
+# CONFIG_MATH_EMULATION is not set
+# CONFIG_RAPIDIO is not set
+# CONFIG_FS_ENET is not set
+# CONFIG_UCC_GETH is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_SERIAL_CPM is not set
+# CONFIG_SERIAL_QE is not set
+# CONFIG_I2C_CPM is not set
+
+CONFIG_NET_VENDOR_IBM=y
+
+# CONFIG_SERIO_XILINX_XPS_PS2 is not set
+
+# CONFIG_PPC_SMLPAR is not set
+
+# CONFIG_MGCOGE is not set
+# CONFIG_GEF_SBC610 is not set
+# CONFIG_GEF_PPC9A is not set
+# CONFIG_GEF_SBC310 is not set
+
+# CONFIG_MCU_MPC8349EMITX is not set
+
+# CONFIG_GPIO_XILINX is not set
+
+CONFIG_MSI_BITMAP_SELFTEST=y
+
+CONFIG_RELOCATABLE=y
+
+# CONFIG_HVC_UDBG is not set
+CONFIG_PRINT_STACK_DEPTH=64
+
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_TWL4030_CORE is not set
+
+CONFIG_BLK_DEV_IT8172=m
+
+CONFIG_SIMPLE_GPIO=y
+
+# CONFIG_FSL_PQ_MDIO is not set
+
+# CONFIG_PS3_VRAM is not set
+CONFIG_MDIO_GPIO=m
+CONFIG_SERIAL_OF_PLATFORM=m
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_PCA953X=m
+CONFIG_GPIO_PCF857X=m
+
+# CONFIG_USB_FHCI_HCD is not set
+# CONFIG_FHCI_DEBUG is not set
+
+# CONFIG_AMIGAONE is not set
+
+CONFIG_DTL=y
+
+CONFIG_MMC_SDHCI_OF=m
+
+# CONFIG_CONSISTENT_SIZE_BOOL is not set
+
+CONFIG_PPC_EMULATED_STATS=y
+
+CONFIG_SWIOTLB=y
+
+CONFIG_PPC_DISABLE_WERROR=y
+# CONFIG_STRICT_MM_TYPECHECKS is not set
+
+# CONFIG_XILINX_LL_TEMAC is not set
+# CONFIG_XILINX_EMACLITE is not set
+
+CONFIG_GPIO_WM831X=m
+# CONFIG_GPIO_UCB1400 is not set
+# CONFIG_EDAC_MPC85XX is not set
+
+# CONFIG_PPC_MPC5200_LPBFIFO is not set
+# CONFIG_CAN_MSCAN is not set
+# CONFIG_CAN_MPC5XXX is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_XPS_USB_HCD_XILINX is not set
+# CONFIG_MMC_SDHCI_OF_HLWD is not set
+
+# CONFIG_MFD_AAT2870_CORE is not set
+
+# CONFIG_GPIO_SCH is not set
+# CONFIG_GPIO_74XX_MMIO is not set
+
+CONFIG_I2C_MPC=m
+
+# CONFIG_IMA is not set
+# CONFIG_TCG_TPM is not set
+
+# CONFIG_CRYPTO_DEV_FSL_CAAM is not set
+# CONFIG_CRYPTO_SHA1_PPC is not set
+# CONFIG_CRYPTO_MD5_PPC is not set
+
+# CONFIG_CAN_FLEXCAN is not set
+# CONFIG_NET_VENDOR_XILINX is not set
+# CONFIG_PPC_EPAPR_HV_BYTECHAN is not set
+# CONFIG_IBM_EMAC is not set
+# CONFIG_NET_VENDOR_PASEMI is not set
+# CONFIG_NET_VENDOR_TOSHIBA is not set
+CONFIG_IBMVNIC=m
+
+CONFIG_MDIO_OCTEON=m
+
+# CONFIG_OF_UNITTEST is not set
+# CONFIG_OF_OVERLAY is not set
+# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
+# CONFIG_INPUT_GP2A is not set
+# CONFIG_INPUT_GPIO_TILT_POLLED is not set
+
+# CONFIG_IRQ_DOMAIN_DEBUG is not set
+# CONFIG_MPIC_MSGR is not set
+# CONFIG_FA_DUMP is not set
+# CONFIG_MDIO_BUS_MUX_GPIO is not set
+
+# CONFIG_FAIL_IOMMU is not set
+# CONFIG_SPAPR_TCE_IOMMU is not set
+# CONFIG_TRANSPARENT_HUGEPAGE is not set
+
+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
+# CONFIG_MFD_SYSCON is not set
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+
+# CONFIG_WINDFARM is not set
+
+CONFIG_POWER_RESET_GPIO=y
+CONFIG_POWER_RESET_GPIO_RESTART=y
+CONFIG_FB_SSD1307=m
+CONFIG_INPUT_PWM_BEEPER=m
+CONFIG_BACKLIGHT_PWM=m

config-powerpc64le

@@ -0,0 +1,8 @@
+CONFIG_CPU_LITTLE_ENDIAN=y
+
+CONFIG_POWER7_CPU=y
+
+CONFIG_DISABLE_MPROFILE_KERNEL=y
+
+# https://fedoraproject.org/wiki/Features/Checkpoint_Restore
+CONFIG_CHECKPOINT_RESTORE=y

config-powerpc64p7

@@ -0,0 +1,3 @@
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+
+CONFIG_POWER7_CPU=y

config-s390x

@@ -0,0 +1,299 @@
+CONFIG_64BIT=y
+# CONFIG_MARCH_Z900 is not set
+CONFIG_MARCH_Z9_109=y
+# CONFIG_MARCH_Z990 is not set
+
+CONFIG_NR_CPUS=64
+CONFIG_COMPAT=y
+
+# See bug 496596
+CONFIG_HZ_100=y
+# CONFIG_HZ_1000 is not set
+# See bug 496605
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+
+CONFIG_LOG_BUF_SHIFT=16
+
+CONFIG_IRQ_DOMAIN_DEBUG=y
+
+#
+# I/O subsystem configuration
+#
+CONFIG_QDIO=m
+
+#
+# Misc
+#
+CONFIG_IPL=y
+CONFIG_PFAULT=y
+CONFIG_SHARED_KERNEL=y
+CONFIG_CMM=m
+# CONFIG_NETIUCV is not set
+CONFIG_SMSGIUCV=m
+CONFIG_CRASH_DUMP=y
+
+#
+# SCSI low-level drivers
+#
+CONFIG_ZFCP=m
+CONFIG_CCW=y
+
+#
+# S/390 block device drivers
+#
+CONFIG_DCSSBLK=m
+CONFIG_BLK_DEV_XPRAM=m
+CONFIG_DASD=m
+CONFIG_DASD_PROFILE=y
+CONFIG_DASD_ECKD=m
+CONFIG_DASD_FBA=m
+CONFIG_DASD_DIAG=m
+CONFIG_DASD_EER=y
+
+#
+# S/390 character device drivers
+#
+CONFIG_TN3270=y
+CONFIG_TN3270_CONSOLE=y
+CONFIG_TN3215=y
+CONFIG_TN3215_CONSOLE=y
+CONFIG_CCW_CONSOLE=y
+CONFIG_SCLP_TTY=y
+CONFIG_SCLP_CONSOLE=y
+CONFIG_SCLP_VT220_TTY=y
+CONFIG_SCLP_VT220_CONSOLE=y
+CONFIG_SCLP_ASYNC=m
+CONFIG_SCLP_ASYNC_ID="000000000"
+CONFIG_SCLP_OFB=y
+CONFIG_S390_TAPE=m
+CONFIG_S390_TAPE_3590=m
+
+CONFIG_APPLDATA_BASE=y
+CONFIG_APPLDATA_MEM=m
+CONFIG_APPLDATA_OS=m
+CONFIG_APPLDATA_NET_SUM=m
+CONFIG_TN3270_TTY=y
+CONFIG_TN3270_FS=m
+
+
+#
+# S/390 tape interface support
+#
+
+#
+# S/390 tape hardware support
+#
+CONFIG_S390_TAPE_34XX=m
+
+# CONFIG_SLIP is not set
+
+#
+# Token Ring devices
+#
+CONFIG_TR=y
+CONFIG_NETCONSOLE=m
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+
+#
+# S/390 network device drivers
+#
+CONFIG_LCS=m
+CONFIG_CTC=m
+CONFIG_IUCV=m
+CONFIG_QETH=m
+CONFIG_QETH_IPV6=y
+CONFIG_CCWGROUP=m
+
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_B44 is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_OSF_PARTITION is not set
+CONFIG_IBM_PARTITION=y
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+
+
+#
+# S390 crypto hw
+#
+CONFIG_CRYPTO_AES_S390=m
+CONFIG_CRYPTO_DES_S390=m
+CONFIG_CRYPTO_GHASH_S390=m
+CONFIG_CRYPTO_SHA1_S390=m
+CONFIG_CRYPTO_SHA256_S390=m
+CONFIG_CRYPTO_SHA512_S390=m
+
+#
+# Kernel hacking
+#
+
+#
+# S390 specific stack options; needs gcc 3.5 so off for now
+#
+CONFIG_PACK_STACK=y
+CONFIG_CHECK_STACK=y
+
+CONFIG_DIAG288_WATCHDOG=m
+CONFIG_VMLOGRDR=m
+CONFIG_MONREADER=m
+
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MII is not set
+
+
+CONFIG_STACK_GUARD=256
+CONFIG_CMM_IUCV=y
+
+
+CONFIG_S390_HYPFS_FS=y
+
+CONFIG_MONWRITER=m
+CONFIG_ZCRYPT=m
+
+CONFIG_AFIUCV=m
+CONFIG_S390_PRNG=m
+
+CONFIG_S390_VMUR=m
+
+# CONFIG_THERMAL is not set
+
+CONFIG_CTCM=m
+CONFIG_QETH_L2=m
+CONFIG_QETH_L3=m
+
+CONFIG_KVM=m
+# CONFIG_KVM_S390_UCONTROL is not set
+CONFIG_S390_GUEST=y
+CONFIG_VIRTIO_CONSOLE=y
+
+
+CONFIG_MEMORY_HOTPLUG=y
+CONFIG_MEMORY_HOTREMOVE=y
+CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y
+CONFIG_CHSC_SCH=m
+
+# drivers/isdn/hardware/mISDN/hfcmulti.c:5255:2: error: #error "not running on big endian machines now"
+# CONFIG_MISDN_HFCMULTI is not set
+
+CONFIG_HVC_IUCV=y
+
+CONFIG_RCU_FANOUT=64
+CONFIG_RCU_FANOUT_LEAF=16
+
+# CONFIG_SUSPEND is not set
+
+CONFIG_SMSGIUCV_EVENT=m
+
+# CONFIG_PREEMPT_TRACER is not set
+
+CONFIG_VMCP=y
+
+
+CONFIG_SCHED_MC=y
+CONFIG_SCHED_BOOK=y
+CONFIG_SCHED_TOPOLOGY=y
+# CONFIG_NUMA is not set
+
+# CONFIG_WARN_DYNAMIC_STACK is not set
+
+# CONFIG_TRANSPARENT_HUGEPAGE is not set
+CONFIG_SCM_BUS=y
+CONFIG_EADM_SCH=m
+CONFIG_SCM_BLOCK=m
+CONFIG_SCM_BLOCK_CLUSTER_WRITE=y
+# CONFIG_S390_PTDUMP is not set
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+
+CONFIG_PCI=y
+CONFIG_PCI_NR_FUNCTIONS=64
+CONFIG_PCI_NR_MSI=256
+CONFIG_HOTPLUG_PCI_CPCI=y
+CONFIG_HOTPLUG_PCI_SHPC=y
+CONFIG_HOTPLUG_PCI_S390=y
+
+# CONFIG_NEW_LEDS is not set
+# CONFIG_HID is not set
+# CONFIG_MTD is not set
+
+# CONFIG_SERIAL_8250 is not set
+# CONFIG_PARPORT is not set
+# CONFIG_UWB is not set
+# CONFIG_MMC is not set
+# CONFIG_FB is not set
+# CONFIG_MFD_CORE is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_CB710_CORE is not set
+# CONFIG_FCOE is not set
+# CONFIG_FUSION is not set
+# CONFIG_FIREWIRE is not set
+# CONFIG_FIREWIRE_NOSY is not set
+
+# CONFIG_INPUT is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+# CONFIG_GAMEPORT_EMU10K1 is not set
+# CONFIG_GAMEPORT_FM801 is not set
+# CONFIG_SERIO is not set
+
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_STAGING is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_MEDIA_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_DRM is not set
+# CONFIG_SOUND is not set
+# CONFIG_DW_DMAC is not set
+# CONFIG_I2C is not set
+# CONFIG_I2C_SMBUS is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_HELPER_AUTO is not set
+# CONFIG_I2C_PARPORT is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_PTP_1588_CLOCK is not set
+# CONFIG_PPS is not set
+# CONFIG_W1 is not set
+# CONFIG_HWMON is not set
+# CONFIG_SSB is not set
+# CONFIG_BCMA is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_LCD_CLASS_DEVICE is not set
+# CONFIG_LCD_PLATFORM is not set
+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+# CONFIG_MFD_RTSX_PCI is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_VX855 is not set
+
+# CONFIG_PHYLIB is not set
+# CONFIG_ATM_DRIVERS is not set
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_SH_ETH is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_IEEE802154_DRIVERS is not set
+# CONFIG_MDIO_OCTEON is not set
+# CONFIG_FMC is not set
+# CONFIG_OF is not set

config-x86-32-generic

@@ -0,0 +1,215 @@
+# CONFIG_64BIT is not set
+
+# CONFIG_X86_32_NON_STANDARD is not set
+
+# CONFIG_X86_GOLDFISH is not set
+CONFIG_X86_BIGSMP=y
+# CONFIG_X86_RDC321X is not set
+# CONFIG_M486 is not set
+# CONFIG_M586 is not set
+# CONFIG_M586TSC is not set
+# CONFIG_M586MMX is not set
+CONFIG_M686=y
+# CONFIG_MPENTIUMII is not set
+# CONFIG_MPENTIUMIII is not set
+# CONFIG_MPENTIUMM is not set
+# CONFIG_MPENTIUM4 is not set
+# CONFIG_MK6 is not set
+# CONFIG_MK7 is not set
+# CONFIG_MK8 is not set
+# CONFIG_MCRUSOE is not set
+# CONFIG_MWINCHIPC6 is not set
+# CONFIG_MWINCHIP3D is not set
+# CONFIG_MCYRIXIII is not set
+# CONFIG_MVIAC3_2 is not set
+# CONFIG_STA2X11 is not set
+
+CONFIG_NR_CPUS=32
+CONFIG_X86_GENERIC=y
+# CONFIG_X86_PPRO_FENCE is not set
+
+CONFIG_TOSHIBA=m
+
+CONFIG_SONYPI=m
+CONFIG_SONYPI_COMPAT=y
+
+# CONFIG_NUMA is not set
+
+# CONFIG_NOHIGHMEM is not set
+CONFIG_HIGHMEM4G=y
+# CONFIG_HIGHMEM64G is not set
+CONFIG_HIGHMEM=y
+CONFIG_HIGHPTE=y
+CONFIG_ZONE_DMA=y
+
+# CONFIG_MATH_EMULATION is not set
+
+CONFIG_FB_GEODE=y
+CONFIG_FB_GEODE_LX=y
+CONFIG_FB_GEODE_GX=y
+# CONFIG_FB_GEODE_GX1 is not set
+
+CONFIG_FB_SSD1307=m
+
+# CONFIG_PCI_GOBIOS is not set
+# CONFIG_PCI_GODIRECT is not set
+# CONFIG_PCI_GOMMCONFIG is not set
+CONFIG_PCI_GOANY=y
+
+CONFIG_IBM_ASM=m
+
+#
+# APM (Advanced Power Management) BIOS Support
+#
+CONFIG_APM=y
+# CONFIG_APM_IGNORE_USER_SUSPEND is not set
+# CONFIG_APM_DO_ENABLE is not set
+CONFIG_APM_CPU_IDLE=y
+# CONFIG_APM_DISPLAY_BLANK is not set
+# CONFIG_APM_ALLOW_INTS is not set
+
+
+# CONFIG_X86_POWERNOW_K6 is not set
+CONFIG_X86_POWERNOW_K7=y
+# CONFIG_X86_GX_SUSPMOD is not set
+CONFIG_X86_SPEEDSTEP_ICH=y
+CONFIG_X86_SPEEDSTEP_SMI=y
+CONFIG_X86_SPEEDSTEP_LIB=y
+# CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK is not set
+CONFIG_X86_LONGRUN=y
+# CONFIG_X86_LONGHAUL is not set
+# CONFIG_X86_CPUFREQ_NFORCE2 is not set
+# e_powersaver is dangerous
+# CONFIG_X86_E_POWERSAVER is not set
+
+
+# CONFIG_4KSTACKS is not set
+
+CONFIG_PCI_DIRECT=y
+
+# CONFIG_TRANSPARENT_HUGEPAGE is not set
+
+# SHPC has half-arsed PCI probing, which makes it load on too many systems
+# CONFIG_HOTPLUG_PCI_SHPC is not set
+
+CONFIG_I2C_ALI1535=m
+CONFIG_I2C_ALI15X3=m
+CONFIG_I2C_ALI1563=m
+CONFIG_I2C_SIS5595=m
+CONFIG_I2C_SIS630=m
+
+CONFIG_SCx200_ACB=m
+
+# CONFIG_X86_REBOOTFIXUPS is not set
+
+CONFIG_PC8736x_GPIO=m
+# CONFIG_NSC_GPIO is not set
+CONFIG_GPIO_SCH=m
+
+CONFIG_HW_RANDOM_GEODE=m
+
+CONFIG_TC1100_WMI=m
+
+CONFIG_IB700_WDT=m
+
+CONFIG_PHYSICAL_ALIGN=0x400000
+CONFIG_PHYSICAL_START=0x400000
+
+# CONFIG_KEXEC_JUMP is not set
+
+CONFIG_CRYPTO_AES_586=y
+CONFIG_CRYPTO_DEV_GEODE=m
+CONFIG_CRYPTO_TWOFISH_586=m
+
+CONFIG_VIDEO_CAFE_CCIC=m
+
+
+CONFIG_MTD_NAND_CAFE=m
+
+CONFIG_LBDAF=y
+
+# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set
+
+
+CONFIG_OLPC=y
+CONFIG_BATTERY_OLPC=y
+CONFIG_MOUSE_PS2_OLPC=y
+CONFIG_OLPC_XO1_PM=y
+CONFIG_OLPC_XO15_SCI=y
+CONFIG_OLPC_XO1_RTC=y
+CONFIG_OLPC_XO1_SCI=y
+# CONFIG_ALIX is not set
+# staging
+# CONFIG_FB_OLPC_DCON is not set
+
+# CONFIG_SPARSE_IRQ is not set
+
+CONFIG_RCU_FANOUT=32
+
+# CONFIG_X86_ANCIENT_MCE is not set
+
+
+CONFIG_I2C_PXA=m
+
+# CONFIG_INTEL_TXT is not set
+
+CONFIG_GEODE_WDT=m
+CONFIG_CS5535_MFGPT=m
+CONFIG_CS5535_CLOCK_EVENT_SRC=m
+
+CONFIG_LEDS_INTEL_SS4200=m
+
+CONFIG_OLPC_XO1=m
+CONFIG_XO1_RFKILL=m
+
+CONFIG_X86_32_IRIS=m
+
+CONFIG_POWER_RESET_GPIO=y
+# CONFIG_POWER_RESET_GPIO_RESTART is not set
+
+
+
+CONFIG_MTD_OF_PARTS=y
+CONFIG_MTD_PHYSMAP_OF=m
+CONFIG_SERIAL_OF_PLATFORM=m
+CONFIG_SERIAL_GRLIB_GAISLER_APBUART=m
+# CONFIG_MMC_SDHCI_OF is not set
+
+# CONFIG_X86_INTEL_MID is not set
+# CONFIG_X86_INTEL_QUARK is not set
+
+CONFIG_MFD_CS5535=m
+# CONFIG_MFD_SYSCON is not set
+
+# I2O enabled only for 32-bit x86, disabled for PAE kernel
+CONFIG_I2O=m
+
+CONFIG_INPUT_PWM_BEEPER=m
+CONFIG_BACKLIGHT_PWM=m
+
+# CONFIG_EDAC_SBRIDGE is not set
+
+CONFIG_OF=y
+# CONFIG_OF_UNITTEST is not set
+# CONFIG_OF_OVERLAY is not set
+# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
+# CONFIG_INPUT_GP2A is not set
+# CONFIG_INPUT_GPIO_TILT_POLLED is not set
+# CONFIG_GEOS is not set
+# CONFIG_NET5501 is not set
+# CONFIG_MDIO_BUS_MUX_GPIO is not set
+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
+# CONFIG_GPIO_SODAVILLE is not set
+# CONFIG_GPIO_74XX_MMIO is not set
+# CONFIG_BACKLIGHT_OT200 is not set
+
+# CONFIG_MLX5_INFINIBAND is not set
+# CONFIG_PINCTRL_SINGLE is not set
+# CONFIG_PINCTRL_BCM281XX is not set
+# CONFIG_PINCTRL_APQ8064 is not set
+# CONFIG_PINCTRL_IPQ8064 is not set
+# CONFIG_COMMON_CLK_SI570 is not set
+# CONFIG_COMMON_CLK_QCOM is not set
+# CONFIG_DRM_PANEL_SHARP_LQ101R1SX01 is not set
+# CONFIG_DRM_PANEL_SHARP_LS043T1LE01 is not set
+# CONFIG_KEYBOARD_BCM is not set

config-x86-generic

@@ -0,0 +1,607 @@
+CONFIG_UID16=y
+
+CONFIG_X86_EXTENDED_PLATFORM=y
+
+CONFIG_X86_GENERIC=y
+
+# CONFIG_X86_LEGACY_VM86 is not set
+
+CONFIG_HPET=y
+CONFIG_HPET_TIMER=y
+# CONFIG_HPET_MMAP is not set
+
+CONFIG_I8K=m
+CONFIG_SONYPI_COMPAT=y
+CONFIG_MICROCODE=y
+CONFIG_MICROCODE_INTEL=y
+CONFIG_MICROCODE_AMD=y
+
+CONFIG_PERF_EVENTS_AMD_POWER=m
+CONFIG_PERF_EVENTS_INTEL_UNCORE=m
+CONFIG_PERF_EVENTS_INTEL_RAPL=m
+CONFIG_PERF_EVENTS_CSTATE=m
+CONFIG_PERF_EVENTS_INTEL_CSTATE=m
+
+CONFIG_X86_MSR=y
+CONFIG_X86_CPUID=y
+CONFIG_EDD=m
+# CONFIG_EDD_OFF is not set
+
+CONFIG_PNP=y
+# CONFIG_PNP_DEBUG_MESSAGES is not set
+
+# CONFIG_NET_SB1000 is not set
+
+CONFIG_MTRR=y
+CONFIG_MTRR_SANITIZER=y
+CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=0
+CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1
+CONFIG_X86_PAT=y
+CONFIG_X86_PM_TIMER=y
+
+CONFIG_X86_INTEL_MPX=y
+
+CONFIG_EFI=y
+CONFIG_EFI_STUB=y
+# CONFIG_EFI_VARS is not set
+CONFIG_EFIVAR_FS=y
+# CONFIG_EFI_VARS_PSTORE is not set
+# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set
+CONFIG_EFI_PCDP=y
+CONFIG_FB_EFI=y
+CONFIG_EARLY_PRINTK_EFI=y
+CONFIG_EFI_RUNTIME_MAP=y
+# CONFIG_EFI_FAKE_MEMMAP is not set
+# CONFIG_EFI_BOOTLOADER_CONTROL is not set
+# CONFIG_EFI_CAPSULE_LOADER is not set
+# needs FB_SIMPLE to work correctly
+# CONFIG_X86_SYSFB is not set
+
+# FIXME: 32bit only?
+# CONFIG_FB_N411 is not set
+
+CONFIG_INTEL_IOMMU=y
+CONFIG_INTEL_IOMMU_FLOPPY_WA=y
+# CONFIG_INTEL_IOMMU_DEFAULT_ON is not set
+CONFIG_INTEL_IOMMU_SVM=y
+CONFIG_SCSI_ADVANSYS=m
+
+CONFIG_CAPI_EICON=y
+
+#
+# Kernel debugging
+#
+CONFIG_X86_MPPARSE=y
+# CONFIG_X86_VERBOSE_BOOTUP is not set
+CONFIG_MMIOTRACE=y
+# CONFIG_MMIOTRACE_TEST is not set
+# CONFIG_DEBUG_PER_CPU_MAPS is not set
+CONFIG_DEBUG_WX=y
+CONFIG_DEBUG_STACKOVERFLOW=y
+
+CONFIG_ACPI=y
+CONFIG_ACPI_AC=y
+CONFIG_ACPI_BATTERY=y
+CONFIG_ACPI_BUTTON=y
+CONFIG_ACPI_CONTAINER=y
+CONFIG_ACPI_DOCK=y
+CONFIG_ACPI_FAN=y
+CONFIG_ACPI_NUMA=y
+CONFIG_ACPI_PROCESSOR=y
+CONFIG_ACPI_PROCFS=y
+CONFIG_ACPI_SBS=m
+CONFIG_ACPI_SLEEP=y
+CONFIG_ACPI_THERMAL=y
+CONFIG_ACPI_TOSHIBA=m
+CONFIG_ACPI_VIDEO=m
+CONFIG_ACPI_INITRD_TABLE_OVERRIDE=y
+# FIXME: Next two are deprecated. Remove them when they disappear upstream
+# CONFIG_ACPI_PROCFS_POWER is not set
+CONFIG_PNPACPI=y
+CONFIG_ACPI_PROCESSOR_AGGREGATOR=m
+CONFIG_ACPI_HED=m
+CONFIG_ACPI_APEI=y
+CONFIG_ACPI_APEI_PCIEAER=y
+CONFIG_ACPI_APEI_GHES=y
+CONFIG_ACPI_APEI_MEMORY_FAILURE=y
+# CONFIG_ACPI_APEI_EINJ is not set
+CONFIG_ACPI_IPMI=m
+CONFIG_ACPI_CUSTOM_METHOD=m
+CONFIG_ACPI_BGRT=y
+# CONFIG_ACPI_EXTLOG is not set
+# CONFIG_ACPI_REV_OVERRIDE_POSSIBLE is not set
+CONFIG_ACPI_TABLE_UPGRADE=y
+
+CONFIG_INTEL_SOC_PMIC=y
+CONFIG_PMIC_OPREGION=y
+CONFIG_CRC_PMIC_OPREGION=y
+CONFIG_XPOWER_PMIC_OPREGION=y
+CONFIG_GPIO_CRYSTAL_COVE=y
+CONFIG_AXP288_ADC=y
+CONFIG_AXP288_FUEL_GAUGE=y
+# CONFIG_PWM_CRC is not set
+CONFIG_SURFACE3_POWER=y
+
+
+CONFIG_X86_INTEL_PSTATE=y
+CONFIG_X86_ACPI_CPUFREQ=m
+CONFIG_X86_ACPI_CPUFREQ_CPB=y
+CONFIG_X86_PCC_CPUFREQ=m
+CONFIG_X86_POWERNOW_K8=m
+CONFIG_X86_AMD_FREQ_SENSITIVITY=m
+CONFIG_X86_P4_CLOCKMOD=m
+# CONFIG_X86_SPEEDSTEP_CENTRINO is not set
+
+#
+# various x86 specific drivers
+#
+CONFIG_NVRAM=y
+CONFIG_CRYPTO_DEV_PADLOCK=m
+CONFIG_CRYPTO_DEV_PADLOCK_AES=m
+CONFIG_CRYPTO_DEV_PADLOCK_SHA=m
+CONFIG_CRYPTO_DEV_CCP=y
+CONFIG_CRYPTO_DEV_CCP_DD=m
+CONFIG_CRYPTO_DEV_CCP_CRYPTO=m
+CONFIG_CRYPTO_DEV_QAT_DH895xCC=m
+CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m
+CONFIG_CRYPTO_DEV_QAT_C3XXX=m
+CONFIG_CRYPTO_DEV_QAT_C62X=m
+CONFIG_CRYPTO_DEV_QAT_C3XXXVF=m
+CONFIG_CRYPTO_DEV_QAT_C62XVF=m
+
+CONFIG_GENERIC_ISA_DMA=y
+
+CONFIG_PCI_MMCONFIG=y
+CONFIG_PCI_BIOS=y
+CONFIG_VMD=m
+
+CONFIG_HOTPLUG_PCI_COMPAQ=m
+# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
+CONFIG_HOTPLUG_PCI_IBM=m
+
+CONFIG_IPW2100=m
+CONFIG_IPW2100_MONITOR=y
+CONFIG_IPW2200=m
+CONFIG_IPW2200_MONITOR=y
+CONFIG_IPW2200_RADIOTAP=y
+CONFIG_IPW2200_PROMISCUOUS=y
+CONFIG_IPW2200_QOS=y
+
+CONFIG_BLK_DEV_AMD74XX=y
+
+# I2C_ACPI casues I2C to be built in.  This should probably be fixed.
+CONFIG_I2C=y
+CONFIG_ACPI_I2C_OPREGION=y
+CONFIG_I2C_AMD756=m
+CONFIG_I2C_AMD756_S4882=m
+CONFIG_I2C_AMD8111=m
+CONFIG_I2C_I801=m
+CONFIG_I2C_ISCH=m
+CONFIG_I2C_ISMT=m
+CONFIG_I2C_NFORCE2=m
+CONFIG_I2C_NFORCE2_S4985=m
+CONFIG_I2C_PIIX4=m
+CONFIG_I2C_SIS96X=m
+CONFIG_I2C_VIA=m
+CONFIG_I2C_VIAPRO=m
+CONFIG_I2C_DESIGNWARE_CORE=m
+CONFIG_I2C_DESIGNWARE_PLATFORM=m
+CONFIG_I2C_DESIGNWARE_BAYTRAIL=y
+
+#rhbz 997149
+# CONFIG_DELL_RBU is not set
+CONFIG_DCDBAS=m
+
+CONFIG_EDAC=y
+CONFIG_EDAC_MM_EDAC=m
+# CONFIG_EDAC_AMD64_ERROR_INJECTION is not set
+CONFIG_EDAC_AMD64=m
+CONFIG_EDAC_AMD76X=m
+CONFIG_EDAC_AMD8111=m
+CONFIG_EDAC_AMD8131=m
+CONFIG_EDAC_E7XXX=m
+CONFIG_EDAC_E752X=m
+CONFIG_EDAC_I82860=m
+CONFIG_EDAC_I82875P=m
+CONFIG_EDAC_I82975X=m
+CONFIG_EDAC_I3000=m
+CONFIG_EDAC_I3200=m
+CONFIG_EDAC_I5000=m
+CONFIG_EDAC_I5100=m
+CONFIG_EDAC_I5400=m
+CONFIG_EDAC_I7300=m
+CONFIG_EDAC_I7CORE=m
+CONFIG_EDAC_R82600=m
+CONFIG_EDAC_X38=m
+CONFIG_EDAC_DECODE_MCE=m
+CONFIG_EDAC_LEGACY_SYSFS=y
+CONFIG_EDAC_IE31200=m
+
+CONFIG_SCHED_MC=y
+
+CONFIG_TCG_INFINEON=m
+CONFIG_TCG_CRB=m
+
+CONFIG_HW_RANDOM_INTEL=m
+CONFIG_HW_RANDOM_AMD=m
+CONFIG_HW_RANDOM_VIA=m
+
+# CONFIG_COMPAT_VDSO is not set
+
+CONFIG_X86_PLATFORM_DEVICES=y
+
+CONFIG_AMILO_RFKILL=m
+CONFIG_ASUS_LAPTOP=m
+CONFIG_ASUS_WIRELESS=m
+CONFIG_COMPAL_LAPTOP=m
+CONFIG_DELL_SMBIOS=m
+CONFIG_DELL_LAPTOP=m
+CONFIG_DELL_RBTN=m
+CONFIG_CHROMEOS_LAPTOP=m
+CONFIG_CHROMEOS_PSTORE=m
+CONFIG_EEEPC_LAPTOP=m
+CONFIG_FUJITSU_TABLET=m
+CONFIG_FUJITSU_LAPTOP=m
+# CONFIG_FUJITSU_LAPTOP_DEBUG is not set
+CONFIG_IDEAPAD_LAPTOP=m
+CONFIG_INTEL_HID_EVENT=m
+CONFIG_MSI_LAPTOP=m
+CONFIG_PANASONIC_LAPTOP=m
+CONFIG_SAMSUNG_LAPTOP=m
+CONFIG_SONY_LAPTOP=m
+CONFIG_TOPSTAR_LAPTOP=m
+CONFIG_SURFACE3_WMI=m
+
+CONFIG_ACPI_WMI=m
+CONFIG_ACER_WMI=m
+CONFIG_ACERHDF=m
+CONFIG_ALIENWARE_WMI=m
+CONFIG_ASUS_WMI=m
+CONFIG_ASUS_NB_WMI=m
+CONFIG_HP_WIRELESS=m
+CONFIG_HP_WMI=m
+# CONFIG_INTEL_SCU_IPC is not set
+# CONFIG_INTEL_PMC_IPC is not set
+CONFIG_DELL_WMI=m
+CONFIG_DELL_WMI_AIO=m
+CONFIG_DELL_SMO8800=m
+CONFIG_EEEPC_WMI=m
+CONFIG_INTEL_OAKTRAIL=m
+CONFIG_SAMSUNG_Q10=m
+CONFIG_APPLE_GMUX=m
+CONFIG_XO15_EBOOK=m
+CONFIG_INTEL_RST=m
+CONFIG_INTEL_SMARTCONNECT=y
+CONFIG_PVPANIC=m
+
+# CONFIG_TOUCHSCREEN_INTEL_MID is not set
+CONFIG_TOUCHSCREEN_GOODIX=m
+
+# CONFIG_SMSC37B787_WDT is not set
+CONFIG_VIA_WDT=m
+CONFIG_IE6XX_WDT=m
+
+CONFIG_PROC_VMCORE=y
+
+CONFIG_KVM=m
+CONFIG_KVM_INTEL=m
+CONFIG_KVM_AMD=m
+CONFIG_KVM_DEVICE_ASSIGNMENT=y
+CONFIG_LGUEST=m
+# CONFIG_LGUEST_GUEST is not set
+
+CONFIG_HYPERVISOR_GUEST=y
+CONFIG_PARAVIRT=y
+CONFIG_PARAVIRT_TIME_ACCOUNTING=y
+# CONFIG_PARAVIRT_DEBUG is not set
+
+# PARAVIRT_SPINLOCKS has a 5% perf hit on native hw (see kconfig)
+# CONFIG_PARAVIRT_SPINLOCKS is not set
+
+CONFIG_KVM_GUEST=y
+CONFIG_KVM_MMU_AUDIT=y # default $x would be nice...
+# CONFIG_KVM_DEBUG_FS is not set
+
+CONFIG_XEN=y
+# CONFIG_XEN_DEBUG is not set
+CONFIG_XEN_BALLOON=y
+CONFIG_XEN_SCRUB_PAGES=y
+CONFIG_XEN_SAVE_RESTORE=y
+CONFIG_HVC_XEN=y
+CONFIG_HVC_XEN_FRONTEND=y
+CONFIG_XEN_FBDEV_FRONTEND=y
+CONFIG_XEN_BLKDEV_FRONTEND=m
+CONFIG_XEN_NETDEV_FRONTEND=m
+CONFIG_XEN_NETDEV_BACKEND=m
+CONFIG_XEN_WDT=m
+CONFIG_XEN_GRANT_DEV_ALLOC=m
+CONFIG_XEN_PCIDEV_FRONTEND=m
+CONFIG_XENFS=m
+CONFIG_XEN_COMPAT_XENFS=y
+CONFIG_XEN_BACKEND=y
+CONFIG_XEN_BLKDEV_BACKEND=m
+CONFIG_XEN_DEBUG_FS=y
+CONFIG_XEN_GNTDEV=m
+CONFIG_INPUT_XEN_KBDDEV_FRONTEND=m
+CONFIG_XEN_SELFBALLOONING=y
+CONFIG_XEN_PCIDEV_BACKEND=m
+CONFIG_XEN_ACPI_PROCESSOR=m
+CONFIG_XEN_SCSI_FRONTEND=m
+CONFIG_XEN_SCSI_BACKEND=m
+CONFIG_XEN_SYMS=y
+
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_PXA2XX=m
+# CONFIG_SPI_CADENCE is not set
+# CONFIG_SPI_ZYNQMP_GQSPI is not set
+# CONFIG_SPI_ROCKCHIP is not set
+# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
+# CONFIG_DRM_PANEL_LG_LG4573 is not set
+# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
+
+CONFIG_MTD_ESB2ROM=m
+CONFIG_MTD_CK804XROM=m
+
+CONFIG_CPU_IDLE=y
+# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set
+# CONFIG_CPU_IDLE_GOV_LADDER is not set
+CONFIG_CPU_IDLE_GOV_MENU=y
+
+CONFIG_THINKPAD_ACPI=m
+# CONFIG_THINKPAD_ACPI_DEBUG is not set
+# CONFIG_THINKPAD_ACPI_DEBUGFACILITIES is not set
+CONFIG_THINKPAD_ACPI_HOTKEY_POLL=y
+CONFIG_THINKPAD_ACPI_VIDEO=y
+CONFIG_THINKPAD_ACPI_ALSA_SUPPORT=y
+# CONFIG_THINKPAD_ACPI_UNSAFE_LEDS is not set
+
+CONFIG_MACINTOSH_DRIVERS=y
+
+CONFIG_DMIID=y
+CONFIG_DMI_SYSFS=y
+
+CONFIG_ISCSI_IBFT_FIND=y
+CONFIG_ISCSI_IBFT=m
+
+CONFIG_INTEL_IOATDMA=m
+CONFIG_INTEL_IDMA64=m
+
+CONFIG_SENSORS_I5K_AMB=m
+CONFIG_SENSORS_FAM15H_POWER=m
+CONFIG_SENSORS_ACPI_POWER=m
+CONFIG_SENSORS_I5500=m
+CONFIG_SENSORS_DELL_SMM=m
+
+# CONFIG_CPA_DEBUG is not set
+
+CONFIG_HP_WATCHDOG=m
+CONFIG_NV_TCO=m
+CONFIG_SP5100_TCO=m
+
+# CONFIG_NO_BOOTMEM is not set
+
+# CONFIG_MEMTEST is not set
+# CONFIG_DEBUG_TLBFLUSH is not set
+# CONFIG_MAXSMP is not set
+
+
+CONFIG_HP_ILO=m
+
+CONFIG_BACKLIGHT_APPLE=m
+
+CONFIG_X86_PMEM_LEGACY=y
+
+CONFIG_X86_CHECK_BIOS_CORRUPTION=y
+
+# CONFIG_CMDLINE_BOOL is not set
+
+
+CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y
+
+
+# CONFIG_IOMMU_STRESS is not set
+
+CONFIG_X86_MCE=y
+CONFIG_X86_MCE_INTEL=y
+CONFIG_X86_MCE_AMD=y
+CONFIG_X86_MCE_INJECT=m
+
+CONFIG_SFI=y
+
+CONFIG_I2C_SCMI=m
+CONFIG_SBC_FITPC2_WATCHDOG=m
+
+CONFIG_X86_DECODER_SELFTEST=y
+
+CONFIG_ACPI_CMPC=m
+CONFIG_MSI_WMI=m
+CONFIG_TOSHIBA_BT_RFKILL=m
+CONFIG_TOSHIBA_HAPS=m
+CONFIG_TOSHIBA_WMI=m
+
+CONFIG_VGA_SWITCHEROO=y
+CONFIG_LPC_SCH=m
+CONFIG_LPC_ICH=m
+
+CONFIG_GPIO_ICH=m
+# CONFIG_GPIO_LYNXPOINT is not set
+# CONFIG_GPIO_F7188X is not set
+# CONFIG_GPIO_104_IDI_48 is not set
+
+# These should all go away with IC2_ACPI is fixed
+# CONFIG_MFD_AS3711 is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_AAT2870_CORE is not set
+# CONFIG_MFD_AXP20X is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_DA9052_I2C is not set
+# CONFIG_MFD_DA9055 is not set
+# CONFIG_MFD_88PM800 is not set
+# CONFIG_MFD_88PM805 is not set
+# CONFIG_MFD_RC5T583 is not set
+# CONFIG_MFD_SEC_CORE is not set
+# CONFIG_MFD_SMSC is not set
+# CONFIG_MFD_LP8788 is not set
+
+CONFIG_PCI_CNB20LE_QUIRK=y
+
+CONFIG_ACPI_EC_DEBUGFS=m
+# CONFIG_ACPI_APEI_ERST_DEBUG is not set
+
+CONFIG_INTEL_IDLE=y
+
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+CONFIG_F71808E_WDT=m
+CONFIG_HPWDT_NMI_DECODING=y
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_GPIO_INTEL_MID is not set
+CONFIG_PCH_DMA=m
+CONFIG_INTEL_IPS=m
+CONFIG_INTEL_PMC_CORE=y
+# CONFIG_IBM_RTL is not set
+
+CONFIG_VIDEO_VIA_CAMERA=m
+
+CONFIG_IRQ_TIME_ACCOUNTING=y
+CONFIG_X86_RESERVE_LOW=64
+
+# CONFIG_IRQ_DOMAIN_DEBUG is not set
+
+CONFIG_PCH_GBE=m
+CONFIG_PCH_PHUB=m
+
+CONFIG_CRYPTO_AES_NI_INTEL=y
+CONFIG_CRYPTO_SERPENT_SSE2_586=m
+CONFIG_CRYPTO_CRC32_PCLMUL=m
+
+CONFIG_HP_ACCEL=m
+
+CONFIG_SURFACE_PRO3_BUTTON=m
+CONFIG_INTEL_PUNIT_IPC=m
+
+# CONFIG_RAPIDIO is not set
+
+CONFIG_SCHED_SMT=y
+CONFIG_CC_STACKPROTECTOR=y
+CONFIG_CC_STACKPROTECTOR_STRONG=y
+CONFIG_RELOCATABLE=y
+CONFIG_RANDOMIZE_BASE=y
+
+CONFIG_HYPERV=m
+CONFIG_HYPERV_UTILS=m
+CONFIG_HID_HYPERV_MOUSE=m
+CONFIG_HYPERV_NET=m
+CONFIG_HYPERV_STORAGE=m
+CONFIG_HYPERV_BALLOON=m
+CONFIG_FB_HYPERV=m
+CONFIG_HYPERV_KEYBOARD=m
+# This is x86_64 only, but we'll lump it here anyway
+CONFIG_PCI_HYPERV=m
+
+# Depends on HOTPLUG_PCI_PCIE
+CONFIG_BLK_DEV_PCIESSD_MTIP32XX=m
+
+CONFIG_DRM_GMA500=m
+# CONFIG_DRM_GMA600 is not set
+CONFIG_DRM_GMA3600=y
+
+CONFIG_RCU_FANOUT_LEAF=16
+
+CONFIG_INTEL_MEI=m
+CONFIG_INTEL_MEI_ME=m
+CONFIG_INTEL_MEI_TXE=m
+CONFIG_INTEL_MEI_WDT=m
+
+CONFIG_NFC_MEI_PHY=m
+CONFIG_NFC_PN544_MEI=m
+CONFIG_NFC_MICROREAD_MEI=m
+
+# Maybe enable in debug kernels?
+# CONFIG_DEBUG_ENTRY is not set
+# CONFIG_DEBUG_NMI_SELFTEST is not set
+
+# CONFIG_X86_GOLDFISH is not set
+
+CONFIG_X86_INTEL_LPSS=y
+CONFIG_IDMA64=m
+
+# CONFIG_X86_AMD_PLATFORM_DEVICE is not set
+# CONFIG_X86_INTEL_MID is not set
+# CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set
+
+CONFIG_MFD_INTEL_LPSS_ACPI=m
+CONFIG_MFD_INTEL_LPSS_PCI=m
+
+CONFIG_IOSF_MBI=m
+# CONFIG_IOSF_MBI_DEBUG is not set
+CONFIG_PWM_LPSS=m
+CONFIG_PWM_LPSS_PCI=m
+CONFIG_PWM_LPSS_PLATFORM=m
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_BAYTRAIL=y
+CONFIG_PINCTRL_CHERRYVIEW=y
+# CONFIG_PINCTRL_AMD is not set
+CONFIG_PINCTRL_SUNRISEPOINT=m
+CONFIG_PINCTRL_BROXTON=m
+
+# I have no idea why this is x86-specific
+CONFIG_E1000E_HWTS=y
+
+#baytrail/cherrytrail stuff
+CONFIG_KEYBOARD_GPIO=m
+CONFIG_INPUT_SOC_BUTTON_ARRAY=m
+CONFIG_SND_SOC_INTEL_SST=m
+CONFIG_SND_SOC_INTEL_SST_ACPI=m
+CONFIG_SND_SOC_INTEL_HASWELL_MACH=m
+CONFIG_SND_SOC_INTEL_BROADWELL_MACH=m
+CONFIG_SND_SOC_INTEL_BAYTRAIL=m
+CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH=m
+CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH=m
+CONFIG_SND_SOC_INTEL_BYT_MAX98090_MACH=m
+CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=m
+CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH=m
+CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH=m
+CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=m
+CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=m
+CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=m
+CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m
+CONFIG_SND_SOC_INTEL_BXT_RT298_MACH=m
+CONFIG_SND_SOC_AC97_CODEC=m
+# CONFIG_SND_SOC_TAS571X is not set
+# CONFIG_SND_SUN4I_CODEC is not set
+# CONFIG_SND_SUN4I_SPDIF is not set
+
+CONFIG_INTEL_POWERCLAMP=m
+CONFIG_X86_PKG_TEMP_THERMAL=m
+CONFIG_INTEL_SOC_DTS_THERMAL=m
+CONFIG_INT340X_THERMAL=m
+CONFIG_INTEL_RAPL=m
+CONFIG_INTEL_PCH_THERMAL=m
+CONFIG_INT3406_THERMAL=m
+
+CONFIG_VMWARE_VMCI=m
+CONFIG_VMWARE_VMCI_VSOCKETS=m
+CONFIG_MOUSE_PS2_VMMOUSE=y
+
+CONFIG_XZ_DEC_X86=y
+
+CONFIG_MPILIB=y
+
+CONFIG_EFI_SECURE_BOOT_SIG_ENFORCE=y
+CONFIG_EFI_SIGNATURE_LIST_PARSER=y
+
+# CONFIG_KEXEC_FILE is not set
+# CONFIG_KEXEC_VERIFY_SIG is not set
+
+CONFIG_MODULE_SIG_UEFI=y
+
+CONFIG_VMXNET3=m
+CONFIG_FUJITSU_ES=m
+CONFIG_VFIO_PCI_VGA=y
+
+CONFIG_PCH_CAN=m
+
+# CONFIG_X86_DEBUG_FPU is not set
+# CONFIG_PUNIT_ATOM_DEBUG is not set
+# CONFIG_AMD_MCE_INJ is not set