Add i915 eDP fixes

The build 4.17.5 build failed because "fa" was not declared.

Signed-off-by: Jeremy Cline <jcline@redhat.com>

.gitignore

@@ -3,5 +3,8 @@ clog
 *.bz2
 *.rpm
 *.orig
+*.sign
 kernel-[234].*/
 perf-man-*.tar.gz
+kernel-tools/
+kernel-headers/

0001-Enable-AXP288-PMIC-support-on-x86_64-for-battery-cha.patch

@@ -1,546 +0,0 @@
-From 7a434df40dcabc68902502994faf652936493e51 Mon Sep 17 00:00:00 2001
-From: Hans de Goede <hdegoede@redhat.com>
-Date: Wed, 14 Jun 2017 17:30:36 +0200
-Subject: [RFC PATCH] Enable AXP288 PMIC support on x86_64 for battery charging
- and monitoring   support on Bay and Cherry Trail tablets and laptops Enable
- various drivers for peripherals found on Bay and Cherry Trail tablets
-
----
- baseconfig/x86/x86_64/CONFIG_AK8975                |  1 +
- baseconfig/x86/x86_64/CONFIG_AXP20X_ADC            |  1 +
- baseconfig/x86/x86_64/CONFIG_AXP20X_POWER          |  1 +
- baseconfig/x86/x86_64/CONFIG_AXP288_ADC            |  1 +
- baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER        |  1 +
- baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE     |  1 +
- baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042      |  1 +
- baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190       |  1 +
- baseconfig/x86/x86_64/CONFIG_EXTCON                |  1 +
- baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288         |  1 +
- baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO           |  1 +
- baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_INT3496  |  1 +
- baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355        |  1 +
- baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A        |  1 +
- baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502         |  1 +
- baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO       |  1 +
- baseconfig/x86/x86_64/CONFIG_GPIO_AXP209           |  1 +
- baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE   |  1 +
- baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI    |  1 +
- .../x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM      |  1 +
- baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK      |  1 +
- baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C       |  1 +
- baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO       |  1 +
- baseconfig/x86/x86_64/CONFIG_MFD_AXP20X            |  1 +
- baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C        |  1 +
- baseconfig/x86/x86_64/CONFIG_SILEAD_DMI            |  1 +
- baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM     |  1 +
- baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION  |  1 +
- kernel-x86_64-debug.config                         | 39 ++++++++++++++--------
- kernel-x86_64.config                               | 39 ++++++++++++++--------
- kernel.spec                                        |  5 +++
- 31 files changed, 85 insertions(+), 26 deletions(-)
- create mode 100644 baseconfig/x86/x86_64/CONFIG_AK8975
- create mode 100644 baseconfig/x86/x86_64/CONFIG_AXP20X_ADC
- create mode 100644 baseconfig/x86/x86_64/CONFIG_AXP20X_POWER
- create mode 100644 baseconfig/x86/x86_64/CONFIG_AXP288_ADC
- create mode 100644 baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER
- create mode 100644 baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE
- create mode 100644 baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042
- create mode 100644 baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190
- create mode 100644 baseconfig/x86/x86_64/CONFIG_EXTCON
- create mode 100644 baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288
- create mode 100644 baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO
- create mode 100644 baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_INT3496
- create mode 100644 baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355
- create mode 100644 baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A
- create mode 100644 baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502
- create mode 100644 baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO
- create mode 100644 baseconfig/x86/x86_64/CONFIG_GPIO_AXP209
- create mode 100644 baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE
- create mode 100644 baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI
- create mode 100644 baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM
- create mode 100644 baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK
- create mode 100644 baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C
- create mode 100644 baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO
- create mode 100644 baseconfig/x86/x86_64/CONFIG_MFD_AXP20X
- create mode 100644 baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C
- create mode 100644 baseconfig/x86/x86_64/CONFIG_SILEAD_DMI
- create mode 100644 baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM
- create mode 100644 baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION
-
-diff --git a/baseconfig/x86/x86_64/CONFIG_AK8975 b/baseconfig/x86/x86_64/CONFIG_AK8975
-new file mode 100644
-index 00000000..547c21a9
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_AK8975
-@@ -0,0 +1 @@
-+CONFIG_AK8975=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_AXP20X_ADC b/baseconfig/x86/x86_64/CONFIG_AXP20X_ADC
-new file mode 100644
-index 00000000..0960ee66
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_AXP20X_ADC
-@@ -0,0 +1 @@
-+# CONFIG_AXP20X_ADC is not set
-diff --git a/baseconfig/x86/x86_64/CONFIG_AXP20X_POWER b/baseconfig/x86/x86_64/CONFIG_AXP20X_POWER
-new file mode 100644
-index 00000000..e02cee70
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_AXP20X_POWER
-@@ -0,0 +1 @@
-+# CONFIG_AXP20X_POWER is not set
-diff --git a/baseconfig/x86/x86_64/CONFIG_AXP288_ADC b/baseconfig/x86/x86_64/CONFIG_AXP288_ADC
-new file mode 100644
-index 00000000..e138f36a
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_AXP288_ADC
-@@ -0,0 +1 @@
-+CONFIG_AXP288_ADC=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER b/baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER
-new file mode 100644
-index 00000000..0418f962
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_AXP288_CHARGER
-@@ -0,0 +1 @@
-+CONFIG_AXP288_CHARGER=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE b/baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE
-new file mode 100644
-index 00000000..e171b954
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_AXP288_FUEL_GAUGE
-@@ -0,0 +1 @@
-+CONFIG_AXP288_FUEL_GAUGE=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042 b/baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042
-new file mode 100644
-index 00000000..669e6ac2
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_BATTERY_MAX17042
-@@ -0,0 +1 @@
-+CONFIG_BATTERY_MAX17042=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190 b/baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190
-new file mode 100644
-index 00000000..3128bb67
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_CHARGER_BQ24190
-@@ -0,0 +1 @@
-+CONFIG_CHARGER_BQ24190=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON b/baseconfig/x86/x86_64/CONFIG_EXTCON
-new file mode 100644
-index 00000000..0a7190c0
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_EXTCON
-@@ -0,0 +1 @@
-+CONFIG_EXTCON=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288 b/baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288
-new file mode 100644
-index 00000000..7fadeb58
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_AXP288
-@@ -0,0 +1 @@
-+CONFIG_EXTCON_AXP288=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO b/baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO
-new file mode 100644
-index 00000000..87ca2bd0
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO
-@@ -0,0 +1 @@
-+# CONFIG_EXTCON_GPIO is not set
-diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_INT3496 b/baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_INT3496
-new file mode 100644
-index 00000000..3f6c5d6f
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_INTEL_INT3496
-@@ -0,0 +1 @@
-+CONFIG_EXTCON_INTEL_INT3496=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355 b/baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355
-new file mode 100644
-index 00000000..680b5a77
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355
-@@ -0,0 +1 @@
-+# CONFIG_EXTCON_MAX3355 is not set
-diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A b/baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A
-new file mode 100644
-index 00000000..e5f7236c
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A
-@@ -0,0 +1 @@
-+# CONFIG_EXTCON_RT8973A is not set
-diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502 b/baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502
-new file mode 100644
-index 00000000..916994aa
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502
-@@ -0,0 +1 @@
-+# CONFIG_EXTCON_SM5502 is not set
-diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO b/baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO
-new file mode 100644
-index 00000000..7a0c9af3
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO
-@@ -0,0 +1 @@
-+# CONFIG_EXTCON_USB_GPIO is not set
-diff --git a/baseconfig/x86/x86_64/CONFIG_GPIO_AXP209 b/baseconfig/x86/x86_64/CONFIG_GPIO_AXP209
-new file mode 100644
-index 00000000..2365ae70
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_GPIO_AXP209
-@@ -0,0 +1 @@
-+CONFIG_GPIO_AXP209=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE
-new file mode 100644
-index 00000000..f9cdc633
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE
-@@ -0,0 +1 @@
-+CONFIG_I2C_DESIGNWARE_CORE=y
-diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI
-new file mode 100644
-index 00000000..6103f947
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PCI
-@@ -0,0 +1 @@
-+CONFIG_I2C_DESIGNWARE_PCI=y
-diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM
-new file mode 100644
-index 00000000..3d50a3e8
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM
-@@ -0,0 +1 @@
-+CONFIG_I2C_DESIGNWARE_PLATFORM=y
-diff --git a/baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK b/baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK
-new file mode 100644
-index 00000000..e2fbdf90
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_INPUT_AXP20X_PEK
-@@ -0,0 +1 @@
-+CONFIG_INPUT_AXP20X_PEK=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C
-new file mode 100644
-index 00000000..8ec049b0
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_I2C
-@@ -0,0 +1 @@
-+CONFIG_INV_MPU6050_I2C=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO
-new file mode 100644
-index 00000000..ae4889d9
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_INV_MPU6050_IIO
-@@ -0,0 +1 @@
-+CONFIG_INV_MPU6050_IIO=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X
-new file mode 100644
-index 00000000..ada79c0d
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X
-@@ -0,0 +1 @@
-+CONFIG_MFD_AXP20X=y
-diff --git a/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C
-new file mode 100644
-index 00000000..22c60295
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_MFD_AXP20X_I2C
-@@ -0,0 +1 @@
-+CONFIG_MFD_AXP20X_I2C=y
-diff --git a/baseconfig/x86/x86_64/CONFIG_SILEAD_DMI b/baseconfig/x86/x86_64/CONFIG_SILEAD_DMI
-new file mode 100644
-index 00000000..25b01735
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_SILEAD_DMI
-@@ -0,0 +1 @@
-+CONFIG_SILEAD_DMI=y
-diff --git a/baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM b/baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM
-new file mode 100644
-index 00000000..060ebfc9
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_USB_XHCI_PLATFORM
-@@ -0,0 +1 @@
-+CONFIG_USB_XHCI_PLATFORM=m
-diff --git a/baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION b/baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION
-new file mode 100644
-index 00000000..8c98df14
---- /dev/null
-+++ b/baseconfig/x86/x86_64/CONFIG_XPOWER_PMIC_OPREGION
-@@ -0,0 +1 @@
-+CONFIG_XPOWER_PMIC_OPREGION=y
-diff --git a/kernel-x86_64-debug.config b/kernel-x86_64-debug.config
-index 08b52a89..d8d38c8e 100644
---- a/kernel-x86_64-debug.config
-+++ b/kernel-x86_64-debug.config
-@@ -192,7 +192,7 @@ CONFIG_AIC7XXX_RESET_DELAY_MS=15000
- CONFIG_AIX_PARTITION=y
- # CONFIG_AK09911 is not set
- # CONFIG_AK8974 is not set
--# CONFIG_AK8975 is not set
-+CONFIG_AK8975=m
- # CONFIG_AL3320A is not set
- CONFIG_ALIENWARE_WMI=m
- CONFIG_ALI_FIR=m
-@@ -326,6 +326,11 @@ CONFIG_AUXDISPLAY=y
- # CONFIG_AVERAGE is not set
- CONFIG_AX25_DAMA_SLAVE=y
- CONFIG_AX25=m
-+# CONFIG_AXP20X_ADC is not set
-+# CONFIG_AXP20X_POWER is not set
-+CONFIG_AXP288_ADC=m
-+CONFIG_AXP288_CHARGER=m
-+CONFIG_AXP288_FUEL_GAUGE=m
- CONFIG_B43_BCMA_PIO=y
- CONFIG_B43_BCMA=y
- CONFIG_B43_DEBUG=y
-@@ -385,7 +390,7 @@ CONFIG_BATMAN_ADV_NC=y
- # CONFIG_BATTERY_GAUGE_LTC2941 is not set
- # CONFIG_BATTERY_LEGO_EV3 is not set
- # CONFIG_BATTERY_MAX17040 is not set
--# CONFIG_BATTERY_MAX17042 is not set
-+CONFIG_BATTERY_MAX17042=m
- # CONFIG_BATTERY_SBS is not set
- CONFIG_BAYCOM_EPP=m
- CONFIG_BAYCOM_PAR=m
-@@ -699,7 +704,7 @@ CONFIG_CGROUP_PIDS=y
- CONFIG_CGROUP_SCHED=y
- CONFIG_CGROUPS=y
- # CONFIG_CHARGER_BQ2415X is not set
--# CONFIG_CHARGER_BQ24190 is not set
-+CONFIG_CHARGER_BQ24190=m
- # CONFIG_CHARGER_BQ24257 is not set
- # CONFIG_CHARGER_BQ24735 is not set
- # CONFIG_CHARGER_BQ25890 is not set
-@@ -1397,10 +1402,16 @@ CONFIG_EXT4_FS_SECURITY=y
- CONFIG_EXT4_FS=y
- CONFIG_EXT4_USE_FOR_EXT2=y
- # CONFIG_EXTCON_ADC_JACK is not set
-+CONFIG_EXTCON_AXP288=m
-+# CONFIG_EXTCON_GPIO is not set
- CONFIG_EXTCON_INTEL_CHT_WC=y
- CONFIG_EXTCON_INTEL_INT3496=m
--# CONFIG_EXTCON is not set
-+CONFIG_EXTCON=m
-+# CONFIG_EXTCON_MAX3355 is not set
- # CONFIG_EXTCON_QCOM_SPMI_MISC is not set
-+# CONFIG_EXTCON_RT8973A is not set
-+# CONFIG_EXTCON_SM5502 is not set
-+# CONFIG_EXTCON_USB_GPIO is not set
- CONFIG_EXTRA_FIRMWARE=""
- # CONFIG_EZNPS_GIC is not set
- # CONFIG_EZX_PCAP is not set
-@@ -1617,6 +1628,7 @@ CONFIG_GIRBIL_DONGLE=m
- # CONFIG_GPIO_ALTERA is not set
- # CONFIG_GPIO_AMD8111 is not set
- # CONFIG_GPIO_AMDPT is not set
-+CONFIG_GPIO_AXP209=m
- # CONFIG_GPIO_BT8XX is not set
- CONFIG_GPIO_CRYSTAL_COVE=y
- # CONFIG_GPIO_CS5535 is not set
-@@ -1903,10 +1915,10 @@ CONFIG_I2C_COMPAT=y
- # CONFIG_I2C_DEBUG_CORE is not set
- # CONFIG_I2C_DEMUX_PINCTRL is not set
- CONFIG_I2C_DESIGNWARE_BAYTRAIL=y
--CONFIG_I2C_DESIGNWARE_CORE=m
-+CONFIG_I2C_DESIGNWARE_CORE=y
- # CONFIG_I2C_DESIGNWARE is not set
--CONFIG_I2C_DESIGNWARE_PCI=m
--CONFIG_I2C_DESIGNWARE_PLATFORM=m
-+CONFIG_I2C_DESIGNWARE_PCI=y
-+CONFIG_I2C_DESIGNWARE_PLATFORM=y
- CONFIG_I2C_DIOLAN_U2C=m
- # CONFIG_I2C_EG20T is not set
- # CONFIG_I2C_EMEV2 is not set
-@@ -2086,6 +2098,7 @@ CONFIG_INPUT_APANEL=m
- CONFIG_INPUT_ATI_REMOTE2=m
- CONFIG_INPUT_ATLAS_BTNS=m
- # CONFIG_INPUT_ATMEL_CAPTOUCH is not set
-+CONFIG_INPUT_AXP20X_PEK=m
- # CONFIG_INPUT_BMA150 is not set
- CONFIG_INPUT_CM109=m
- CONFIG_INPUT_CMA3000_I2C=m
-@@ -2184,8 +2197,8 @@ CONFIG_INTEL_TXT=y
- CONFIG_INTEL_VBTN=m
- CONFIG_INTEL_XWAY_PHY=m
- # CONFIG_INTERVAL_TREE_TEST is not set
--# CONFIG_INV_MPU6050_I2C is not set
--# CONFIG_INV_MPU6050_IIO is not set
-+CONFIG_INV_MPU6050_I2C=m
-+CONFIG_INV_MPU6050_IIO=m
- # CONFIG_INV_MPU6050_SPI is not set
- # CONFIG_IOMMU_DEBUG is not set
- # CONFIG_IOMMU_STRESS is not set
-@@ -2864,8 +2877,8 @@ CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
- # CONFIG_MFD_ASIC3 is not set
- # CONFIG_MFD_ATMEL_FLEXCOM is not set
- # CONFIG_MFD_ATMEL_HLCDC is not set
--# CONFIG_MFD_AXP20X_I2C is not set
--# CONFIG_MFD_AXP20X is not set
-+CONFIG_MFD_AXP20X_I2C=y
-+CONFIG_MFD_AXP20X=y
- # CONFIG_MFD_BCM590XX is not set
- CONFIG_MFD_CORE=y
- # CONFIG_MFD_CPCAP is not set
-@@ -4695,7 +4708,7 @@ CONFIG_SH_ETH=m
- # CONFIG_SIGMA is not set
- CONFIG_SIGMATEL_FIR=m
- CONFIG_SIGNED_PE_FILE_VERIFICATION=y
--# CONFIG_SILEAD_DMI is not set
-+CONFIG_SILEAD_DMI=y
- CONFIG_SIS190=m
- CONFIG_SIS900=m
- # CONFIG_SKFP is not set
-@@ -5731,7 +5744,7 @@ CONFIG_USB_WDM=m
- CONFIG_USB_WUSB_CBAF=m
- CONFIG_USB_WUSB=m
- CONFIG_USB_XHCI_HCD=y
--# CONFIG_USB_XHCI_PLATFORM is not set
-+CONFIG_USB_XHCI_PLATFORM=m
- CONFIG_USB_XUSBATM=m
- CONFIG_USB=y
- CONFIG_USB_YUREX=m
-diff --git a/kernel-x86_64.config b/kernel-x86_64.config
-index 9fedd204..abcc8bb4 100644
---- a/kernel-x86_64.config
-+++ b/kernel-x86_64.config
-@@ -192,7 +192,7 @@ CONFIG_AIC7XXX_RESET_DELAY_MS=15000
- CONFIG_AIX_PARTITION=y
- # CONFIG_AK09911 is not set
- # CONFIG_AK8974 is not set
--# CONFIG_AK8975 is not set
-+CONFIG_AK8975=m
- # CONFIG_AL3320A is not set
- CONFIG_ALIENWARE_WMI=m
- CONFIG_ALI_FIR=m
-@@ -325,6 +325,11 @@ CONFIG_AUXDISPLAY=y
- # CONFIG_AVERAGE is not set
- CONFIG_AX25_DAMA_SLAVE=y
- CONFIG_AX25=m
-+# CONFIG_AXP20X_ADC is not set
-+# CONFIG_AXP20X_POWER is not set
-+CONFIG_AXP288_ADC=m
-+CONFIG_AXP288_CHARGER=m
-+CONFIG_AXP288_FUEL_GAUGE=m
- CONFIG_B43_BCMA_PIO=y
- CONFIG_B43_BCMA=y
- CONFIG_B43_DEBUG=y
-@@ -384,7 +389,7 @@ CONFIG_BATMAN_ADV_NC=y
- # CONFIG_BATTERY_GAUGE_LTC2941 is not set
- # CONFIG_BATTERY_LEGO_EV3 is not set
- # CONFIG_BATTERY_MAX17040 is not set
--# CONFIG_BATTERY_MAX17042 is not set
-+CONFIG_BATTERY_MAX17042=m
- # CONFIG_BATTERY_SBS is not set
- CONFIG_BAYCOM_EPP=m
- CONFIG_BAYCOM_PAR=m
-@@ -698,7 +703,7 @@ CONFIG_CGROUP_PIDS=y
- CONFIG_CGROUP_SCHED=y
- CONFIG_CGROUPS=y
- # CONFIG_CHARGER_BQ2415X is not set
--# CONFIG_CHARGER_BQ24190 is not set
-+CONFIG_CHARGER_BQ24190=m
- # CONFIG_CHARGER_BQ24257 is not set
- # CONFIG_CHARGER_BQ24735 is not set
- # CONFIG_CHARGER_BQ25890 is not set
-@@ -1386,10 +1391,16 @@ CONFIG_EXT4_FS_SECURITY=y
- CONFIG_EXT4_FS=y
- CONFIG_EXT4_USE_FOR_EXT2=y
- # CONFIG_EXTCON_ADC_JACK is not set
-+CONFIG_EXTCON_AXP288=m
-+# CONFIG_EXTCON_GPIO is not set
- CONFIG_EXTCON_INTEL_CHT_WC=y
- CONFIG_EXTCON_INTEL_INT3496=m
--# CONFIG_EXTCON is not set
-+CONFIG_EXTCON=m
-+# CONFIG_EXTCON_MAX3355 is not set
- # CONFIG_EXTCON_QCOM_SPMI_MISC is not set
-+# CONFIG_EXTCON_RT8973A is not set
-+# CONFIG_EXTCON_SM5502 is not set
-+# CONFIG_EXTCON_USB_GPIO is not set
- CONFIG_EXTRA_FIRMWARE=""
- # CONFIG_EZNPS_GIC is not set
- # CONFIG_EZX_PCAP is not set
-@@ -1599,6 +1610,7 @@ CONFIG_GIRBIL_DONGLE=m
- # CONFIG_GPIO_ALTERA is not set
- # CONFIG_GPIO_AMD8111 is not set
- # CONFIG_GPIO_AMDPT is not set
-+CONFIG_GPIO_AXP209=m
- # CONFIG_GPIO_BT8XX is not set
- CONFIG_GPIO_CRYSTAL_COVE=y
- # CONFIG_GPIO_CS5535 is not set
-@@ -1885,10 +1897,10 @@ CONFIG_I2C_COMPAT=y
- # CONFIG_I2C_DEBUG_CORE is not set
- # CONFIG_I2C_DEMUX_PINCTRL is not set
- CONFIG_I2C_DESIGNWARE_BAYTRAIL=y
--CONFIG_I2C_DESIGNWARE_CORE=m
-+CONFIG_I2C_DESIGNWARE_CORE=y
- # CONFIG_I2C_DESIGNWARE is not set
--CONFIG_I2C_DESIGNWARE_PCI=m
--CONFIG_I2C_DESIGNWARE_PLATFORM=m
-+CONFIG_I2C_DESIGNWARE_PCI=y
-+CONFIG_I2C_DESIGNWARE_PLATFORM=y
- CONFIG_I2C_DIOLAN_U2C=m
- # CONFIG_I2C_EG20T is not set
- # CONFIG_I2C_EMEV2 is not set
-@@ -2068,6 +2080,7 @@ CONFIG_INPUT_APANEL=m
- CONFIG_INPUT_ATI_REMOTE2=m
- CONFIG_INPUT_ATLAS_BTNS=m
- # CONFIG_INPUT_ATMEL_CAPTOUCH is not set
-+CONFIG_INPUT_AXP20X_PEK=m
- # CONFIG_INPUT_BMA150 is not set
- CONFIG_INPUT_CM109=m
- CONFIG_INPUT_CMA3000_I2C=m
-@@ -2166,8 +2179,8 @@ CONFIG_INTEL_TXT=y
- CONFIG_INTEL_VBTN=m
- CONFIG_INTEL_XWAY_PHY=m
- # CONFIG_INTERVAL_TREE_TEST is not set
--# CONFIG_INV_MPU6050_I2C is not set
--# CONFIG_INV_MPU6050_IIO is not set
-+CONFIG_INV_MPU6050_I2C=m
-+CONFIG_INV_MPU6050_IIO=m
- # CONFIG_INV_MPU6050_SPI is not set
- # CONFIG_IOMMU_DEBUG is not set
- # CONFIG_IOMMU_STRESS is not set
-@@ -2844,8 +2857,8 @@ CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
- # CONFIG_MFD_ASIC3 is not set
- # CONFIG_MFD_ATMEL_FLEXCOM is not set
- # CONFIG_MFD_ATMEL_HLCDC is not set
--# CONFIG_MFD_AXP20X_I2C is not set
--# CONFIG_MFD_AXP20X is not set
-+CONFIG_MFD_AXP20X_I2C=y
-+CONFIG_MFD_AXP20X=y
- # CONFIG_MFD_BCM590XX is not set
- CONFIG_MFD_CORE=y
- # CONFIG_MFD_CPCAP is not set
-@@ -4674,7 +4687,7 @@ CONFIG_SH_ETH=m
- # CONFIG_SIGMA is not set
- CONFIG_SIGMATEL_FIR=m
- CONFIG_SIGNED_PE_FILE_VERIFICATION=y
--# CONFIG_SILEAD_DMI is not set
-+CONFIG_SILEAD_DMI=y
- CONFIG_SIS190=m
- CONFIG_SIS900=m
- # CONFIG_SKFP is not set
-@@ -5709,7 +5722,7 @@ CONFIG_USB_WDM=m
- CONFIG_USB_WUSB_CBAF=m
- CONFIG_USB_WUSB=m
- CONFIG_USB_XHCI_HCD=y
--# CONFIG_USB_XHCI_PLATFORM is not set
-+CONFIG_USB_XHCI_PLATFORM=m
- CONFIG_USB_XUSBATM=m
- CONFIG_USB=y
- CONFIG_USB_YUREX=m
-diff --git a/kernel.spec b/kernel.spec
-index 3cb67fd1..6d93d2a7 100644
---- a/kernel.spec
-+++ b/kernel.spec
-@@ -2165,6 +2165,11 @@ fi
- #
- #
- %changelog
-+* Wed Jun 14 2017 Hans de Goede <jwrdegoede@fedoraproject.org>
-+- Enable AXP288 PMIC support on x86_64 for battery charging and monitoring
-+  support on Bay and Cherry Trail tablets and laptops
-+- Enable various drivers for peripherals found on Bay and Cherry Trail tablets
-+
- * Mon Jun 12 2017 Justin M. Forbes <jforbes@fedoraproject.org> - 4.12.0-0.rc5.git0.1
- - Linux v4.12-rc5
- - Disable debugging options.
--- 
-2.13.0
-

0001-Input-gpio_keys-Allow-suppression-of-input-events-fo.patch

@@ -1,163 +0,0 @@
-From 25bb14c1e78e641049fd1ee0c404a9ccd2755e44 Mon Sep 17 00:00:00 2001
-From: Hans de Goede <hdegoede@redhat.com>
-Date: Sat, 22 Jul 2017 13:00:05 +0200
-Subject: [PATCH 1/2] Input: gpio_keys - Allow suppression of input events for
- wakeup button presses
-
-In some cases it is undesirable for a wakeup button to send input events
-to userspace if pressed to wakeup the system (if pressed during suspend).
-
-A typical example of this is the power-button on laptops / tablets,
-sending a KEY_POWER event to userspace when woken up with the power-button
-will cause userspace to immediately suspend the system again which is
-undesirable.
-
-For power-buttons attached to a PMIC, or handled by e.g. ACPI, not sending
-an input event in this case is take care of by the PMIC / ACPI hardware /
-code. But in the case of a GPIO button we need to explicitly suppress the
-sending of the input event.
-
-This commit adds support for this by adding a no_wakeup_events bool to
-struct gpio_keys_button, which platform code can set to suppress the
-input events for presses of wakeup keys during suspend.
-
-Signed-off-by: Hans de Goede <hdegoede@redhat.com>
----
-Changes in v2:
--This is a rewrite if my "Input: gpio_keys - Do not report wake button
- presses as evdev events" patch.
--Instead of unconditionally ignoring presses of all wake-up buttons during
- suspend, this rewrite makes this configurable per button
--This version uses a timer to delay clearing the suspended flag for software
- debouncing, rather then jiffy compare magic
----
- drivers/input/keyboard/gpio_keys.c | 33 +++++++++++++++++++++++++++++++--
- include/linux/gpio_keys.h          |  3 +++
- 2 files changed, 34 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c
-index a047b9af8369..fa3a58620407 100644
---- a/drivers/input/keyboard/gpio_keys.c
-+++ b/drivers/input/keyboard/gpio_keys.c
-@@ -38,6 +38,7 @@ struct gpio_button_data {
- 
- 	unsigned short *code;
- 
-+	struct timer_list unsuspend_timer;
- 	struct timer_list release_timer;
- 	unsigned int release_delay;	/* in msecs, for IRQ-only buttons */
- 
-@@ -371,6 +372,9 @@ static void gpio_keys_gpio_report_event(struct gpio_button_data *bdata)
- 		return;
- 	}
- 
-+	if (state && bdata->button->no_wakeup_events && bdata->suspended)
-+		return;
-+
- 	if (type == EV_ABS) {
- 		if (state)
- 			input_event(input, type, button->code, button->value);
-@@ -400,6 +404,9 @@ static irqreturn_t gpio_keys_gpio_isr(int irq, void *dev_id)
- 	if (bdata->button->wakeup) {
- 		const struct gpio_keys_button *button = bdata->button;
- 
-+		if (bdata->button->no_wakeup_events && bdata->suspended)
-+			return IRQ_HANDLED;
-+
- 		pm_stay_awake(bdata->input->dev.parent);
- 		if (bdata->suspended  &&
- 		    (button->type == 0 || button->type == EV_KEY)) {
-@@ -445,9 +452,13 @@ static irqreturn_t gpio_keys_irq_isr(int irq, void *dev_id)
- 	spin_lock_irqsave(&bdata->lock, flags);
- 
- 	if (!bdata->key_pressed) {
--		if (bdata->button->wakeup)
-+		if (bdata->button->wakeup) {
- 			pm_wakeup_event(bdata->input->dev.parent, 0);
- 
-+			if (bdata->button->no_wakeup_events && bdata->suspended)
-+				goto out;
-+		}
-+
- 		input_event(input, EV_KEY, *bdata->code, 1);
- 		input_sync(input);
- 
-@@ -468,6 +479,13 @@ static irqreturn_t gpio_keys_irq_isr(int irq, void *dev_id)
- 	return IRQ_HANDLED;
- }
- 
-+static void gpio_keys_unsuspend_timer(unsigned long _data)
-+{
-+	struct gpio_button_data *bdata = (struct gpio_button_data *)_data;
-+
-+	bdata->suspended = false;
-+}
-+
- static void gpio_keys_quiesce_key(void *data)
- {
- 	struct gpio_button_data *bdata = data;
-@@ -476,6 +494,8 @@ static void gpio_keys_quiesce_key(void *data)
- 		cancel_delayed_work_sync(&bdata->work);
- 	else
- 		del_timer_sync(&bdata->release_timer);
-+
-+	del_timer_sync(&bdata->unsuspend_timer);
- }
- 
- static int gpio_keys_setup_key(struct platform_device *pdev,
-@@ -496,6 +516,8 @@ static int gpio_keys_setup_key(struct platform_device *pdev,
- 	bdata->input = input;
- 	bdata->button = button;
- 	spin_lock_init(&bdata->lock);
-+	setup_timer(&bdata->unsuspend_timer, gpio_keys_unsuspend_timer,
-+		    (unsigned long)bdata);
- 
- 	if (child) {
- 		bdata->gpiod = devm_fwnode_get_gpiod_from_child(dev, NULL,
-@@ -868,6 +890,7 @@ static int __maybe_unused gpio_keys_suspend(struct device *dev)
- 			struct gpio_button_data *bdata = &ddata->data[i];
- 			if (bdata->button->wakeup)
- 				enable_irq_wake(bdata->irq);
-+			del_timer_sync(&bdata->unsuspend_timer);
- 			bdata->suspended = true;
- 		}
- 	} else {
-@@ -892,7 +915,13 @@ static int __maybe_unused gpio_keys_resume(struct device *dev)
- 			struct gpio_button_data *bdata = &ddata->data[i];
- 			if (bdata->button->wakeup)
- 				disable_irq_wake(bdata->irq);
--			bdata->suspended = false;
-+			if (bdata->button->no_wakeup_events) {
-+				mod_timer(&bdata->unsuspend_timer, jiffies +
-+					  msecs_to_jiffies(
-+						    bdata->software_debounce));
-+			} else {
-+				bdata->suspended = false;
-+			}
- 		}
- 	} else {
- 		mutex_lock(&input->mutex);
-diff --git a/include/linux/gpio_keys.h b/include/linux/gpio_keys.h
-index 0b71024c082c..d8a85e52b6bb 100644
---- a/include/linux/gpio_keys.h
-+++ b/include/linux/gpio_keys.h
-@@ -15,6 +15,8 @@ struct device;
-  * @debounce_interval:	debounce ticks interval in msecs
-  * @can_disable:	%true indicates that userspace is allowed to
-  *			disable button via sysfs
-+ * @no_wakeup_events:	For wake-up source buttons only, if %true then no input
-+ *			events will be generated if pressed while suspended
-  * @value:		axis value for %EV_ABS
-  * @irq:		Irq number in case of interrupt keys
-  */
-@@ -27,6 +29,7 @@ struct gpio_keys_button {
- 	int wakeup;
- 	int debounce_interval;
- 	bool can_disable;
-+	bool no_wakeup_events;
- 	int value;
- 	unsigned int irq;
- };
--- 
-2.13.4
-

0001-Make-get_cert_list-not-complain-about-cert-lists-tha.patch

@@ -0,0 +1,109 @@
+From 3ce5852ec6add45a28fe1706e9163351940e905c Mon Sep 17 00:00:00 2001
+From: Peter Jones <pjones@redhat.com>
+Date: Mon, 2 Oct 2017 18:25:29 -0400
+Subject: [PATCH 1/3] Make get_cert_list() not complain about cert lists that
+ aren't present.
+
+Signed-off-by: Peter Jones <pjones@redhat.com>
+---
+ certs/load_uefi.c | 37 ++++++++++++++++++++++---------------
+ 1 file changed, 22 insertions(+), 15 deletions(-)
+
+diff --git a/certs/load_uefi.c b/certs/load_uefi.c
+index 3d884598601..9ef34c44fd1 100644
+--- a/certs/load_uefi.c
++++ b/certs/load_uefi.c
+@@ -35,8 +35,8 @@ static __init bool uefi_check_ignore_db(void)
+ /*
+  * Get a certificate list blob from the named EFI variable.
+  */
+-static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid,
+-				  unsigned long *size)
++static __init int get_cert_list(efi_char16_t *name, efi_guid_t *guid,
++				unsigned long *size, void **cert_list)
+ {
+ 	efi_status_t status;
+ 	unsigned long lsize = 4;
+@@ -44,26 +44,33 @@ static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid,
+ 	void *db;
+ 
+ 	status = efi.get_variable(name, guid, NULL, &lsize, &tmpdb);
++	if (status == EFI_NOT_FOUND) {
++		*size = 0;
++		*cert_list = NULL;
++		return 0;
++	}
++
+ 	if (status != EFI_BUFFER_TOO_SMALL) {
+ 		pr_err("Couldn't get size: 0x%lx\n", status);
+-		return NULL;
++		return efi_status_to_err(status);
+ 	}
+ 
+ 	db = kmalloc(lsize, GFP_KERNEL);
+ 	if (!db) {
+ 		pr_err("Couldn't allocate memory for uefi cert list\n");
+-		return NULL;
++		return -ENOMEM;
+ 	}
+ 
+ 	status = efi.get_variable(name, guid, NULL, &lsize, db);
+ 	if (status != EFI_SUCCESS) {
+ 		kfree(db);
+ 		pr_err("Error reading db var: 0x%lx\n", status);
+-		return NULL;
++		return efi_status_to_err(status);
+ 	}
+ 
+ 	*size = lsize;
+-	return db;
++	*cert_list = db;
++	return 0;
+ }
+ 
+ /*
+@@ -152,10 +159,10 @@ static int __init load_uefi_certs(void)
+ 	 * an error if we can't get them.
+ 	 */
+ 	if (!uefi_check_ignore_db()) {
+-		db = get_cert_list(L"db", &secure_var, &dbsize);
+-		if (!db) {
++		rc = get_cert_list(L"db", &secure_var, &dbsize, &db);
++		if (rc < 0) {
+ 			pr_err("MODSIGN: Couldn't get UEFI db list\n");
+-		} else {
++		} else if (dbsize != 0) {
+ 			rc = parse_efi_signature_list("UEFI:db",
+ 						      db, dbsize, get_handler_for_db);
+ 			if (rc)
+@@ -164,10 +171,10 @@ static int __init load_uefi_certs(void)
+ 		}
+ 	}
+ 
+-	mok = get_cert_list(L"MokListRT", &mok_var, &moksize);
+-	if (!mok) {
++	rc = get_cert_list(L"MokListRT", &mok_var, &moksize, &mok);
++	if (rc < 0) {
+ 		pr_info("MODSIGN: Couldn't get UEFI MokListRT\n");
+-	} else {
++	} else if (moksize != 0) {
+ 		rc = parse_efi_signature_list("UEFI:MokListRT",
+ 					      mok, moksize, get_handler_for_db);
+ 		if (rc)
+@@ -175,10 +182,10 @@ static int __init load_uefi_certs(void)
+ 		kfree(mok);
+ 	}
+ 
+-	dbx = get_cert_list(L"dbx", &secure_var, &dbxsize);
+-	if (!dbx) {
++	rc = get_cert_list(L"dbx", &secure_var, &dbxsize, &dbx);
++	if (rc < 0) {
+ 		pr_info("MODSIGN: Couldn't get UEFI dbx list\n");
+-	} else {
++	} else if (dbxsize != 0) {
+ 		rc = parse_efi_signature_list("UEFI:dbx",
+ 					      dbx, dbxsize,
+ 					      get_handler_for_dbx);
+-- 
+2.15.0
+

0001-power-supply-max17042_battery-Add-support-for-ACPI-e.patch

@@ -1,78 +0,0 @@
-From 075bb90dbb4d894938c5859e3850987238db9cd8 Mon Sep 17 00:00:00 2001
-From: Hans de Goede <hdegoede@redhat.com>
-Date: Fri, 11 Aug 2017 22:30:55 +0200
-Subject: [PATCH 1/2] power: supply: max17042_battery: Add support for ACPI
- enumeration
-
-Some x86 devices enumerate a max17047 fuel-gauge through a MAX17047
-ACPI firmware-node, add support for this.
-
-Signed-off-by: Hans de Goede <hdegoede@redhat.com>
----
- drivers/power/supply/max17042_battery.c | 22 +++++++++++++++++++++-
- 1 file changed, 21 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/power/supply/max17042_battery.c b/drivers/power/supply/max17042_battery.c
-index aecaaa2b0586..b2ddb7eb69c6 100644
---- a/drivers/power/supply/max17042_battery.c
-+++ b/drivers/power/supply/max17042_battery.c
-@@ -22,6 +22,7 @@
-  * This driver is based on max17040_battery.c
-  */
- 
-+#include <linux/acpi.h>
- #include <linux/init.h>
- #include <linux/module.h>
- #include <linux/slab.h>
-@@ -982,6 +983,8 @@ static int max17042_probe(struct i2c_client *client,
- 	struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
- 	const struct power_supply_desc *max17042_desc = &max17042_psy_desc;
- 	struct power_supply_config psy_cfg = {};
-+	const struct acpi_device_id *acpi_id;
-+	struct device *dev = &client->dev;
- 	struct max17042_chip *chip;
- 	int ret;
- 	int i;
-@@ -995,7 +998,15 @@ static int max17042_probe(struct i2c_client *client,
- 		return -ENOMEM;
- 
- 	chip->client = client;
--	chip->chip_type = id->driver_data;
-+	if (id) {
-+		chip->chip_type = id->driver_data;
-+	} else {
-+		acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
-+		if (!acpi_id)
-+			return -ENODEV;
-+
-+		chip->chip_type = acpi_id->driver_data;
-+	}
- 	chip->regmap = devm_regmap_init_i2c(client, &max17042_regmap_config);
- 	if (IS_ERR(chip->regmap)) {
- 		dev_err(&client->dev, "Failed to initialize regmap\n");
-@@ -1104,6 +1115,14 @@ static int max17042_resume(struct device *dev)
- static SIMPLE_DEV_PM_OPS(max17042_pm_ops, max17042_suspend,
- 			max17042_resume);
- 
-+#ifdef CONFIG_ACPI
-+static const struct acpi_device_id max17042_acpi_match[] = {
-+	{ "MAX17047", MAXIM_DEVICE_TYPE_MAX17047 },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(acpi, max17042_acpi_match);
-+#endif
-+
- #ifdef CONFIG_OF
- static const struct of_device_id max17042_dt_match[] = {
- 	{ .compatible = "maxim,max17042" },
-@@ -1125,6 +1144,7 @@ MODULE_DEVICE_TABLE(i2c, max17042_id);
- static struct i2c_driver max17042_i2c_driver = {
- 	.driver	= {
- 		.name	= "max17042",
-+		.acpi_match_table = ACPI_PTR(max17042_acpi_match),
- 		.of_match_table = of_match_ptr(max17042_dt_match),
- 		.pm	= &max17042_pm_ops,
- 	},
--- 
-2.13.4
-

0001-random-add-a-config-option-to-trust-the-CPU-s-hwrng.patch

@@ -0,0 +1,78 @@
+From 39a8883a2b989d1d21bd8dd99f5557f0c5e89694 Mon Sep 17 00:00:00 2001
+From: Theodore Ts'o <tytso@mit.edu>
+Date: Tue, 17 Jul 2018 18:24:27 -0400
+Subject: [PATCH] random: add a config option to trust the CPU's hwrng
+
+This gives the user building their own kernel (or a Linux
+distribution) the option of deciding whether or not to trust the CPU's
+hardware random number generator (e.g., RDRAND for x86 CPU's) as being
+correctly implemented and not having a back door introduced (perhaps
+courtesy of a Nation State's law enforcement or intelligence
+agencies).
+
+This will prevent getrandom(2) from blocking, if there is a
+willingness to trust the CPU manufacturer.
+
+Signed-off-by: Theodore Ts'o <tytso@mit.edu>
+---
+ drivers/char/Kconfig  | 14 ++++++++++++++
+ drivers/char/random.c | 11 ++++++++++-
+ 2 files changed, 24 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
+index 212f447938ae..ce277ee0a28a 100644
+--- a/drivers/char/Kconfig
++++ b/drivers/char/Kconfig
+@@ -554,3 +554,17 @@ config ADI
+ 
+ endmenu
+ 
++config RANDOM_TRUST_CPU
++	bool "Trust the CPU manufacturer to initialize Linux's CRNG"
++	depends on X86 || S390 || PPC
++	default n
++	help
++	Assume that CPU manufacturer (e.g., Intel or AMD for RDSEED or
++	RDRAND, IBM for the S390 and Power PC architectures) is trustworthy
++	for the purposes of initializing Linux's CRNG.  Since this is not
++	something that can be independently audited, this amounts to trusting
++	that CPU manufacturer (perhaps with the insistence or mandate
++	of a Nation State's intelligence or law enforcement agencies)
++	has not installed a hidden back door to compromise the CPU's
++	random number generation facilities.
++
+diff --git a/drivers/char/random.c b/drivers/char/random.c
+index 34ddfd57419b..f4013b8a711b 100644
+--- a/drivers/char/random.c
++++ b/drivers/char/random.c
+@@ -782,6 +782,7 @@ static void invalidate_batched_entropy(void);
+ static void crng_initialize(struct crng_state *crng)
+ {
+ 	int		i;
++	int		arch_init = 1;
+ 	unsigned long	rv;
+ 
+ 	memcpy(&crng->state[0], "expand 32-byte k", 16);
+@@ -792,10 +793,18 @@ static void crng_initialize(struct crng_state *crng)
+ 		_get_random_bytes(&crng->state[4], sizeof(__u32) * 12);
+ 	for (i = 4; i < 16; i++) {
+ 		if (!arch_get_random_seed_long(&rv) &&
+-		    !arch_get_random_long(&rv))
++		    !arch_get_random_long(&rv)) {
+ 			rv = random_get_entropy();
++			arch_init = 0;
++		}
+ 		crng->state[i] ^= rv;
+ 	}
++#ifdef CONFIG_RANDOM_TRUST_CPU
++	if (arch_init) {
++		crng_init = 2;
++		pr_notice("random: crng done (trusting CPU's manufacturer)\n");
++	}
++#endif
+ 	crng->init_time = jiffies - CRNG_RESEED_INTERVAL - 1;
+ }
+ 
+-- 
+2.17.1
+

0001-random-make-CPU-trust-a-boot-parameter.patch

@@ -0,0 +1,82 @@
+From 9b25436662d5fb4c66eb527ead53cab15f596ee0 Mon Sep 17 00:00:00 2001
+From: Kees Cook <keescook@chromium.org>
+Date: Mon, 27 Aug 2018 14:51:54 -0700
+Subject: [PATCH] random: make CPU trust a boot parameter
+
+Instead of forcing a distro or other system builder to choose
+at build time whether the CPU is trusted for CRNG seeding via
+CONFIG_RANDOM_TRUST_CPU, provide a boot-time parameter for end users to
+control the choice. The CONFIG will set the default state instead.
+
+Signed-off-by: Kees Cook <keescook@chromium.org>
+Signed-off-by: Theodore Ts'o <tytso@mit.edu>
+---
+ Documentation/admin-guide/kernel-parameters.txt |  6 ++++++
+ drivers/char/Kconfig                            |  4 ++--
+ drivers/char/random.c                           | 11 ++++++++---
+ 3 files changed, 16 insertions(+), 5 deletions(-)
+
+diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
+index 0c8f7889efa1..227c5c6fa4c1 100644
+--- a/Documentation/admin-guide/kernel-parameters.txt
++++ b/Documentation/admin-guide/kernel-parameters.txt
+@@ -3390,6 +3390,12 @@
+ 	ramdisk_size=	[RAM] Sizes of RAM disks in kilobytes
+ 			See Documentation/blockdev/ramdisk.txt.
+ 
++	random.trust_cpu={on,off}
++			[KNL] Enable or disable trusting the use of the
++			CPU's random number generator (if available) to
++			fully seed the kernel's CRNG. Default is controlled
++			by CONFIG_RANDOM_TRUST_CPU.
++
+ 	ras=option[,option,...]	[KNL] RAS-specific options
+ 
+ 		cec_disable	[X86]
+diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
+index ce277ee0a28a..40728491f37b 100644
+--- a/drivers/char/Kconfig
++++ b/drivers/char/Kconfig
+@@ -566,5 +566,5 @@ config RANDOM_TRUST_CPU
+ 	that CPU manufacturer (perhaps with the insistence or mandate
+ 	of a Nation State's intelligence or law enforcement agencies)
+ 	has not installed a hidden back door to compromise the CPU's
+-	random number generation facilities.
+-
++	random number generation facilities. This can also be configured
++	at boot with "random.trust_cpu=on/off".
+diff --git a/drivers/char/random.c b/drivers/char/random.c
+index bf5f99fc36f1..c75b6cdf0053 100644
+--- a/drivers/char/random.c
++++ b/drivers/char/random.c
+@@ -779,6 +779,13 @@ static struct crng_state **crng_node_pool __read_mostly;
+ 
+ static void invalidate_batched_entropy(void);
+ 
++static bool trust_cpu __ro_after_init = IS_ENABLED(CONFIG_RANDOM_TRUST_CPU);
++static int __init parse_trust_cpu(char *arg)
++{
++	return kstrtobool(arg, &trust_cpu);
++}
++early_param("random.trust_cpu", parse_trust_cpu);
++
+ static void crng_initialize(struct crng_state *crng)
+ {
+ 	int		i;
+@@ -799,12 +806,10 @@ static void crng_initialize(struct crng_state *crng)
+ 		}
+ 		crng->state[i] ^= rv;
+ 	}
+-#ifdef CONFIG_RANDOM_TRUST_CPU
+-	if (arch_init) {
++	if (trust_cpu && arch_init) {
+ 		crng_init = 2;
+ 		pr_notice("random: crng done (trusting CPU's manufacturer)\n");
+ 	}
+-#endif
+ 	crng->init_time = jiffies - CRNG_RESEED_INTERVAL - 1;
+ }
+ 
+-- 
+2.17.1
+

0002-Add-efi_status_to_str-and-rework-efi_status_to_err.patch

@@ -0,0 +1,183 @@
+From c8218e9b3c38fcd36a2d06eec09952a0c6cee9e0 Mon Sep 17 00:00:00 2001
+From: Peter Jones <pjones@redhat.com>
+Date: Mon, 2 Oct 2017 18:22:13 -0400
+Subject: [PATCH 2/3] Add efi_status_to_str() and rework efi_status_to_err().
+
+This adds efi_status_to_str() for use when printing efi_status_t
+messages, and reworks efi_status_to_err() so that the two use a common
+list of errors.
+
+Signed-off-by: Peter Jones <pjones@redhat.com>
+---
+ include/linux/efi.h        |   3 ++
+ drivers/firmware/efi/efi.c | 122 ++++++++++++++++++++++++++++++++++-----------
+ 2 files changed, 95 insertions(+), 30 deletions(-)
+
+diff --git a/include/linux/efi.h b/include/linux/efi.h
+index 18b16bf5ce1..436b3c93c3d 100644
+--- a/include/linux/efi.h
++++ b/include/linux/efi.h
+@@ -42,6 +42,8 @@
+ #define EFI_ABORTED		(21 | (1UL << (BITS_PER_LONG-1)))
+ #define EFI_SECURITY_VIOLATION	(26 | (1UL << (BITS_PER_LONG-1)))
+ 
++#define EFI_IS_ERROR(x)		((x) & (1UL << (BITS_PER_LONG-1)))
++
+ typedef unsigned long efi_status_t;
+ typedef u8 efi_bool_t;
+ typedef u16 efi_char16_t;		/* UNICODE character */
+@@ -1183,6 +1185,7 @@ static inline void efi_set_secure_boot(enum efi_secureboot_mode mode) {}
+ #endif
+ 
+ extern int efi_status_to_err(efi_status_t status);
++extern const char *efi_status_to_str(efi_status_t status);
+ 
+ /*
+  * Variable Attributes
+diff --git a/drivers/firmware/efi/efi.c b/drivers/firmware/efi/efi.c
+index 557a47829d0..e8f9c7d84e9 100644
+--- a/drivers/firmware/efi/efi.c
++++ b/drivers/firmware/efi/efi.c
+@@ -31,6 +31,7 @@
+ #include <linux/acpi.h>
+ #include <linux/ucs2_string.h>
+ #include <linux/memblock.h>
++#include <linux/bsearch.h>
+ 
+ #include <asm/early_ioremap.h>
+ 
+@@ -865,40 +866,101 @@ int efi_mem_type(unsigned long phys_addr)
+ }
+ #endif
+ 
++struct efi_error_code {
++	efi_status_t status;
++	int errno;
++	const char *description;
++};
++
++static const struct efi_error_code efi_error_codes[] = {
++	{ EFI_SUCCESS, 0, "Success"},
++#if 0
++	{ EFI_LOAD_ERROR, -EPICK_AN_ERRNO, "Load Error"},
++#endif
++	{ EFI_INVALID_PARAMETER, -EINVAL, "Invalid Parameter"},
++	{ EFI_UNSUPPORTED, -ENOSYS, "Unsupported"},
++	{ EFI_BAD_BUFFER_SIZE, -ENOSPC, "Bad Buffer Size"},
++	{ EFI_BUFFER_TOO_SMALL, -ENOSPC, "Buffer Too Small"},
++	{ EFI_NOT_READY, -EAGAIN, "Not Ready"},
++	{ EFI_DEVICE_ERROR, -EIO, "Device Error"},
++	{ EFI_WRITE_PROTECTED, -EROFS, "Write Protected"},
++	{ EFI_OUT_OF_RESOURCES, -ENOMEM, "Out of Resources"},
++#if 0
++	{ EFI_VOLUME_CORRUPTED, -EPICK_AN_ERRNO, "Volume Corrupt"},
++	{ EFI_VOLUME_FULL, -EPICK_AN_ERRNO, "Volume Full"},
++	{ EFI_NO_MEDIA, -EPICK_AN_ERRNO, "No Media"},
++	{ EFI_MEDIA_CHANGED, -EPICK_AN_ERRNO, "Media changed"},
++#endif
++	{ EFI_NOT_FOUND, -ENOENT, "Not Found"},
++#if 0
++	{ EFI_ACCESS_DENIED, -EPICK_AN_ERRNO, "Access Denied"},
++	{ EFI_NO_RESPONSE, -EPICK_AN_ERRNO, "No Response"},
++	{ EFI_NO_MAPPING, -EPICK_AN_ERRNO, "No mapping"},
++	{ EFI_TIMEOUT, -EPICK_AN_ERRNO, "Time out"},
++	{ EFI_NOT_STARTED, -EPICK_AN_ERRNO, "Not started"},
++	{ EFI_ALREADY_STARTED, -EPICK_AN_ERRNO, "Already started"},
++#endif
++	{ EFI_ABORTED, -EINTR, "Aborted"},
++#if 0
++	{ EFI_ICMP_ERROR, -EPICK_AN_ERRNO, "ICMP Error"},
++	{ EFI_TFTP_ERROR, -EPICK_AN_ERRNO, "TFTP Error"},
++	{ EFI_PROTOCOL_ERROR, -EPICK_AN_ERRNO, "Protocol Error"},
++	{ EFI_INCOMPATIBLE_VERSION, -EPICK_AN_ERRNO, "Incompatible Version"},
++#endif
++	{ EFI_SECURITY_VIOLATION, -EACCES, "Security Policy Violation"},
++#if 0
++	{ EFI_CRC_ERROR, -EPICK_AN_ERRNO, "CRC Error"},
++	{ EFI_END_OF_MEDIA, -EPICK_AN_ERRNO, "End of Media"},
++	{ EFI_END_OF_FILE, -EPICK_AN_ERRNO, "End of File"},
++	{ EFI_INVALID_LANGUAGE, -EPICK_AN_ERRNO, "Invalid Languages"},
++	{ EFI_COMPROMISED_DATA, -EPICK_AN_ERRNO, "Compromised Data"},
++
++	// warnings
++	{ EFI_WARN_UNKOWN_GLYPH, -EPICK_AN_ERRNO, "Warning Unknown Glyph"},
++	{ EFI_WARN_DELETE_FAILURE, -EPICK_AN_ERRNO, "Warning Delete Failure"},
++	{ EFI_WARN_WRITE_FAILURE, -EPICK_AN_ERRNO, "Warning Write Failure"},
++	{ EFI_WARN_BUFFER_TOO_SMALL, -EPICK_AN_ERRNO, "Warning Buffer Too Small"},
++#endif
++};
++
++static int
++efi_status_cmp_bsearch(const void *key, const void *item)
++{
++	u64 status = (u64)(uintptr_t)key;
++	struct efi_error_code *code = (struct efi_error_code *)item;
++
++	if (status < code->status)
++		return -1;
++	if (status > code->status)
++		return 1;
++	return 0;
++}
++
+ int efi_status_to_err(efi_status_t status)
+ {
+-	int err;
++	struct efi_error_code *found;
++	size_t num = sizeof(efi_error_codes) / sizeof(struct efi_error_code);
+ 
+-	switch (status) {
+-	case EFI_SUCCESS:
+-		err = 0;
+-		break;
+-	case EFI_INVALID_PARAMETER:
+-		err = -EINVAL;
+-		break;
+-	case EFI_OUT_OF_RESOURCES:
+-		err = -ENOSPC;
+-		break;
+-	case EFI_DEVICE_ERROR:
+-		err = -EIO;
+-		break;
+-	case EFI_WRITE_PROTECTED:
+-		err = -EROFS;
+-		break;
+-	case EFI_SECURITY_VIOLATION:
+-		err = -EACCES;
+-		break;
+-	case EFI_NOT_FOUND:
+-		err = -ENOENT;
+-		break;
+-	case EFI_ABORTED:
+-		err = -EINTR;
+-		break;
+-	default:
+-		err = -EINVAL;
+-	}
++	found = bsearch((void *)(uintptr_t)status, efi_error_codes,
++			sizeof(struct efi_error_code), num,
++			efi_status_cmp_bsearch);
++	if (!found)
++		return -EINVAL;
++	return found->errno;
++}
+ 
+-	return err;
++const char *
++efi_status_to_str(efi_status_t status)
++{
++	struct efi_error_code *found;
++	size_t num = sizeof(efi_error_codes) / sizeof(struct efi_error_code);
++
++	found = bsearch((void *)(uintptr_t)status, efi_error_codes,
++			sizeof(struct efi_error_code), num,
++			efi_status_cmp_bsearch);
++	if (!found)
++		return "Unknown error code";
++	return found->description;
+ }
+ 
+ bool efi_is_table_address(unsigned long phys_addr)
+-- 
+2.15.0
+

0002-Input-soc_button_array-Suppress-power-button-presses.patch

@@ -1,62 +0,0 @@
-From d561f0543506bc12e7b3355efddb0bfd7ca83c74 Mon Sep 17 00:00:00 2001
-From: Hans de Goede <hdegoede@redhat.com>
-Date: Sat, 22 Jul 2017 13:17:36 +0200
-Subject: [PATCH 2/2] Input: soc_button_array - Suppress power button presses
- during suspend
-
-If the power-button is pressed to wakeup the laptop/tablet from suspend
-and we report a KEY_POWER event to userspace when woken up this will cause
-userspace to immediately suspend the system again which is undesirable.
-
-This commit sets the new no_wakeup_events flag in the gpio_keys_button
-struct for the power-button suppressing the undesirable KEY_POWER input
-events on wake-up.
-
-Signed-off-by: Hans de Goede <hdegoede@redhat.com>
----
-Changes in v2:
--New patch in v2 of this patch-set
----
- drivers/input/misc/soc_button_array.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/input/misc/soc_button_array.c b/drivers/input/misc/soc_button_array.c
-index f600f3a7a3c6..27b99831cb97 100644
---- a/drivers/input/misc/soc_button_array.c
-+++ b/drivers/input/misc/soc_button_array.c
-@@ -27,6 +27,7 @@ struct soc_button_info {
- 	unsigned int event_code;
- 	bool autorepeat;
- 	bool wakeup;
-+	bool no_wakeup_events;
- };
- 
- /*
-@@ -100,6 +101,7 @@ soc_button_device_create(struct platform_device *pdev,
- 		gpio_keys[n_buttons].active_low = 1;
- 		gpio_keys[n_buttons].desc = info->name;
- 		gpio_keys[n_buttons].wakeup = info->wakeup;
-+		gpio_keys[n_buttons].no_wakeup_events = info->no_wakeup_events;
- 		/* These devices often use cheap buttons, use 50 ms debounce */
- 		gpio_keys[n_buttons].debounce_interval = 50;
- 		n_buttons++;
-@@ -185,6 +187,7 @@ static int soc_button_parse_btn_desc(struct device *dev,
- 		info->name = "power";
- 		info->event_code = KEY_POWER;
- 		info->wakeup = true;
-+		info->no_wakeup_events = true;
- 	} else if (upage == 0x07 && usage == 0xe3) {
- 		info->name = "home";
- 		info->event_code = KEY_LEFTMETA;
-@@ -369,7 +372,7 @@ static int soc_button_probe(struct platform_device *pdev)
-  * Platforms"
-  */
- static struct soc_button_info soc_button_PNP0C40[] = {
--	{ "power", 0, EV_KEY, KEY_POWER, false, true },
-+	{ "power", 0, EV_KEY, KEY_POWER, false, true, true },
- 	{ "home", 1, EV_KEY, KEY_LEFTMETA, false, true },
- 	{ "volume_up", 2, EV_KEY, KEY_VOLUMEUP, true, false },
- 	{ "volume_down", 3, EV_KEY, KEY_VOLUMEDOWN, true, false },
--- 
-2.13.4
-

0002-power-supply-max17042_battery-Fix-ACPI-interrupt-iss.patch

@@ -1,80 +0,0 @@
-From 27b9d46d25c873b351757c44ce523bf0ede1d08e Mon Sep 17 00:00:00 2001
-From: Hans de Goede <hdegoede@redhat.com>
-Date: Mon, 14 Aug 2017 11:02:59 +0200
-Subject: [PATCH 2/2] power: supply: max17042_battery: Fix ACPI interrupt
- issues
-
-On some x86/ACPI boards the DSDT defines an ACPI event handler for
-the max17047 IRQ, this causes several problems:
-
-1) We need to share the IRQ to avoid an error getting it
-
-2) Even of we are willing to share, we may fail to share because some
-   DSDTs claim it exclusivly
-
-3) If we are unable to share the IRQ, or the IRQ is only listed as an
-   ACPI event source and not in the max1704 firmware node, then the
-   charge threshold IRQ (which is used to give an IRQ every 1 percent
-   charge change) becomes a problem, the ACPI event handler will not
-   update this to the next 1 percent threshold, so the IRQ keeps firing
-   and we get an IRQ storm pegging 1 CPU core.
-
-   This happens despite the max17042 driver not setting the charge
-   threshold because Windows uses it and leaves it set on reboot.
-
-   So if we are unable to get the IRQ we need to reprogram the
-   charge threshold to its disabled setting.
-
-This commit fixes al of the above, while at it it also makes the error
-msg when being unable to get the IRQ consistent with other messages.
-
-Signed-off-by: Hans de Goede <hdegoede@redhat.com>
----
- drivers/power/supply/max17042_battery.c | 20 +++++++++++++++-----
- 1 file changed, 15 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/power/supply/max17042_battery.c b/drivers/power/supply/max17042_battery.c
-index b2ddb7eb69c6..18a44e4ed6ff 100644
---- a/drivers/power/supply/max17042_battery.c
-+++ b/drivers/power/supply/max17042_battery.c
-@@ -1050,11 +1050,18 @@ static int max17042_probe(struct i2c_client *client,
- 	}
- 
- 	if (client->irq) {
-+		unsigned int flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT;
-+
-+		/*
-+		 * On ACPI systems the IRQ may be handled by ACPI-event code,
-+		 * so we need to share (if the ACPI code is willing to share).
-+		 */
-+		if (acpi_id)
-+			flags |= IRQF_SHARED | IRQF_PROBE_SHARED;
-+
- 		ret = devm_request_threaded_irq(&client->dev, client->irq,
- 						NULL,
--						max17042_thread_handler,
--						IRQF_TRIGGER_FALLING |
--						IRQF_ONESHOT,
-+						max17042_thread_handler, flags,
- 						chip->battery->desc->name,
- 						chip);
- 		if (!ret) {
-@@ -1064,10 +1071,13 @@ static int max17042_probe(struct i2c_client *client,
- 			max17042_set_soc_threshold(chip, 1);
- 		} else {
- 			client->irq = 0;
--			dev_err(&client->dev, "%s(): cannot get IRQ\n",
--				__func__);
-+			if (ret != -EBUSY)
-+				dev_err(&client->dev, "Failed to get IRQ\n");
- 		}
- 	}
-+	/* Not able to update the charge threshold when exceeded? -> disable */
-+	if (!client->irq)
-+		regmap_write(chip->regmap, MAX17042_SALRT_Th, 0xff00);
- 
- 	regmap_read(chip->regmap, MAX17042_STATUS, &val);
- 	if (val & STATUS_POR_BIT) {
--- 
-2.13.4
-

0003-Make-get_cert_list-use-efi_status_to_str-to-print-er.patch

@@ -0,0 +1,38 @@
+From 520e902d864930e2d4f329983d9ae9781a24231f Mon Sep 17 00:00:00 2001
+From: Peter Jones <pjones@redhat.com>
+Date: Mon, 2 Oct 2017 18:18:30 -0400
+Subject: [PATCH 3/3] Make get_cert_list() use efi_status_to_str() to print
+ error messages.
+
+Signed-off-by: Peter Jones <pjones@redhat.com>
+---
+ certs/load_uefi.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/certs/load_uefi.c b/certs/load_uefi.c
+index 9ef34c44fd1..13a2826715d 100644
+--- a/certs/load_uefi.c
++++ b/certs/load_uefi.c
+@@ -51,7 +51,8 @@ static __init int get_cert_list(efi_char16_t *name, efi_guid_t *guid,
+ 	}
+ 
+ 	if (status != EFI_BUFFER_TOO_SMALL) {
+-		pr_err("Couldn't get size: 0x%lx\n", status);
++		pr_err("Couldn't get size: %s (0x%lx)\n",
++		       efi_status_to_str(status), status);
+ 		return efi_status_to_err(status);
+ 	}
+ 
+@@ -64,7 +65,8 @@ static __init int get_cert_list(efi_char16_t *name, efi_guid_t *guid,
+ 	status = efi.get_variable(name, guid, NULL, &lsize, db);
+ 	if (status != EFI_SUCCESS) {
+ 		kfree(db);
+-		pr_err("Error reading db var: 0x%lx\n", status);
++		pr_err("Error reading db var: %s (0x%lx)\n",
++		       efi_status_to_str(status), status);
+ 		return efi_status_to_err(status);
+ 	}
+ 
+-- 
+2.15.0
+

0010-Input-silead-Add-support-for-capactive-home-button-f.patch

@@ -1,114 +0,0 @@
-From 33fc16fd8aa3684e19b1d1f0a712593e2e570ab1 Mon Sep 17 00:00:00 2001
-From: Hans de Goede <hdegoede@redhat.com>
-Date: Sun, 11 Jun 2017 21:24:50 +0200
-Subject: [PATCH 10/16] Input: silead: Add support for capactive home button
- found on some x86 tablets
-
-On some x86 tablets with a silead touchscreen the windows logo on the
-front is a capacitive home button. Touching this button results in a touch
-with bits 12-15 of the Y coordinates set, while normally only the lower 12
-are used.
-
-Detect this and report a KEY_LEFTMETA press when this happens. Note for
-now we only respond to the Y coordinate bits 12-15 containing 0x01, on some
-tablets *without* a capacative button I've noticed these bits containing
-0x04 when crossing the edges of the screen.
-
-Signed-off-by: Hans de Goede <hdegoede@redhat.com>
----
- drivers/input/touchscreen/silead.c | 45 ++++++++++++++++++++++++++++----------
- 1 file changed, 34 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/input/touchscreen/silead.c b/drivers/input/touchscreen/silead.c
-index 0dbcf105f7db..c0ba40c09699 100644
---- a/drivers/input/touchscreen/silead.c
-+++ b/drivers/input/touchscreen/silead.c
-@@ -56,7 +56,7 @@
- #define SILEAD_POINT_Y_MSB_OFF	0x01
- #define SILEAD_POINT_X_OFF	0x02
- #define SILEAD_POINT_X_MSB_OFF	0x03
--#define SILEAD_TOUCH_ID_MASK	0xF0
-+#define SILEAD_EXTRA_DATA_MASK	0xF0
- 
- #define SILEAD_CMD_SLEEP_MIN	10000
- #define SILEAD_CMD_SLEEP_MAX	20000
-@@ -109,6 +109,8 @@ static int silead_ts_request_input_dev(struct silead_ts_data *data)
- 			    INPUT_MT_DIRECT | INPUT_MT_DROP_UNUSED |
- 			    INPUT_MT_TRACK);
- 
-+	input_set_capability(data->input, EV_KEY, KEY_LEFTMETA);
-+
- 	data->input->name = SILEAD_TS_NAME;
- 	data->input->phys = "input/ts";
- 	data->input->id.bustype = BUS_I2C;
-@@ -139,7 +141,8 @@ static void silead_ts_read_data(struct i2c_client *client)
- 	struct input_dev *input = data->input;
- 	struct device *dev = &client->dev;
- 	u8 *bufp, buf[SILEAD_TS_DATA_LEN];
--	int touch_nr, error, i;
-+	int touch_nr, softbutton, error, i;
-+	bool softbutton_pressed = false;
- 
- 	error = i2c_smbus_read_i2c_block_data(client, SILEAD_REG_DATA,
- 					      SILEAD_TS_DATA_LEN, buf);
-@@ -148,21 +151,40 @@ static void silead_ts_read_data(struct i2c_client *client)
- 		return;
- 	}
- 
--	touch_nr = buf[0];
--	if (touch_nr > data->max_fingers) {
-+	if (buf[0] > data->max_fingers) {
- 		dev_warn(dev, "More touches reported then supported %d > %d\n",
--			 touch_nr, data->max_fingers);
--		touch_nr = data->max_fingers;
-+			 buf[0], data->max_fingers);
-+		buf[0] = data->max_fingers;
- 	}
- 
-+	touch_nr = 0;
- 	bufp = buf + SILEAD_POINT_DATA_LEN;
--	for (i = 0; i < touch_nr; i++, bufp += SILEAD_POINT_DATA_LEN) {
--		/* Bits 4-7 are the touch id */
--		data->id[i] = (bufp[SILEAD_POINT_X_MSB_OFF] &
--			       SILEAD_TOUCH_ID_MASK) >> 4;
--		touchscreen_set_mt_pos(&data->pos[i], &data->prop,
-+	for (i = 0; i < buf[0]; i++, bufp += SILEAD_POINT_DATA_LEN) {
-+		softbutton = (bufp[SILEAD_POINT_Y_MSB_OFF] &
-+			      SILEAD_EXTRA_DATA_MASK) >> 4;
-+
-+		if (softbutton) {
-+			/*
-+			 * For now only respond to softbutton == 0x01, some
-+			 * tablets *without* a capacative button send 0x04
-+			 * when crossing the edges of the screen.
-+			 */
-+			if (softbutton == 0x01)
-+				softbutton_pressed = true;
-+
-+			continue;
-+		}
-+
-+		/*
-+		 * Bits 4-7 are the touch id, note not all models have
-+		 * hardware touch ids so atm we don't use these.
-+		 */
-+		data->id[touch_nr] = (bufp[SILEAD_POINT_X_MSB_OFF] &
-+				      SILEAD_EXTRA_DATA_MASK) >> 4;
-+		touchscreen_set_mt_pos(&data->pos[touch_nr], &data->prop,
- 			get_unaligned_le16(&bufp[SILEAD_POINT_X_OFF]) & 0xfff,
- 			get_unaligned_le16(&bufp[SILEAD_POINT_Y_OFF]) & 0xfff);
-+		touch_nr++;
- 	}
- 
- 	input_mt_assign_slots(input, data->slots, data->pos, touch_nr, 0);
-@@ -178,6 +200,7 @@ static void silead_ts_read_data(struct i2c_client *client)
- 	}
- 
- 	input_mt_sync_frame(input);
-+	input_report_key(input, KEY_LEFTMETA, softbutton_pressed);
- 	input_sync(input);
- }
- 
--- 
-2.13.0
-

0011-Input-goodix-Add-support-for-capacitive-home-button.patch

@@ -1,53 +0,0 @@
-From 2a99775c336303d2efc43eab4f24b34722a28faa Mon Sep 17 00:00:00 2001
-From: "Sergei A. Trusov" <sergei.a.trusov@ya.ru>
-Date: Tue, 20 Jun 2017 18:08:35 +0200
-Subject: [PATCH 11/16] Input: goodix: Add support for capacitive home button
-
-On some x86 tablets with a Goodix touchscreen, the Windows logo on the
-front is a capacitive home button. Touching this button results in a touch
-with bit 4 of the first byte set, while only the lower 4 bits (0-3) are
-used to indicate the number of touches.
-
-Report a KEY_LEFTMETA press when this happens.
-
-Note that the hardware might support more than one button, in which
-case the "id" byte of coor_data would identify the button in question.
-This is not implemented as we don't have access to hardware with
-multiple buttons.
-
-Signed-off-by: Sergei A. Trusov <sergei.a.trusov@ya.ru>
-Acked-by: Bastien Nocera <hadess@hadess.net>
----
- drivers/input/touchscreen/goodix.c | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/drivers/input/touchscreen/goodix.c b/drivers/input/touchscreen/goodix.c
-index 240b16f3ee97..903137d9cf7d 100644
---- a/drivers/input/touchscreen/goodix.c
-+++ b/drivers/input/touchscreen/goodix.c
-@@ -267,6 +267,12 @@ static void goodix_process_events(struct goodix_ts_data *ts)
- 	if (touch_num < 0)
- 		return;
- 
-+	/*
-+	 * Bit 4 of the first byte reports the status of the capacitive
-+	 * Windows/Home button.
-+	 */
-+	input_report_key(ts->input_dev, KEY_LEFTMETA, !!(point_data[0] & BIT(4)));
-+
- 	for (i = 0; i < touch_num; i++)
- 		goodix_ts_report_touch(ts,
- 				&point_data[1 + GOODIX_CONTACT_SIZE * i]);
-@@ -612,6 +618,9 @@ static int goodix_request_input_dev(struct goodix_ts_data *ts)
- 	ts->input_dev->id.product = ts->id;
- 	ts->input_dev->id.version = ts->version;
- 
-+	/* Capacitive Windows/Home button on some devices */
-+	input_set_capability(ts->input_dev, EV_KEY, KEY_LEFTMETA);
-+
- 	error = input_register_device(ts->input_dev);
- 	if (error) {
- 		dev_err(&ts->client->dev,
--- 
-2.13.0
-

0013-iio-accel-bmc150-Add-support-for-BOSC0200-ACPI-devic.patch

@@ -1,32 +0,0 @@
-From bf3e9581e10a19b2ce77a45fe001116d269b4c7f Mon Sep 17 00:00:00 2001
-From: Hans de Goede <hdegoede@redhat.com>
-Date: Sun, 18 Jun 2017 12:47:38 +0200
-Subject: [PATCH 13/16] iio: accel: bmc150: Add support for BOSC0200 ACPI
- device id
-
-Add support for the BOSC0200 ACPI device id used on some x86 tablets.
-note driver_data is not set to a specific model, driver_data is not
-used anyways (instead detection is done on the chip_id reg) and the
-2 tablets with a BOSC0200 ACPI device id I've have 2 different chips,
-one has a BMA250E, the other a BMA222E.
-
-Signed-off-by: Hans de Goede <hdegoede@redhat.com>
----
- drivers/iio/accel/bmc150-accel-i2c.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/iio/accel/bmc150-accel-i2c.c b/drivers/iio/accel/bmc150-accel-i2c.c
-index 8ca8041267ef..f85014fbaa12 100644
---- a/drivers/iio/accel/bmc150-accel-i2c.c
-+++ b/drivers/iio/accel/bmc150-accel-i2c.c
-@@ -64,6 +64,7 @@ static const struct acpi_device_id bmc150_accel_acpi_match[] = {
- 	{"BMA250E",	bma250e},
- 	{"BMA222E",	bma222e},
- 	{"BMA0280",	bma280},
-+	{"BOSC0200"},
- 	{ },
- };
- MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match);
--- 
-2.13.0
-

0015-i2c-cht-wc-Add-Intel-Cherry-Trail-Whiskey-Cove-SMBUS.patch

@@ -1,410 +0,0 @@
-From bd0d7169342e47919f68e75d659968f02b62f84b Mon Sep 17 00:00:00 2001
-From: Hans de Goede <hdegoede@redhat.com>
-Date: Fri, 3 Mar 2017 23:48:50 +0100
-Subject: [PATCH 15/16] i2c-cht-wc: Add Intel Cherry Trail Whiskey Cove SMBUS
- controller driver
-
-The Intel Cherry Trail Whiskey Cove PMIC does not contain a builtin
-battery charger, instead boards with this PMIC use an external TI
-bq24292i charger IC, which is connected to a SMBUS controller built into
-the PMIC.
-
-This commit adds an i2c-bus driver for the PMIC's builtin SMBUS
-controller. The probe function for this i2c-bus will also register an
-i2c-client for the TI bq24292i charger after the i2c-bus has been
-registered.
-
-Note that several device-properties are set on the client-device to
-tell the bq24190 power-supply driver to integrate the Whiskey Cove PMIC
-and e.g. use the PMIC's BC1.2 detection (through extcon) to determine
-the maximum input current.
-
-Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Hans de Goede <hdegoede@redhat.com>
----
-Changes in v2:
--Various style (mostly captialization and variable name) fixes
--Use device-properties instead of platform_data for the i2c_board_info
----
- drivers/i2c/busses/Kconfig      |   8 +
- drivers/i2c/busses/Makefile     |   1 +
- drivers/i2c/busses/i2c-cht-wc.c | 336 ++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 345 insertions(+)
- create mode 100644 drivers/i2c/busses/i2c-cht-wc.c
-
-diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
-index 144cbadc7c72..18c96178b177 100644
---- a/drivers/i2c/busses/Kconfig
-+++ b/drivers/i2c/busses/Kconfig
-@@ -187,6 +187,14 @@ config I2C_PIIX4
- 	  This driver can also be built as a module.  If so, the module
- 	  will be called i2c-piix4.
- 
-+config I2C_CHT_WC
-+	tristate "Intel Cherry Trail Whiskey Cove PMIC smbus controller"
-+	depends on INTEL_SOC_PMIC_CHTWC
-+	help
-+	  If you say yes to this option, support will be included for the
-+	  SMBus controller found in the Intel Cherry Trail Whiskey Cove PMIC
-+	  found on some Intel Cherry Trail systems.
-+
- config I2C_NFORCE2
- 	tristate "Nvidia nForce2, nForce3 and nForce4"
- 	depends on PCI
-diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
-index 30b60855fbcd..f6443fa44f61 100644
---- a/drivers/i2c/busses/Makefile
-+++ b/drivers/i2c/busses/Makefile
-@@ -12,6 +12,7 @@ obj-$(CONFIG_I2C_ALI15X3)	+= i2c-ali15x3.o
- obj-$(CONFIG_I2C_AMD756)	+= i2c-amd756.o
- obj-$(CONFIG_I2C_AMD756_S4882)	+= i2c-amd756-s4882.o
- obj-$(CONFIG_I2C_AMD8111)	+= i2c-amd8111.o
-+obj-$(CONFIG_I2C_CHT_WC)	+= i2c-cht-wc.o
- obj-$(CONFIG_I2C_I801)		+= i2c-i801.o
- obj-$(CONFIG_I2C_ISCH)		+= i2c-isch.o
- obj-$(CONFIG_I2C_ISMT)		+= i2c-ismt.o
-diff --git a/drivers/i2c/busses/i2c-cht-wc.c b/drivers/i2c/busses/i2c-cht-wc.c
-new file mode 100644
-index 000000000000..ccf0785bcb75
---- /dev/null
-+++ b/drivers/i2c/busses/i2c-cht-wc.c
-@@ -0,0 +1,336 @@
-+/*
-+ * Intel CHT Whiskey Cove PMIC I2C Master driver
-+ * Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
-+ *
-+ * Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
-+ * Copyright (C) 2011 - 2014 Intel Corporation. All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License version
-+ * 2 as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/completion.h>
-+#include <linux/delay.h>
-+#include <linux/i2c.h>
-+#include <linux/interrupt.h>
-+#include <linux/irq.h>
-+#include <linux/irqdomain.h>
-+#include <linux/mfd/intel_soc_pmic.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/slab.h>
-+
-+#define CHT_WC_I2C_CTRL			0x5e24
-+#define CHT_WC_I2C_CTRL_WR		BIT(0)
-+#define CHT_WC_I2C_CTRL_RD		BIT(1)
-+#define CHT_WC_I2C_CLIENT_ADDR		0x5e25
-+#define CHT_WC_I2C_REG_OFFSET		0x5e26
-+#define CHT_WC_I2C_WRDATA		0x5e27
-+#define CHT_WC_I2C_RDDATA		0x5e28
-+
-+#define CHT_WC_EXTCHGRIRQ		0x6e0a
-+#define CHT_WC_EXTCHGRIRQ_CLIENT_IRQ	BIT(0)
-+#define CHT_WC_EXTCHGRIRQ_WRITE_IRQ	BIT(1)
-+#define CHT_WC_EXTCHGRIRQ_READ_IRQ	BIT(2)
-+#define CHT_WC_EXTCHGRIRQ_NACK_IRQ	BIT(3)
-+#define CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK	((u8)GENMASK(3, 1))
-+#define CHT_WC_EXTCHGRIRQ_MSK		0x6e17
-+
-+struct cht_wc_i2c_adap {
-+	struct i2c_adapter adapter;
-+	wait_queue_head_t wait;
-+	struct irq_chip irqchip;
-+	struct mutex irqchip_lock;
-+	struct regmap *regmap;
-+	struct irq_domain *irq_domain;
-+	struct i2c_client *client;
-+	int client_irq;
-+	u8 irq_mask;
-+	u8 old_irq_mask;
-+	bool nack;
-+	bool done;
-+};
-+
-+static irqreturn_t cht_wc_i2c_adap_thread_handler(int id, void *data)
-+{
-+	struct cht_wc_i2c_adap *adap = data;
-+	int ret, reg;
-+
-+	/* Read IRQs */
-+	ret = regmap_read(adap->regmap, CHT_WC_EXTCHGRIRQ, &reg);
-+	if (ret) {
-+		dev_err(&adap->adapter.dev, "Error reading extchgrirq reg\n");
-+		return IRQ_NONE;
-+	}
-+
-+	reg &= ~adap->irq_mask;
-+
-+	/*
-+	 * Immediately ack IRQs, so that if new IRQs arrives while we're
-+	 * handling the previous ones our irq will re-trigger when we're done.
-+	 */
-+	ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, reg);
-+	if (ret)
-+		dev_err(&adap->adapter.dev, "Error writing extchgrirq reg\n");
-+
-+	/*
-+	 * Do NOT use handle_nested_irq here, the client irq handler will
-+	 * likely want to do i2c transfers and the i2c controller uses this
-+	 * interrupt handler as well, so running the client irq handler from
-+	 * this thread will cause things to lock up.
-+	 */
-+	if (reg & CHT_WC_EXTCHGRIRQ_CLIENT_IRQ) {
-+		/*
-+		 * generic_handle_irq expects local IRQs to be disabled
-+		 * as normally it is called from interrupt context.
-+		 */
-+		local_irq_disable();
-+		generic_handle_irq(adap->client_irq);
-+		local_irq_enable();
-+	}
-+
-+	if (reg & CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK) {
-+		adap->nack = !!(reg & CHT_WC_EXTCHGRIRQ_NACK_IRQ);
-+		adap->done = true;
-+		wake_up(&adap->wait);
-+	}
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static u32 cht_wc_i2c_adap_master_func(struct i2c_adapter *adap)
-+{
-+	/* This i2c adapter only supports SMBUS byte transfers */
-+	return I2C_FUNC_SMBUS_BYTE_DATA;
-+}
-+
-+static int cht_wc_i2c_adap_smbus_xfer(struct i2c_adapter *_adap, u16 addr,
-+				      unsigned short flags, char read_write,
-+				      u8 command, int size,
-+				      union i2c_smbus_data *data)
-+{
-+	struct cht_wc_i2c_adap *adap = i2c_get_adapdata(_adap);
-+	int ret, reg;
-+
-+	adap->nack = false;
-+	adap->done = false;
-+
-+	ret = regmap_write(adap->regmap, CHT_WC_I2C_CLIENT_ADDR, addr);
-+	if (ret)
-+		return ret;
-+
-+	if (read_write == I2C_SMBUS_WRITE) {
-+		ret = regmap_write(adap->regmap, CHT_WC_I2C_WRDATA, data->byte);
-+		if (ret)
-+			return ret;
-+	}
-+
-+	ret = regmap_write(adap->regmap, CHT_WC_I2C_REG_OFFSET, command);
-+	if (ret)
-+		return ret;
-+
-+	ret = regmap_write(adap->regmap, CHT_WC_I2C_CTRL,
-+			   (read_write == I2C_SMBUS_WRITE) ?
-+			   CHT_WC_I2C_CTRL_WR : CHT_WC_I2C_CTRL_RD);
-+	if (ret)
-+		return ret;
-+
-+	/* 3 second timeout, during cable plug the PMIC responds quite slow */
-+	ret = wait_event_timeout(adap->wait, adap->done, 3 * HZ);
-+	if (ret == 0)
-+		return -ETIMEDOUT;
-+	if (adap->nack)
-+		return -EIO;
-+
-+	if (read_write == I2C_SMBUS_READ) {
-+		ret = regmap_read(adap->regmap, CHT_WC_I2C_RDDATA, &reg);
-+		if (ret)
-+			return ret;
-+
-+		data->byte = reg;
-+	}
-+
-+	return 0;
-+}
-+
-+static const struct i2c_algorithm cht_wc_i2c_adap_algo = {
-+	.functionality = cht_wc_i2c_adap_master_func,
-+	.smbus_xfer = cht_wc_i2c_adap_smbus_xfer,
-+};
-+
-+/**** irqchip for the client connected to the extchgr i2c adapter ****/
-+static void cht_wc_i2c_irq_lock(struct irq_data *data)
-+{
-+	struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
-+
-+	mutex_lock(&adap->irqchip_lock);
-+}
-+
-+static void cht_wc_i2c_irq_sync_unlock(struct irq_data *data)
-+{
-+	struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
-+	int ret;
-+
-+	if (adap->irq_mask != adap->old_irq_mask) {
-+		ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK,
-+				   adap->irq_mask);
-+		if (ret == 0)
-+			adap->old_irq_mask = adap->irq_mask;
-+		else
-+			dev_err(&adap->adapter.dev, "Error writing EXTCHGRIRQ_MSK\n");
-+	}
-+
-+	mutex_unlock(&adap->irqchip_lock);
-+}
-+
-+static void cht_wc_i2c_irq_enable(struct irq_data *data)
-+{
-+	struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
-+
-+	adap->irq_mask &= ~CHT_WC_EXTCHGRIRQ_CLIENT_IRQ;
-+}
-+
-+static void cht_wc_i2c_irq_disable(struct irq_data *data)
-+{
-+	struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data);
-+
-+	adap->irq_mask |= CHT_WC_EXTCHGRIRQ_CLIENT_IRQ;
-+}
-+
-+static const struct irq_chip cht_wc_i2c_irq_chip = {
-+	.irq_bus_lock		= cht_wc_i2c_irq_lock,
-+	.irq_bus_sync_unlock	= cht_wc_i2c_irq_sync_unlock,
-+	.irq_disable		= cht_wc_i2c_irq_disable,
-+	.irq_enable		= cht_wc_i2c_irq_enable,
-+	.name			= "cht_wc_ext_chrg_irq_chip",
-+};
-+
-+static const struct property_entry bq24190_props[] = {
-+	PROPERTY_ENTRY_STRING("extcon-name", "cht_wcove_pwrsrc"),
-+	PROPERTY_ENTRY_BOOL("omit-battery-class"),
-+	PROPERTY_ENTRY_BOOL("disable-reset"),
-+	{ }
-+};
-+
-+static int cht_wc_i2c_adap_i2c_probe(struct platform_device *pdev)
-+{
-+	struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
-+	struct cht_wc_i2c_adap *adap;
-+	struct i2c_board_info board_info = {
-+		.type = "bq24190",
-+		.addr = 0x6b,
-+		.properties = bq24190_props,
-+	};
-+	int ret, irq;
-+
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq < 0) {
-+		dev_err(&pdev->dev, "Error missing irq resource\n");
-+		return -EINVAL;
-+	}
-+
-+	adap = devm_kzalloc(&pdev->dev, sizeof(*adap), GFP_KERNEL);
-+	if (!adap)
-+		return -ENOMEM;
-+
-+	init_waitqueue_head(&adap->wait);
-+	mutex_init(&adap->irqchip_lock);
-+	adap->irqchip = cht_wc_i2c_irq_chip;
-+	adap->regmap = pmic->regmap;
-+	adap->adapter.owner = THIS_MODULE;
-+	adap->adapter.class = I2C_CLASS_HWMON;
-+	adap->adapter.algo = &cht_wc_i2c_adap_algo;
-+	strlcpy(adap->adapter.name, "PMIC I2C Adapter",
-+		sizeof(adap->adapter.name));
-+	adap->adapter.dev.parent = &pdev->dev;
-+
-+	/* Clear and activate i2c-adapter interrupts, disable client IRQ */
-+	adap->old_irq_mask = adap->irq_mask = ~CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK;
-+	ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, ~adap->irq_mask);
-+	if (ret)
-+		return ret;
-+
-+	ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK, adap->irq_mask);
-+	if (ret)
-+		return ret;
-+
-+	/* Alloc and register client IRQ */
-+	adap->irq_domain = irq_domain_add_linear(pdev->dev.of_node, 1,
-+						 &irq_domain_simple_ops, NULL);
-+	if (!adap->irq_domain)
-+		return -ENOMEM;
-+
-+	adap->client_irq = irq_create_mapping(adap->irq_domain, 0);
-+	if (!adap->client_irq) {
-+		ret = -ENOMEM;
-+		goto remove_irq_domain;
-+	}
-+
-+	irq_set_chip_data(adap->client_irq, adap);
-+	irq_set_chip_and_handler(adap->client_irq, &adap->irqchip,
-+				 handle_simple_irq);
-+
-+	ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
-+					cht_wc_i2c_adap_thread_handler,
-+					IRQF_ONESHOT, "PMIC I2C Adapter", adap);
-+	if (ret)
-+		goto remove_irq_domain;
-+
-+	i2c_set_adapdata(&adap->adapter, adap);
-+	ret = i2c_add_adapter(&adap->adapter);
-+	if (ret)
-+		goto remove_irq_domain;
-+
-+	board_info.irq = adap->client_irq;
-+	adap->client = i2c_new_device(&adap->adapter, &board_info);
-+	if (!adap->client) {
-+		ret = -ENOMEM;
-+		goto del_adapter;
-+	}
-+
-+	platform_set_drvdata(pdev, adap);
-+	return 0;
-+
-+del_adapter:
-+	i2c_del_adapter(&adap->adapter);
-+remove_irq_domain:
-+	irq_domain_remove(adap->irq_domain);
-+	return ret;
-+}
-+
-+static int cht_wc_i2c_adap_i2c_remove(struct platform_device *pdev)
-+{
-+	struct cht_wc_i2c_adap *adap = platform_get_drvdata(pdev);
-+
-+	i2c_unregister_device(adap->client);
-+	i2c_del_adapter(&adap->adapter);
-+	irq_domain_remove(adap->irq_domain);
-+
-+	return 0;
-+}
-+
-+static struct platform_device_id cht_wc_i2c_adap_id_table[] = {
-+	{ .name = "cht_wcove_ext_chgr" },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(platform, cht_wc_i2c_adap_id_table);
-+
-+struct platform_driver cht_wc_i2c_adap_driver = {
-+	.probe = cht_wc_i2c_adap_i2c_probe,
-+	.remove = cht_wc_i2c_adap_i2c_remove,
-+	.driver = {
-+		.name = "cht_wcove_ext_chgr",
-+	},
-+	.id_table = cht_wc_i2c_adap_id_table,
-+};
-+module_platform_driver(cht_wc_i2c_adap_driver);
-+
-+MODULE_DESCRIPTION("Intel CHT Whiskey Cove PMIC I2C Master driver");
-+MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
-+MODULE_LICENSE("GPL");
--- 
-2.13.0
-

ACPI-irq-Workaround-firmware-issue-on-X-Gene-based-m400.patch

@@ -0,0 +1,64 @@
+From dbdda4277cf0422a9ccb7ea98d0263c3cdbecdf6 Mon Sep 17 00:00:00 2001
+From: Mark Salter <msalter@redhat.com>
+Date: Tue, 8 May 2018 21:54:39 -0400
+Subject: [PATCH] ACPI / irq: Workaround firmware issue on X-Gene based
+ m400
+
+The ACPI firmware on the xgene-based m400 platorms erroneously
+describes its UART interrupt as ACPI_PRODUCER rather than
+ACPI_CONSUMER. This leads to the UART driver being unable to
+find its interrupt and the kernel unable find a console.
+Work around this by avoiding the producer/consumer check
+for X-Gene UARTs.
+
+Signed-off-by: Mark Salter <msalter@redhat.com>
+---
+ drivers/acpi/irq.c | 17 +++++++++++++++--
+ 1 file changed, 15 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/acpi/irq.c b/drivers/acpi/irq.c
+index 7c352cba0528..028c1a564cff 100644
+--- a/drivers/acpi/irq.c
++++ b/drivers/acpi/irq.c
+@@ -129,6 +129,7 @@ struct acpi_irq_parse_one_ctx {
+ 	unsigned int index;
+ 	unsigned long *res_flags;
+ 	struct irq_fwspec *fwspec;
++	bool skip_producer_check;
+ };
+ 
+ /**
+@@ -200,7 +201,8 @@ static acpi_status acpi_irq_parse_one_cb(struct acpi_resource *ares,
+ 		return AE_CTRL_TERMINATE;
+ 	case ACPI_RESOURCE_TYPE_EXTENDED_IRQ:
+ 		eirq = &ares->data.extended_irq;
+-		if (eirq->producer_consumer == ACPI_PRODUCER)
++		if (!ctx->skip_producer_check &&
++		    eirq->producer_consumer == ACPI_PRODUCER)
+ 			return AE_OK;
+ 		if (ctx->index >= eirq->interrupt_count) {
+ 			ctx->index -= eirq->interrupt_count;
+@@ -235,8 +237,19 @@ static acpi_status acpi_irq_parse_one_cb(struct acpi_resource *ares,
+ static int acpi_irq_parse_one(acpi_handle handle, unsigned int index,
+ 			      struct irq_fwspec *fwspec, unsigned long *flags)
+ {
+-	struct acpi_irq_parse_one_ctx ctx = { -EINVAL, index, flags, fwspec };
++	struct acpi_irq_parse_one_ctx ctx = { -EINVAL, index, flags, fwspec, false };
+ 
++	/*
++	 * Firmware on arm64-based HPE m400 platform incorrectly marks
++	 * its UART interrupt as ACPI_PRODUCER rather than ACPI_CONSUMER.
++	 * Don't do the producer/consumer check for that device.
++	 */
++	if (IS_ENABLED(CONFIG_ARM64)) {
++		struct acpi_device *adev = acpi_bus_get_acpi_device(handle);
++
++		if (adev && !strcmp(acpi_device_hid(adev), "APMC0D08"))
++			ctx.skip_producer_check = true;
++	}
+ 	acpi_walk_resources(handle, METHOD_NAME__CRS, acpi_irq_parse_one_cb, &ctx);
+ 	return ctx.rc;
+ }
+-- 
+2.17.0
+

ACPI-scan-Fix-regression-related-to-X-Gene-UARTs.patch

@@ -0,0 +1,44 @@
+From patchwork Fri Apr 20 03:29:47 2018
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: ACPI / scan: Fix regression related to X-Gene UARTs
+From: Mark Salter <msalter@redhat.com>
+X-Patchwork-Id: 10351797
+Message-Id: <20180420032947.23023-1-msalter@redhat.com>
+To: =?UTF-8?q?Fr=C3=A9d=C3=A9ric=20Danis?= <frederic.danis.oss@gmail.com>
+Cc: "Rafael J . Wysocki" <rjw@rjwysocki.net>,
+ linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org
+Date: Thu, 19 Apr 2018 23:29:47 -0400
+
+Commit e361d1f85855 ("ACPI / scan: Fix enumeration for special UART
+devices") caused a regression with some X-Gene based platforms (Mustang
+and M400) with invalid DSDT. The DSDT makes it appear that the UART
+device is also a slave device attached to itself. With the above commit
+the UART won't be enumerated by ACPI scan (slave serial devices shouldn't
+be). So check for X-Gene UART device and skip slace device check on it.
+
+Signed-off-by: Mark Salter <msalter@redhat.com>
+---
+ drivers/acpi/scan.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c
+index cc234e6a6297..1dcdd0122862 100644
+--- a/drivers/acpi/scan.c
++++ b/drivers/acpi/scan.c
+@@ -1551,6 +1551,14 @@ static bool acpi_device_enumeration_by_parent(struct acpi_device *device)
+ 	     fwnode_property_present(&device->fwnode, "baud")))
+ 		return true;
+ 
++	/*
++	 * Firmware on some arm64 X-Gene platforms will make the UART
++	 * device appear as both a UART and a slave of that UART. Just
++	 * bail out here for X-Gene UARTs.
++	 */
++	if (!strcmp(acpi_device_hid(device), "APMC0D08"))
++		return false;
++
+ 	INIT_LIST_HEAD(&resource_list);
+ 	acpi_dev_get_resources(device, &resource_list,
+ 			       acpi_check_serial_bus_slave,

CI-1-6-drm-i915-dp-Fix-link-retraining-comment-in-intel_dp_long_pulse.patch

@@ -0,0 +1,60 @@
+From patchwork Thu Sep 27 20:57:30 2018
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 8bit
+Subject: [CI, 1/6] drm/i915/dp: Fix link retraining comment in
+ intel_dp_long_pulse()
+From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
+X-Patchwork-Id: 253516
+Message-Id: <20180927205735.16651-1-dhinakaran.pandiyan@intel.com>
+To: intel-gfx@lists.freedesktop.org
+Date: Thu, 27 Sep 2018 13:57:30 -0700
+
+Comment claims link needs to be retrained because the connected sink raised
+a long pulse to indicate link loss. If the sink did so,
+intel_dp_hotplug() would have handled link retraining. Looking at the
+logs in Bugzilla referenced in commit '3cf71bc9904d ("drm/i915: Re-apply
+Perform link quality check, unconditionally during long pulse"")', the
+issue is that the sink does not trigger an interrupt. What we want is
+->detect() from user space to check link status and retrain. Ville's
+review for the original patch also indicates the same root cause. So,
+rewrite the comment.
+
+v2: Patch split and rewrote comment.
+
+Cc: Lyude Paul <lyude@redhat.com>
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Cc: Jani Nikula <jani.nikula@linux.intel.com>
+Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Cc: Jan-Marek Glogowski <glogow@fbihome.de>
+References: 3cf71bc9904d ("drm/i915: Re-apply "Perform link quality check, unconditionally during long pulse"")
+Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
+Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+---
+ drivers/gpu/drm/i915/intel_dp.c | 13 +++----------
+ 1 file changed, 3 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
+index 256a71c8c093..207b3ea2ed1a 100644
+--- a/drivers/gpu/drm/i915/intel_dp.c
++++ b/drivers/gpu/drm/i915/intel_dp.c
+@@ -5074,16 +5074,9 @@ intel_dp_long_pulse(struct intel_connector *connector,
+ 		goto out;
+ 	} else {
+ 		/*
+-		 * If display is now connected check links status,
+-		 * there has been known issues of link loss triggering
+-		 * long pulse.
+-		 *
+-		 * Some sinks (eg. ASUS PB287Q) seem to perform some
+-		 * weird HPD ping pong during modesets. So we can apparently
+-		 * end up with HPD going low during a modeset, and then
+-		 * going back up soon after. And once that happens we must
+-		 * retrain the link to get a picture. That's in case no
+-		 * userspace component reacted to intermittent HPD dip.
++		 * Some external monitors do not signal loss of link
++		 * synchronization with an IRQ_HPD, so force a link status
++		 * check.
+ 		 */
+ 		struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+ 

CI-2-6-drm-i915-dp-Restrict-link-retrain-workaround-to-external-monitors.patch

@@ -0,0 +1,55 @@
+From patchwork Thu Sep 27 20:57:31 2018
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 8bit
+Subject: [CI, 2/6] drm/i915/dp: Restrict link retrain workaround to external
+ monitors
+From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
+X-Patchwork-Id: 253514
+Message-Id: <20180927205735.16651-2-dhinakaran.pandiyan@intel.com>
+To: intel-gfx@lists.freedesktop.org
+Date: Thu, 27 Sep 2018 13:57:31 -0700
+
+Commit '3cf71bc9904d ("drm/i915: Re-apply "Perform link quality check,
+unconditionally during long pulse"")' applies a work around for sinks
+that don't signal link loss. The work around does not need to have to be
+that broad as the issue was seen with only one particular monitor; limit
+this only for external displays as eDP features like PSR turn off the link
+and the driver ends up retraining the link seeeing that link is not
+synchronized.
+
+Cc: Lyude Paul <lyude@redhat.com>
+Cc: Jan-Marek Glogowski <glogow@fbihome.de>
+Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
+Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
+References: 3cf71bc9904d ("drm/i915: Re-apply "Perform link quality check, unconditionally during long pulse"")
+Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
+Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+---
+ drivers/gpu/drm/i915/intel_dp.c | 13 +++++++------
+ 1 file changed, 7 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
+index 207b3ea2ed1a..4e0870f3a4a5 100644
+--- a/drivers/gpu/drm/i915/intel_dp.c
++++ b/drivers/gpu/drm/i915/intel_dp.c
+@@ -5072,12 +5072,13 @@ intel_dp_long_pulse(struct intel_connector *connector,
+ 		 */
+ 		status = connector_status_disconnected;
+ 		goto out;
+-	} else {
+-		/*
+-		 * Some external monitors do not signal loss of link
+-		 * synchronization with an IRQ_HPD, so force a link status
+-		 * check.
+-		 */
++	}
++
++	/*
++	 * Some external monitors do not signal loss of link synchronization
++	 * with an IRQ_HPD, so force a link status check.
++	 */
++	if (!intel_dp_is_edp(intel_dp)) {
+ 		struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+ 
+ 		intel_dp_retrain_link(encoder, ctx);

CVE-2017-7477.patch

@@ -1,73 +0,0 @@
-From 4d6fa57b4dab0d77f4d8e9d9c73d1e63f6fe8fee Mon Sep 17 00:00:00 2001
-From: "Jason A. Donenfeld" <Jason@zx2c4.com>
-Date: Fri, 21 Apr 2017 23:14:48 +0200
-Subject: macsec: avoid heap overflow in skb_to_sgvec
-
-While this may appear as a humdrum one line change, it's actually quite
-important. An sk_buff stores data in three places:
-
-1. A linear chunk of allocated memory in skb->data. This is the easiest
-   one to work with, but it precludes using scatterdata since the memory
-   must be linear.
-2. The array skb_shinfo(skb)->frags, which is of maximum length
-   MAX_SKB_FRAGS. This is nice for scattergather, since these fragments
-   can point to different pages.
-3. skb_shinfo(skb)->frag_list, which is a pointer to another sk_buff,
-   which in turn can have data in either (1) or (2).
-
-The first two are rather easy to deal with, since they're of a fixed
-maximum length, while the third one is not, since there can be
-potentially limitless chains of fragments. Fortunately dealing with
-frag_list is opt-in for drivers, so drivers don't actually have to deal
-with this mess. For whatever reason, macsec decided it wanted pain, and
-so it explicitly specified NETIF_F_FRAGLIST.
-
-Because dealing with (1), (2), and (3) is insane, most users of sk_buff
-doing any sort of crypto or paging operation calls a convenient function
-called skb_to_sgvec (which happens to be recursive if (3) is in use!).
-This takes a sk_buff as input, and writes into its output pointer an
-array of scattergather list items. Sometimes people like to declare a
-fixed size scattergather list on the stack; othertimes people like to
-allocate a fixed size scattergather list on the heap. However, if you're
-doing it in a fixed-size fashion, you really shouldn't be using
-NETIF_F_FRAGLIST too (unless you're also ensuring the sk_buff and its
-frag_list children arent't shared and then you check the number of
-fragments in total required.)
-
-Macsec specifically does this:
-
-        size += sizeof(struct scatterlist) * (MAX_SKB_FRAGS + 1);
-        tmp = kmalloc(size, GFP_ATOMIC);
-        *sg = (struct scatterlist *)(tmp + sg_offset);
-	...
-        sg_init_table(sg, MAX_SKB_FRAGS + 1);
-        skb_to_sgvec(skb, sg, 0, skb->len);
-
-Specifying MAX_SKB_FRAGS + 1 is the right answer usually, but not if you're
-using NETIF_F_FRAGLIST, in which case the call to skb_to_sgvec will
-overflow the heap, and disaster ensues.
-
-Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
-Cc: stable@vger.kernel.org
-Cc: security@kernel.org
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/macsec.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/net/macsec.c b/drivers/net/macsec.c
-index ff0a5ed..dbab05a 100644
---- a/drivers/net/macsec.c
-+++ b/drivers/net/macsec.c
-@@ -2716,7 +2716,7 @@ static netdev_tx_t macsec_start_xmit(struct sk_buff *skb,
- }
- 
- #define MACSEC_FEATURES \
--	(NETIF_F_SG | NETIF_F_HIGHDMA | NETIF_F_FRAGLIST)
-+	(NETIF_F_SG | NETIF_F_HIGHDMA)
- static struct lock_class_key macsec_netdev_addr_lock_key;
- 
- static int macsec_dev_init(struct net_device *dev)
--- 
-cgit v1.1
-

CVE-2017-7645.patch

@@ -1,180 +0,0 @@
-From: "J. Bruce Fields" <bfields@redhat.com>
-Date:       2017-04-14 15:04:40
-Subject:    [PATCH] nfsd: check for oversized NFSv2/v3 arguments
-
-A client can append random data to the end of an NFSv2 or NFSv3 RPC call
-without our complaining; we'll just stop parsing at the end of the
-expected data and ignore the rest.
-
-Encoded arguments and replies are stored together in an array of pages,
-and if a call is too large it could leave inadequate space for the
-reply.  This is normally OK because NFS RPC's typically have either
-short arguments and long replies (like READ) or long arguments and short
-replies (like WRITE).  But a client that sends an incorrectly long reply
-can violate those assumptions.  This was observed to cause crashes.
-
-So, insist that the argument not be any longer than we expect.
-
-Also, several operations increment rq_next_page in the decode routine
-before checking the argument size, which can leave rq_next_page pointing
-well past the end of the page array, causing trouble later in
-svc_free_pages.
-
-As followup we may also want to rewrite the encoding routines to check
-more carefully that they aren't running off the end of the page array.
-
-Reported-by: Tuomas Haanpää <thaan@synopsys.com>
-Reported-by: Ari Kauppi <ari@synopsys.com>
-Cc: stable@vger.kernel.org
-Signed-off-by: J. Bruce Fields <bfields@redhat.com>
----
- fs/nfsd/nfs3xdr.c          | 23 +++++++++++++++++------
- fs/nfsd/nfsxdr.c           | 13 ++++++++++---
- include/linux/sunrpc/svc.h |  3 +--
- 3 files changed, 28 insertions(+), 11 deletions(-)
-
-diff --git a/fs/nfsd/nfs3xdr.c b/fs/nfsd/nfs3xdr.c
-index dba2ff8eaa68..be66bcadfaea 100644
---- a/fs/nfsd/nfs3xdr.c
-+++ b/fs/nfsd/nfs3xdr.c
-@@ -334,8 +334,11 @@ nfs3svc_decode_readargs(struct svc_rqst *rqstp, __be32 *p,
- 	if (!p)
- 		return 0;
- 	p = xdr_decode_hyper(p, &args->offset);
--
- 	args->count = ntohl(*p++);
-+
-+	if (!xdr_argsize_check(rqstp, p))
-+		return 0;
-+
- 	len = min(args->count, max_blocksize);
- 
- 	/* set up the kvec */
-@@ -349,7 +352,7 @@ nfs3svc_decode_readargs(struct svc_rqst *rqstp, __be32 *p,
- 		v++;
- 	}
- 	args->vlen = v;
--	return xdr_argsize_check(rqstp, p);
-+	return 1;
- }
- 
- int
-@@ -536,9 +539,11 @@ nfs3svc_decode_readlinkargs(struct svc_rqst *rqstp, __be32 *p,
- 	p = decode_fh(p, &args->fh);
- 	if (!p)
- 		return 0;
-+	if (!xdr_argsize_check(rqstp, p))
-+		return 0;
- 	args->buffer = page_address(*(rqstp->rq_next_page++));
- 
--	return xdr_argsize_check(rqstp, p);
-+	return 1;
- }
- 
- int
-@@ -564,10 +569,14 @@ nfs3svc_decode_readdirargs(struct svc_rqst *rqstp, __be32 *p,
- 	args->verf   = p; p += 2;
- 	args->dircount = ~0;
- 	args->count  = ntohl(*p++);
-+
-+	if (!xdr_argsize_check(rqstp, p))
-+		return 0;
-+
- 	args->count  = min_t(u32, args->count, PAGE_SIZE);
- 	args->buffer = page_address(*(rqstp->rq_next_page++));
- 
--	return xdr_argsize_check(rqstp, p);
-+	return 1;
- }
- 
- int
-@@ -585,6 +594,9 @@ nfs3svc_decode_readdirplusargs(struct svc_rqst *rqstp, __be32 *p,
- 	args->dircount = ntohl(*p++);
- 	args->count    = ntohl(*p++);
- 
-+	if (!xdr_argsize_check(rqstp, p))
-+		return 0;
-+
- 	len = args->count = min(args->count, max_blocksize);
- 	while (len > 0) {
- 		struct page *p = *(rqstp->rq_next_page++);
-@@ -592,8 +604,7 @@ nfs3svc_decode_readdirplusargs(struct svc_rqst *rqstp, __be32 *p,
- 			args->buffer = page_address(p);
- 		len -= PAGE_SIZE;
- 	}
--
--	return xdr_argsize_check(rqstp, p);
-+	return 1;
- }
- 
- int
-diff --git a/fs/nfsd/nfsxdr.c b/fs/nfsd/nfsxdr.c
-index 41b468a6a90f..79268369f7b3 100644
---- a/fs/nfsd/nfsxdr.c
-+++ b/fs/nfsd/nfsxdr.c
-@@ -257,6 +257,9 @@ nfssvc_decode_readargs(struct svc_rqst *rqstp, __be32 *p,
- 	len = args->count     = ntohl(*p++);
- 	p++; /* totalcount - unused */
- 
-+	if (!xdr_argsize_check(rqstp, p))
-+		return 0;
-+
- 	len = min_t(unsigned int, len, NFSSVC_MAXBLKSIZE_V2);
- 
- 	/* set up somewhere to store response.
-@@ -272,7 +275,7 @@ nfssvc_decode_readargs(struct svc_rqst *rqstp, __be32 *p,
- 		v++;
- 	}
- 	args->vlen = v;
--	return xdr_argsize_check(rqstp, p);
-+	return 1;
- }
- 
- int
-@@ -360,9 +363,11 @@ nfssvc_decode_readlinkargs(struct svc_rqst *rqstp, __be32 *p, struct nfsd_readli
- 	p = decode_fh(p, &args->fh);
- 	if (!p)
- 		return 0;
-+	if (!xdr_argsize_check(rqstp, p))
-+		return 0;
- 	args->buffer = page_address(*(rqstp->rq_next_page++));
- 
--	return xdr_argsize_check(rqstp, p);
-+	return 1;
- }
- 
- int
-@@ -400,9 +405,11 @@ nfssvc_decode_readdirargs(struct svc_rqst *rqstp, __be32 *p,
- 	args->cookie = ntohl(*p++);
- 	args->count  = ntohl(*p++);
- 	args->count  = min_t(u32, args->count, PAGE_SIZE);
-+	if (!xdr_argsize_check(rqstp, p))
-+		return 0;
- 	args->buffer = page_address(*(rqstp->rq_next_page++));
- 
--	return xdr_argsize_check(rqstp, p);
-+	return 1;
- }
- 
- /*
-diff --git a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h
-index e770abeed32d..6ef19cf658b4 100644
---- a/include/linux/sunrpc/svc.h
-+++ b/include/linux/sunrpc/svc.h
-@@ -336,8 +336,7 @@ xdr_argsize_check(struct svc_rqst *rqstp, __be32 *p)
- {
- 	char *cp = (char *)p;
- 	struct kvec *vec = &rqstp->rq_arg.head[0];
--	return cp >= (char*)vec->iov_base
--		&& cp <= (char*)vec->iov_base + vec->iov_len;
-+	return cp == (char *)vec->iov_base + vec->iov_len;
- }
- 
- static inline int
--- 
-2.9.3
-
---
-To unsubscribe from this list: send the line "unsubscribe linux-nfs" in
-the body of a message to majordomo@vger.kernel.org
-More majordomo info at  http://vger.kernel.org/majordomo-info.html

README.txt

@@ -33,9 +33,9 @@ config heirarchy.
 Instead of having to maintain a config file for every arch variant we build on,
 the kernel spec uses a nested system of configs. Each option CONFIG_FOO is
 represented by a single file named CONFIG_FOO which contains the state (=y, =m,
-=n). These options are collected in the folder baseconfig. Architecture specifi
-options are set in nested folders. An option set in a nested folder will
-override the same option set in one of the higher levels.
+=n). These options are collected in the folder base-generic. Architecture
+specific options are set in nested folders. An option set in a nested folder
+will override the same option set in one of the higher levels.
 
 The individual CONFIG_FOO files only exist in the pkg-git repository. The RPM
 contains kernel-foo.config files which are the result of combining all the
@@ -45,10 +45,10 @@ script _must_ be run each time one of the options is changed.
 Example flow:
 
 # Enable the option CONFIG_ABC123 as a module for all arches
-echo "CONFIG_ABC123=m" > baseconfig/CONFIG_ABC1234
+echo "CONFIG_ABC123=m" > configs/base-generic/CONFIG_ABC1234
 # enable the option CONFIG_XYZ321 for only x86
-echo "# CONFIG_XYZ321 is not set" > baseconfig/CONFIG_XYZ321
-echo "CONFIG_XYZ321=m" > baseconfig/x86/CONFIG_XYZ321
+echo "# CONFIG_XYZ321 is not set" > configs/base-generic/CONFIG_XYZ321
+echo "CONFIG_XYZ321=m" > configs/base-generic/x86/CONFIG_XYZ321
 # regenerate the combined config files
 ./build_configs.sh
 
@@ -72,7 +72,7 @@ the status quo to:
 This is done to increase coverage testing, as not many people actually
 run kernel-debug.
 
-The debug options are managed in a separate heierarchy under debugconfig. This
-works in a similar manner to baseconfig. More deeply nested folders, again,
+The debug options are managed in a separate heierarchy under base-debug. This
+works in a similar manner to base-generic. More deeply nested folders, again,
 override options. The file config_generation gives a listing of what folders
 go into each config file generated.

Revert-ARM-dts-bcm2835-Add-the-DSI-module-nodes-and-.patch

@@ -1,105 +0,0 @@
-From 7d9e74c53a4376245b4f05006f42184a1540dee8 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Tue, 18 Jul 2017 23:21:50 +0100
-Subject: [PATCH] Revert "ARM: dts: bcm2835: Add the DSI module nodes and
- clocks."
-
-This reverts commit 4aba4cf820545ca8ec23785c7bac40bba7e505c5.
----
- arch/arm/boot/dts/bcm2835-rpi.dtsi |  8 -------
- arch/arm/boot/dts/bcm283x.dtsi     | 48 +++-----------------------------------
- 2 files changed, 3 insertions(+), 53 deletions(-)
-
-diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
-index a7b5ce133784..e99bb149065f 100644
---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
-+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
-@@ -98,11 +98,3 @@
- 	power-domains = <&power RPI_POWER_DOMAIN_VEC>;
- 	status = "okay";
- };
--
--&dsi0 {
--	power-domains = <&power RPI_POWER_DOMAIN_DSI0>;
--};
--
--&dsi1 {
--	power-domains = <&power RPI_POWER_DOMAIN_DSI1>;
--};
-diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
-index 9444a9a9ba10..ce14c9ddf574 100644
---- a/arch/arm/boot/dts/bcm283x.dtsi
-+++ b/arch/arm/boot/dts/bcm283x.dtsi
-@@ -98,13 +98,10 @@
- 			#clock-cells = <1>;
- 			reg = <0x7e101000 0x2000>;
- 
--			/* CPRMAN derives almost everything from the
--			 * platform's oscillator.  However, the DSI
--			 * pixel clocks come from the DSI analog PHY.
-+			/* CPRMAN derives everything from the platform's
-+			 * oscillator.
- 			 */
--			clocks = <&clk_osc>,
--				<&dsi0 0>, <&dsi0 1>, <&dsi0 2>,
--				<&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
-+			clocks = <&clk_osc>;
- 		};
- 
- 		rng@7e104000 {
-@@ -412,25 +409,6 @@
- 			interrupts = <2 14>; /* pwa1 */
- 		};
- 
--		dsi0: dsi@7e209000 {
--			compatible = "brcm,bcm2835-dsi0";
--			reg = <0x7e209000 0x78>;
--			interrupts = <2 4>;
--			#address-cells = <1>;
--			#size-cells = <0>;
--			#clock-cells = <1>;
--
--			clocks = <&clocks BCM2835_PLLA_DSI0>,
--				 <&clocks BCM2835_CLOCK_DSI0E>,
--				 <&clocks BCM2835_CLOCK_DSI0P>;
--			clock-names = "phy", "escape", "pixel";
--
--			clock-output-names = "dsi0_byte",
--					     "dsi0_ddr2",
--					     "dsi0_ddr";
--
--		};
--
- 		thermal: thermal@7e212000 {
- 			compatible = "brcm,bcm2835-thermal";
- 			reg = <0x7e212000 0x8>;
-@@ -497,26 +475,6 @@
- 			interrupts = <2 1>;
- 		};
- 
--		dsi1: dsi@7e700000 {
--			compatible = "brcm,bcm2835-dsi1";
--			reg = <0x7e700000 0x8c>;
--			interrupts = <2 12>;
--			#address-cells = <1>;
--			#size-cells = <0>;
--			#clock-cells = <1>;
--
--			clocks = <&clocks BCM2835_PLLD_DSI1>,
--				 <&clocks BCM2835_CLOCK_DSI1E>,
--				 <&clocks BCM2835_CLOCK_DSI1P>;
--			clock-names = "phy", "escape", "pixel";
--
--			clock-output-names = "dsi1_byte",
--					     "dsi1_ddr2",
--					     "dsi1_ddr";
--
--			status = "disabled";
--		};
--
- 		i2c1: i2c@7e804000 {
- 			compatible = "brcm,bcm2835-i2c";
- 			reg = <0x7e804000 0x1000>;
--- 
-2.13.3
-

allwinner-net-emac.patch

@@ -1,746 +0,0 @@
-From 83e18f0ad4793ea83e03cb8e608bdd2939e76d78 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Mon, 4 Sep 2017 13:04:34 +0100
-Subject: [PATCH 1/4] Revert "net: stmmac: sun8i: Remove the compatibles"
-
-This reverts commit ad4540cc5aa3dccb8e1e12458d57f8c40fae5a1c.
----
- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
-index 39c2122a4f26..fffd6d5fc907 100644
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
-@@ -979,6 +979,14 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
- }
- 
- static const struct of_device_id sun8i_dwmac_match[] = {
-+	{ .compatible = "allwinner,sun8i-h3-emac",
-+		.data = &emac_variant_h3 },
-+	{ .compatible = "allwinner,sun8i-v3s-emac",
-+		.data = &emac_variant_v3s },
-+	{ .compatible = "allwinner,sun8i-a83t-emac",
-+		.data = &emac_variant_a83t },
-+	{ .compatible = "allwinner,sun50i-a64-emac",
-+		.data = &emac_variant_a64 },
- 	{ }
- };
- MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
--- 
-2.13.5
-
-From fa4788d88903c1e535d034c3dd3fcd386685a02c Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Mon, 4 Sep 2017 13:04:41 +0100
-Subject: [PATCH 2/4] Revert "arm: dts: sunxi: Revert EMAC changes"
-
-This reverts commit fe45174b72aead678da581bab9e9a37c9b26a070.
----
- arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts |  9 ++++++++
- arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 19 +++++++++++++++++
- arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts         |  7 ++++++
- arch/arm/boot/dts/sun8i-h3-orangepi-2.dts         |  8 +++++++
- arch/arm/boot/dts/sun8i-h3-orangepi-one.dts       |  8 +++++++
- arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   |  5 +++++
- arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts        |  8 +++++++
- arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts      | 22 +++++++++++++++++++
- arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts    | 16 ++++++++++++++
- arch/arm/boot/dts/sunxi-h3-h5.dtsi                | 26 +++++++++++++++++++++++
- 10 files changed, 128 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
-index b1502df7b509..6713d0f2b3f4 100644
---- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
-+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
-@@ -56,6 +56,8 @@
- 
- 	aliases {
- 		serial0 = &uart0;
-+		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
-+		ethernet0 = &emac;
- 		ethernet1 = &xr819;
- 	};
- 
-@@ -102,6 +104,13 @@
- 	status = "okay";
- };
- 
-+&emac {
-+	phy-handle = <&int_mii_phy>;
-+	phy-mode = "mii";
-+	allwinner,leds-active-low;
-+	status = "okay";
-+};
-+
- &mmc0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&mmc0_pins_a>;
-diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
-index a337af1de322..d756ff825116 100644
---- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
-@@ -52,6 +52,7 @@
- 	compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
- 
- 	aliases {
-+		ethernet0 = &emac;
- 		serial0 = &uart0;
- 		serial1 = &uart1;
- 	};
-@@ -114,12 +115,30 @@
- 	status = "okay";
- };
- 
-+&emac {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&emac_rgmii_pins>;
-+	phy-supply = <&reg_gmac_3v3>;
-+	phy-handle = <&ext_rgmii_phy>;
-+	phy-mode = "rgmii";
-+
-+	allwinner,leds-active-low;
-+	status = "okay";
-+};
-+
- &ir {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&ir_pins_a>;
- 	status = "okay";
- };
- 
-+&mdio {
-+	ext_rgmii_phy: ethernet-phy@1 {
-+		compatible = "ethernet-phy-ieee802.3-c22";
-+		reg = <0>;
-+	};
-+};
-+
- &mmc0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
-diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
-index 8d2cc6e9a03f..78f6c24952dd 100644
---- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
-@@ -46,3 +46,10 @@
- 	model = "FriendlyARM NanoPi NEO";
- 	compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
- };
-+
-+&emac {
-+	phy-handle = <&int_mii_phy>;
-+	phy-mode = "mii";
-+	allwinner,leds-active-low;
-+	status = "okay";
-+};
-diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
-index 8ff71b1bb45b..17cdeae19c6f 100644
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
-@@ -54,6 +54,7 @@
- 	aliases {
- 		serial0 = &uart0;
- 		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
-+		ethernet0 = &emac;
- 		ethernet1 = &rtl8189;
- 	};
- 
-@@ -117,6 +118,13 @@
- 	status = "okay";
- };
- 
-+&emac {
-+	phy-handle = <&int_mii_phy>;
-+	phy-mode = "mii";
-+	allwinner,leds-active-low;
-+	status = "okay";
-+};
-+
- &ir {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&ir_pins_a>;
-diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
-index 5fea430e0eb1..6880268e8b87 100644
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
-@@ -52,6 +52,7 @@
- 	compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
- 
- 	aliases {
-+		ethernet0 = &emac;
- 		serial0 = &uart0;
- 	};
- 
-@@ -97,6 +98,13 @@
- 	status = "okay";
- };
- 
-+&emac {
-+	phy-handle = <&int_mii_phy>;
-+	phy-mode = "mii";
-+	allwinner,leds-active-low;
-+	status = "okay";
-+};
-+
- &mmc0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
-diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
-index 8b93f5c781a7..a10281b455f5 100644
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
-@@ -53,6 +53,11 @@
- 	};
- };
- 
-+&emac {
-+	/* LEDs changed to active high on the plus */
-+	/delete-property/ allwinner,leds-active-low;
-+};
-+
- &mmc1 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&mmc1_pins_a>;
-diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
-index 1a044b17d6c6..998b60f8d295 100644
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
-@@ -52,6 +52,7 @@
- 	compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
- 
- 	aliases {
-+		ethernet0 = &emac;
- 		serial0 = &uart0;
- 	};
- 
-@@ -113,6 +114,13 @@
- 	status = "okay";
- };
- 
-+&emac {
-+	phy-handle = <&int_mii_phy>;
-+	phy-mode = "mii";
-+	allwinner,leds-active-low;
-+	status = "okay";
-+};
-+
- &ir {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&ir_pins_a>;
-diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
-index 828ae7a526d9..331ed683ac62 100644
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
-@@ -47,6 +47,10 @@
- 	model = "Xunlong Orange Pi Plus / Plus 2";
- 	compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
- 
-+	aliases {
-+		ethernet0 = &emac;
-+	};
-+
- 	reg_gmac_3v3: gmac-3v3 {
- 		compatible = "regulator-fixed";
- 		regulator-name = "gmac-3v3";
-@@ -74,6 +78,24 @@
- 	status = "okay";
- };
- 
-+&emac {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&emac_rgmii_pins>;
-+	phy-supply = <&reg_gmac_3v3>;
-+	phy-handle = <&ext_rgmii_phy>;
-+	phy-mode = "rgmii";
-+
-+	allwinner,leds-active-low;
-+	status = "okay";
-+};
-+
-+&mdio {
-+	ext_rgmii_phy: ethernet-phy@1 {
-+		compatible = "ethernet-phy-ieee802.3-c22";
-+		reg = <0>;
-+	};
-+};
-+
- &mmc2 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&mmc2_8bit_pins>;
-diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
-index 97920b12a944..80026f3caafc 100644
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
-@@ -61,3 +61,19 @@
- 		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
- 	};
- };
-+
-+&emac {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&emac_rgmii_pins>;
-+	phy-supply = <&reg_gmac_3v3>;
-+	phy-handle = <&ext_rgmii_phy>;
-+	phy-mode = "rgmii";
-+	status = "okay";
-+};
-+
-+&mdio {
-+	ext_rgmii_phy: ethernet-phy@1 {
-+		compatible = "ethernet-phy-ieee802.3-c22";
-+		reg = <1>;
-+	};
-+};
-diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
-index 11240a8313c2..d38282b9e5d4 100644
---- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
-+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
-@@ -391,6 +391,32 @@
- 			clocks = <&osc24M>;
- 		};
- 
-+		emac: ethernet@1c30000 {
-+			compatible = "allwinner,sun8i-h3-emac";
-+			syscon = <&syscon>;
-+			reg = <0x01c30000 0x10000>;
-+			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "macirq";
-+			resets = <&ccu RST_BUS_EMAC>;
-+			reset-names = "stmmaceth";
-+			clocks = <&ccu CLK_BUS_EMAC>;
-+			clock-names = "stmmaceth";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			status = "disabled";
-+
-+			mdio: mdio {
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+				int_mii_phy: ethernet-phy@1 {
-+					compatible = "ethernet-phy-ieee802.3-c22";
-+					reg = <1>;
-+					clocks = <&ccu CLK_BUS_EPHY>;
-+					resets = <&ccu RST_BUS_EPHY>;
-+				};
-+			};
-+		};
-+
- 		spi0: spi@01c68000 {
- 			compatible = "allwinner,sun8i-h3-spi";
- 			reg = <0x01c68000 0x1000>;
--- 
-2.13.5
-
-From 4aba5ca95496899165ee7ceef5d9c60a6e7b15dd Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Mon, 4 Sep 2017 13:04:47 +0100
-Subject: [PATCH 3/4] Revert "arm64: dts: allwinner: Revert EMAC changes"
-
-This reverts commit 87e1f5e8bb4bd584de0a8f3b1e42196dca221d02.
----
- .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts   | 16 ++++++++++++++++
- .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts    | 15 +++++++++++++++
- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts  | 17 +++++++++++++++++
- .../dts/allwinner/sun50i-a64-sopine-baseboard.dts    | 16 ++++++++++++++++
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi        | 20 ++++++++++++++++++++
- .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts     | 17 +++++++++++++++++
- .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts    | 17 +++++++++++++++++
- .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts  | 17 +++++++++++++++++
- 8 files changed, 135 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
-index 6872135d7f84..ba2fde2909f9 100644
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
-@@ -51,6 +51,7 @@
- 	compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
- 
- 	aliases {
-+		ethernet0 = &emac;
- 		serial0 = &uart0;
- 		serial1 = &uart1;
- 	};
-@@ -67,6 +68,14 @@
- 	};
- };
- 
-+&emac {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&rgmii_pins>;
-+	phy-mode = "rgmii";
-+	phy-handle = <&ext_rgmii_phy>;
-+	status = "okay";
-+};
-+
- &i2c1 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&i2c1_pins>;
-@@ -77,6 +86,13 @@
- 	bias-pull-up;
- };
- 
-+&mdio {
-+	ext_rgmii_phy: ethernet-phy@1 {
-+		compatible = "ethernet-phy-ieee802.3-c22";
-+		reg = <1>;
-+	};
-+};
-+
- &mmc0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&mmc0_pins>;
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
-index f82ccf332c0f..24f1aac366d6 100644
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
-@@ -48,3 +48,18 @@
- 
- 	/* TODO: Camera, touchscreen, etc. */
- };
-+
-+&emac {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&rgmii_pins>;
-+	phy-mode = "rgmii";
-+	phy-handle = <&ext_rgmii_phy>;
-+	status = "okay";
-+};
-+
-+&mdio {
-+	ext_rgmii_phy: ethernet-phy@1 {
-+		compatible = "ethernet-phy-ieee802.3-c22";
-+		reg = <1>;
-+	};
-+};
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-index 7c533b6d4ba9..827168bc22ed 100644
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-@@ -51,6 +51,7 @@
- 	compatible = "pine64,pine64", "allwinner,sun50i-a64";
- 
- 	aliases {
-+		ethernet0 = &emac;
- 		serial0 = &uart0;
- 		serial1 = &uart1;
- 		serial2 = &uart2;
-@@ -78,6 +79,15 @@
- 	status = "okay";
- };
- 
-+&emac {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&rmii_pins>;
-+	phy-mode = "rmii";
-+	phy-handle = <&ext_rmii_phy1>;
-+	status = "okay";
-+
-+};
-+
- &i2c1 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&i2c1_pins>;
-@@ -88,6 +98,13 @@
- 	bias-pull-up;
- };
- 
-+&mdio {
-+	ext_rmii_phy1: ethernet-phy@1 {
-+		compatible = "ethernet-phy-ieee802.3-c22";
-+		reg = <1>;
-+	};
-+};
-+
- &mmc0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&mmc0_pins>;
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
-index d891a1a27f6c..216e3a5dafae 100644
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
-@@ -53,6 +53,7 @@
- 		     "allwinner,sun50i-a64";
- 
- 	aliases {
-+		ethernet0 = &emac;
- 		serial0 = &uart0;
- 	};
- 
-@@ -76,6 +77,21 @@
- 	status = "okay";
- };
- 
-+&emac {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&rgmii_pins>;
-+	phy-mode = "rgmii";
-+	phy-handle = <&ext_rgmii_phy>;
-+	status = "okay";
-+};
-+
-+&mdio {
-+	ext_rgmii_phy: ethernet-phy@1 {
-+		compatible = "ethernet-phy-ieee802.3-c22";
-+		reg = <1>;
-+	};
-+};
-+
- &mmc2 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&mmc2_pins>;
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-index 68aadc9b96dc..bd0f33b77f57 100644
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -449,6 +449,26 @@
- 			#size-cells = <0>;
- 		};
- 
-+		emac: ethernet@1c30000 {
-+			compatible = "allwinner,sun50i-a64-emac";
-+			syscon = <&syscon>;
-+			reg = <0x01c30000 0x10000>;
-+			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-+			interrupt-names = "macirq";
-+			resets = <&ccu RST_BUS_EMAC>;
-+			reset-names = "stmmaceth";
-+			clocks = <&ccu CLK_BUS_EMAC>;
-+			clock-names = "stmmaceth";
-+			status = "disabled";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+
-+			mdio: mdio {
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+			};
-+		};
-+
- 		gic: interrupt-controller@1c81000 {
- 			compatible = "arm,gic-400";
- 			reg = <0x01c81000 0x1000>,
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
-index 1c2387bd5df6..968908761194 100644
---- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
-@@ -50,6 +50,7 @@
- 	compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
- 
- 	aliases {
-+		ethernet0 = &emac;
- 		serial0 = &uart0;
- 	};
- 
-@@ -108,6 +109,22 @@
- 	status = "okay";
- };
- 
-+&emac {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&emac_rgmii_pins>;
-+	phy-supply = <&reg_gmac_3v3>;
-+	phy-handle = <&ext_rgmii_phy>;
-+	phy-mode = "rgmii";
-+	status = "okay";
-+};
-+
-+&mdio {
-+	ext_rgmii_phy: ethernet-phy@7 {
-+		compatible = "ethernet-phy-ieee802.3-c22";
-+		reg = <7>;
-+	};
-+};
-+
- &mmc0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
-index 4f77c8470f6c..a8296feee884 100644
---- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
-@@ -59,6 +59,7 @@
- 	};
- 
- 	aliases {
-+		ethernet0 = &emac;
- 		serial0 = &uart0;
- 	};
- 
-@@ -136,12 +137,28 @@
- 	status = "okay";
- };
- 
-+&emac {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&emac_rgmii_pins>;
-+	phy-supply = <&reg_gmac_3v3>;
-+	phy-handle = <&ext_rgmii_phy>;
-+	phy-mode = "rgmii";
-+	status = "okay";
-+};
-+
- &ir {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&ir_pins_a>;
- 	status = "okay";
- };
- 
-+&mdio {
-+	ext_rgmii_phy: ethernet-phy@1 {
-+		compatible = "ethernet-phy-ieee802.3-c22";
-+		reg = <1>;
-+	};
-+};
-+
- &mmc0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
-diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
-index 6be06873e5af..d906b302cbcd 100644
---- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
-@@ -54,6 +54,7 @@
- 	compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
- 
- 	aliases {
-+		ethernet0 = &emac;
- 		serial0 = &uart0;
- 	};
- 
-@@ -143,12 +144,28 @@
- 	status = "okay";
- };
- 
-+&emac {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&emac_rgmii_pins>;
-+	phy-supply = <&reg_gmac_3v3>;
-+	phy-handle = <&ext_rgmii_phy>;
-+	phy-mode = "rgmii";
-+	status = "okay";
-+};
-+
- &ir {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&ir_pins_a>;
- 	status = "okay";
- };
- 
-+&mdio {
-+	ext_rgmii_phy: ethernet-phy@1 {
-+		compatible = "ethernet-phy-ieee802.3-c22";
-+		reg = <1>;
-+	};
-+};
-+
- &mmc0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
--- 
-2.13.5
-
-From 11190f020b948ccdf15061b6df8cc2836a2afcb1 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Mon, 4 Sep 2017 13:04:55 +0100
-Subject: [PATCH 4/4] Revert "dt-bindings: net: Revert sun8i dwmac binding"
-
-This reverts commit 8aa33ec2f4812d1ee96f4c02ba013f5b9c514343.
----
- .../devicetree/bindings/net/dwmac-sun8i.txt        | 84 ++++++++++++++++++++++
- 1 file changed, 84 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt
-
-diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
-new file mode 100644
-index 000000000000..725f3b187886
---- /dev/null
-+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
-@@ -0,0 +1,84 @@
-+* Allwinner sun8i GMAC ethernet controller
-+
-+This device is a platform glue layer for stmmac.
-+Please see stmmac.txt for the other unchanged properties.
-+
-+Required properties:
-+- compatible: should be one of the following string:
-+		"allwinner,sun8i-a83t-emac"
-+		"allwinner,sun8i-h3-emac"
-+		"allwinner,sun8i-v3s-emac"
-+		"allwinner,sun50i-a64-emac"
-+- reg: address and length of the register for the device.
-+- interrupts: interrupt for the device
-+- interrupt-names: should be "macirq"
-+- clocks: A phandle to the reference clock for this device
-+- clock-names: should be "stmmaceth"
-+- resets: A phandle to the reset control for this device
-+- reset-names: should be "stmmaceth"
-+- phy-mode: See ethernet.txt
-+- phy-handle: See ethernet.txt
-+- #address-cells: shall be 1
-+- #size-cells: shall be 0
-+- syscon: A phandle to the syscon of the SoC with one of the following
-+ compatible string:
-+  - allwinner,sun8i-h3-system-controller
-+  - allwinner,sun8i-v3s-system-controller
-+  - allwinner,sun50i-a64-system-controller
-+  - allwinner,sun8i-a83t-system-controller
-+
-+Optional properties:
-+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0)
-+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0)
-+Both delay properties need to be a multiple of 100. They control the delay for
-+external PHY.
-+
-+Optional properties for the following compatibles:
-+  - "allwinner,sun8i-h3-emac",
-+  - "allwinner,sun8i-v3s-emac":
-+- allwinner,leds-active-low: EPHY LEDs are active low
-+
-+Required child node of emac:
-+- mdio bus node: should be named mdio
-+
-+Required properties of the mdio node:
-+- #address-cells: shall be 1
-+- #size-cells: shall be 0
-+
-+The device node referenced by "phy" or "phy-handle" should be a child node
-+of the mdio node. See phy.txt for the generic PHY bindings.
-+
-+Required properties of the phy node with the following compatibles:
-+  - "allwinner,sun8i-h3-emac",
-+  - "allwinner,sun8i-v3s-emac":
-+- clocks: a phandle to the reference clock for the EPHY
-+- resets: a phandle to the reset control for the EPHY
-+
-+Example:
-+
-+emac: ethernet@1c0b000 {
-+	compatible = "allwinner,sun8i-h3-emac";
-+	syscon = <&syscon>;
-+	reg = <0x01c0b000 0x104>;
-+	interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-+	interrupt-names = "macirq";
-+	resets = <&ccu RST_BUS_EMAC>;
-+	reset-names = "stmmaceth";
-+	clocks = <&ccu CLK_BUS_EMAC>;
-+	clock-names = "stmmaceth";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	phy-handle = <&int_mii_phy>;
-+	phy-mode = "mii";
-+	allwinner,leds-active-low;
-+	mdio: mdio {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		int_mii_phy: ethernet-phy@1 {
-+			reg = <1>;
-+			clocks = <&ccu CLK_BUS_EPHY>;
-+			resets = <&ccu RST_BUS_EPHY>;
-+		};
-+	};
-+};
--- 
-2.13.5
-

arm-imx6-hummingboard2.patch

@@ -1,902 +0,0 @@
-From e9e601215d294d473a593641b1ecfd1fa4586a90 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Thu, 6 Apr 2017 13:52:54 +0100
-Subject: [PATCH 1/4] [RFC,v2,1/4] ARM: dts: imx6qdl: add HummingBoard2 boards
-
-From: Jon Nettleton <jon@solid-run.com>
-
-This adds support for the Hummingboard Gate and Edge devices from
-SolidRun.
-
-Signed-off-by: Jon Nettleton <jon@solid-run.com>
-Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
-Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
----
- arch/arm/boot/dts/Makefile                   |   2 +
- arch/arm/boot/dts/imx6dl-hummingboard2.dts   |  52 +++
- arch/arm/boot/dts/imx6q-hummingboard2.dts    |  60 +++
- arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi | 543 +++++++++++++++++++++++++++
- 4 files changed, 657 insertions(+)
- create mode 100644 arch/arm/boot/dts/imx6dl-hummingboard2.dts
- create mode 100644 arch/arm/boot/dts/imx6q-hummingboard2.dts
- create mode 100644 arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 011808490fed..ccdff6650541 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -353,6 +353,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
- 	imx6dl-gw5903.dtb \
- 	imx6dl-gw5904.dtb \
- 	imx6dl-hummingboard.dtb \
-+	imx6dl-hummingboard2.dtb \
- 	imx6dl-icore.dtb \
- 	imx6dl-icore-rqs.dtb \
- 	imx6dl-nit6xlite.dtb \
-@@ -397,6 +398,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
- 	imx6q-gw5904.dtb \
- 	imx6q-h100.dtb \
- 	imx6q-hummingboard.dtb \
-+	imx6q-hummingboard2.dtb \
- 	imx6q-icore.dtb \
- 	imx6q-icore-ofcap10.dtb \
- 	imx6q-icore-ofcap12.dtb \
-diff --git a/arch/arm/boot/dts/imx6dl-hummingboard2.dts b/arch/arm/boot/dts/imx6dl-hummingboard2.dts
-new file mode 100644
-index 000000000000..990b5050de5b
---- /dev/null
-+++ b/arch/arm/boot/dts/imx6dl-hummingboard2.dts
-@@ -0,0 +1,52 @@
-+/*
-+ * Device Tree file for SolidRun HummingBoard2
-+ * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
-+ * Based on work by Russell King
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ *  a) This file is free software; you can redistribute it and/or
-+ *     modify it under the terms of the GNU General Public License as
-+ *     published by the Free Software Foundation; either version 2 of the
-+ *     License.
-+ *
-+ *     This file is distributed in the hope that it will be useful
-+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *     GNU General Public License for more details.
-+ *
-+ * Or, alternatively
-+ *
-+ *  b) Permission is hereby granted, free of charge, to any person
-+ *     obtaining a copy of this software and associated documentation
-+ *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or
-+ *     sell copies of the Software, and to permit persons to whom the
-+ *     Software is furnished to do so, subject to the following
-+ *     conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be
-+ *     included in all copies or substantial portions of the Software.
-+ *
-+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
-+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
-+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ *     OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+/dts-v1/;
-+
-+#include "imx6dl.dtsi"
-+#include "imx6qdl-hummingboard2.dtsi"
-+
-+/ {
-+	model = "SolidRun HummingBoard2 Solo/DualLite";
-+	compatible = "solidrun,hummingboard2/dl", "fsl,imx6dl";
-+};
-diff --git a/arch/arm/boot/dts/imx6q-hummingboard2.dts b/arch/arm/boot/dts/imx6q-hummingboard2.dts
-new file mode 100644
-index 000000000000..f5eec9163bb8
---- /dev/null
-+++ b/arch/arm/boot/dts/imx6q-hummingboard2.dts
-@@ -0,0 +1,60 @@
-+/*
-+ * Device Tree file for SolidRun HummingBoard2
-+ * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
-+ * Based on work by Russell King
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ *  a) This file is free software; you can redistribute it and/or
-+ *     modify it under the terms of the GNU General Public License as
-+ *     published by the Free Software Foundation; either version 2 of the
-+ *     License.
-+ *
-+ *     This file is distributed in the hope that it will be useful
-+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *     GNU General Public License for more details.
-+ *
-+ * Or, alternatively
-+ *
-+ *  b) Permission is hereby granted, free of charge, to any person
-+ *     obtaining a copy of this software and associated documentation
-+ *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or
-+ *     sell copies of the Software, and to permit persons to whom the
-+ *     Software is furnished to do so, subject to the following
-+ *     conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be
-+ *     included in all copies or substantial portions of the Software.
-+ *
-+ *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
-+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
-+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ *     OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+/dts-v1/;
-+
-+#include "imx6q.dtsi"
-+#include "imx6qdl-hummingboard2.dtsi"
-+
-+/ {
-+	model = "SolidRun HummingBoard2 Dual/Quad";
-+	compatible = "solidrun,hummingboard2/q", "fsl,imx6q";
-+};
-+
-+&sata {
-+	status = "okay";
-+	fsl,transmit-level-mV = <1104>;
-+	fsl,transmit-boost-mdB = <0>;
-+	fsl,transmit-atten-16ths = <9>;
-+	fsl,no-spread-spectrum;
-+};
-diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
-new file mode 100644
-index 000000000000..11b63f6f2b89
---- /dev/null
-+++ b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
-@@ -0,0 +1,543 @@
-+/*
-+ * Device Tree file for SolidRun HummingBoard2
-+ * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ *  a) This file is free software; you can redistribute it and/or
-+ *     modify it under the terms of the GNU General Public License as
-+ *     published by the Free Software Foundation; either version 2 of the
-+ *     License.
-+ *
-+ *     This file is distributed in the hope that it will be useful,
-+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *     GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ *  b) Permission is hereby granted, free of charge, to any person
-+ *     obtaining a copy of this software and associated documentation
-+ *     files (the "Software"), to deal in the Software without
-+ *     restriction, including without limitation the rights to use
-+ *     copy, modify, merge, publish, distribute, sublicense, and/or
-+ *     sell copies of the Software, and to permit persons to whom the
-+ *     Software is furnished to do so, subject to the following
-+ *     conditions:
-+ *
-+ *     The above copyright notice and this permission notice shall be
-+ *     included in all copies or substantial portions of the Software.
-+ *
-+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ *     OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+#include "imx6qdl-microsom.dtsi"
-+#include "imx6qdl-microsom-ar8035.dtsi"
-+
-+/ {
-+	chosen {
-+		stdout-path = &uart1;
-+	};
-+
-+	ir_recv: ir-receiver {
-+		compatible = "gpio-ir-receiver";
-+		gpios = <&gpio7 9 1>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pinctrl_hummingboard2_gpio7_9>;
-+		linux,rc-map-name = "rc-rc6-mce";
-+	};
-+
-+	usdhc2_pwrseq: usdhc2-pwrseq {
-+		compatible = "mmc-pwrseq-simple";
-+		reset-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
-+	};
-+
-+	reg_3p3v: regulator-3p3v {
-+		compatible = "regulator-fixed";
-+		regulator-name = "3P3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-always-on;
-+	};
-+
-+	reg_1p8v: regulator-1p8v {
-+		compatible = "regulator-fixed";
-+		regulator-name = "1P8V";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		regulator-always-on;
-+	};
-+
-+	reg_usbh1_vbus: regulator-usb-h1-vbus {
-+		compatible = "regulator-fixed";
-+		enable-active-high;
-+		gpio = <&gpio1 0 0>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pinctrl_hummingboard2_usbh1_vbus>;
-+		regulator-name = "usb_h1_vbus";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+	};
-+
-+	reg_usbotg_vbus: regulator-usb-otg-vbus {
-+		compatible = "regulator-fixed";
-+		enable-active-high;
-+		gpio = <&gpio3 22 0>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pinctrl_hummingboard2_usbotg_vbus>;
-+		regulator-name = "usb_otg_vbus";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+	};
-+
-+	reg_usbh2_vbus: regulator-usb-h2-vbus {
-+		compatible = "regulator-gpio";
-+		enable-active-high;
-+		enable-gpio = <&gpio2 13 0>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pinctrl_hummingboard2_usbh2_vbus>;
-+		regulator-name = "usb_h2_vbus";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		regulator-boot-on;
-+	};
-+
-+	reg_usbh3_vbus: regulator-usb-h3-vbus {
-+		compatible = "regulator-gpio";
-+		enable-active-high;
-+		enable-gpio = <&gpio7 10 0>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pinctrl_hummingboard2_usbh3_vbus>;
-+		regulator-name = "usb_h3_vbus";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		regulator-boot-on;
-+	};
-+
-+	sound-sgtl5000 {
-+		audio-codec = <&sgtl5000>;
-+		audio-routing =
-+			"MIC_IN", "Mic Jack",
-+			"Mic Jack", "Mic Bias",
-+			"Headphone Jack", "HP_OUT";
-+		compatible = "fsl,imx-audio-sgtl5000";
-+		model = "On-board Codec";
-+		mux-ext-port = <5>;
-+		mux-int-port = <1>;
-+		ssi-controller = <&ssi1>;
-+	};
-+};
-+
-+&audmux {
-+	status = "okay";
-+};
-+
-+&ecspi2 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_hummingboard2_ecspi2>;
-+	cs-gpios = <&gpio2 26 0>;
-+	status = "okay";
-+};
-+
-+&hdmi {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_hummingboard2_hdmi>;
-+	ddc-i2c-bus = <&i2c2>;
-+	status = "okay";
-+};
-+
-+&i2c1 {
-+	clock-frequency = <100000>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_hummingboard2_i2c1>;
-+	status = "okay";
-+
-+	pcf8523: rtc@68 {
-+		compatible = "nxp,pcf8523";
-+		reg = <0x68>;
-+		nxp,12p5_pf;
-+	};
-+
-+	sgtl5000: codec@0a {
-+		clocks = <&clks IMX6QDL_CLK_CKO>;
-+		compatible = "fsl,sgtl5000";
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pinctrl_hummingboard2_sgtl5000>;
-+		reg = <0x0a>;
-+		VDDA-supply = <&reg_3p3v>;
-+		VDDIO-supply = <&reg_3p3v>;
-+	};
-+};
-+
-+&i2c2 {
-+	clock-frequency = <100000>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_hummingboard2_i2c2>;
-+	status = "okay";
-+};
-+
-+&i2c3 {
-+	clock-frequency = <100000>;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_hummingboard2_i2c3>;
-+	status = "okay";
-+};
-+
-+&iomuxc {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_hog>;
-+
-+	hummingboard2 {
-+		pinctrl_hog: hoggrp {
-+		fsl,pins = <
-+				/*
-+				 * 36 pin headers GPIO description. The pins
-+				 * numbering as following -
-+				 *
-+				 * 	3.2v	5v	74	75
-+				 *	73	72	71	70
-+				 *	69	68	67	66
-+				 *
-+				 *	77	78	79	76
-+				 *	65	64	61	60
-+				 *	53	52	51	50
-+				 *	49	48	166	132
-+				 *	95	94	90	91
-+				 *	GND	54	24	204
-+				 *
-+				 * The GPIO numbers can be extracted using
-+				 * signal name from below.
-+				 * Example -
-+				 * MX6QDL_PAD_EIM_DA10__GPIO3_IO10 is
-+				 * GPIO(3,10) which is (3-1)*32+10 = gpio 74
-+				 *
-+				 * i.e. The mapping of GPIO(X,Y) to Linux gpio
-+				 * number is : gpio number = (X-1) * 32 + Y
-+				 */
-+				/* DI1_PIN15 */
-+				MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x400130b1
-+				/* DI1_PIN02 */
-+				MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x400130b1
-+				/* DISP1_DATA00 */
-+				MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x400130b1
-+				/* DISP1_DATA01 */
-+				MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x400130b1
-+				/* DISP1_DATA02 */
-+				MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x400130b1
-+				/* DISP1_DATA03 */
-+				MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x400130b1
-+				/* DISP1_DATA04 */
-+				MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x400130b1
-+				/* DISP1_DATA05 */
-+				MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x400130b1
-+				/* DISP1_DATA06 */
-+				MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x400130b1
-+				/* DISP1_DATA07 */
-+				MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x400130b1
-+				/* DI1_D0_CS */
-+				MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x400130b1
-+				/* DI1_D1_CS */
-+				MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x400130b1
-+				/* DI1_PIN01 */
-+				MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x400130b1
-+				/* DI1_PIN03 */
-+				MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x400130b1
-+				/* DISP1_DATA08 */
-+				MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x400130b1
-+				/* DISP1_DATA09 */
-+				MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x400130b1
-+				/* DISP1_DATA10 */
-+				MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x400130b1
-+				/* DISP1_DATA11 */
-+				MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x400130b1
-+				/* DISP1_DATA12 */
-+				MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x400130b1
-+				/* DISP1_DATA13 */
-+				MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x400130b1
-+				/* DISP1_DATA14 */
-+				MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x400130b1
-+				/* DISP1_DATA15 */
-+				MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x400130b1
-+				/* DISP1_DATA16 */
-+				MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x400130b1
-+				/* DISP1_DATA17 */
-+				MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x400130b1
-+				/* DISP1_DATA18 */
-+				MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x400130b1
-+				/* DISP1_DATA19 */
-+				MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x400130b1
-+				/* DISP1_DATA20 */
-+				MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x400130b1
-+				/* DISP1_DATA21 */
-+				MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x400130b1
-+				/* DISP1_DATA22 */
-+				MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x400130b1
-+				/* DISP1_DATA23 */
-+				MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x400130b1
-+				/* DI1_DISP_CLK */
-+				MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x400130b1
-+				/* SPDIF_IN */
-+				MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x400130b1
-+				/* SPDIF_OUT */
-+				MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x400130b1
-+
-+				/* MikroBUS GPIO pin number 10 */
-+				MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_ecspi2: hummingboard2-ecspi2grp {
-+			fsl,pins = <
-+				MX6QDL_PAD_EIM_OE__ECSPI2_MISO	0x100b1
-+				MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI	0x100b1
-+				MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK	0x100b1
-+				MX6QDL_PAD_EIM_RW__GPIO2_IO26	0x000b1 /* CS */
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_gpio7_9: hummingboard2-gpio7_9 {
-+			fsl,pins = <
-+				MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x80000000
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_hdmi: hummingboard2-hdmi {
-+			fsl,pins = <
-+				MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_i2c1: hummingboard2-i2c1 {
-+			fsl,pins = <
-+				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
-+				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_i2c2: hummingboard2-i2c2 {
-+			fsl,pins = <
-+				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
-+				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_i2c3: hummingboard2-i2c3 {
-+			fsl,pins = <
-+				MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
-+				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_mipi: hummingboard2_mipi {
-+			fsl,pins = <
-+				MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1
-+				MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x4001b8b1
-+				MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_pcie_reset: hummingboard2-pcie-reset {
-+			fsl,pins = <
-+				MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b1
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_pwm1: pwm1grp {
-+			fsl,pins = <
-+				MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_sgtl5000: hummingboard2-sgtl5000 {
-+			fsl,pins = <
-+				MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
-+				MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
-+				MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0
-+				MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
-+				MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_usbh1_vbus: hummingboard2-usbh1-vbus {
-+			fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
-+		};
-+
-+		pinctrl_hummingboard2_usbh2_vbus: hummingboard2-usbh2-vbus {
-+			fsl,pins = <MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x1b0b0>;
-+		};
-+
-+		pinctrl_hummingboard2_usbh3_vbus: hummingboard2-usbh3-vbus {
-+			fsl,pins = <MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x1b0b0>;
-+		};
-+
-+		pinctrl_hummingboard2_usbotg_id: hummingboard2-usbotg-id {
-+			/*
-+			 * Similar to pinctrl_usbotg_2, but we want it
-+			 * pulled down for a fixed host connection.
-+			 */
-+			fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
-+		};
-+
-+		pinctrl_hummingboard2_usbotg_vbus: hummingboard2-usbotg-vbus {
-+			fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
-+		};
-+
-+		pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-aux {
-+			fsl,pins = <
-+				MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x13071
-+				MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
-+				MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_usdhc2: hummingboard2-usdhc2 {
-+			fsl,pins = <
-+				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059
-+				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059
-+				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
-+				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
-+				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
-+				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_usdhc2_100mhz: hummingboard2-usdhc2-100mhz {
-+			fsl,pins = <
-+				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x170b9
-+				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x100b9
-+				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
-+				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
-+				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
-+				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130b9
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_usdhc2_200mhz: hummingboard2-usdhc2-200mhz {
-+			fsl,pins = <
-+				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x170f9
-+				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x100f9
-+				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
-+				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
-+				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
-+				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130f9
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_usdhc3: hummingboard2-usdhc3 {
-+			fsl,pins = <
-+				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059
-+				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059
-+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
-+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
-+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
-+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
-+				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
-+				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
-+				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
-+				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
-+				MX6QDL_PAD_SD3_RST__SD3_RESET  0x17059
-+			>;
-+		};
-+
-+		pinctrl_hummingboard2_uart3: hummingboard2-uart3 {
-+			fsl,pins = <
-+				MX6QDL_PAD_EIM_D25__UART3_TX_DATA	0x1b0b1
-+				MX6QDL_PAD_EIM_D24__UART3_RX_DATA	0x40013000
-+			>;
-+		};
-+	};
-+};
-+
-+&ldb {
-+	status = "disabled";
-+
-+	lvds-channel@0 {
-+		fsl,data-mapping = "spwg";
-+		fsl,data-width = <18>;
-+	};
-+};
-+
-+&pcie {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_hummingboard2_pcie_reset>;
-+	reset-gpio = <&gpio2 11 0>;
-+	status = "okay";
-+};
-+
-+&pwm1 {
-+        pinctrl-names = "default";
-+        pinctrl-0 = <&pinctrl_hummingboard2_pwm1>;
-+        status = "okay";
-+};
-+
-+&pwm3 {
-+	status = "disabled";
-+};
-+
-+&pwm4 {
-+	status = "disabled";
-+};
-+
-+&ssi1 {
-+	status = "okay";
-+};
-+
-+&usbh1 {
-+	disable-over-current;
-+	vbus-supply = <&reg_usbh1_vbus>;
-+	status = "okay";
-+};
-+
-+&usbotg {
-+	disable-over-current;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_hummingboard2_usbotg_id>;
-+	vbus-supply = <&reg_usbotg_vbus>;
-+	status = "okay";
-+};
-+
-+&usdhc2 {
-+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-+	pinctrl-0 = <
-+		&pinctrl_hummingboard2_usdhc2_aux
-+		&pinctrl_hummingboard2_usdhc2
-+	>;
-+	pinctrl-1 = <
-+		&pinctrl_hummingboard2_usdhc2_aux
-+		&pinctrl_hummingboard2_usdhc2_100mhz
-+	>;
-+	pinctrl-2 = <
-+		&pinctrl_hummingboard2_usdhc2_aux
-+		&pinctrl_hummingboard2_usdhc2_200mhz
-+	>;
-+	mmc-pwrseq = <&usdhc2_pwrseq>;
-+	cd-gpios = <&gpio1 4 0>;
-+	status = "okay";
-+};
-+
-+&usdhc3 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <
-+		&pinctrl_hummingboard2_usdhc3
-+	>;
-+	vmmc-supply = <&reg_3p3v>;
-+	vqmmc-supply = <&reg_3p3v>;
-+	bus-width = <8>;
-+	non-removable;
-+	status = "okay";
-+};
-+
-+&uart3 {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&pinctrl_hummingboard2_uart3>;
-+	status = "okay";
-+};
--- 
-2.12.2
-
-From 3da2a99c4a8f19e846b19071441d2c6b88e00c06 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Fri, 13 Jan 2017 14:45:30 +0000
-Subject: [PATCH 2/4] ARM: dts: imx6*-hummingboard2: fix SD card detect
-
-Fix the SD card detect signal, which was missing the polarity
-specification, and the pull-up necessary for proper signalling.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
----
- arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
-index 11b63f6f2b89..734487edf200 100644
---- a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
-+++ b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
-@@ -393,7 +393,7 @@
- 
- 		pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-aux {
- 			fsl,pins = <
--				MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x13071
-+				MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071
- 				MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
- 				MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
- 			>;
-@@ -520,7 +520,7 @@
- 		&pinctrl_hummingboard2_usdhc2_200mhz
- 	>;
- 	mmc-pwrseq = <&usdhc2_pwrseq>;
--	cd-gpios = <&gpio1 4 0>;
-+	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
- 	status = "okay";
- };
- 
--- 
-2.12.2
-
-From 57b0103b600a535a35e5ff9714649519a0b3a77a Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@armlinux.org.uk>
-Date: Fri, 13 Jan 2017 14:45:35 +0000
-Subject: [PATCH 3/4] ARM: dts: imx6*-hummingboard2: use proper gpio flags
- definitions
-
-Use proper gpio flag definitions for GPIOs rather than using opaque
-uninformative numbers.
-
-Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
----
- arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
-index 734487edf200..88aaed26dd77 100644
---- a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
-+++ b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
-@@ -50,7 +50,7 @@
- 
- 	ir_recv: ir-receiver {
- 		compatible = "gpio-ir-receiver";
--		gpios = <&gpio7 9 1>;
-+		gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
- 		pinctrl-names = "default";
- 		pinctrl-0 = <&pinctrl_hummingboard2_gpio7_9>;
- 		linux,rc-map-name = "rc-rc6-mce";
-@@ -80,7 +80,7 @@
- 	reg_usbh1_vbus: regulator-usb-h1-vbus {
- 		compatible = "regulator-fixed";
- 		enable-active-high;
--		gpio = <&gpio1 0 0>;
-+		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
- 		pinctrl-names = "default";
- 		pinctrl-0 = <&pinctrl_hummingboard2_usbh1_vbus>;
- 		regulator-name = "usb_h1_vbus";
-@@ -91,7 +91,7 @@
- 	reg_usbotg_vbus: regulator-usb-otg-vbus {
- 		compatible = "regulator-fixed";
- 		enable-active-high;
--		gpio = <&gpio3 22 0>;
-+		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
- 		pinctrl-names = "default";
- 		pinctrl-0 = <&pinctrl_hummingboard2_usbotg_vbus>;
- 		regulator-name = "usb_otg_vbus";
-@@ -102,7 +102,7 @@
- 	reg_usbh2_vbus: regulator-usb-h2-vbus {
- 		compatible = "regulator-gpio";
- 		enable-active-high;
--		enable-gpio = <&gpio2 13 0>;
-+		enable-gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
- 		pinctrl-names = "default";
- 		pinctrl-0 = <&pinctrl_hummingboard2_usbh2_vbus>;
- 		regulator-name = "usb_h2_vbus";
-@@ -114,7 +114,7 @@
- 	reg_usbh3_vbus: regulator-usb-h3-vbus {
- 		compatible = "regulator-gpio";
- 		enable-active-high;
--		enable-gpio = <&gpio7 10 0>;
-+		enable-gpio = <&gpio7 10 GPIO_ACTIVE_HIGH>;
- 		pinctrl-names = "default";
- 		pinctrl-0 = <&pinctrl_hummingboard2_usbh3_vbus>;
- 		regulator-name = "usb_h3_vbus";
--- 
-2.12.2
-
-From f931de70370ff576f381cb9745bc54225a1a8056 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Fri, 13 Jan 2017 14:45:40 +0000
-Subject: [PATCH 4/4] ARM: dts: imx6*-hummingboard2: convert to more
- conventional vmmc-supply
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
----
- arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi | 26 +++++++++++++++++++-------
- 1 file changed, 19 insertions(+), 7 deletions(-)
-
-diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
-index 88aaed26dd77..f19d30b34ac4 100644
---- a/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
-+++ b/arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
-@@ -56,11 +56,6 @@
- 		linux,rc-map-name = "rc-rc6-mce";
- 	};
- 
--	usdhc2_pwrseq: usdhc2-pwrseq {
--		compatible = "mmc-pwrseq-simple";
--		reset-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
--	};
--
- 	reg_3p3v: regulator-3p3v {
- 		compatible = "regulator-fixed";
- 		regulator-name = "3P3V";
-@@ -123,6 +118,18 @@
- 		regulator-boot-on;
- 	};
- 
-+	reg_usdhc2_vmmc: reg-usdhc2-vmmc {
-+		compatible = "regulator-fixed";
-+		gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
-+		pinctrl-names = "default";
-+		pinctrl-0 = <&pinctrl_hummingboard2_vmmc>;
-+		regulator-boot-on;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-min-microvolt = <3300000>;
-+		regulator-name = "usdhc2_vmmc";
-+		startup-delay-us = <1000>;
-+	};
-+
- 	sound-sgtl5000 {
- 		audio-codec = <&sgtl5000>;
- 		audio-routing =
-@@ -393,7 +400,6 @@
- 
- 		pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-aux {
- 			fsl,pins = <
--				MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071
- 				MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
- 				MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
- 			>;
-@@ -432,6 +438,12 @@
- 			>;
- 		};
- 
-+		pinctrl_hummingboard2_vmmc: hummingboard2-vmmc {
-+			fsl,pins = <
-+				MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071
-+			>;
-+		};
-+
- 		pinctrl_hummingboard2_usdhc3: hummingboard2-usdhc3 {
- 			fsl,pins = <
- 				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059
-@@ -519,7 +531,7 @@
- 		&pinctrl_hummingboard2_usdhc2_aux
- 		&pinctrl_hummingboard2_usdhc2_200mhz
- 	>;
--	mmc-pwrseq = <&usdhc2_pwrseq>;
-+	vmmc-supply = <&reg_usdhc2_vmmc>;
- 	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
- 	status = "okay";
- };
--- 
-2.12.2
-

arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch

@@ -1,100 +0,0 @@
-From bb3e08008c0e48fd4f51a0f0957eecae61a24d69 Mon Sep 17 00:00:00 2001
-From: Peter Robinson <pbrobinson@gmail.com>
-Date: Tue, 1 Nov 2016 09:35:30 +0000
-Subject: [PATCH] Revert "mmc: omap_hsmmc: Use dma_request_chan() for
- requesting DMA channel"
-
-This reverts commit 81eef6ca92014845d40e3f1310e42b7010303acc.
----
- drivers/mmc/host/omap_hsmmc.c | 50 ++++++++++++++++++++++++++++++++++---------
- 1 file changed, 40 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
-index 24ebc9a..3563321 100644
---- a/drivers/mmc/host/omap_hsmmc.c
-+++ b/drivers/mmc/host/omap_hsmmc.c
-@@ -32,6 +32,7 @@
- #include <linux/of_irq.h>
- #include <linux/of_gpio.h>
- #include <linux/of_device.h>
-+#include <linux/omap-dmaengine.h>
- #include <linux/mmc/host.h>
- #include <linux/mmc/core.h>
- #include <linux/mmc/mmc.h>
-@@ -1992,6 +1993,8 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
- 	struct resource *res;
- 	int ret, irq;
- 	const struct of_device_id *match;
-+	dma_cap_mask_t mask;
-+	unsigned tx_req, rx_req;
- 	const struct omap_mmc_of_data *data;
- 	void __iomem *base;
- 
-@@ -2121,17 +2124,44 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
- 
- 	omap_hsmmc_conf_bus_power(host);
- 
--	host->rx_chan = dma_request_chan(&pdev->dev, "rx");
--	if (IS_ERR(host->rx_chan)) {
--		dev_err(mmc_dev(host->mmc), "RX DMA channel request failed\n");
--		ret = PTR_ERR(host->rx_chan);
-+	if (!pdev->dev.of_node) {
-+		res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
-+		if (!res) {
-+			dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n");
-+			ret = -ENXIO;
-+			goto err_irq;
-+		}
-+		tx_req = res->start;
-+
-+		res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
-+		if (!res) {
-+			dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n");
-+			ret = -ENXIO;
-+			goto err_irq;
-+		}
-+		rx_req = res->start;
-+	}
-+
-+	dma_cap_zero(mask);
-+	dma_cap_set(DMA_SLAVE, mask);
-+
-+	host->rx_chan =
-+		dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
-+						 &rx_req, &pdev->dev, "rx");
-+
-+	if (!host->rx_chan) {
-+		dev_err(mmc_dev(host->mmc), "unable to obtain RX DMA engine channel\n");
-+		ret = -ENXIO;
- 		goto err_irq;
- 	}
- 
--	host->tx_chan = dma_request_chan(&pdev->dev, "tx");
--	if (IS_ERR(host->tx_chan)) {
--		dev_err(mmc_dev(host->mmc), "TX DMA channel request failed\n");
--		ret = PTR_ERR(host->tx_chan);
-+	host->tx_chan =
-+		dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
-+						 &tx_req, &pdev->dev, "tx");
-+
-+	if (!host->tx_chan) {
-+		dev_err(mmc_dev(host->mmc), "unable to obtain TX DMA engine channel\n");
-+		ret = -ENXIO;
- 		goto err_irq;
- 	}
- 
-@@ -2189,9 +2219,9 @@ err_slot_name:
- 	mmc_remove_host(mmc);
- err_irq:
- 	device_init_wakeup(&pdev->dev, false);
--	if (!IS_ERR_OR_NULL(host->tx_chan))
-+	if (host->tx_chan)
- 		dma_release_channel(host->tx_chan);
--	if (!IS_ERR_OR_NULL(host->rx_chan))
-+	if (host->rx_chan)
- 		dma_release_channel(host->rx_chan);
- 	pm_runtime_dont_use_autosuspend(host->dev);
- 	pm_runtime_put_sync(host->dev);
--- 
-2.9.3
-

arm-sdhci-esdhc-imx-fixes.patch

@@ -0,0 +1,172 @@
+From patchwork Thu Jun 28 07:31:36 2018
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: mmc: sdhci-esdhc-imx: support eMMC DDR mode when running at 3.3V
+From: Stefan Agner <stefan@agner.ch>
+X-Patchwork-Id: 10493185
+Message-Id: <20180628073136.21748-1-stefan@agner.ch>
+To: adrian.hunter@intel.com, ulf.hansson@linaro.org
+Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com,
+ michael@amarulasolutions.com, linux-mmc@vger.kernel.org,
+ linux-kernel@vger.kernel.org, Stefan Agner <stefan@agner.ch>
+Date: Thu, 28 Jun 2018 09:31:36 +0200
+
+The uSDHC supports DDR modes for eMMC devices running at 3.3V. This
+allows to run eMMC with 3.3V signaling voltage at DDR52 mode:
+
+  # cat /sys/kernel/debug/mmc1/ios
+  clock:          52000000 Hz
+  vdd:            21 (3.3 ~ 3.4 V)
+  bus mode:       2 (push-pull)
+  chip select:    0 (don't care)
+  power mode:     2 (on)
+  bus width:      3 (8 bits)
+  timing spec:    8 (mmc DDR52)
+  signal voltage: 0 (3.30 V)
+  driver type:    0 (driver type B)
+
+Signed-off-by: Stefan Agner <stefan@agner.ch>
+---
+ drivers/mmc/host/sdhci-esdhc-imx.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
+index b716b933f00a..6f444731754d 100644
+--- a/drivers/mmc/host/sdhci-esdhc-imx.c
++++ b/drivers/mmc/host/sdhci-esdhc-imx.c
+@@ -1324,7 +1324,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
+ 
+ 	if (esdhc_is_usdhc(imx_data)) {
+ 		host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
+-		host->mmc->caps |= MMC_CAP_1_8V_DDR;
++		host->mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
+ 		if (!(imx_data->socdata->flags & ESDHC_FLAG_HS200))
+ 			host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
+ 
+From patchwork Thu Jun 28 08:13:29 2018
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [1/3] mmc: sdhci-esdhc-imx: get rid of support_vsel
+From: Stefan Agner <stefan@agner.ch>
+X-Patchwork-Id: 10493269
+Message-Id: <20180628081331.13051-2-stefan@agner.ch>
+To: adrian.hunter@intel.com, ulf.hansson@linaro.org
+Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com,
+ michael@amarulasolutions.com, rmk+kernel@armlinux.org.uk,
+ linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
+ Stefan Agner <stefan@agner.ch>
+Date: Thu, 28 Jun 2018 10:13:29 +0200
+
+The field support_vsel is currently only used in the device tree
+case. Get rid of it. No change in behavior.
+
+Signed-off-by: Stefan Agner <stefan@agner.ch>
+---
+ drivers/mmc/host/sdhci-esdhc-imx.c          | 8 ++------
+ include/linux/platform_data/mmc-esdhc-imx.h | 2 --
+ 2 files changed, 2 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
+index 6f444731754d..20a420b765b3 100644
+--- a/drivers/mmc/host/sdhci-esdhc-imx.c
++++ b/drivers/mmc/host/sdhci-esdhc-imx.c
+@@ -1145,18 +1145,14 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
+ 			     &boarddata->tuning_start_tap);
+ 
+ 	if (of_find_property(np, "no-1-8-v", NULL))
+-		boarddata->support_vsel = false;
+-	else
+-		boarddata->support_vsel = true;
++		host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
+ 
+ 	if (of_property_read_u32(np, "fsl,delay-line", &boarddata->delay_line))
+ 		boarddata->delay_line = 0;
+ 
+ 	mmc_of_parse_voltage(np, &host->ocr_mask);
+ 
+-	/* sdr50 and sdr104 need work on 1.8v signal voltage */
+-	if ((boarddata->support_vsel) && esdhc_is_usdhc(imx_data) &&
+-	    !IS_ERR(imx_data->pins_default)) {
++	if (esdhc_is_usdhc(imx_data) && !IS_ERR(imx_data->pins_default)) {
+ 		imx_data->pins_100mhz = pinctrl_lookup_state(imx_data->pinctrl,
+ 						ESDHC_PINCTRL_STATE_100MHZ);
+ 		imx_data->pins_200mhz = pinctrl_lookup_state(imx_data->pinctrl,
+diff --git a/include/linux/platform_data/mmc-esdhc-imx.h b/include/linux/platform_data/mmc-esdhc-imx.h
+index 7daa78a2f342..640dec8b5b0c 100644
+--- a/include/linux/platform_data/mmc-esdhc-imx.h
++++ b/include/linux/platform_data/mmc-esdhc-imx.h
+@@ -34,7 +34,6 @@ enum cd_types {
+  * @cd_gpio:	gpio for card_detect interrupt
+  * @wp_type:	type of write_protect method (see wp_types enum above)
+  * @cd_type:	type of card_detect method (see cd_types enum above)
+- * @support_vsel:  indicate it supports 1.8v switching
+  */
+ 
+ struct esdhc_platform_data {
+@@ -43,7 +42,6 @@ struct esdhc_platform_data {
+ 	enum wp_types wp_type;
+ 	enum cd_types cd_type;
+ 	int max_bus_width;
+-	bool support_vsel;
+ 	unsigned int delay_line;
+ 	unsigned int tuning_step;       /* The delay cell steps in tuning procedure */
+ 	unsigned int tuning_start_tap;	/* The start delay cell point in tuning procedure */
+From patchwork Thu Jun 28 08:13:30 2018
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [2/3] mmc: sdhci: add quirk to prevent higher speed modes
+From: Stefan Agner <stefan@agner.ch>
+X-Patchwork-Id: 10493273
+Message-Id: <20180628081331.13051-3-stefan@agner.ch>
+To: adrian.hunter@intel.com, ulf.hansson@linaro.org
+Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com,
+ michael@amarulasolutions.com, rmk+kernel@armlinux.org.uk,
+ linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
+ Stefan Agner <stefan@agner.ch>
+Date: Thu, 28 Jun 2018 10:13:30 +0200
+
+Some hosts are capable of running higher speed modes but do not
+have the board support for it. Introduce a quirk which prevents
+the stack from using modes running at 100MHz or faster.
+
+Signed-off-by: Stefan Agner <stefan@agner.ch>
+---
+ drivers/mmc/host/sdhci.c | 8 ++++++++
+ drivers/mmc/host/sdhci.h | 2 ++
+ 2 files changed, 10 insertions(+)
+
+diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
+index 1c828e0e9905..8ac257dfaab3 100644
+--- a/drivers/mmc/host/sdhci.c
++++ b/drivers/mmc/host/sdhci.c
+@@ -3749,6 +3749,14 @@ int sdhci_setup_host(struct sdhci_host *host)
+ 		}
+ 	}
+ 
++	if (host->quirks2 & SDHCI_QUIRK2_NO_UHS_HS200_HS400) {
++		host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
++				 SDHCI_SUPPORT_DDR50);
++
++		mmc->caps2 &= ~(MMC_CAP2_HSX00_1_8V | MMC_CAP2_HSX00_1_2V |
++				MMC_CAP2_HS400_ES);
++	}
++
+ 	if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) {
+ 		host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
+ 				 SDHCI_SUPPORT_DDR50);
+diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
+index 23966f887da6..cb2433d6d61f 100644
+--- a/drivers/mmc/host/sdhci.h
++++ b/drivers/mmc/host/sdhci.h
+@@ -450,6 +450,8 @@ struct sdhci_host {
+  * obtainable timeout.
+  */
+ #define SDHCI_QUIRK2_DISABLE_HW_TIMEOUT			(1<<17)
++/* Do not support any higher speeds (>50MHz) */
++#define SDHCI_QUIRK2_NO_UHS_HS200_HS400			(1<<18)
+ 
+ 	int irq;		/* Device IRQ */
+ 	void __iomem *ioaddr;	/* Mapped address */

arm-tegra-fix-gpu-iommu.patch

@@ -1,39 +0,0 @@
-From patchwork Sun Jul  9 16:36:14 2017
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: ARM: tegra: Register host1x node with iommu binding on tegra124
-From: Paul Kocialkowski <contact@paulk.fr>
-X-Patchwork-Id: 9831825
-Message-Id: <20170709163614.6746-1-contact@paulk.fr>
-To: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org,
- linux-kernel@vger.kernel.org
-Cc: Thierry Reding <thierry.reding@gmail.com>,
- Stephen Warren <swarren@wwwdotorg.org>,
- Mikko Perttunen <mperttunen@nvidia.com>,
- Paul Kocialkowski <contact@paulk.fr>, 
- Jonathan Hunter <jonathanh@nvidia.com>
-Date: Sun,  9 Jul 2017 19:36:14 +0300
-
-This registers the host1x node with the SMMU (as HC swgroup) to allow
-the host1x code to attach to it. It avoid failing the probe sequence,
-which resulted in the tegra drm driver not probing and thus nothing
-being displayed on-screen.
-
-Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
----
- arch/arm/boot/dts/tegra124.dtsi | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
-index 187a36c6d0fc..b3b89befffeb 100644
---- a/arch/arm/boot/dts/tegra124.dtsi
-+++ b/arch/arm/boot/dts/tegra124.dtsi
-@@ -85,6 +85,7 @@
- 		clocks = <&tegra_car TEGRA124_CLK_HOST1X>;
- 		resets = <&tegra_car 28>;
- 		reset-names = "host1x";
-+		iommus = <&mc TEGRA_SWGROUP_HC>;
- 
- 		#address-cells = <2>;
- 		#size-cells = <2>;

arm64-arch_timer-Workaround-for-Allwinner-A64-timer-instability.patch

@@ -0,0 +1,184 @@
+From patchwork Fri May 11 02:27:50 2018
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 8bit
+Subject: [1/2] arm64: arch_timer: Workaround for Allwinner A64 timer
+ instability
+From: Samuel Holland <samuel@sholland.org>
+X-Patchwork-Id: 10392891
+Message-Id: <20180511022751.9096-2-samuel@sholland.org>
+To: Maxime Ripard <maxime.ripard@bootlin.com>, Chen-Yu Tsai <wens@csie.org>, 
+ Catalin Marinas <catalin.marinas@arm.com>,
+ Will Deacon <will.deacon@arm.com>,
+ Daniel Lezcano <daniel.lezcano@linaro.org>,
+ Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <marc.zyngier@arm.com>
+Cc: linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org,
+ linux-arm-kernel@lists.infradead.org, Samuel Holland <samuel@sholland.org>
+Date: Thu, 10 May 2018 21:27:50 -0500
+
+The Allwinner A64 SoC is known [1] to have an unstable architectural
+timer, which manifests itself most obviously in the time jumping forward
+a multiple of 95 years [2][3]. This coincides with 2^56 cycles at a
+timer frequency of 24 MHz, implying that the time went slightly backward
+(and this was interpreted by the kernel as it jumping forward and
+wrapping around past the epoch).
+
+Further investigation revealed instability in the low bits of CNTVCT at
+the point a high bit rolls over. This leads to power-of-two cycle
+forward and backward jumps. (Testing shows that forward jumps are about
+twice as likely as backward jumps.)
+
+Without trapping reads to CNTVCT, a userspace program is able to read it
+in a loop faster than it changes. A test program running on all 4 CPU
+cores that reported jumps larger than 100 ms was run for 13.6 hours and
+reported the following:
+
+ Count | Event
+-------+---------------------------
+  9940 | jumped backward      699ms
+   268 | jumped backward     1398ms
+     1 | jumped backward     2097ms
+ 16020 | jumped forward       175ms
+  6443 | jumped forward       699ms
+  2976 | jumped forward      1398ms
+     9 | jumped forward    356516ms
+     9 | jumped forward    357215ms
+     4 | jumped forward    714430ms
+     1 | jumped forward   3578440ms
+
+This works out to a jump larger than 100 ms about every 5.5 seconds on
+each CPU core.
+
+The largest jump (almost an hour!) was the following sequence of reads:
+      0x0000007fffffffff → 0x00000093feffffff → 0x0000008000000000
+
+Note that the middle bits don't necessarily all read as all zeroes or
+all ones during the anomalous behavior; however the low 11 bits checked
+by the function in this patch have never been observed with any other
+value.
+
+Also note that smaller jumps are much more common, with the smallest
+backward jumps of 2048 cycles observed over 400 times per second on each
+core. (Of course, this is partially due to lower bits rolling over more
+frequently.) Any one of these could have caused the 95 year time skip.
+
+Similar anomalies were observed while reading CNTPCT (after patching the
+kernel to allow reads from userspace). However, the jumps are much less
+frequent, and only small jumps were observed. The same program as before
+(except now reading CNTPCT) observed after 72 hours:
+
+ Count | Event
+-------+---------------------------
+    17 | jumped backward      699ms
+    52 | jumped forward       175ms
+  2831 | jumped forward       699ms
+     5 | jumped forward      1398ms
+Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
+Tested-by: Andre Przywara <andre.przywara@arm.com>
+
+========================================================================
+
+Because the CPU can read the CNTPCT/CNTVCT registers faster than they
+change, performing two reads of the register and comparing the high bits
+(like other workarounds) is not a workable solution. And because the
+timer can jump both forward and backward, no pair of reads can
+distinguish a good value from a bad one. The only way to guarantee a
+good value from consecutive reads would be to read _three_ times, and
+take the middle value iff the three values are 1) individually unique
+and 2) increasing. This takes at minimum 3 cycles (125 ns), or more if
+an anomaly is detected.
+
+However, since there is a distinct pattern to the bad values, we can
+optimize the common case (2046/2048 of the time) to a single read by
+simply ignoring values that match the pattern. This still takes no more
+than 3 cycles in the worst case, and requires much less code.
+
+[1]: https://github.com/armbian/build/commit/a08cd6fe7ae9
+[2]: https://forum.armbian.com/topic/3458-a64-datetime-clock-issue/
+[3]: https://irclog.whitequark.org/linux-sunxi/2018-01-26
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ drivers/clocksource/Kconfig          | 11 ++++++++++
+ drivers/clocksource/arm_arch_timer.c | 39 ++++++++++++++++++++++++++++++++++++
+ 2 files changed, 50 insertions(+)
+
+diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
+index 8e8a09755d10..7a5d434dd30b 100644
+--- a/drivers/clocksource/Kconfig
++++ b/drivers/clocksource/Kconfig
+@@ -364,6 +364,17 @@ config ARM64_ERRATUM_858921
+ 	  The workaround will be dynamically enabled when an affected
+ 	  core is detected.
+ 
++config SUN50I_A64_UNSTABLE_TIMER
++	bool "Workaround for Allwinner A64 timer instability"
++	default y
++	depends on ARM_ARCH_TIMER && ARM64 && ARCH_SUNXI
++	select ARM_ARCH_TIMER_OOL_WORKAROUND
++	help
++	  This option enables a workaround for instability in the timer on
++	  the Allwinner A64 SoC. The workaround will only be active if the
++	  allwinner,sun50i-a64-unstable-timer property is found in the
++	  timer node.
++
+ config ARM_GLOBAL_TIMER
+ 	bool "Support for the ARM global timer" if COMPILE_TEST
+ 	select TIMER_OF if OF
+diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
+index 57cb2f00fc07..66ce13578c52 100644
+--- a/drivers/clocksource/arm_arch_timer.c
++++ b/drivers/clocksource/arm_arch_timer.c
+@@ -319,6 +319,36 @@ static u64 notrace arm64_858921_read_cntvct_el0(void)
+ }
+ #endif
+ 
++#ifdef CONFIG_SUN50I_A64_UNSTABLE_TIMER
++/*
++ * The low bits of each register can transiently read as all ones or all zeroes
++ * when bit 11 or greater rolls over. Since the value can jump both backward
++ * (7ff -> 000 -> 800) and forward (7ff -> fff -> 800), it is simplest to just
++ * ignore register values with all ones or zeros in the low bits.
++ */
++static u64 notrace sun50i_a64_read_cntpct_el0(void)
++{
++	u64 val;
++
++	do {
++		val = read_sysreg(cntpct_el0);
++	} while (((val + 1) & GENMASK(10, 0)) <= 1);
++
++	return val;
++}
++
++static u64 notrace sun50i_a64_read_cntvct_el0(void)
++{
++	u64 val;
++
++	do {
++		val = read_sysreg(cntvct_el0);
++	} while (((val + 1) & GENMASK(10, 0)) <= 1);
++
++	return val;
++}
++#endif
++
+ #ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND
+ DEFINE_PER_CPU(const struct arch_timer_erratum_workaround *, timer_unstable_counter_workaround);
+ EXPORT_SYMBOL_GPL(timer_unstable_counter_workaround);
+@@ -408,6 +438,15 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
+ 		.read_cntvct_el0 = arm64_858921_read_cntvct_el0,
+ 	},
+ #endif
++#ifdef CONFIG_SUN50I_A64_UNSTABLE_TIMER
++	{
++		.match_type = ate_match_dt,
++		.id = "allwinner,sun50i-a64-unstable-timer",
++		.desc = "Allwinner A64 timer instability",
++		.read_cntpct_el0 = sun50i_a64_read_cntpct_el0,
++		.read_cntvct_el0 = sun50i_a64_read_cntvct_el0,
++	},
++#endif
+ };
+ 
+ typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *,

arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch

@@ -0,0 +1,38 @@
+From patchwork Fri May 11 02:27:51 2018
+Content-Type: text/plain; charset="utf-8"
+MIME-Version: 1.0
+Content-Transfer-Encoding: 7bit
+Subject: [2/2] arm64: dts: allwinner: a64: Enable A64 timer workaround
+From: Samuel Holland <samuel@sholland.org>
+X-Patchwork-Id: 10392889
+Message-Id: <20180511022751.9096-3-samuel@sholland.org>
+To: Maxime Ripard <maxime.ripard@bootlin.com>, Chen-Yu Tsai <wens@csie.org>, 
+ Catalin Marinas <catalin.marinas@arm.com>,
+ Will Deacon <will.deacon@arm.com>,
+ Daniel Lezcano <daniel.lezcano@linaro.org>,
+ Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <marc.zyngier@arm.com>
+Cc: linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org,
+ linux-arm-kernel@lists.infradead.org, Samuel Holland <samuel@sholland.org>
+Date: Thu, 10 May 2018 21:27:51 -0500
+
+As instability in the architectural timer has been observed on multiple
+devices using this SoC, inluding the Pine64 and the Orange Pi Win,
+enable the workaround in the SoC's device tree.
+
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+index 1b2ef28c42bd..5202b76e9684 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+@@ -152,6 +152,7 @@
+ 
+ 	timer {
+ 		compatible = "arm,armv8-timer";
++		allwinner,sun50i-a64-unstable-timer;
+ 		interrupts = <GIC_PPI 13
+ 			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+ 			     <GIC_PPI 14

baseconfig/CONFIG_ACPI_SPCR_TABLE

@@ -0,0 +1 @@
+CONFIG_ACPI_SPCR_TABLE=y

baseconfig/CONFIG_ACT200L_DONGLE

@@ -1 +0,0 @@
-CONFIG_ACT200L_DONGLE=m

baseconfig/CONFIG_ACTISYS_DONGLE

@@ -1 +0,0 @@
-CONFIG_ACTISYS_DONGLE=m

baseconfig/CONFIG_ALI_FIR

@@ -1 +0,0 @@
-CONFIG_ALI_FIR=m

baseconfig/CONFIG_ALLOW_LOCKDOWN_LIFT_BY_SYSRQ

@@ -0,0 +1 @@
+CONFIG_ALLOW_LOCKDOWN_LIFT_BY_SYSRQ=y

baseconfig/CONFIG_ALTERA_MSGDMA

@@ -0,0 +1 @@
+CONFIG_ALTERA_MSGDMA=m

baseconfig/CONFIG_ATH10K_SPECTRAL

@@ -0,0 +1 @@
+# CONFIG_ATH10K_SPECTRAL is not set

baseconfig/CONFIG_ATH10K_USB

@@ -0,0 +1 @@
+CONFIG_ATH10K_USB=m

baseconfig/CONFIG_ATH9K_COMMON_SPECTRAL

@@ -0,0 +1 @@
+# CONFIG_ATH9K_COMMON_SPECTRAL is not set

baseconfig/CONFIG_BATTERY_MAX1721X

@@ -0,0 +1 @@
+# CONFIG_BATTERY_MAX1721X is not set

baseconfig/CONFIG_BLK_CPQ_CISS_DA

@@ -1 +0,0 @@
-CONFIG_BLK_CPQ_CISS_DA=m

baseconfig/CONFIG_BLK_DEV_NULL_BLK_FAULT_INJECTION

@@ -0,0 +1 @@
+# CONFIG_BLK_DEV_NULL_BLK_FAULT_INJECTION is not set

baseconfig/CONFIG_BLK_DEV_UB

@@ -1 +0,0 @@
-# CONFIG_BLK_DEV_UB is not set

baseconfig/CONFIG_BNXT_FLOWER_OFFLOAD

@@ -0,0 +1 @@
+CONFIG_BNXT_FLOWER_OFFLOAD=y

baseconfig/CONFIG_BOOTPARAM_LOCKDEP_CROSSRELEASE_FULLSTACK

@@ -0,0 +1 @@
+# CONFIG_BOOTPARAM_LOCKDEP_CROSSRELEASE_FULLSTACK is not set

baseconfig/CONFIG_BPF_JIT_ALWAYS_ON

@@ -0,0 +1 @@
+CONFIG_BPF_JIT_ALWAYS_ON=y

baseconfig/CONFIG_BPF_KPROBE_OVERRIDE

@@ -0,0 +1 @@
+# CONFIG_BPF_KPROBE_OVERRIDE is not set

baseconfig/CONFIG_BPF_STREAM_PARSER

@@ -0,0 +1 @@
+CONFIG_BPF_STREAM_PARSER=y

baseconfig/CONFIG_BTRFS_FS_REF_VERIFY

@@ -0,0 +1 @@
+# CONFIG_BTRFS_FS_REF_VERIFY is not set

baseconfig/CONFIG_BT_HCIBTUSB_AUTOSUSPEND

@@ -0,0 +1 @@
+# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set

baseconfig/CONFIG_BT_SCO

@@ -1 +0,0 @@
-CONFIG_BT_SCO=y

baseconfig/CONFIG_CCS811

@@ -0,0 +1 @@
+# CONFIG_CCS811 is not set

baseconfig/CONFIG_CEC_PIN

@@ -0,0 +1 @@
+CONFIG_CEC_PIN=y

baseconfig/CONFIG_CHARGER_QCOM_SMBB

@@ -1 +0,0 @@
-# CONFIG_CHARGER_QCOM_SMBB is not set

baseconfig/CONFIG_CHASH_SELFTEST

@@ -0,0 +1 @@
+# CONFIG_CHASH_SELFTEST is not set

baseconfig/CONFIG_CHASH_STATS

@@ -0,0 +1 @@
+# CONFIG_CHASH_STATS is not set

baseconfig/CONFIG_CHELSIO_IPSEC_INLINE

@@ -0,0 +1 @@
+CONFIG_CHELSIO_IPSEC_INLINE=y

baseconfig/CONFIG_CHT_DC_TI_PMIC_OPREGION

@@ -0,0 +1 @@
+CONFIG_CHT_DC_TI_PMIC_OPREGION=y

baseconfig/CONFIG_CIFS_SMB_DIRECT

@@ -0,0 +1 @@
+# CONFIG_CIFS_SMB_DIRECT is not set

baseconfig/CONFIG_CISS_SCSI_TAPE

@@ -1 +0,0 @@
-CONFIG_CISS_SCSI_TAPE=y

baseconfig/CONFIG_CLK_HSDK

@@ -0,0 +1 @@
+# CONFIG_CLK_HSDK is not set

baseconfig/CONFIG_CLOCK_THERMAL

@@ -0,0 +1 @@
+# CONFIG_CLOCK_THERMAL is not set

baseconfig/CONFIG_CPU_ISOLATION

@@ -0,0 +1 @@
+# CONFIG_CPU_ISOLATION is not set

baseconfig/CONFIG_CRAMFS_MTD

@@ -0,0 +1 @@
+# CONFIG_CRAMFS_MTD is not set

baseconfig/CONFIG_CRYPTO_DEV_SP_CCP

@@ -0,0 +1 @@
+# CONFIG_CRYPTO_DEV_SP_CCP is not set

baseconfig/CONFIG_CRYPTO_GCM

@@ -1 +1 @@
-CONFIG_CRYPTO_GCM=m
+CONFIG_CRYPTO_GCM=y

baseconfig/CONFIG_CRYPTO_GHASH

@@ -1 +1 @@
-CONFIG_CRYPTO_GHASH=m
+CONFIG_CRYPTO_GHASH=y

baseconfig/CONFIG_CRYPTO_SM3

@@ -0,0 +1 @@
+CONFIG_CRYPTO_SM3=m

baseconfig/CONFIG_DEBUG_KERNEL_DC

@@ -0,0 +1 @@
+# CONFIG_DEBUG_KERNEL_DC is not set

baseconfig/CONFIG_DEVFREQ_THERMAL

@@ -0,0 +1 @@
+# CONFIG_DEVFREQ_THERMAL is not set

baseconfig/CONFIG_DM_UNSTRIPED

@@ -0,0 +1 @@
+CONFIG_DM_UNSTRIPED=m

baseconfig/CONFIG_DONGLE

@@ -1 +0,0 @@
-CONFIG_DONGLE=y

baseconfig/CONFIG_DP83822_PHY

@@ -0,0 +1 @@
+CONFIG_DP83822_PHY=m

baseconfig/CONFIG_DP83867_PHY

@@ -1 +1 @@
-CONFIG_DP83867_PHY=m
+# CONFIG_DP83867_PHY is not set

baseconfig/CONFIG_DRM_AMDGPU_SI

@@ -1 +1 @@
-# CONFIG_DRM_AMDGPU_SI is not set
+CONFIG_DRM_AMDGPU_SI=y

baseconfig/CONFIG_DRM_AMD_DC

@@ -0,0 +1 @@
+CONFIG_DRM_AMD_DC=y

baseconfig/CONFIG_DRM_AMD_DC_FBC

@@ -0,0 +1 @@
+# CONFIG_DRM_AMD_DC_FBC is not set

baseconfig/CONFIG_DRM_AMD_DC_PRE_VEGA

@@ -0,0 +1 @@
+# CONFIG_DRM_AMD_DC_PRE_VEGA is not set

baseconfig/CONFIG_DRM_I2C_ADV7511_CEC

@@ -0,0 +1 @@
+CONFIG_DRM_I2C_ADV7511_CEC=y

baseconfig/CONFIG_DRM_PANEL_ILITEK_IL9322

@@ -0,0 +1 @@
+# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set

baseconfig/CONFIG_DRM_PANEL_ORISETECH_OTM8009A

@@ -0,0 +1 @@
+CONFIG_DRM_PANEL_ORISETECH_OTM8009A=m

baseconfig/CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN

@@ -0,0 +1 @@
+CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m

baseconfig/CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03

@@ -0,0 +1 @@
+CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m

baseconfig/CONFIG_DRM_PANEL_SEIKO_43WVF1G

@@ -0,0 +1 @@
+CONFIG_DRM_PANEL_SEIKO_43WVF1G=m

baseconfig/CONFIG_DRM_SII9234

@@ -0,0 +1 @@
+CONFIG_DRM_SII9234=m

baseconfig/CONFIG_DRM_SIL_SII8620

@@ -1 +1 @@
-CONFIG_DRM_SIL_SII8620=m
+# CONFIG_DRM_SIL_SII8620 is not set

baseconfig/CONFIG_DS4424

@@ -0,0 +1 @@
+# CONFIG_DS4424 is not set

baseconfig/CONFIG_DVB_DDBRIDGE_MSIENABLE

@@ -0,0 +1 @@
+# CONFIG_DVB_DDBRIDGE_MSIENABLE is not set

baseconfig/CONFIG_DVB_MMAP

@@ -0,0 +1 @@
+# CONFIG_DVB_MMAP is not set

baseconfig/CONFIG_DVB_ULE_DEBUG

@@ -0,0 +1 @@
+# CONFIG_DVB_ULE_DEBUG is not set

baseconfig/CONFIG_ESI_DONGLE

@@ -1 +0,0 @@
-CONFIG_ESI_DONGLE=m

baseconfig/CONFIG_EXPERIMENTAL

@@ -1 +0,0 @@
-CONFIG_EXPERIMENTAL=y

baseconfig/CONFIG_FIND_BIT_BENCHMARK

@@ -0,0 +1 @@
+# CONFIG_FIND_BIT_BENCHMARK is not set

baseconfig/CONFIG_GIRBIL_DONGLE

@@ -1 +0,0 @@
-CONFIG_GIRBIL_DONGLE=m

baseconfig/CONFIG_GPIO_BD9571MWV

@@ -0,0 +1 @@
+CONFIG_GPIO_BD9571MWV=m

baseconfig/CONFIG_GPIO_MAX3191X

@@ -0,0 +1 @@
+# CONFIG_GPIO_MAX3191X is not set

baseconfig/CONFIG_GPIO_MB86S7X

@@ -0,0 +1 @@
+# CONFIG_GPIO_MB86S7X is not set

baseconfig/CONFIG_GPIO_PCIE_IDIO_24

@@ -0,0 +1 @@
+# CONFIG_GPIO_PCIE_IDIO_24 is not set