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45 Commits

Author SHA1 Message Date
David Abdurachmanov 38ca175418
Fix typo in riscv64 configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-11-12 09:19:31 +02:00
David Abdurachmanov bb75b4a363
Update riscv64 configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-11-12 07:14:15 +02:00
David Abdurachmanov 16e8ac352b
Update riscv64 configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-11-11 23:06:19 +02:00
David Abdurachmanov 40eca26c70
Update riscv64 configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-11-11 22:45:00 +02:00
David Abdurachmanov 7784e01cb3
Update riscv64 configs 
- Set CONFIG_NR_CPUS to max number of CPUs, (from) 8 --> (to) 32
- Adjust config_generation to fix build_configs.sh failure

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-11-05 13:47:29 +02:00
David Abdurachmanov 6a4020de8e
Update riscv64 configs 
Found CONFIG_CRYPTO_AUTHENC=y after generation, had CONFIG_CRYPTO_AUTHENC=m in Source tree
Found CONFIG_CRYPTO_ESSIV=y after generation, had CONFIG_CRYPTO_ESSIV=m in Source tree

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-10-19 20:33:02 +03:00
David Abdurachmanov cc8f20e6e3
Update riscv64 configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-10-19 19:17:03 +03:00
David Abdurachmanov 40972d7c0b
Update riscv64 configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-10-19 09:15:11 +03:00
David Abdurachmanov 14e1aec87b
Update riscv64 configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-10-01 18:04:40 +03:00
David Abdurachmanov e45779fd85
Update riscv64 configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-10-01 16:46:55 +03:00
David Abdurachmanov 29a6545101
Update riscv64 configs 
The most important change would be CONFIG_MMC_BLOCK

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-10-01 14:13:46 +03:00
David Abdurachmanov 61e64e9c25
Remove all custom kernel patches 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-10-01 11:41:42 +03:00
David Abdurachmanov 032d42a245
Update riscv64 configs 
Found CONFIG_REGMAP_I2C=m after generation, had CONFIG_REGMAP_I2C=y in Source tree
Found CONFIG_REGMAP_SPI=m after generation, had CONFIG_REGMAP_SPI=y in Source tree

Cannot make then built-in, something forces them to be modules.

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-09-29 07:47:26 +02:00
David Abdurachmanov c4c87d736c
Update riscv64 config 
Found CONFIG_CRC7=y after generation, had CONFIG_CRC7=m in Source tree
Found CONFIG_CRC_ITU_T=y after generation, had CONFIG_CRC_ITU_T=m in Source tree
Found CONFIG_REGMAP_SPI=m after generation, had CONFIG_REGMAP_SPI=y in Source tree

Still trying to get CONFIG_REGMAP_SPI=y to match OpenEmbedded config.

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-09-28 09:47:02 +02:00
David Abdurachmanov bebf3adce1
Attempt again to get MMC built-in for RISC-V 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-09-28 08:47:43 +02:00
David Abdurachmanov e185868e77
Fix riscv64 SPI config 
Found CONFIG_MMC_SPI=m after generation, had CONFIG_MMC_SPI=y in Source tree
Found CONFIG_REGMAP_SPI=m after generation, had CONFIG_REGMAP_SPI=y in Source tree

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-09-28 08:24:37 +02:00
David Abdurachmanov 7ff284a90a
Tweak riscv64 SPI config 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-09-28 07:35:32 +02:00
David Abdurachmanov 51056b416e
Do not set CONFIG_SND_SOC_ES8328_SPI for riscv64 
Error: Mismatches found in configuration files
Found CONFIG_SND_SOC_ES8328_SPI=is not set after generation, had CONFIG_SND_SOC_ES8328_SPI=n in Source tree

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-09-20 13:45:46 +03:00
David Abdurachmanov f5451a35e8
Update riscv64 configs 
Error: Mismatches found in configuration files
Found # CONFIG_SND_SOC_ES8328 is not set, after generation, had CONFIG_SND_SOC_ES8328 m in Source tree

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-09-20 12:34:59 +03:00
David Abdurachmanov f7296f0f1f
Update riscv64 configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-09-20 12:04:20 +03:00
David Abdurachmanov 4874335a34
Update riscv64 configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-09-20 11:26:01 +03:00
David Abdurachmanov 576b1ae843
Update RISCV (riscv64) configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-09-18 22:11:26 +03:00
David Abdurachmanov 43dcced80c
Update out-of-tree patches for RISC-V (riscv64) 
- SECCOMP v2 was posted for review (one failing kernel selftest)
- SiFive Ethernet driver is approved upstream and might land in 5.3
- SiFive CPUFreq support is WIP, but people reported it working

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-08-25 00:03:31 -07:00
David Abdurachmanov c12dd026dd
Update RISC-V (riscv64) configs 
New options added:

CONFIG_SOC_SIFIVE=y
CONFIG_EDAC_SIFIVE=y
CONFIG_PWM_SIFIVE=y

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-08-24 23:10:49 -07:00
David Abdurachmanov 6bc8810bf1
Regenerate configs for RISC-V (riscv64) 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-08-24 15:50:26 -07:00
David Abdurachmanov 77b49c9b18
Update riscv configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-07-02 15:21:10 +03:00
David Abdurachmanov 601e6a0b25
Add support for SECCOMP (v2) 
The patch is added for testing before publishing on linux-riscv.

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-06-24 17:15:53 +03:00
David Abdurachmanov 394552ce0a
Update configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-06-20 20:03:51 +03:00
David Abdurachmanov 8a92f6bb9e
Update RISC-V configs (incl. new SiFive drivers) 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
 2019-06-20 18:45:40 +03:00
David Abdurachmanov afe42142a2
Update RISC-V configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2019-05-04 21:03:00 +03:00
David Abdurachmanov 6a92c8e473
Update RISC-V (riscv64) configs 
Solves:

  Found CONFIG_NF_REJECT_IPV4=y after generation, had CONFIG_NF_REJECT_IPV4=m in Source tree

Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2019-04-03 23:31:11 +02:00
David Abdurachmanov 985dca2019
Update RISC-V (riscv64) configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2019-04-03 22:21:01 +02:00
David Abdurachmanov 73b70fe83d
Update configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2019-03-18 18:13:56 +01:00
David Abdurachmanov da577e4814
Update riscv64 configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2019-03-09 20:15:46 +01:00
David Abdurachmanov d932ad52cf
Regenerate riscv64 configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2019-02-18 11:54:52 +01:00
David Abdurachmanov a0a6f7a375
riscv: update config 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2019-01-15 03:33:20 +01:00
David Abdurachmanov fc9138ad11
riscv: update config 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2019-01-15 02:11:24 +01:00
David Abdurachmanov ff3e5b658b
riscv: regenerate configs (enable CONFIG_AUDIT) 
Audit support for Linux was merged in 5.0-rc2.

Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2019-01-15 01:23:20 +01:00
David Abdurachmanov e9615025d3
riscv: regenerate configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2018-12-06 09:56:38 +01:00
David Abdurachmanov bf6565ba91
riscv64: update configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2018-11-20 10:14:20 +01:00
David Abdurachmanov 1838232458
riscv: rebuild configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2018-11-08 08:31:25 +01:00
David Abdurachmanov fd01e1b407
riscv: change CONFIG_* options 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2018-11-03 19:20:06 +01:00
David Abdurachmanov e93b45642b
riscv: adjust CONFIG_* options again 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2018-11-03 17:19:04 +01:00
David Abdurachmanov 088edc4af9
riscv: re-gen configs 
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2018-11-03 16:28:28 +01:00
David Abdurachmanov b3c173bfe0
Add initial RISC-V 64-bit (riscv64) support 
UNTESTED

Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
 2018-11-03 14:36:46 +01:00