Commit Graph

10 Commits

Author SHA1 Message Date
David Abdurachmanov f72820cd8f
Move CONFIG_ARCH_RV64I to generic/riscv/riscv64
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
2018-11-26 21:03:11 +01:00
David Abdurachmanov bf6565ba91
riscv64: update configs
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
2018-11-20 10:14:20 +01:00
David Abdurachmanov 1838232458
riscv: rebuild configs
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
2018-11-08 08:31:25 +01:00
David Abdurachmanov 8d4ff40415
riscv: modify CONFIG_* options
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
2018-11-08 07:02:28 +01:00
David Abdurachmanov f47d31c65b
riscv: update CONFIG_* options
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
2018-11-08 00:02:51 +01:00
David Abdurachmanov 80112e26ae
riscv: set CONFIG_FRAME_WARN to 2048 (lower is unrealistic)
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
2018-11-07 22:15:53 +01:00
David Abdurachmanov fd01e1b407
riscv: change CONFIG_* options
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
2018-11-03 19:20:06 +01:00
David Abdurachmanov e93b45642b
riscv: adjust CONFIG_* options again
Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
2018-11-03 17:19:04 +01:00
David Abdurachmanov 681c2dab76
riscv: add missing CONFIG_* options
Found unset config items, please set them to an appropriate value
CONFIG_ARCH_RV32I=n
CONFIG_ARCH_RV64I=y
CONFIG_CMODEL_MEDLOW=n
CONFIG_CMODEL_MEDANY=y
CONFIG_MAXPHYSMEM_2GB=n
CONFIG_MAXPHYSMEM_128GB=y
CONFIG_NR_CPUS=8
CONFIG_TUNE_GENERIC=y
CONFIG_RISCV_ISA_C=y
CONFIG_RISCV_BASE_PMU=y
CONFIG_FPU=y
CONFIG_CMDLINE_BOOL=n
CONFIG_PCIE_CADENCE_EP=n
CONFIG_PCI_ENDPOINT_CONFIGFS=n
CONFIG_PCI_EPF_TEST=n
CONFIG_NETWORK_SECMARK=n
CONFIG_NETFILTER_XT_TARGET_HL=m
CONFIG_MTD_OF_PARTS=m
CONFIG_OF_UNITTEST=n
CONFIG_OF_OVERLAY=n
CONFIG_KEYBOARD_BCM=n
CONFIG_GPIO_74XX_MMIO=n
CONFIG_POWER_RESET_GPIO=n
CONFIG_POWER_RESET_GPIO_RESTART=n
CONFIG_THERMAL=m
CONFIG_FB_SSD1307=n
CONFIG_SND_SOC_AC97_CODEC=n
CONFIG_SND_SOC_ES8328_I2C=n
CONFIG_SIFIVE_PLIC=n
CONFIG_PROFILE_ALL_BRANCHES=n

Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
2018-11-03 15:51:18 +01:00
David Abdurachmanov b3c173bfe0
Add initial RISC-V 64-bit (riscv64) support
UNTESTED

Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
2018-11-03 14:36:46 +01:00