Linux v4.13-rc2

This commit is contained in:
Laura Abbott 2017-07-24 08:56:42 -07:00
parent 10c9f7393a
commit f98f1ecd21
25 changed files with 27 additions and 179 deletions

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@ -0,0 +1 @@
# CONFIG_DRM_VBOXVIDEO is not set

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@ -1,123 +0,0 @@
From d40a5938a10a3ba73bce6395729fefd8b8bb1c07 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Thu, 29 Jun 2017 10:05:05 +0100
Subject: [PATCH] drm/vc4: Fix VBLANK handling in crtc->enable() path
When we are enabling a CRTC, drm_crtc_vblank_get() is called before
drm_crtc_vblank_on(), which is not supposed to happen (hence the
WARN_ON() in the code). To solve the problem, we delay the 'update
display list' operation after the CRTC is actually enabled.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
---
drivers/gpu/drm/vc4/vc4_crtc.c | 66 +++++++++++++++++++++++++++---------------
1 file changed, 43 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index d86c8cce3182..316bd6210d69 100644
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -530,6 +530,34 @@ static void vc4_crtc_disable(struct drm_crtc *crtc)
SCALER_DISPSTATX_EMPTY);
}
+static void vc4_crtc_update_dlist(struct drm_crtc *crtc)
+{
+ struct drm_device *dev = crtc->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
+
+ if (crtc->state->event) {
+ unsigned long flags;
+
+ crtc->state->event->pipe = drm_crtc_index(crtc);
+
+ WARN_ON(drm_crtc_vblank_get(crtc) != 0);
+
+ spin_lock_irqsave(&dev->event_lock, flags);
+ vc4_crtc->event = crtc->state->event;
+ crtc->state->event = NULL;
+
+ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
+ vc4_state->mm.start);
+
+ spin_unlock_irqrestore(&dev->event_lock, flags);
+ } else {
+ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
+ vc4_state->mm.start);
+ }
+}
+
static void vc4_crtc_enable(struct drm_crtc *crtc)
{
struct drm_device *dev = crtc->dev;
@@ -540,6 +568,12 @@ static void vc4_crtc_enable(struct drm_crtc *crtc)
require_hvs_enabled(dev);
+ /* Enable vblank irq handling before crtc is started otherwise
+ * drm_crtc_get_vblank() fails in vc4_crtc_update_dlist().
+ */
+ drm_crtc_vblank_on(crtc);
+ vc4_crtc_update_dlist(crtc);
+
/* Turn on the scaler, which will wait for vstart to start
* compositing.
*/
@@ -551,9 +585,6 @@ static void vc4_crtc_enable(struct drm_crtc *crtc)
/* Turn on the pixel valve, which will emit the vstart signal. */
CRTC_WRITE(PV_V_CONTROL,
CRTC_READ(PV_V_CONTROL) | PV_VCONTROL_VIDEN);
-
- /* Enable vblank irq handling after crtc is started. */
- drm_crtc_vblank_on(crtc);
}
static bool vc4_crtc_mode_fixup(struct drm_crtc *crtc,
@@ -608,7 +639,6 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc,
{
struct drm_device *dev = crtc->dev;
struct vc4_dev *vc4 = to_vc4_dev(dev);
- struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
struct drm_plane *plane;
bool debug_dump_regs = false;
@@ -630,25 +660,15 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc,
WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size);
- if (crtc->state->event) {
- unsigned long flags;
-
- crtc->state->event->pipe = drm_crtc_index(crtc);
-
- WARN_ON(drm_crtc_vblank_get(crtc) != 0);
-
- spin_lock_irqsave(&dev->event_lock, flags);
- vc4_crtc->event = crtc->state->event;
- crtc->state->event = NULL;
-
- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
- vc4_state->mm.start);
-
- spin_unlock_irqrestore(&dev->event_lock, flags);
- } else {
- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
- vc4_state->mm.start);
- }
+ /* Only update DISPLIST if the CRTC was already running and is not
+ * being disabled.
+ * vc4_crtc_enable() takes care of updating the dlist just after
+ * re-enabling VBLANK interrupts and before enabling the engine.
+ * If the CRTC is being disabled, there's no point in updating this
+ * information.
+ */
+ if (crtc->state->active && old_state->active)
+ vc4_crtc_update_dlist(crtc);
if (debug_dump_regs) {
DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
--
2.13.0

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@ -1329,6 +1329,7 @@ CONFIG_DRM_TINYDRM=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
CONFIG_DRM_TOSHIBA_TC358767=m CONFIG_DRM_TOSHIBA_TC358767=m
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VC4=m CONFIG_DRM_VC4=m
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m

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@ -1319,6 +1319,7 @@ CONFIG_DRM_TINYDRM=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
CONFIG_DRM_TOSHIBA_TC358767=m CONFIG_DRM_TOSHIBA_TC358767=m
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VC4=m CONFIG_DRM_VC4=m
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m

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@ -1440,6 +1440,7 @@ CONFIG_DRM_TINYDRM=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
CONFIG_DRM_TOSHIBA_TC358767=m CONFIG_DRM_TOSHIBA_TC358767=m
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VC4=m CONFIG_DRM_VC4=m
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m

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@ -1355,6 +1355,7 @@ CONFIG_DRM_TINYDRM=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
CONFIG_DRM_TOSHIBA_TC358767=m CONFIG_DRM_TOSHIBA_TC358767=m
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VC4=m CONFIG_DRM_VC4=m
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m

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@ -1345,6 +1345,7 @@ CONFIG_DRM_TINYDRM=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
CONFIG_DRM_TOSHIBA_TC358767=m CONFIG_DRM_TOSHIBA_TC358767=m
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VC4=m CONFIG_DRM_VC4=m
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m

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@ -1430,6 +1430,7 @@ CONFIG_DRM_TINYDRM=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
CONFIG_DRM_TOSHIBA_TC358767=m CONFIG_DRM_TOSHIBA_TC358767=m
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VC4=m CONFIG_DRM_VC4=m
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m

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@ -1167,6 +1167,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -1178,6 +1178,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -1178,6 +1178,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -1167,6 +1167,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -1135,6 +1135,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -1124,6 +1124,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -1091,6 +1091,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -1080,6 +1080,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -1090,6 +1090,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -1079,6 +1079,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -1086,6 +1086,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -1075,6 +1075,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -1217,6 +1217,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -1206,6 +1206,7 @@ CONFIG_DRM_SIL_SII8620=m
CONFIG_DRM_TI_TFP410=m CONFIG_DRM_TI_TFP410=m
# CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358767 is not set
CONFIG_DRM_UDL=m CONFIG_DRM_UDL=m
# CONFIG_DRM_VBOXVIDEO is not set
CONFIG_DRM_VGEM=m CONFIG_DRM_VGEM=m
CONFIG_DRM_VIA=m CONFIG_DRM_VIA=m
CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_VIRTIO_GPU=m

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@ -67,9 +67,9 @@ Summary: The Linux kernel
# The next upstream release sublevel (base_sublevel+1) # The next upstream release sublevel (base_sublevel+1)
%define upstream_sublevel %(echo $((%{base_sublevel} + 1))) %define upstream_sublevel %(echo $((%{base_sublevel} + 1)))
# The rc snapshot level # The rc snapshot level
%global rcrev 1 %global rcrev 2
# The git snapshot level # The git snapshot level
%define gitrev 4 %define gitrev 0
# Set rpm version accordingly # Set rpm version accordingly
%define rpmversion 4.%{upstream_sublevel}.0 %define rpmversion 4.%{upstream_sublevel}.0
%endif %endif
@ -615,10 +615,6 @@ Patch313: qcom-Force-host-mode-for-USB-on-apq8016-sbc.patch
# http://www.spinics.net/lists/dri-devel/msg132235.html # http://www.spinics.net/lists/dri-devel/msg132235.html
Patch320: bcm283x-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch Patch320: bcm283x-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch
# https://patchwork.freedesktop.org/patch/163300/
# https://patchwork.freedesktop.org/patch/161978/
Patch321: bcm283x-vc4-fix-vblank.patch
# This breaks RPi booting with a LPAE kernel, we don't support the DSI ports currently # This breaks RPi booting with a LPAE kernel, we don't support the DSI ports currently
# Revert it while I engage upstream to work out what's going on # Revert it while I engage upstream to work out what's going on
Patch322: Revert-ARM-dts-bcm2835-Add-the-DSI-module-nodes-and-.patch Patch322: Revert-ARM-dts-bcm2835-Add-the-DSI-module-nodes-and-.patch
@ -2194,6 +2190,9 @@ fi
# #
# #
%changelog %changelog
* Mon Jul 24 2017 Laura Abbott <labbott@fedoraproject.org> - 4.13.0-0.rc2.git0.1
- Linux v4.13-rc2
* Mon Jul 24 2017 Laura Abbott <labbott@fedoraproject.org> * Mon Jul 24 2017 Laura Abbott <labbott@fedoraproject.org>
- Disable debugging options. - Disable debugging options.

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@ -1,51 +1,3 @@
From ccdf75f90484a87ddb29649304156a503bf5a829 Mon Sep 17 00:00:00 2001
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Date: Wed, 28 Jun 2017 16:44:58 -0700
Subject: [PATCH 2/6] spmi: Include OF based modalias in device uevent
Include the OF-based modalias in the uevent sent when registering SPMI
devices, so that user space has a chance to autoload the kernel module
for the device.
Reported-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
---
drivers/spmi/spmi.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/spmi/spmi.c b/drivers/spmi/spmi.c
index 2b9b0941d9eb..6d23226e5f69 100644
--- a/drivers/spmi/spmi.c
+++ b/drivers/spmi/spmi.c
@@ -365,11 +365,23 @@ static int spmi_drv_remove(struct device *dev)
return 0;
}
+static int spmi_drv_uevent(struct device *dev, struct kobj_uevent_env *env)
+{
+ int ret;
+
+ ret = of_device_uevent_modalias(dev, env);
+ if (ret != -ENODEV)
+ return ret;
+
+ return 0;
+}
+
static struct bus_type spmi_bus_type = {
.name = "spmi",
.match = spmi_device_match,
.probe = spmi_drv_probe,
.remove = spmi_drv_remove,
+ .uevent = spmi_drv_uevent,
};
/**
--
2.13.0
From 283d0e00a18b294ec56f1fb904896a546704faaf Mon Sep 17 00:00:00 2001 From 283d0e00a18b294ec56f1fb904896a546704faaf Mon Sep 17 00:00:00 2001
From: Rob Clark <robdclark@gmail.com> From: Rob Clark <robdclark@gmail.com>
Date: Fri, 30 Jun 2017 11:47:21 -0400 Date: Fri, 30 Jun 2017 11:47:21 -0400

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@ -1,4 +1,3 @@
SHA512 (perf-man-4.12.tar.gz) = 4d3bbda1f520dba0007c351af46f45085fe4842074eb2e01aee736fd369df595f8f72ed6c1192715f1120bf3353279777f9dca1178fe93bffe5be2de700d409c SHA512 (perf-man-4.12.tar.gz) = 4d3bbda1f520dba0007c351af46f45085fe4842074eb2e01aee736fd369df595f8f72ed6c1192715f1120bf3353279777f9dca1178fe93bffe5be2de700d409c
SHA512 (linux-4.12.tar.xz) = 8e81b41b253e63233e92948941f44c6482acb52aa3a3fd172f03a38a86f2c35b2ad4fd407acd1bc3964673eba344fe104d3a03e3ff4bf9cd1f22bd44263bd728 SHA512 (linux-4.12.tar.xz) = 8e81b41b253e63233e92948941f44c6482acb52aa3a3fd172f03a38a86f2c35b2ad4fd407acd1bc3964673eba344fe104d3a03e3ff4bf9cd1f22bd44263bd728
SHA512 (patch-4.13-rc1.xz) = fd569384a68a9e4831249900826fb39032ab3790cdcc0955b83120c2d289ed14eaba6e43093837061040b60839fe4c9a02f8e48bc52b134037a38bbd951a1d4a SHA512 (patch-4.13-rc2.xz) = 0ebedff0a8e1ec90959918863710523247aefd7627ab327436caddcb768e1f6269820e816ccc5f8447ab8d2ca6fe665119556e7e15a9753ae061fbfbfb01410f
SHA512 (patch-4.13-rc1-git4.xz) = 4556e8c5676aef58f0d1774c6c0657b263c1cb53602ba57162202127037d639d3d0793c93f4b5678cfe3dbb5eddce90e9fc3bea2ba82e850cc4568749b586f4e