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Linux v4.7

This commit is contained in:
Laura Abbott 2016-07-25 15:01:09 -07:00
parent bf1d35cfe8
commit f339ce1dad
36 changed files with 3612 additions and 1342 deletions
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50
0001-Work-around-for-addition-of-metag-def-but-not-reloca.patch Normal file
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@ -0,0 +1,50 @@
From 4196017cd0e50e434ee72ca706742804f75c8827 Mon Sep 17 00:00:00 2001
From: Laura Abbott <labbott@fedoraproject.org>
Date: Fri, 8 Jul 2016 11:15:43 -0700
Subject: [PATCH] Work around for addition of metag def but not relocations
Caused by commit in sync up from
http://pkgs.fedoraproject.org/cgit/rpms/glibc.git/commit/?id=9a78be1808600ca5e66eab741542447a29cfbeb3
Fixes build errors like:
scripts/recordmcount.c: In function 'do_file':
scripts/recordmcount.c:466:28: error: 'R_METAG_ADDR32' undeclared (first use in this function)
case EM_METAG: reltype = R_METAG_ADDR32;
^~~~~~~~~~~~~~
scripts/recordmcount.c:466:28: note: each undeclared identifier is reported only once for each function it appears in
scripts/recordmcount.c:468:20: error: 'R_METAG_NONE' undeclared (first use in this function)
rel_type_nop = R_METAG_NONE;
^~~~~~~~~~~~
Signed-off-by: Laura Abbott <labbott@fedoraproject.org>
---
scripts/recordmcount.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/scripts/recordmcount.c b/scripts/recordmcount.c
index e1675927..42396a7 100644
--- a/scripts/recordmcount.c
+++ b/scripts/recordmcount.c
@@ -33,10 +33,17 @@
#include <string.h>
#include <unistd.h>
+/*
+ * glibc synced up and added the metag number but didn't add the relocations.
+ * Work around this in a crude manner for now.
+ */
#ifndef EM_METAG
-/* Remove this when these make it to the standard system elf.h. */
#define EM_METAG 174
+#endif
+#ifndef R_METAG_ADDR32
#define R_METAG_ADDR32 2
+#endif
+#ifndef R_METAG_NONE
#define R_METAG_NONE 3
#endif
--
2.9.0

209
0001-drm-i915-Reorganize-WM-structs-unions-in-CRTC-state.patch
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@ -1,64 +1,68 @@
From 2a6f0971d09e2bb88d2ae40d91ceb2776090497d Mon Sep 17 00:00:00 2001
From: Fedora Kernel Team <kernel-team@fedoraproject.org>
Date: Mon, 20 Jun 2016 11:11:50 +0200
From 0042e1e7a03a2fb5d6c464c03ce84d55b31add11 Mon Sep 17 00:00:00 2001
From: Matt Roper <matthew.d.roper@intel.com>
Date: Thu, 12 May 2016 07:05:55 -0700
Subject: [PATCH 01/17] drm/i915: Reorganize WM structs/unions in CRTC state
Upstream: since drm-intel-next-2016-05-22
commit e8f1f02e7125220b99af8047703b63c11a7081d6
Reorganize the nested structures and unions we have for pipe watermark
data in intel_crtc_state so that platform-specific data can be added in
a more sensible manner (and save a bit of memory at the same time).
Author: Matt Roper <matthew.d.roper@intel.com>
AuthorDate: Thu May 12 07:05:55 2016 -0700
Commit: Matt Roper <matthew.d.roper@intel.com>
CommitDate: Fri May 13 07:32:11 2016 -0700
The change basically changes the organization from:
drm/i915: Reorganize WM structs/unions in CRTC state
union {
struct intel_pipe_wm ilk;
struct intel_pipe_wm skl;
} optimal;
Reorganize the nested structures and unions we have for pipe watermark
data in intel_crtc_state so that platform-specific data can be added in
a more sensible manner (and save a bit of memory at the same time).
struct intel_pipe_wm intermediate /* ILK-only */
The change basically changes the organization from:
to
union {
struct intel_pipe_wm ilk;
struct intel_pipe_wm skl;
} optimal;
union {
struct {
struct intel_pipe_wm intermediate;
struct intel_pipe_wm optimal;
} ilk;
struct intel_pipe_wm intermediate /* ILK-only */
struct {
struct intel_pipe_wm optimal;
} skl;
}
to
There should be no functional change here, but it will allow us to add
more platform-specific fields going forward (and more easily extend to
other platform types like VLV).
union {
struct {
struct intel_pipe_wm intermediate;
struct intel_pipe_wm optimal;
} ilk;
While we're at it, let's move the entire watermark substructure out to
its own structure definition to make the code slightly more readable.
struct {
struct intel_pipe_wm optimal;
} skl;
}
There should be no functional change here, but it will allow us to add
more platform-specific fields going forward (and more easily extend to
other platform types like VLV).
While we're at it, let's move the entire watermark substructure out to
its own structure definition to make the code slightly more readable.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-2-git-send-email-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-2-git-send-email-matthew.d.roper@intel.com
---
drivers/gpu/drm/i915/intel_drv.h | 48 +++++++++++++++++++++++++++++++---------
drivers/gpu/drm/i915/intel_pm.c | 16 +++++++-------
2 files changed, 46 insertions(+), 18 deletions(-)
drivers/gpu/drm/i915/intel_display.c | 2 +-
drivers/gpu/drm/i915/intel_drv.h | 61 +++++++++++++++++++++---------------
drivers/gpu/drm/i915/intel_pm.c | 18 +++++------
3 files changed, 45 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d19b392..4633aec 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12027,7 +12027,7 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
}
} else if (dev_priv->display.compute_intermediate_wm) {
if (HAS_PCH_SPLIT(dev_priv) && INTEL_GEN(dev_priv) < 9)
- pipe_config->wm.intermediate = pipe_config->wm.optimal.ilk;
+ pipe_config->wm.ilk.intermediate = pipe_config->wm.ilk.optimal;
}
if (INTEL_INFO(dev)->gen >= 9) {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 3a30b37..7d19baf 100644
index 4a24b00..5a186bf 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -363,6 +363,40 @@ struct skl_pipe_wm {
@@ -405,6 +405,40 @@ struct skl_pipe_wm {
uint32_t linetime;
};
@ -99,65 +103,81 @@ index 3a30b37..7d19baf 100644
struct intel_crtc_state {
struct drm_crtc_state base;
@@ -509,16 +543,10 @@ struct intel_crtc_state {
@@ -558,32 +592,7 @@ struct intel_crtc_state {
/* IVB sprite scaling w/a (WaCxSRDisabledForSpriteScaling:ivb) */
bool disable_lp_wm;
- struct {
- /*
- * optimal watermarks, programmed post-vblank when this state
- * is committed
- * Optimal watermarks, programmed post-vblank when this state
- * is committed.
- */
- union {
- struct intel_pipe_wm ilk;
- struct skl_pipe_wm skl;
- } optimal;
-
- /*
- * Intermediate watermarks; these can be programmed immediately
- * since they satisfy both the current configuration we're
- * switching away from and the new configuration we're switching
- * to.
- */
- struct intel_pipe_wm intermediate;
-
- /*
- * Platforms with two-step watermark programming will need to
- * update watermark programming post-vblank to switch from the
- * safe intermediate watermarks to the optimal final
- * watermarks.
- */
- bool need_postvbl_update;
- } wm;
+ struct intel_crtc_wm_state wm;
+
+ /* Gamma mode programmed on the pipe */
+ uint32_t gamma_mode;
};
struct vlv_wm_state {
/* Gamma mode programmed on the pipe */
uint32_t gamma_mode;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 54ab023..0da1d60 100644
index a7ef45d..4353fec 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2302,7 +2302,7 @@ static int ilk_compute_pipe_wm(struct intel_crtc *intel_crtc,
if (IS_ERR(cstate))
return PTR_ERR(cstate);
@@ -2309,7 +2309,7 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state *cstate)
int level, max_level = ilk_wm_max_level(dev), usable_level;
struct ilk_wm_maximums max;
- pipe_wm = &cstate->wm.optimal.ilk;
+ pipe_wm = &cstate->wm.ilk.optimal;
memset(pipe_wm, 0, sizeof(*pipe_wm));
for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
@@ -2385,7 +2385,7 @@ static void ilk_merge_wm_level(struct drm_device *dev,
for_each_intel_crtc(dev, intel_crtc) {
const struct intel_crtc_state *cstate =
to_intel_crtc_state(intel_crtc->base.state);
- const struct intel_pipe_wm *active = &cstate->wm.optimal.ilk;
+ const struct intel_pipe_wm *active = &cstate->wm.ilk.optimal;
const struct intel_wm_level *wm = &active->wm[level];
struct intel_plane_state *ps;
@@ -2391,7 +2391,7 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev,
struct intel_crtc *intel_crtc,
struct intel_crtc_state *newstate)
{
- struct intel_pipe_wm *a = &newstate->wm.intermediate;
+ struct intel_pipe_wm *a = &newstate->wm.ilk.intermediate;
struct intel_pipe_wm *b = &intel_crtc->wm.active.ilk;
int level, max_level = ilk_wm_max_level(dev);
if (!active->pipe_enabled)
@@ -2536,12 +2536,12 @@ static void ilk_compute_wm_results(struct drm_device *dev,
const struct intel_crtc_state *cstate =
to_intel_crtc_state(intel_crtc->base.state);
enum pipe pipe = intel_crtc->pipe;
- const struct intel_wm_level *r = &cstate->wm.optimal.ilk.wm[0];
+ const struct intel_wm_level *r = &cstate->wm.ilk.optimal.wm[0];
@@ -2400,7 +2400,7 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev,
* currently active watermarks to get values that are safe both before
* and after the vblank.
*/
- *a = newstate->wm.optimal.ilk;
+ *a = newstate->wm.ilk.optimal;
a->pipe_enabled |= b->pipe_enabled;
a->sprites_enabled |= b->sprites_enabled;
a->sprites_scaled |= b->sprites_scaled;
@@ -2429,7 +2429,7 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev,
* If our intermediate WM are identical to the final WM, then we can
* omit the post-vblank programming; only update if it's different.
*/
- if (memcmp(a, &newstate->wm.optimal.ilk, sizeof(*a)) == 0)
+ if (memcmp(a, &newstate->wm.ilk.optimal, sizeof(*a)) == 0)
newstate->wm.need_postvbl_update = false;
if (WARN_ON(!r->enable))
continue;
- results->wm_linetime[pipe] = cstate->wm.optimal.ilk.linetime;
+ results->wm_linetime[pipe] = cstate->wm.ilk.optimal.linetime;
results->wm_pipe[pipe] =
(r->pri_val << WM0_PIPE_PLANE_SHIFT) |
@@ -3617,7 +3617,7 @@ static void skl_update_wm(struct drm_crtc *crtc)
return 0;
@@ -3678,7 +3678,7 @@ static void skl_update_wm(struct drm_crtc *crtc)
struct drm_i915_private *dev_priv = dev->dev_private;
struct skl_wm_values *results = &dev_priv->wm.skl_results;
struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
@ -166,16 +186,25 @@ index 54ab023..0da1d60 100644
/* Clear all dirty flags */
@@ -3711,7 +3711,7 @@ static void ilk_update_wm(struct drm_crtc *crtc)
intel_wait_for_vblank(crtc->dev, intel_crtc->pipe);
}
@@ -3757,7 +3757,7 @@ static void ilk_initial_watermarks(struct intel_crtc_state *cstate)
struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
- intel_crtc->wm.active.ilk = cstate->wm.optimal.ilk;
+ intel_crtc->wm.active.ilk = cstate->wm.ilk.optimal;
ilk_program_watermarks(cstate);
mutex_lock(&dev_priv->wm.wm_mutex);
- intel_crtc->wm.active.ilk = cstate->wm.intermediate;
+ intel_crtc->wm.active.ilk = cstate->wm.ilk.intermediate;
ilk_program_watermarks(dev_priv);
mutex_unlock(&dev_priv->wm.wm_mutex);
}
@@ -3767,7 +3767,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc)
@@ -3769,7 +3769,7 @@ static void ilk_optimize_watermarks(struct intel_crtc_state *cstate)
mutex_lock(&dev_priv->wm.wm_mutex);
if (cstate->wm.need_postvbl_update) {
- intel_crtc->wm.active.ilk = cstate->wm.optimal.ilk;
+ intel_crtc->wm.active.ilk = cstate->wm.ilk.optimal;
ilk_program_watermarks(dev_priv);
}
mutex_unlock(&dev_priv->wm.wm_mutex);
@@ -3826,7 +3826,7 @@ static void skl_pipe_wm_get_hw_state(struct drm_crtc *crtc)
struct skl_wm_values *hw = &dev_priv->wm.skl_hw;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
@ -184,7 +213,7 @@ index 54ab023..0da1d60 100644
enum pipe pipe = intel_crtc->pipe;
int level, i, max_level;
uint32_t temp;
@@ -3833,7 +3833,7 @@ static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc)
@@ -3892,7 +3892,7 @@ static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc)
struct ilk_wm_values *hw = &dev_priv->wm.hw;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);

74
0008-drm-i915-Add-distrust_bios_wm-flag-to-dev_priv-v2.patch
View File

@ -1,39 +1,29 @@
From 0126336af286ea85c1137ad13882f8c93d74c6c3 Mon Sep 17 00:00:00 2001
From: Fedora Kernel Team <kernel-team@fedoraproject.org>
Date: Mon, 20 Jun 2016 12:40:13 +0200
From 7207eecfcb3095442bce30227b551003edc7b908 Mon Sep 17 00:00:00 2001
From: Matt Roper <matthew.d.roper@intel.com>
Date: Thu, 12 May 2016 07:06:02 -0700
Subject: [PATCH 08/17] drm/i915: Add distrust_bios_wm flag to dev_priv (v2)
Upstream: since drm-intel-next-2016-05-22
commit 279e99d76e6097ee7b531114777fa9b030496d81
SKL-style platforms can't fully trust the watermark/DDB settings
programmed by the BIOS and need to do extra sanitization on their first
atomic update. Add a flag to dev_priv that is set during hardware
readout and cleared at the end of the first commit.
Author: Matt Roper <matthew.d.roper@intel.com>
AuthorDate: Thu May 12 07:06:02 2016 -0700
Commit: Matt Roper <matthew.d.roper@intel.com>
CommitDate: Fri May 13 07:33:54 2016 -0700
Note that for the somewhat common case where everything is turned off
when the driver starts up, we don't need to bother with a recompute...we
know exactly what the DDB should be (all zero's) so just setup the DDB
directly in that case.
drm/i915: Add distrust_bios_wm flag to dev_priv (v2)
v2:
- Move clearing of distrust_bios_wm up below the swap_state call since
it's a more natural / self-explanatory location. (Maarten)
- Use dev_priv->active_crtcs to test whether any CRTC's are turned on
during HW WM readout rather than trying to count the active CRTC's
again ourselves. (Maarten)
SKL-style platforms can't fully trust the watermark/DDB settings
programmed by the BIOS and need to do extra sanitization on their first
atomic update. Add a flag to dev_priv that is set during hardware
readout and cleared at the end of the first commit.
Note that for the somewhat common case where everything is turned off
when the driver starts up, we don't need to bother with a recompute...we
know exactly what the DDB should be (all zero's) so just setup the DDB
directly in that case.
v2:
- Move clearing of distrust_bios_wm up below the swap_state call since
it's a more natural / self-explanatory location. (Maarten)
- Use dev_priv->active_crtcs to test whether any CRTC's are turned on
during HW WM readout rather than trying to count the active CRTC's
again ourselves. (Maarten)
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-9-git-send-email-matthew.d.roper@intel.com
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-9-git-send-email-matthew.d.roper@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 7 +++++++
drivers/gpu/drm/i915/intel_display.c | 1 +
@ -41,13 +31,13 @@ CommitDate: Fri May 13 07:33:54 2016 -0700
3 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 804af6f..ae7932a 100644
index 611c128..e21960d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1986,6 +1986,13 @@ struct drm_i915_private {
};
uint8_t max_level;
@@ -1981,6 +1981,13 @@ struct drm_i915_private {
* cstate->wm.need_postvbl_update.
*/
struct mutex wm_mutex;
+
+ /*
+ * Set during HW readout of watermarks/DDB. Some platforms
@ -59,22 +49,22 @@ index 804af6f..ae7932a 100644
struct i915_runtime_pm pm;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f53df81..786f3d9 100644
index f26d1c5..a9d2e30 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13516,6 +13516,7 @@ static int intel_atomic_commit(struct drm_device *dev,
@@ -13621,6 +13621,7 @@ static int intel_atomic_commit(struct drm_device *dev,
drm_atomic_helper_swap_state(dev, state);
dev_priv->wm.config = to_intel_atomic_state(state)->wm_config;
dev_priv->wm.config = intel_state->wm_config;
+ dev_priv->wm.distrust_bios_wm = false;
intel_shared_dpll_commit(state);
if (intel_state->modeset) {
memcpy(dev_priv->min_pixclk, intel_state->min_pixclk,
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ee82b1f..6a09d7a 100644
index f009d43..a49faa7 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3967,6 +3967,14 @@ void skl_wm_get_hw_state(struct drm_device *dev)
@@ -4026,6 +4026,14 @@ void skl_wm_get_hw_state(struct drm_device *dev)
list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
skl_pipe_wm_get_hw_state(crtc);

146
0009-drm-i915-gen9-Compute-DDB-allocation-at-atomic-check.patch
View File

@ -1,70 +1,60 @@
From 0e9cf00438e4df1d97af44d3c52cc1cacc4dd2c9 Mon Sep 17 00:00:00 2001
From: Fedora Kernel Team <kernel-team@fedoraproject.org>
Date: Mon, 20 Jun 2016 12:40:26 +0200
From fbf53d8f1b7d1bcea1411f1f2cd0df6a6cc95332 Mon Sep 17 00:00:00 2001
From: Matt Roper <matthew.d.roper@intel.com>
Date: Thu, 12 May 2016 07:06:03 -0700
Subject: [PATCH 09/17] drm/i915/gen9: Compute DDB allocation at atomic check
time (v4)
Upstream: since drm-intel-next-2016-05-22
commit 98d39494d3759f84ce50e505059bc80f54c1c47b
Calculate the DDB blocks needed to satisfy the current atomic
transaction at atomic check time. This is a prerequisite to calculating
SKL watermarks during the 'check' phase and rejecting any configurations
that we can't find valid watermarks for.
Author: Matt Roper <matthew.d.roper@intel.com>
AuthorDate: Thu May 12 07:06:03 2016 -0700
Commit: Matt Roper <matthew.d.roper@intel.com>
CommitDate: Fri May 13 07:34:00 2016 -0700
Due to the nature of DDB allocation, it's possible for the addition of a
new CRTC to make the watermark configuration already in use on another,
unchanged CRTC become invalid. A change in which CRTC's are active
triggers a recompute of the entire DDB, which unfortunately means we
need to disallow any other atomic commits from racing with such an
update. If the active CRTC's change, we need to grab the lock on all
CRTC's and run all CRTC's through their 'check' handler to recompute and
re-check their per-CRTC DDB allocations.
drm/i915/gen9: Compute DDB allocation at atomic check time (v4)
Note that with this patch we only compute the DDB allocation but we
don't actually use the computed values during watermark programming yet.
For ease of review/testing/bisecting, we still recompute the DDB at
watermark programming time and just WARN() if it doesn't match the
precomputed values. A future patch will switch over to using the
precomputed values once we're sure they're being properly computed.
Calculate the DDB blocks needed to satisfy the current atomic
transaction at atomic check time. This is a prerequisite to calculating
SKL watermarks during the 'check' phase and rejecting any configurations
that we can't find valid watermarks for.
Another clarifying note: DDB allocation itself shouldn't ever fail with
the algorithm we use today (i.e., we have enough DDB blocks on BXT to
support the minimum needs of the worst-case scenario of every pipe/plane
enabled at full size). However the watermarks calculations based on the
DDB may fail and we'll be moving those to the atomic check as well in
future patches.
Due to the nature of DDB allocation, it's possible for the addition of a
new CRTC to make the watermark configuration already in use on another,
unchanged CRTC become invalid. A change in which CRTC's are active
triggers a recompute of the entire DDB, which unfortunately means we
need to disallow any other atomic commits from racing with such an
update. If the active CRTC's change, we need to grab the lock on all
CRTC's and run all CRTC's through their 'check' handler to recompute and
re-check their per-CRTC DDB allocations.
v2:
- Skip DDB calculations in the rare case where our transaction doesn't
actually touch any CRTC's at all. Assuming at least one CRTC state
is present in our transaction, then it means we can't race with any
transactions that would update dev_priv->active_crtcs (which requires
_all_ CRTC locks).
Note that with this patch we only compute the DDB allocation but we
don't actually use the computed values during watermark programming yet.
For ease of review/testing/bisecting, we still recompute the DDB at
watermark programming time and just WARN() if it doesn't match the
precomputed values. A future patch will switch over to using the
precomputed values once we're sure they're being properly computed.
v3:
- Also calculate DDB during initial hw readout, to prevent using
incorrect bios values. (Maarten)
Another clarifying note: DDB allocation itself shouldn't ever fail with
the algorithm we use today (i.e., we have enough DDB blocks on BXT to
support the minimum needs of the worst-case scenario of every pipe/plane
enabled at full size). However the watermarks calculations based on the
DDB may fail and we'll be moving those to the atomic check as well in
future patches.
v4:
- Use new distrust_bios_wm flag instead of skip_initial_wm (which was
never actually set).
- Set intel_state->active_pipe_changes instead of just realloc_pipes
v2:
- Skip DDB calculations in the rare case where our transaction doesn't
actually touch any CRTC's at all. Assuming at least one CRTC state
is present in our transaction, then it means we can't race with any
transactions that would update dev_priv->active_crtcs (which requires
_all_ CRTC locks).
v3:
- Also calculate DDB during initial hw readout, to prevent using
incorrect bios values. (Maarten)
v4:
- Use new distrust_bios_wm flag instead of skip_initial_wm (which was
never actually set).
- Set intel_state->active_pipe_changes instead of just realloc_pipes
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Lyude Paul <cpaul@redhat.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-10-git-send-email-matthew.d.roper@intel.com
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Lyude Paul <cpaul@redhat.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-10-git-send-email-matthew.d.roper@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 5 +++
drivers/gpu/drm/i915/intel_display.c | 18 ++++++++
@ -73,10 +63,10 @@ CommitDate: Fri May 13 07:34:00 2016 -0700
4 files changed, 105 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ae7932a..237df9f 100644
index e21960d..b908a41 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -296,6 +296,10 @@ struct i915_hotplug {
@@ -339,6 +339,10 @@ struct i915_hotplug {
#define for_each_intel_crtc(dev, intel_crtc) \
list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head)
@ -87,19 +77,19 @@ index ae7932a..237df9f 100644
#define for_each_intel_encoder(dev, intel_encoder) \
list_for_each_entry(intel_encoder, \
&(dev)->mode_config.encoder_list, \
@@ -638,6 +642,7 @@ struct drm_i915_display_funcs {
int (*compute_pipe_wm)(struct intel_crtc *crtc,
struct drm_atomic_state *state);
void (*program_watermarks)(struct intel_crtc_state *cstate);
@@ -594,6 +598,7 @@ struct drm_i915_display_funcs {
struct intel_crtc_state *newstate);
void (*initial_watermarks)(struct intel_crtc_state *cstate);
void (*optimize_watermarks)(struct intel_crtc_state *cstate);
+ int (*compute_global_watermarks)(struct drm_atomic_state *state);
void (*update_wm)(struct drm_crtc *crtc);
int (*modeset_calc_cdclk)(struct drm_atomic_state *state);
void (*modeset_commit_cdclk)(struct drm_atomic_state *state);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 786f3d9..03e2635 100644
index a9d2e30..ecad0ef 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13225,6 +13225,7 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
@@ -13342,6 +13342,7 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
static void calc_watermark_data(struct drm_atomic_state *state)
{
struct drm_device *dev = state->dev;
@ -107,7 +97,7 @@ index 786f3d9..03e2635 100644
struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
struct drm_crtc *crtc;
struct drm_crtc_state *cstate;
@@ -13254,6 +13255,10 @@ static void calc_watermark_data(struct drm_atomic_state *state)
@@ -13371,6 +13372,10 @@ static void calc_watermark_data(struct drm_atomic_state *state)
pstate->crtc_h != pstate->src_h >> 16)
intel_state->wm_config.sprites_scaled = true;
}
@ -118,8 +108,8 @@ index 786f3d9..03e2635 100644
}
/**
@@ -13616,6 +13621,19 @@ static int intel_atomic_commit(struct drm_device *dev,
modeset_put_power_domains(dev_priv, put_domains[i]);
@@ -13739,6 +13744,19 @@ static int intel_atomic_commit(struct drm_device *dev,
intel_modeset_verify_crtc(crtc, old_crtc_state, crtc->state);
}
+ /*
@ -139,13 +129,13 @@ index 786f3d9..03e2635 100644
intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 672ca56..4d6336a 100644
index d19e83e..2218290 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -271,6 +271,9 @@ struct intel_atomic_state {
struct intel_shared_dpll_config shared_dpll[I915_NUM_PLLS];
struct intel_wm_config wm_config;
@@ -312,6 +312,9 @@ struct intel_atomic_state {
* don't bother calculating intermediate watermarks.
*/
bool skip_intermediate_wm;
+
+ /* Gen9+ only */
+ struct skl_ddb_allocation ddb;
@ -153,10 +143,10 @@ index 672ca56..4d6336a 100644
struct intel_plane_state {
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 6a09d7a..f60519d 100644
index a49faa7..cfa4f80 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3751,6 +3751,84 @@ static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe)
@@ -3812,6 +3812,84 @@ static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe)
}
@ -241,9 +231,9 @@ index 6a09d7a..f60519d 100644
static void skl_update_wm(struct drm_crtc *crtc)
{
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@@ -7258,6 +7336,7 @@ void intel_init_pm(struct drm_device *dev)
dev_priv->display.init_clock_gating =
bxt_init_clock_gating;
@@ -7384,6 +7462,7 @@ void intel_init_pm(struct drm_device *dev)
if (INTEL_INFO(dev)->gen >= 9) {
skl_setup_wm_latency(dev);
dev_priv->display.update_wm = skl_update_wm;
+ dev_priv->display.compute_global_watermarks = skl_compute_wm;
} else if (HAS_PCH_SPLIT(dev)) {

70
0010-drm-i915-gen9-Drop-re-allocation-of-DDB-at-atomic-co.patch
View File

@ -1,50 +1,40 @@
From 6a86f1d01bb25a687c59dd6b3e6deea362cf0ee1 Mon Sep 17 00:00:00 2001
From: Fedora Kernel Team <kernel-team@fedoraproject.org>
Date: Mon, 20 Jun 2016 12:40:40 +0200
From a9abdc6767855e1668301a1dcc4b5fa8bed1ddfa Mon Sep 17 00:00:00 2001
From: Matt Roper <matthew.d.roper@intel.com>
Date: Thu, 12 May 2016 07:06:04 -0700
Subject: [PATCH 10/17] drm/i915/gen9: Drop re-allocation of DDB at atomic
commit (v2)
Upstream: since drm-intel-next-2016-05-22
commit a6d3460e62d17098a815a53f23e44d814cb347e0
Now that we're properly pre-allocating the DDB during the atomic check
phase and we trust that the allocation is appropriate, let's actually
use the allocation computed and not duplicate that work during the
commit phase.
Author: Matt Roper <matthew.d.roper@intel.com>
AuthorDate: Thu May 12 07:06:04 2016 -0700
Commit: Matt Roper <matthew.d.roper@intel.com>
CommitDate: Fri May 13 07:34:06 2016 -0700
v2:
- Significant rebasing now that we can use cached data rates and
minimum block allocations to avoid grabbing additional plane states.
drm/i915/gen9: Drop re-allocation of DDB at atomic commit (v2)
Now that we're properly pre-allocating the DDB during the atomic check
phase and we trust that the allocation is appropriate, let's actually
use the allocation computed and not duplicate that work during the
commit phase.
v2:
- Significant rebasing now that we can use cached data rates and
minimum block allocations to avoid grabbing additional plane states.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-11-git-send-email-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-11-git-send-email-matthew.d.roper@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 14 +--
drivers/gpu/drm/i915/intel_pm.c | 224 +++++++++++------------------------
2 files changed, 67 insertions(+), 171 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 03e2635..b484fda 100644
index ecad0ef..4db10d7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13522,6 +13522,7 @@ static int intel_atomic_commit(struct drm_device *dev,
@@ -13627,6 +13627,7 @@ static int intel_atomic_commit(struct drm_device *dev,
drm_atomic_helper_swap_state(dev, state);
dev_priv->wm.config = to_intel_atomic_state(state)->wm_config;
dev_priv->wm.config = intel_state->wm_config;
dev_priv->wm.distrust_bios_wm = false;
+ dev_priv->wm.skl_results.ddb = intel_state->ddb;
intel_shared_dpll_commit(state);
if (intel_state->modeset) {
memcpy(dev_priv->min_pixclk, intel_state->min_pixclk,
@@ -13621,19 +13622,6 @@ static int intel_atomic_commit(struct drm_device *dev,
modeset_put_power_domains(dev_priv, put_domains[i]);
@@ -13744,19 +13745,6 @@ static int intel_atomic_commit(struct drm_device *dev,
intel_modeset_verify_crtc(crtc, old_crtc_state, crtc->state);
}
- /*
@ -64,10 +54,10 @@ index 03e2635..b484fda 100644
intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f60519d..80f9f18 100644
index cfa4f80..0f0d4e1 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2788,7 +2788,6 @@ skl_wm_plane_id(const struct intel_plane *plane)
@@ -2849,7 +2849,6 @@ skl_wm_plane_id(const struct intel_plane *plane)
static void
skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
const struct intel_crtc_state *cstate,
@ -75,7 +65,7 @@ index f60519d..80f9f18 100644
struct skl_ddb_entry *alloc, /* out */
int *num_active /* out */)
{
@@ -2796,24 +2795,22 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
@@ -2857,24 +2856,22 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
struct drm_i915_private *dev_priv = to_i915(dev);
struct drm_crtc *for_crtc = cstate->base.crtc;
@ -107,7 +97,7 @@ index f60519d..80f9f18 100644
if (IS_BROXTON(dev))
ddb_size = BXT_DDB_SIZE;
else
@@ -2822,50 +2819,23 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
@@ -2883,50 +2880,23 @@ skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
ddb_size -= 4; /* 4 blocks for bypass path allocation */
/*
@ -173,7 +163,7 @@ index f60519d..80f9f18 100644
}
static unsigned int skl_cursor_allocation(int num_active)
@@ -2964,62 +2934,33 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate)
@@ -3025,62 +2995,33 @@ skl_get_total_relative_data_rate(struct intel_crtc_state *intel_cstate)
struct drm_crtc *crtc = cstate->crtc;
struct drm_device *dev = crtc->dev;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@ -256,7 +246,7 @@ index f60519d..80f9f18 100644
}
/* Calculate CRTC's total data rate from cached values */
@@ -3043,8 +2984,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
@@ -3104,8 +3045,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
struct drm_atomic_state *state = cstate->base.state;
struct drm_crtc *crtc = cstate->base.crtc;
struct drm_device *dev = crtc->dev;
@ -265,7 +255,7 @@ index f60519d..80f9f18 100644
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_plane *intel_plane;
struct drm_plane *plane;
@@ -3058,6 +2997,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
@@ -3119,6 +3058,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
int num_active;
int id, i;
@ -275,7 +265,7 @@ index f60519d..80f9f18 100644
if (!cstate->base.active) {
ddb->pipe[pipe].start = ddb->pipe[pipe].end = 0;
memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));
@@ -3065,8 +3007,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
@@ -3126,8 +3068,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
return 0;
}
@ -285,7 +275,7 @@ index f60519d..80f9f18 100644
alloc_size = skl_ddb_entry_size(alloc);
if (alloc_size == 0) {
memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe]));
@@ -3078,53 +3019,31 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
@@ -3139,53 +3080,31 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
ddb->plane[pipe][PLANE_CURSOR].end = alloc->end;
alloc_size -= cursor_blocks;
@ -359,7 +349,7 @@ index f60519d..80f9f18 100644
}
for (i = 0; i < PLANE_CURSOR; i++) {
@@ -3675,7 +3594,6 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc,
@@ -3736,7 +3655,6 @@ static bool skl_update_pipe_wm(struct drm_crtc *crtc,
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
@ -367,7 +357,7 @@ index f60519d..80f9f18 100644
skl_build_pipe_wm(cstate, ddb, pipe_wm);
if (!memcmp(&intel_crtc->wm.active.skl, pipe_wm, sizeof(*pipe_wm)))
@@ -3739,16 +3657,6 @@ static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe)
@@ -3800,16 +3718,6 @@ static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe)
memset(watermarks->plane_trans[pipe],
0, sizeof(uint32_t) * I915_MAX_PLANES);
watermarks->plane_trans[pipe][PLANE_CURSOR] = 0;

153
0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch
View File

@ -1,80 +1,70 @@
From 71136125cc79dab464a0139dbf0c02891aa9ce6e Mon Sep 17 00:00:00 2001
From: Fedora Kernel Team <kernel-team@fedoraproject.org>
Date: Mon, 20 Jun 2016 12:41:46 +0200
From 664f87c5bfcc7798bd5b16e14792f1e9ba2956ea Mon Sep 17 00:00:00 2001
From: Matt Roper <matthew.d.roper@intel.com>
Date: Thu, 12 May 2016 15:11:40 -0700
Subject: [PATCH 15/17] drm/i915/gen9: Calculate watermarks during atomic
'check' (v2)
Upstream: since drm-intel-next-2016-05-22
commit 734fa01f3a17ac80d2d53cee0b05b246c03df0e4
Moving watermark calculation into the check phase will allow us to to
reject display configurations for which there are no valid watermark
values before we start trying to program the hardware (although those
tests will come in a subsequent patch).
Author: Matt Roper <matthew.d.roper@intel.com>
AuthorDate: Thu May 12 15:11:40 2016 -0700
Commit: Matt Roper <matthew.d.roper@intel.com>
CommitDate: Fri May 13 07:35:48 2016 -0700
Another advantage of moving this calculation to the check phase is that
we can calculate the watermarks in a single shot as part of the atomic
transaction. The watermark interfaces we inherited from our legacy
modesetting days are a bit broken in the atomic design because they use
per-crtc entry points but actually re-calculate and re-program something
that is really more of a global state. That worked okay in the legacy
modesetting world because operations only ever updated a single CRTC at
a time. However in the atomic world, a transaction can involve multiple
CRTC's, which means we wind up computing and programming the watermarks
NxN times (where N is the number of CRTC's involved). With this patch
we eliminate the redundant re-calculation of watermark data for atomic
states (which was the cause of the WARN_ON(!wm_changed) problems that
have plagued us for a while).
drm/i915/gen9: Calculate watermarks during atomic 'check' (v2)
We still need to work on the 'commit' side of watermark handling so that
we aren't doing redundant NxN programming of watermarks, but that's
content for future patches.
Moving watermark calculation into the check phase will allow us to to
reject display configurations for which there are no valid watermark
values before we start trying to program the hardware (although those
tests will come in a subsequent patch).
v2:
- Bail out of skl_write_wm_values() if the CRTC isn't active. Now that
we set dirty_pipes to ~0 if the active pipes change (because
we need to deal with DDB changes), we can now wind up here for
disabled pipes, whereas we couldn't before.
Another advantage of moving this calculation to the check phase is that
we can calculate the watermarks in a single shot as part of the atomic
transaction. The watermark interfaces we inherited from our legacy
modesetting days are a bit broken in the atomic design because they use
per-crtc entry points but actually re-calculate and re-program something
that is really more of a global state. That worked okay in the legacy
modesetting world because operations only ever updated a single CRTC at
a time. However in the atomic world, a transaction can involve multiple
CRTC's, which means we wind up computing and programming the watermarks
NxN times (where N is the number of CRTC's involved). With this patch
we eliminate the redundant re-calculation of watermark data for atomic
states (which was the cause of the WARN_ON(!wm_changed) problems that
have plagued us for a while).
We still need to work on the 'commit' side of watermark handling so that
we aren't doing redundant NxN programming of watermarks, but that's
content for future patches.
v2:
- Bail out of skl_write_wm_values() if the CRTC isn't active. Now that
we set dirty_pipes to ~0 if the active pipes change (because
we need to deal with DDB changes), we can now wind up here for
disabled pipes, whereas we couldn't before.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89055
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92181
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463091100-13747-1-git-send-email-matthew.d.roper@intel.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89055
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92181
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463091100-13747-1-git-send-email-matthew.d.roper@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
drivers/gpu/drm/i915/intel_drv.h | 14 +++-
drivers/gpu/drm/i915/intel_pm.c | 135 ++++++++++++-----------------------
3 files changed, 61 insertions(+), 90 deletions(-)
drivers/gpu/drm/i915/intel_drv.h | 2 +-
drivers/gpu/drm/i915/intel_pm.c | 140 +++++++++++++----------------------
3 files changed, 54 insertions(+), 90 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9ac2346..1726ea4 100644
index 2190bac..a75daac 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13522,7 +13522,7 @@ static int intel_atomic_commit(struct drm_device *dev,
@@ -13627,7 +13627,7 @@ static int intel_atomic_commit(struct drm_device *dev,
drm_atomic_helper_swap_state(dev, state);
dev_priv->wm.config = to_intel_atomic_state(state)->wm_config;
dev_priv->wm.config = intel_state->wm_config;
dev_priv->wm.distrust_bios_wm = false;
- dev_priv->wm.skl_results.ddb = intel_state->ddb;
+ dev_priv->wm.skl_results = intel_state->wm_results;
intel_shared_dpll_commit(state);
if (intel_state->modeset) {
memcpy(dev_priv->min_pixclk, intel_state->min_pixclk,
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 4d6336a..e5543b8 100644
index 2218290..ab0be7a 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -273,7 +273,7 @@ struct intel_atomic_state {
struct intel_wm_config wm_config;
@@ -314,7 +314,7 @@ struct intel_atomic_state {
bool skip_intermediate_wm;
/* Gen9+ only */
- struct skl_ddb_allocation ddb;
@ -82,30 +72,11 @@ index 4d6336a..e5543b8 100644
};
struct intel_plane_state {
@@ -1661,6 +1661,18 @@ intel_atomic_get_crtc_state(struct drm_atomic_state *state,
return to_intel_crtc_state(crtc_state);
}
+
+static inline struct intel_plane_state *
+intel_atomic_get_existing_plane_state(struct drm_atomic_state *state,
+ struct intel_plane *plane)
+{
+ struct drm_plane_state *plane_state;
+
+ plane_state = drm_atomic_get_existing_plane_state(state, &plane->base);
+
+ return to_intel_plane_state(plane_state);
+}
+
int intel_atomic_setup_scalers(struct drm_device *dev,
struct intel_crtc *intel_crtc,
struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ec22d93..73e5242 100644
index 342aa66..b072417 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3160,23 +3160,6 @@ static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
@@ -3221,23 +3221,6 @@ static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
return ret;
}
@ -129,7 +100,7 @@ index ec22d93..73e5242 100644
static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
struct intel_crtc_state *cstate,
struct intel_plane_state *intel_pstate,
@@ -3472,6 +3455,8 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv,
@@ -3533,6 +3516,8 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv,
if ((new->dirty_pipes & drm_crtc_mask(&crtc->base)) == 0)
continue;
@ -138,7 +109,7 @@ index ec22d93..73e5242 100644
I915_WRITE(PIPE_WM_LINETIME(pipe), new->wm_linetime[pipe]);
@@ -3655,66 +3640,9 @@ static int skl_update_pipe_wm(struct drm_crtc_state *cstate,
@@ -3716,66 +3701,9 @@ static int skl_update_pipe_wm(struct drm_crtc_state *cstate,
else
*changed = true;
@ -205,7 +176,7 @@ index ec22d93..73e5242 100644
static int
skl_compute_ddb(struct drm_atomic_state *state)
{
@@ -3722,6 +3650,7 @@ skl_compute_ddb(struct drm_atomic_state *state)
@@ -3783,6 +3711,7 @@ skl_compute_ddb(struct drm_atomic_state *state)
struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_atomic_state *intel_state = to_intel_atomic_state(state);
struct intel_crtc *intel_crtc;
@ -213,7 +184,7 @@ index ec22d93..73e5242 100644
unsigned realloc_pipes = dev_priv->active_crtcs;
int ret;
@@ -3747,8 +3676,10 @@ skl_compute_ddb(struct drm_atomic_state *state)
@@ -3808,8 +3737,10 @@ skl_compute_ddb(struct drm_atomic_state *state)
* any other display updates race with this transaction, so we need
* to grab the lock on *all* CRTC's.
*/
@ -225,7 +196,7 @@ index ec22d93..73e5242 100644
for_each_intel_crtc_mask(dev, intel_crtc, realloc_pipes) {
struct intel_crtc_state *cstate;
@@ -3757,7 +3688,7 @@ skl_compute_ddb(struct drm_atomic_state *state)
@@ -3818,7 +3749,7 @@ skl_compute_ddb(struct drm_atomic_state *state)
if (IS_ERR(cstate))
return PTR_ERR(cstate);
@ -234,7 +205,7 @@ index ec22d93..73e5242 100644
if (ret)
return ret;
}
@@ -3770,8 +3701,11 @@ skl_compute_wm(struct drm_atomic_state *state)
@@ -3831,8 +3762,11 @@ skl_compute_wm(struct drm_atomic_state *state)
{
struct drm_crtc *crtc;
struct drm_crtc_state *cstate;
@ -247,7 +218,7 @@ index ec22d93..73e5242 100644
/*
* If this transaction isn't actually touching any CRTC's, don't
@@ -3786,10 +3720,44 @@ skl_compute_wm(struct drm_atomic_state *state)
@@ -3847,10 +3781,45 @@ skl_compute_wm(struct drm_atomic_state *state)
if (!changed)
return 0;
@ -286,21 +257,22 @@ index ec22d93..73e5242 100644
+ /* This pipe's WM's did not change */
+ continue;
+
+ intel_cstate->update_wm_pre = true;
+ skl_compute_wm_results(crtc->dev, pipe_wm, results, intel_crtc);
+ }
+
return 0;
}
@@ -3801,21 +3769,12 @@ static void skl_update_wm(struct drm_crtc *crtc)
@@ -3862,26 +3831,21 @@ static void skl_update_wm(struct drm_crtc *crtc)
struct skl_wm_values *results = &dev_priv->wm.skl_results;
struct intel_crtc_state *cstate = to_intel_crtc_state(crtc->state);
struct skl_pipe_wm *pipe_wm = &cstate->wm.skl.optimal;
- bool wm_changed;
-
- /* Clear all dirty flags */
- results->dirty_pipes = 0;
-
- skl_clear_wm(results, intel_crtc->pipe);
-
- skl_update_pipe_wm(crtc->state, &results->ddb, pipe_wm, &wm_changed);
@ -311,11 +283,20 @@ index ec22d93..73e5242 100644
- skl_compute_wm_results(dev, pipe_wm, results, intel_crtc);
- results->dirty_pipes |= drm_crtc_mask(&intel_crtc->base);
+ intel_crtc->wm.active.skl = *pipe_wm;
+
+ mutex_lock(&dev_priv->wm.wm_mutex);
- skl_update_other_pipe_wm(dev, crtc, results);
skl_write_wm_values(dev_priv, results);
skl_flush_wm_values(dev_priv, results);
/* store the new configuration */
dev_priv->wm.skl_hw = *results;
+
+ mutex_unlock(&dev_priv->wm.wm_mutex);
}
static void ilk_compute_wm_config(struct drm_device *dev,
--
2.7.4

54
0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch
View File

@ -1,27 +1,17 @@
From ebe515b1696401259781bc183e211a81287242f6 Mon Sep 17 00:00:00 2001
From: Fedora Kernel Team <kernel-team@fedoraproject.org>
Date: Mon, 20 Jun 2016 12:42:13 +0200
From 73a35468564f4e47deade0a4a5eb7ec289611ebc Mon Sep 17 00:00:00 2001
From: Matt Roper <matthew.d.roper@intel.com>
Date: Thu, 12 May 2016 07:06:11 -0700
Subject: [PATCH 17/17] drm/i915: Remove wm_config from
dev_priv/intel_atomic_state
Upstream: since drm-intel-next-2016-05-22
commit 5b483747a92570176259bb896dcf2468291f3e42
We calculate the watermark config into intel_atomic_state and then save
it into dev_priv, but never actually use it from there. This is
left-over from some early ILK-style watermark programming designs that
got changed over time.
Author: Matt Roper <matthew.d.roper@intel.com>
AuthorDate: Thu May 12 07:06:11 2016 -0700
Commit: Matt Roper <matthew.d.roper@intel.com>
CommitDate: Fri May 13 07:36:05 2016 -0700
drm/i915: Remove wm_config from dev_priv/intel_atomic_state
We calculate the watermark config into intel_atomic_state and then save
it into dev_priv, but never actually use it from there. This is
left-over from some early ILK-style watermark programming designs that
got changed over time.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-18-git-send-email-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-18-git-send-email-matthew.d.roper@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 3 ---
drivers/gpu/drm/i915/intel_display.c | 31 -------------------------------
@ -29,10 +19,10 @@ CommitDate: Fri May 13 07:36:05 2016 -0700
3 files changed, 35 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 67c76b6..59092cb 100644
index e7bde72..608f8e4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1973,9 +1973,6 @@ struct drm_i915_private {
@@ -1961,9 +1961,6 @@ struct drm_i915_private {
*/
uint16_t skl_latency[8];
@ -43,10 +33,10 @@ index 67c76b6..59092cb 100644
* The skl_wm_values structure is a bit too big for stack
* allocation, so we keep the staging struct where we store
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1726ea4..f5eefb1 100644
index a75daac..9c109c6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13226,35 +13226,6 @@ static int calc_watermark_data(struct drm_atomic_state *state)
@@ -13343,35 +13343,6 @@ static int calc_watermark_data(struct drm_atomic_state *state)
{
struct drm_device *dev = state->dev;
struct drm_i915_private *dev_priv = to_i915(dev);
@ -82,15 +72,15 @@ index 1726ea4..f5eefb1 100644
/* Is there platform-specific watermark information to calculate? */
if (dev_priv->display.compute_global_watermarks)
@@ -13520,7 +13491,6 @@ static int intel_atomic_commit(struct drm_device *dev,
@@ -13625,7 +13596,6 @@ static int intel_atomic_commit(struct drm_device *dev,
}
drm_atomic_helper_swap_state(dev, state);
- dev_priv->wm.config = to_intel_atomic_state(state)->wm_config;
- dev_priv->wm.config = intel_state->wm_config;
dev_priv->wm.distrust_bios_wm = false;
dev_priv->wm.skl_results = intel_state->wm_results;
@@ -15334,7 +15304,6 @@ retry:
intel_shared_dpll_commit(state);
@@ -15405,7 +15375,6 @@ retry:
}
/* Write calculated watermark values back */
@ -99,17 +89,17 @@ index 1726ea4..f5eefb1 100644
struct intel_crtc_state *cs = to_intel_crtc_state(cstate);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e5543b8..148f79d 100644
index ab0be7a..8d73c20 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -270,7 +270,6 @@ struct intel_atomic_state {
@@ -305,7 +305,6 @@ struct intel_atomic_state {
unsigned int min_pixclk[I915_MAX_PIPES];
struct intel_shared_dpll_config shared_dpll[I915_NUM_PLLS];
- struct intel_wm_config wm_config;
/* Gen9+ only */
struct skl_wm_values wm_results;
/*
* Current watermarks can't be trusted during hardware readout, so
--
2.7.4

20
Add-EFI-signature-data-types.patch
View File

@ -1,7 +1,7 @@
From 24ceffbbe2764a31328e1146a2cf4bdcf85664e7 Mon Sep 17 00:00:00 2001
From 5216de8394ff599e41c8540c0572368c18c51459 Mon Sep 17 00:00:00 2001
From: Dave Howells <dhowells@redhat.com>
Date: Tue, 23 Oct 2012 09:30:54 -0400
Subject: [PATCH] Add EFI signature data types
Subject: [PATCH 4/9] Add EFI signature data types
Add the data types that are used for containing hashes, keys and certificates
for cryptographic verification.
@ -15,12 +15,12 @@ Signed-off-by: David Howells <dhowells@redhat.com>
1 file changed, 20 insertions(+)
diff --git a/include/linux/efi.h b/include/linux/efi.h
index 333d0ca6940f..b3efb6d06344 100644
index 8cb38cfcba74..8c274b4ea8e6 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -603,6 +603,12 @@ void efi_native_runtime_setup(void);
EFI_GUID(0x3152bca5, 0xeade, 0x433d, \
0x86, 0x2e, 0xc0, 0x1c, 0xdc, 0x29, 0x1f, 0x44)
@@ -647,6 +647,12 @@ void efi_native_runtime_setup(void);
EFI_GUID(0x4a67b082, 0x0a4c, 0x41cf, \
0xb6, 0xc7, 0x44, 0x0b, 0x29, 0xbb, 0x8c, 0x4f)
+#define EFI_CERT_SHA256_GUID \
+ EFI_GUID( 0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28 )
@ -31,9 +31,9 @@ index 333d0ca6940f..b3efb6d06344 100644
typedef struct {
efi_guid_t guid;
u64 table;
@@ -827,6 +833,20 @@ typedef struct {
#define EFI_INVALID_TABLE_ADDR (~0UL)
@@ -879,6 +885,20 @@ typedef struct {
efi_memory_desc_t entry[0];
} efi_memory_attributes_table_t;
+typedef struct {
+ efi_guid_t signature_owner;
@ -53,5 +53,5 @@ index 333d0ca6940f..b3efb6d06344 100644
* All runtime access to EFI goes through this structure:
*/
--
2.5.0
2.5.5

85
Add-option-to-automatically-enforce-module-signature.patch
View File

@ -1,8 +1,8 @@
From 37431394b3eeb1ef6d38d0e6b2693210606c2c2c Mon Sep 17 00:00:00 2001
From 0000dc9edd5997cc49b8893a9d5407f89dfa1307 Mon Sep 17 00:00:00 2001
From: Matthew Garrett <matthew.garrett@nebula.com>
Date: Fri, 9 Aug 2013 18:36:30 -0400
Subject: [PATCH 10/20] Add option to automatically enforce module signatures
when in Secure Boot mode
Subject: [PATCH] Add option to automatically enforce module signatures when in
Secure Boot mode
UEFI Secure Boot provides a mechanism for ensuring that the firmware will
only load signed bootloaders and kernels. Certain use cases may also
@ -12,13 +12,13 @@ that enforces this automatically when enabled.
Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
---
Documentation/x86/zero-page.txt | 2 ++
arch/x86/Kconfig | 10 ++++++++++
arch/x86/boot/compressed/eboot.c | 36 +++++++++++++++++++++++++++++++++++
arch/x86/include/uapi/asm/bootparam.h | 3 ++-
arch/x86/kernel/setup.c | 6 ++++++
include/linux/module.h | 6 ++++++
kernel/module.c | 7 +++++++
7 files changed, 69 insertions(+), 1 deletion(-)
arch/x86/Kconfig | 11 ++++++
arch/x86/boot/compressed/eboot.c | 66 +++++++++++++++++++++++++++++++++++
arch/x86/include/uapi/asm/bootparam.h | 3 +-
arch/x86/kernel/setup.c | 6 ++++
include/linux/module.h | 6 ++++
kernel/module.c | 7 ++++
7 files changed, 100 insertions(+), 1 deletion(-)
diff --git a/Documentation/x86/zero-page.txt b/Documentation/x86/zero-page.txt
index 95a4d34af3fd..b8527c6b7646 100644
@ -34,15 +34,16 @@ index 95a4d34af3fd..b8527c6b7646 100644
290/040 ALL edd_mbr_sig_buffer EDD MBR signatures
2D0/A00 ALL e820_map E820 memory map table
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index cc0d73eac047..14db458f4774 100644
index 0a7b885964ba..29b8ba9ae713 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1734,6 +1734,16 @@ config EFI_MIXED
@@ -1776,6 +1776,17 @@ config EFI_MIXED
If unsure, say N.
+config EFI_SECURE_BOOT_SIG_ENFORCE
+ def_bool n
+ def_bool n
+ depends on EFI
+ prompt "Force module signing when UEFI Secure Boot is enabled"
+ ---help---
+ UEFI Secure Boot provides a mechanism for ensuring that the
@ -55,7 +56,7 @@ index cc0d73eac047..14db458f4774 100644
def_bool y
prompt "Enable seccomp to safely compute untrusted bytecode"
diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c
index ee1b6d346b98..b4de3faa3f29 100644
index 52fef606bc54..6b8b9a775b46 100644
--- a/arch/x86/boot/compressed/eboot.c
+++ b/arch/x86/boot/compressed/eboot.c
@@ -12,6 +12,7 @@
@ -66,8 +67,8 @@ index ee1b6d346b98..b4de3faa3f29 100644
#include "../string.h"
#include "eboot.h"
@@ -827,6 +828,37 @@ out:
return status;
@@ -571,6 +572,67 @@ free_handle:
efi_call_early(free_pool, pci_handle);
}
+static int get_secure_boot(void)
@ -101,10 +102,40 @@ index ee1b6d346b98..b4de3faa3f29 100644
+}
+
+
/*
* See if we have Graphics Output Protocol
*/
@@ -1412,6 +1444,10 @@ struct boot_params *efi_main(struct efi_config *c,
+/*
+ * See if we have Graphics Output Protocol
+ */
+static efi_status_t setup_gop(struct screen_info *si, efi_guid_t *proto,
+ unsigned long size)
+{
+ efi_status_t status;
+ void **gop_handle = NULL;
+
+ status = efi_call_early(allocate_pool, EFI_LOADER_DATA,
+ size, (void **)&gop_handle);
+ if (status != EFI_SUCCESS)
+ return status;
+
+ status = efi_call_early(locate_handle,
+ EFI_LOCATE_BY_PROTOCOL,
+ proto, NULL, &size, gop_handle);
+ if (status != EFI_SUCCESS)
+ goto free_handle;
+
+ if (efi_early->is64)
+ status = setup_gop64(si, proto, size, gop_handle);
+ else
+ status = setup_gop32(si, proto, size, gop_handle);
+
+free_handle:
+ efi_call_early(free_pool, gop_handle);
+ return status;
+}
+
static efi_status_t
setup_uga32(void **uga_handle, unsigned long size, u32 *width, u32 *height)
{
@@ -1126,6 +1188,10 @@ struct boot_params *efi_main(struct efi_config *c,
else
setup_boot_services32(efi_early);
@ -116,7 +147,7 @@ index ee1b6d346b98..b4de3faa3f29 100644
setup_efi_pci(boot_params);
diff --git a/arch/x86/include/uapi/asm/bootparam.h b/arch/x86/include/uapi/asm/bootparam.h
index 329254373479..b61f8533c0fd 100644
index c18ce67495fa..2b3e5427097b 100644
--- a/arch/x86/include/uapi/asm/bootparam.h
+++ b/arch/x86/include/uapi/asm/bootparam.h
@@ -134,7 +134,8 @@ struct boot_params {
@ -130,10 +161,10 @@ index 329254373479..b61f8533c0fd 100644
* The sentinel is set to a nonzero value (0xff) in header.S.
*
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index baadbf90a7c5..1ac118146e90 100644
index c4e7b3991b60..bdb9881c7afd 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -1135,6 +1135,12 @@ void __init setup_arch(char **cmdline_p)
@@ -1152,6 +1152,12 @@ void __init setup_arch(char **cmdline_p)
io_delay_init();
@ -147,7 +178,7 @@ index baadbf90a7c5..1ac118146e90 100644
* Parse the ACPI tables for possible boot-time SMP configuration.
*/
diff --git a/include/linux/module.h b/include/linux/module.h
index db386349cd01..4b8df91f03cd 100644
index 082298a09df1..38d0597f7615 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -273,6 +273,12 @@ const struct exception_table_entry *search_exception_tables(unsigned long add);
@ -164,10 +195,10 @@ index db386349cd01..4b8df91f03cd 100644
extern int modules_disabled; /* for sysctl */
diff --git a/kernel/module.c b/kernel/module.c
index 7f045246e123..2b403ab0ef29 100644
index 3c384968f553..ea484f3a35b2 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -4088,6 +4088,13 @@ void module_layout(struct module *mod,
@@ -4200,6 +4200,13 @@ void module_layout(struct module *mod,
EXPORT_SYMBOL(module_layout);
#endif
@ -182,5 +213,5 @@ index 7f045246e123..2b403ab0ef29 100644
{
#ifdef CONFIG_MODULE_SIG
--
2.4.3
2.5.5

16
Add-secure_modules-call.patch
View File

@ -1,4 +1,4 @@
From a1aaf20cffb1a949c5d6b1198690c7c30cfda4d5 Mon Sep 17 00:00:00 2001
From 0f6eec5ca124baf1372fb4edeacd11a002378f5e Mon Sep 17 00:00:00 2001
From: Matthew Garrett <matthew.garrett@nebula.com>
Date: Fri, 9 Aug 2013 17:58:15 -0400
Subject: [PATCH 01/20] Add secure_modules() call
@ -17,19 +17,19 @@ Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com>
2 files changed, 16 insertions(+)
diff --git a/include/linux/module.h b/include/linux/module.h
index 3a19c79918e0..db386349cd01 100644
index 3daf2b3..082298a 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -635,6 +635,8 @@ static inline bool module_requested_async_probing(struct module *module)
return module && module->async_probe_requested;
@@ -655,6 +655,8 @@ static inline bool is_livepatch_module(struct module *mod)
}
#endif /* CONFIG_LIVEPATCH */
+extern bool secure_modules(void);
+
#else /* !CONFIG_MODULES... */
/* Given an address, look for it in the exception tables. */
@@ -751,6 +753,10 @@ static inline bool module_requested_async_probing(struct module *module)
@@ -771,6 +773,10 @@ static inline bool module_requested_async_probing(struct module *module)
return false;
}
@ -41,10 +41,10 @@ index 3a19c79918e0..db386349cd01 100644
#ifdef CONFIG_SYSFS
diff --git a/kernel/module.c b/kernel/module.c
index b86b7bf1be38..7f045246e123 100644
index 5f71aa6..3c38496 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -4087,3 +4087,13 @@ void module_layout(struct module *mod,
@@ -4199,3 +4199,13 @@ void module_layout(struct module *mod,
}
EXPORT_SYMBOL(module_layout);
#endif
@ -59,5 +59,5 @@ index b86b7bf1be38..7f045246e123 100644
+}
+EXPORT_SYMBOL(secure_modules);
--
2.4.3
2.5.5

77
KEYS-Add-a-system-blacklist-keyring.patch
View File

@ -1,7 +1,7 @@
From f630ce576114bfede02d8a0bafa97e4d6f978a74 Mon Sep 17 00:00:00 2001
From 096da19de900a115ee3610b666ecb7e55926623d Mon Sep 17 00:00:00 2001
From: Josh Boyer <jwboyer@fedoraproject.org>
Date: Fri, 26 Oct 2012 12:36:24 -0400
Subject: [PATCH 17/20] KEYS: Add a system blacklist keyring
Subject: [PATCH 6/9] KEYS: Add a system blacklist keyring
This adds an additional keyring that is used to store certificates that
are blacklisted. This keyring is searched first when loading signed modules
@ -10,52 +10,48 @@ useful in cases where third party certificates are used for module signing.
Signed-off-by: Josh Boyer <jwboyer@fedoraproject.org>
---
certs/system_keyring.c | 27 +++++++++++++++++++++++++++
certs/system_keyring.c | 22 ++++++++++++++++++++++
include/keys/system_keyring.h | 4 ++++
init/Kconfig | 9 +++++++++
3 files changed, 40 insertions(+)
3 files changed, 35 insertions(+)
diff --git a/certs/system_keyring.c b/certs/system_keyring.c
index 2570598b784d..53733822993f 100644
index 50979d6dcecd..787eeead2f57 100644
--- a/certs/system_keyring.c
+++ b/certs/system_keyring.c
@@ -20,6 +20,9 @@
struct key *system_trusted_keyring;
EXPORT_SYMBOL_GPL(system_trusted_keyring);
@@ -22,6 +22,9 @@ static struct key *builtin_trusted_keys;
#ifdef CONFIG_SECONDARY_TRUSTED_KEYRING
static struct key *secondary_trusted_keys;
#endif
+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING
+struct key *system_blacklist_keyring;
+#endif
extern __initconst const u8 system_certificate_list[];
extern __initconst const unsigned long system_certificate_list_size;
@@ -41,6 +44,20 @@ static __init int system_trusted_keyring_init(void)
panic("Can't allocate system trusted keyring\n");
set_bit(KEY_FLAG_TRUSTED_ONLY, &system_trusted_keyring->flags);
+
+ #ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING
@@ -99,6 +102,16 @@ static __init int system_trusted_keyring_init(void)
if (key_link(secondary_trusted_keys, builtin_trusted_keys) < 0)
panic("Can't link trusted keyrings\n");
#endif
+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING
+ system_blacklist_keyring = keyring_alloc(".system_blacklist_keyring",
+ KUIDT_INIT(0), KGIDT_INIT(0),
+ current_cred(),
+ (KEY_POS_ALL & ~KEY_POS_SETATTR) |
+ KEY_USR_VIEW | KEY_USR_READ,
+ KEY_ALLOC_NOT_IN_QUOTA, NULL);
+ KUIDT_INIT(0), KGIDT_INIT(0), current_cred(),
+ ((KEY_POS_ALL & ~KEY_POS_SETATTR) |
+ KEY_USR_VIEW | KEY_USR_READ | KEY_USR_SEARCH),
+ KEY_ALLOC_NOT_IN_QUOTA,
+ NULL, NULL);
+ if (IS_ERR(system_blacklist_keyring))
+ panic("Can't allocate system blacklist keyring\n");
+
+ set_bit(KEY_FLAG_TRUSTED_ONLY, &system_blacklist_keyring->flags);
+#endif
+
return 0;
}
@@ -138,6 +155,16 @@ int system_verify_data(const void *data, unsigned long len,
if (ret < 0)
goto error;
@@ -214,6 +227,15 @@ int verify_pkcs7_signature(const void *data, size_t len,
trusted_keys = builtin_trusted_keys;
#endif
}
+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING
+ ret = pkcs7_validate_trust(pkcs7, system_blacklist_keyring, &trusted);
+ ret = pkcs7_validate_trust(pkcs7, system_blacklist_keyring);
+ if (!ret) {
+ /* module is signed with a cert in the blacklist. reject */
+ pr_err("Module key is in the blacklist\n");
@ -63,30 +59,29 @@ index 2570598b784d..53733822993f 100644
+ goto error;
+ }
+#endif
+
ret = pkcs7_validate_trust(pkcs7, system_trusted_keyring, &trusted);
if (ret < 0)
goto error;
ret = pkcs7_validate_trust(pkcs7, trusted_keys);
if (ret < 0) {
if (ret == -ENOKEY)
diff --git a/include/keys/system_keyring.h b/include/keys/system_keyring.h
index b20cd885c1fd..51d8ddc60e0f 100644
index fbd4647767e9..5bc291a3d261 100644
--- a/include/keys/system_keyring.h
+++ b/include/keys/system_keyring.h
@@ -35,6 +35,10 @@ extern int system_verify_data(const void *data, unsigned long len,
enum key_being_used_for usage);
@@ -33,6 +33,10 @@ extern int restrict_link_by_builtin_and_secondary_trusted(
#define restrict_link_by_builtin_and_secondary_trusted restrict_link_by_builtin_trusted
#endif
+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING
+extern struct key *system_blacklist_keyring;
+#endif
+
#ifdef CONFIG_IMA_MOK_KEYRING
extern struct key *ima_mok_keyring;
#ifdef CONFIG_IMA_BLACKLIST_KEYRING
extern struct key *ima_blacklist_keyring;
diff --git a/init/Kconfig b/init/Kconfig
index 02da9f1fd9df..782d26f02885 100644
index a9c4aefd5436..e5449d5aeff9 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -1783,6 +1783,15 @@ config SYSTEM_DATA_VERIFICATION
@@ -1829,6 +1829,15 @@ config SYSTEM_DATA_VERIFICATION
module verification, kexec image verification and firmware blob
verification.
@ -103,5 +98,5 @@ index 02da9f1fd9df..782d26f02885 100644
bool "Profiling support"
help
--
2.4.3
2.5.5

43
Revert-ALSA-hda-remove-controller-dependency-on-i915.patch Normal file
View File

@ -0,0 +1,43 @@
From 89b9366047f51fcef7f7e36f2b351a98326c8656 Mon Sep 17 00:00:00 2001
From: Hans de Goede <hdegoede@redhat.com>
Date: Tue, 12 Jul 2016 22:40:01 +0200
Subject: [PATCH] Revert "ALSA: hda - remove controller dependency on i915
power well for SKL"
This reverts commit 03b135cebc47d75ea2dc346770374ab741966955.
---
sound/pci/hda/hda_intel.c | 4 +++-
sound/pci/hda/patch_hdmi.c | 2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index e320c44..290d60f 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -361,7 +361,9 @@ enum {
#define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \
((pci)->device == 0x0c0c) || \
((pci)->device == 0x0d0c) || \
- ((pci)->device == 0x160c))
+ ((pci)->device == 0x160c) || \
+ ((pci)->device == 0xa170) || \
+ ((pci)->device == 0x9d70))
#define IS_SKL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa170)
#define IS_SKL_LP(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9d70)
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index d0d5ad8..9203da1 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -2379,7 +2379,7 @@ static int patch_i915_hsw_hdmi(struct hda_codec *codec)
/* For Haswell/Broadwell, the controller is also in the power well and
* can cover the codec power request, and so need not set this flag.
*/
- if (!is_haswell(codec) && !is_broadwell(codec))
+ if (!is_haswell(codec) && !is_broadwell(codec) && !is_skylake(codec))
codec->core.link_power_control = 1;
codec->patch_ops.set_power_state = haswell_set_power_state;
--
2.7.4

311
arm-i.MX6-Utilite-device-dtb.patch
View File

@ -1,27 +1,180 @@
From f7393b8c390f3a082224d1d73395c3536ef9f6a0 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Mon, 30 May 2016 16:41:37 +0100
Subject: [PATCH] arm: i.MX6 Utilite device dtb
From: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
The CompuLab Utilite Pro is a miniature fanless desktop pc based on
the i.MX6 Quad powered cm-fx6 module. It features two serial ports,
USB OTG, 4x USB, analog audio and S/PDIF, 2x Gb Ethernet, HDMI and
DVI ports, an on-board 32GB SSD, a mmc slot, and on-board wifi/bt.
Add initial support for it including USB, Ethernet (both ports), sata
and HDMI support.
Signed-off-by: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/imx6q-cm-fx6.dts | 136 ++++++++++++++++++++++++++++++++
arch/arm/boot/dts/imx6q-utilite-pro.dts | 128 ++++++++++++++++++++++++++++++
3 files changed, 265 insertions(+)
arch/arm/boot/dts/imx6q-utilite-pro.dts | 128 ++++++++++++++++++++++++++++++++
2 files changed, 129 insertions(+)
create mode 100644 arch/arm/boot/dts/imx6q-utilite-pro.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 95c1923..e6738f8 100644
index 515a428..287044c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -362,6 +362,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-tx6q-1020-comtft.dtb \
@@ -369,6 +369,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-tx6q-1110.dtb \
imx6q-tx6q-11x0-mb7.dtb \
imx6q-udoo.dtb \
+ imx6q-utilite-pro.dtb \
imx6q-wandboard.dtb \
imx6q-wandboard-revb1.dtb \
imx6qp-sabreauto.dtb \
imx6qp-nitrogen6_max.dtb \
diff --git a/arch/arm/boot/dts/imx6q-utilite-pro.dts b/arch/arm/boot/dts/imx6q-utilite-pro.dts
new file mode 100644
index 0000000..bcd8e0d
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-utilite-pro.dts
@@ -0,0 +1,128 @@
+/*
+ * Copyright 2016 Christopher Spinrath
+ * Copyright 2013 CompuLab Ltd.
+ *
+ * Based on the GPLv2 licensed devicetree distributed with the vendor
+ * kernel for the Utilite Pro:
+ * Copyright 2013 CompuLab Ltd.
+ * Author: Valentin Raevsky <valentin@xxxxxxxxxxxxxx>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx6q-cm-fx6.dts"
+
+/ {
+ model = "CompuLab Utilite Pro";
+ compatible = "compulab,utilite-pro", "compulab,cm-fx6", "fsl,imx6q";
+
+ aliases {
+ ethernet1 = &eth1;
+ rtc0 = &em3027;
+ rtc1 = &snvs_rtc;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ power {
+ label = "Power Button";
+ gpios = <&gpio1 29 1>;
+ linux,code = <116>; /* KEY_POWER */
+ gpio-key,wakeup;
+ };
+ };
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c2>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ eeprom@50 {
+ compatible = "at24,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ em3027: rtc@56 {
+ compatible = "emmicro,em3027";
+ reg = <0x56>;
+ };
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ hog {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ /* power button */
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
+ >;
+ };
+ };
+
+ imx6q-utilite-pro {
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1
+ MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1
+ MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
+ MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
+ >;
+ };
+ };
+};
+
+&pcie {
+ pcie@0,0 {
+ reg = <0x000000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ /* non-removable i211 ethernet card */
+ eth1: intel,i211@pcie0,0 {
+ reg = <0x010000 0 0 0 0>;
+ };
+ };
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ fsl,uart-has-rtscts;
+ dma-names = "rx", "tx";
+ dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
+ status = "okay";
+};
--
2.8.2
From: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
The cm-fx6 module has an on-board spi-flash chip for its firmware, an
eeprom (containing e.g. the mac address of the on-board Ethernet),
a sata port, a pcie controller, an USB hub, and an USB otg port.
Enable support for them. In addition, enable syscon poweroff support.
Signed-off-by: Christopher Spinrath <christopher.spinrath@xxxxxxxxxxxxxx>
---
arch/arm/boot/dts/imx6q-cm-fx6.dts | 136 +++++++++++++++++++++++++++++++++++++
1 file changed, 136 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
index 99b46f8..f4fc22e 100644
--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts
@ -196,140 +349,6 @@ index 99b46f8..f4fc22e 100644
+ pinctrl-0 = <&pinctrl_usbh1>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6q-utilite-pro.dts b/arch/arm/boot/dts/imx6q-utilite-pro.dts
new file mode 100644
index 0000000..3966595
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-utilite-pro.dts
@@ -0,0 +1,128 @@
+/*
+ * Copyright 2016 Christopher Spinrath
+ * Copyright 2013 CompuLab Ltd.
+ *
+ * Based on the GPLv2 licensed devicetree distributed with the vendor
+ * kernel for the Utilite Pro:
+ * Copyright 2013 CompuLab Ltd.
+ * Author: Valentin Raevsky <valentin@xxxxxxxxxxxxxx>
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx6q-cm-fx6.dts"
+
+/ {
+ model = "CompuLab Utilite Pro";
+ compatible = "compulab,utilite-pro", "compulab,cm-fx6", "fsl,imx6q";
+
+ aliases {
+ ethernet1 = &eth1;
+ rtc0 = &em3027;
+ rtc1 = &snvs_rtc;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ power {
+ label = "Power Button";
+ gpios = <&gpio1 29 1>;
+ linux,code = <116>; /* KEY_POWER */
+ gpio-key,wakeup;
+ };
+ };
+};
+
+&hdmi {
+ ddc-i2c-bus = <&i2c2>;
+ status = "okay";
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+
+ eeprom@50 {
+ compatible = "at24,24c02";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ em3027: rtc@56 {
+ compatible = "emmicro,em3027";
+ reg = <0x56>;
+ };
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ hog {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ /* power button */
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
+ >;
+ };
+ };
+
+ imx6q-utilite-pro {
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1
+ MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1
+ MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
+ MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
+ >;
+ };
+ };
+};
+
+&pcie {
+ pcie@0,0 {
+ reg = <0x000000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ /* non-removable i211 ethernet card */
+ eth1: intel,i211@pcie0,0 {
+ reg = <0x010000 0 0 0 0>;
+ };
+ };
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ fsl,uart-has-rtscts;
+ dma-names = "rx", "tx";
+ dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
+ status = "okay";
+};
--
2.7.4
2.8.2

1247
arm64-pcie-acpi.patch Normal file
View File

File diff suppressed because it is too large Load Diff

508
arm64-pcie-quirks-xgene.patch Normal file
View File

@ -0,0 +1,508 @@
From 767b70aa55d013f0c7589955f410d488fed5776a Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Tue, 5 Jul 2016 23:49:39 +0100
Subject: [PATCH 1/4] Some platforms may not be fully compliant with generic
set of PCI config accessors. For these cases we implement the way to
overwrite accessors set. Algorithm traverses available quirk list, matches
against <oem_id, oem_table_id, domain, bus number> tuple and returns
corresponding PCI config ops. oem_id and oem_table_id come from MCFG table
standard header. All quirks can be defined using DECLARE_ACPI_MCFG_FIXUP()
macro and kept self contained. Example:
/* Custom PCI config ops */
static struct pci_generic_ecam_ops foo_pci_ops = {
.bus_shift = 24,
.pci_ops = {
.map_bus = pci_ecam_map_bus,
.read = foo_ecam_config_read,
.write = foo_ecam_config_write,
}
};
DECLARE_ACPI_MCFG_FIXUP(&foo_pci_ops, <oem_id_str>, <oem_table_id>, <domain_nr>, <bus_nr>);
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
---
drivers/acpi/pci_mcfg.c | 41 ++++++++++++++++++++++++++++++++++++---
include/asm-generic/vmlinux.lds.h | 7 +++++++
include/linux/pci-acpi.h | 20 +++++++++++++++++++
3 files changed, 65 insertions(+), 3 deletions(-)
diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index d3c3e85..deb0077 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -22,6 +22,10 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/pci-acpi.h>
+#include <linux/pci-ecam.h>
+
+/* Root pointer to the mapped MCFG table */
+static struct acpi_table_mcfg *mcfg_table;
/* Structure to hold entries from the MCFG table */
struct mcfg_entry {
@@ -35,6 +39,38 @@ struct mcfg_entry {
/* List to save mcfg entries */
static LIST_HEAD(pci_mcfg_list);
+extern struct pci_cfg_fixup __start_acpi_mcfg_fixups[];
+extern struct pci_cfg_fixup __end_acpi_mcfg_fixups[];
+
+struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
+{
+ int bus_num = root->secondary.start;
+ int domain = root->segment;
+ struct pci_cfg_fixup *f;
+
+ if (!mcfg_table)
+ return &pci_generic_ecam_ops;
+
+ /*
+ * Match against platform specific quirks and return corresponding
+ * CAM ops.
+ *
+ * First match against PCI topology <domain:bus> then use OEM ID and
+ * OEM revision from MCFG table standard header.
+ */
+ for (f = __start_acpi_mcfg_fixups; f < __end_acpi_mcfg_fixups; f++) {
+ if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) &&
+ (f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) &&
+ (!strncmp(f->oem_id, mcfg_table->header.oem_id,
+ ACPI_OEM_ID_SIZE)) &&
+ (!strncmp(f->oem_table_id, mcfg_table->header.oem_table_id,
+ ACPI_OEM_TABLE_ID_SIZE)))
+ return f->ops;
+ }
+ /* No quirks, use ECAM */
+ return &pci_generic_ecam_ops;
+}
+
phys_addr_t pci_mcfg_lookup(u16 seg, struct resource *bus_res)
{
struct mcfg_entry *e;
@@ -54,7 +90,6 @@ phys_addr_t pci_mcfg_lookup(u16 seg, struct resource *bus_res)
static __init int pci_mcfg_parse(struct acpi_table_header *header)
{
- struct acpi_table_mcfg *mcfg;
struct acpi_mcfg_allocation *mptr;
struct mcfg_entry *e, *arr;
int i, n;
@@ -64,8 +99,8 @@ static __init int pci_mcfg_parse(struct acpi_table_header *header)
n = (header->length - sizeof(struct acpi_table_mcfg)) /
sizeof(struct acpi_mcfg_allocation);
- mcfg = (struct acpi_table_mcfg *)header;
- mptr = (struct acpi_mcfg_allocation *) &mcfg[1];
+ mcfg_table = (struct acpi_table_mcfg *)header;
+ mptr = (struct acpi_mcfg_allocation *) &mcfg_table[1];
arr = kcalloc(n, sizeof(*arr), GFP_KERNEL);
if (!arr)
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index 6a67ab9..43604fc 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -300,6 +300,13 @@
VMLINUX_SYMBOL(__end_pci_fixups_suspend_late) = .; \
} \
\
+ /* ACPI MCFG quirks */ \
+ .acpi_fixup : AT(ADDR(.acpi_fixup) - LOAD_OFFSET) { \
+ VMLINUX_SYMBOL(__start_acpi_mcfg_fixups) = .; \
+ *(.acpi_fixup_mcfg) \
+ VMLINUX_SYMBOL(__end_acpi_mcfg_fixups) = .; \
+ } \
+ \
/* Built-in firmware blobs */ \
.builtin_fw : AT(ADDR(.builtin_fw) - LOAD_OFFSET) { \
VMLINUX_SYMBOL(__start_builtin_fw) = .; \
diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h
index 7d63a66..c8a6559 100644
--- a/include/linux/pci-acpi.h
+++ b/include/linux/pci-acpi.h
@@ -25,6 +25,7 @@ static inline acpi_status pci_acpi_remove_pm_notifier(struct acpi_device *dev)
extern phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle);
extern phys_addr_t pci_mcfg_lookup(u16 domain, struct resource *bus_res);
+extern struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root);
static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
{
@@ -72,6 +73,25 @@ struct acpi_pci_root_ops {
int (*prepare_resources)(struct acpi_pci_root_info *info);
};
+struct pci_cfg_fixup {
+ struct pci_ecam_ops *ops;
+ char *oem_id;
+ char *oem_table_id;
+ int domain;
+ int bus_num;
+};
+
+#define PCI_MCFG_DOMAIN_ANY -1
+#define PCI_MCFG_BUS_ANY -1
+
+/* Designate a routine to fix up buggy MCFG */
+#define DECLARE_ACPI_MCFG_FIXUP(ops, oem_id, oem_table_id, dom, bus) \
+ static const struct pci_cfg_fixup \
+ __mcfg_fixup_##oem_id##oem_table_id##dom##bus \
+ __used __attribute__((__section__(".acpi_fixup_mcfg"), \
+ aligned((sizeof(void *))))) = \
+ { ops, oem_id, oem_table_id, dom, bus };
+
extern int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info);
extern struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
struct acpi_pci_root_ops *ops,
--
2.7.4
From 4f86a9b006b25dd7336043dab26058ed6fb2802d Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Tue, 5 Jul 2016 23:52:46 +0100
Subject: [PATCH 2/4] pci_generic_ecam_ops is used by default. Since there are
platforms which have non-compliant ECAM space we need to overwrite these
accessors prior to PCI buses enumeration. In order to do that we call
pci_mcfg_get_ops to retrieve pci_ecam_ops structure so that we can use proper
PCI config space accessors and bus_shift.
pci_generic_ecam_ops is still used for platforms free from quirks.
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
---
arch/arm64/kernel/pci.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
index 94cd43c..a891bda 100644
--- a/arch/arm64/kernel/pci.c
+++ b/arch/arm64/kernel/pci.c
@@ -139,6 +139,7 @@ pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root)
struct pci_config_window *cfg;
struct resource cfgres;
unsigned int bsz;
+ struct pci_ecam_ops *ops;
/* Use address from _CBA if present, otherwise lookup MCFG */
if (!root->mcfg_addr)
@@ -150,12 +151,12 @@ pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root)
return NULL;
}
- bsz = 1 << pci_generic_ecam_ops.bus_shift;
+ ops = pci_mcfg_get_ops(root);
+ bsz = 1 << ops->bus_shift;
cfgres.start = root->mcfg_addr + bus_res->start * bsz;
cfgres.end = cfgres.start + resource_size(bus_res) * bsz - 1;
cfgres.flags = IORESOURCE_MEM;
- cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res,
- &pci_generic_ecam_ops);
+ cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res, ops);
if (IS_ERR(cfg)) {
dev_err(&root->device->dev, "%04x:%pR error %ld mapping ECAM\n",
seg, bus_res, PTR_ERR(cfg));
--
2.7.4
From cbdbd697bd6d716eb9d1705ee55445432e73eabb Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Tue, 5 Jul 2016 23:53:59 +0100
Subject: [PATCH 3/4] The ECAM quirk matching criteria per the discussion on
https://lkml.org/lkml/2016/6/13/944 includes: OEM ID, OEM Table ID and OEM
Revision. So this patch adds OEM Table ID into the check to match platform
specific ECAM quirks as well.
This patch also improve strncmp check using strlen and
min_t to ignore the padding spaces in OEM ID and OEM
Table ID.
Signed-off-by: Duc Dang <dhdang@apm.com>
---
drivers/acpi/pci_mcfg.c | 7 +++++--
include/linux/pci-acpi.h | 7 ++++---
2 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index deb0077..307ca9a 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -62,9 +62,12 @@ struct pci_ecam_ops *pci_mcfg_get_ops(struct acpi_pci_root *root)
if ((f->domain == domain || f->domain == PCI_MCFG_DOMAIN_ANY) &&
(f->bus_num == bus_num || f->bus_num == PCI_MCFG_BUS_ANY) &&
(!strncmp(f->oem_id, mcfg_table->header.oem_id,
- ACPI_OEM_ID_SIZE)) &&
+ min_t(size_t, strlen(f->oem_id),
+ ACPI_OEM_ID_SIZE))) &&
(!strncmp(f->oem_table_id, mcfg_table->header.oem_table_id,
- ACPI_OEM_TABLE_ID_SIZE)))
+ min_t(size_t, strlen(f->oem_table_id),
+ ACPI_OEM_TABLE_ID_SIZE))) &&
+ (f->oem_revision == mcfg_table->header.oem_revision))
return f->ops;
}
/* No quirks, use ECAM */
diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h
index c8a6559..5148c8d 100644
--- a/include/linux/pci-acpi.h
+++ b/include/linux/pci-acpi.h
@@ -77,6 +77,7 @@ struct pci_cfg_fixup {
struct pci_ecam_ops *ops;
char *oem_id;
char *oem_table_id;
+ u32 oem_revision;
int domain;
int bus_num;
};
@@ -85,12 +86,12 @@ struct pci_cfg_fixup {
#define PCI_MCFG_BUS_ANY -1
/* Designate a routine to fix up buggy MCFG */
-#define DECLARE_ACPI_MCFG_FIXUP(ops, oem_id, oem_table_id, dom, bus) \
+#define DECLARE_ACPI_MCFG_FIXUP(ops, oem_id, oem_table_id, rev, dom, bus) \
static const struct pci_cfg_fixup \
- __mcfg_fixup_##oem_id##oem_table_id##dom##bus \
+ __mcfg_fixup_##oem_id##oem_table_id##rev##dom##bus \
__used __attribute__((__section__(".acpi_fixup_mcfg"), \
aligned((sizeof(void *))))) = \
- { ops, oem_id, oem_table_id, dom, bus };
+ { ops, oem_id, oem_table_id, rev, dom, bus };
extern int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info);
extern struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
--
2.7.4
From 78766cf255bc6aafac2f57372a0446f78322da19 Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Tue, 5 Jul 2016 23:55:11 +0100
Subject: [PATCH 4/4] X-Gene PCIe controller does not fully support ECAM. This
patch adds required ECAM fixup to allow X-Gene PCIe controller to be
functional in ACPI boot mode.
Signed-off-by: Duc Dang <dhdang@apm.com>
---
drivers/pci/host/Makefile | 2 +-
drivers/pci/host/pci-xgene-ecam.c | 194 ++++++++++++++++++++++++++++++++++++++
2 files changed, 195 insertions(+), 1 deletion(-)
create mode 100644 drivers/pci/host/pci-xgene-ecam.c
diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
index 9c8698e..3480696 100644
--- a/drivers/pci/host/Makefile
+++ b/drivers/pci/host/Makefile
@@ -14,7 +14,7 @@ obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o
obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone-dw.o pci-keystone.o
obj-$(CONFIG_PCIE_XILINX) += pcie-xilinx.o
obj-$(CONFIG_PCIE_XILINX_NWL) += pcie-xilinx-nwl.o
-obj-$(CONFIG_PCI_XGENE) += pci-xgene.o
+obj-$(CONFIG_PCI_XGENE) += pci-xgene.o pci-xgene-ecam.o
obj-$(CONFIG_PCI_XGENE_MSI) += pci-xgene-msi.o
obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o
obj-$(CONFIG_PCI_VERSATILE) += pci-versatile.o
diff --git a/drivers/pci/host/pci-xgene-ecam.c b/drivers/pci/host/pci-xgene-ecam.c
new file mode 100644
index 0000000..1bea63f
--- /dev/null
+++ b/drivers/pci/host/pci-xgene-ecam.c
@@ -0,0 +1,194 @@
+/*
+ * APM X-Gene PCIe ECAM fixup driver
+ *
+ * Copyright (c) 2016, Applied Micro Circuits Corporation
+ * Author:
+ * Duc Dang <dhdang@apm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_pci.h>
+#include <linux/pci-acpi.h>
+#include <linux/platform_device.h>
+#include <linux/pci-ecam.h>
+
+#ifdef CONFIG_ACPI
+#define RTDID 0x160
+#define ROOT_CAP_AND_CTRL 0x5C
+
+/* PCIe IP version */
+#define XGENE_PCIE_IP_VER_UNKN 0
+#define XGENE_PCIE_IP_VER_1 1
+
+#define APM_OEM_ID "APM"
+#define APM_XGENE_OEM_TABLE_ID "XGENE"
+#define APM_XGENE_OEM_REV 0x00000002
+
+struct xgene_pcie_acpi_root {
+ void __iomem *csr_base;
+ u32 version;
+};
+
+static acpi_status xgene_pcie_find_csr_base(struct acpi_resource *acpi_res,
+ void *data)
+{
+ struct xgene_pcie_acpi_root *root = data;
+ struct acpi_resource_fixed_memory32 *fixed32;
+
+ if (acpi_res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
+ fixed32 = &acpi_res->data.fixed_memory32;
+ root->csr_base = ioremap(fixed32->address,
+ fixed32->address_length);
+ return AE_CTRL_TERMINATE;
+ }
+
+ return AE_OK;
+}
+
+static int xgene_pcie_ecam_init(struct pci_config_window *cfg)
+{
+ struct xgene_pcie_acpi_root *xgene_root;
+ struct device *dev = cfg->parent;
+ struct acpi_device *adev = to_acpi_device(dev);
+ acpi_handle handle = acpi_device_handle(adev);
+
+ xgene_root = devm_kzalloc(dev, sizeof(*xgene_root), GFP_KERNEL);
+ if (!xgene_root)
+ return -ENOMEM;
+
+ acpi_walk_resources(handle, METHOD_NAME__CRS,
+ xgene_pcie_find_csr_base, xgene_root);
+
+ if (!xgene_root->csr_base) {
+ kfree(xgene_root);
+ return -ENODEV;
+ }
+
+ xgene_root->version = XGENE_PCIE_IP_VER_1;
+
+ cfg->priv = xgene_root;
+
+ return 0;
+}
+
+/*
+ * For Configuration request, RTDID register is used as Bus Number,
+ * Device Number and Function number of the header fields.
+ */
+static void xgene_pcie_set_rtdid_reg(struct pci_bus *bus, uint devfn)
+{
+ struct pci_config_window *cfg = bus->sysdata;
+ struct xgene_pcie_acpi_root *port = cfg->priv;
+ unsigned int b, d, f;
+ u32 rtdid_val = 0;
+
+ b = bus->number;
+ d = PCI_SLOT(devfn);
+ f = PCI_FUNC(devfn);
+
+ if (!pci_is_root_bus(bus))
+ rtdid_val = (b << 8) | (d << 3) | f;
+
+ writel(rtdid_val, port->csr_base + RTDID);
+ /* read the register back to ensure flush */
+ readl(port->csr_base + RTDID);
+}
+
+/*
+ * X-Gene PCIe port uses BAR0-BAR1 of RC's configuration space as
+ * the translation from PCI bus to native BUS. Entire DDR region
+ * is mapped into PCIe space using these registers, so it can be
+ * reached by DMA from EP devices. The BAR0/1 of bridge should be
+ * hidden during enumeration to avoid the sizing and resource allocation
+ * by PCIe core.
+ */
+static bool xgene_pcie_hide_rc_bars(struct pci_bus *bus, int offset)
+{
+ if (pci_is_root_bus(bus) && ((offset == PCI_BASE_ADDRESS_0) ||
+ (offset == PCI_BASE_ADDRESS_1)))
+ return true;
+
+ return false;
+}
+
+void __iomem *xgene_pcie_ecam_map_bus(struct pci_bus *bus,
+ unsigned int devfn, int where)
+{
+ struct pci_config_window *cfg = bus->sysdata;
+ unsigned int busn = bus->number;
+ void __iomem *base;
+
+ if (busn < cfg->busr.start || busn > cfg->busr.end)
+ return NULL;
+
+ if ((pci_is_root_bus(bus) && devfn != 0) ||
+ xgene_pcie_hide_rc_bars(bus, where))
+ return NULL;
+
+ xgene_pcie_set_rtdid_reg(bus, devfn);
+
+ if (busn > cfg->busr.start)
+ base = cfg->win + (1 << cfg->ops->bus_shift);
+ else
+ base = cfg->win;
+
+ return base + where;
+}
+
+static int xgene_pcie_config_read32(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 *val)
+{
+ struct pci_config_window *cfg = bus->sysdata;
+ struct xgene_pcie_acpi_root *port = cfg->priv;
+
+ if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val) !=
+ PCIBIOS_SUCCESSFUL)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ /*
+ * The v1 controller has a bug in its Configuration Request
+ * Retry Status (CRS) logic: when CRS is enabled and we read the
+ * Vendor and Device ID of a non-existent device, the controller
+ * fabricates return data of 0xFFFF0001 ("device exists but is not
+ * ready") instead of 0xFFFFFFFF ("device does not exist"). This
+ * causes the PCI core to retry the read until it times out.
+ * Avoid this by not claiming to support CRS.
+ */
+ if (pci_is_root_bus(bus) && (port->version == XGENE_PCIE_IP_VER_1) &&
+ ((where & ~0x3) == ROOT_CAP_AND_CTRL))
+ *val &= ~(PCI_EXP_RTCAP_CRSVIS << 16);
+
+ if (size <= 2)
+ *val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ecam_ops xgene_pcie_ecam_ops = {
+ .bus_shift = 16,
+ .init = xgene_pcie_ecam_init,
+ .pci_ops = {
+ .map_bus = xgene_pcie_ecam_map_bus,
+ .read = xgene_pcie_config_read32,
+ .write = pci_generic_config_write,
+ }
+};
+
+DECLARE_ACPI_MCFG_FIXUP(&xgene_pcie_ecam_ops, APM_OEM_ID,
+ APM_XGENE_OEM_TABLE_ID, APM_XGENE_OEM_REV,
+ PCI_MCFG_DOMAIN_ANY, PCI_MCFG_BUS_ANY);
+#endif
--
2.7.4

413
audit-fix-a-double-fetch-in-audit_log_single_execve_arg.patch Normal file
View File

@ -0,0 +1,413 @@
From 43761473c254b45883a64441dd0bc85a42f3645c Mon Sep 17 00:00:00 2001
From: Paul Moore <paul@paul-moore.com>
Date: Tue, 19 Jul 2016 17:42:57 -0400
Subject: [PATCH] audit: fix a double fetch in audit_log_single_execve_arg()
There is a double fetch problem in audit_log_single_execve_arg()
where we first check the execve(2) argumnets for any "bad" characters
which would require hex encoding and then re-fetch the arguments for
logging in the audit record[1]. Of course this leaves a window of
opportunity for an unsavory application to munge with the data.
This patch reworks things by only fetching the argument data once[2]
into a buffer where it is scanned and logged into the audit
records(s). In addition to fixing the double fetch, this patch
improves on the original code in a few other ways: better handling
of large arguments which require encoding, stricter record length
checking, and some performance improvements (completely unverified,
but we got rid of some strlen() calls, that's got to be a good
thing).
As part of the development of this patch, I've also created a basic
regression test for the audit-testsuite, the test can be tracked on
GitHub at the following link:
* https://github.com/linux-audit/audit-testsuite/issues/25
[1] If you pay careful attention, there is actually a triple fetch
problem due to a strnlen_user() call at the top of the function.
[2] This is a tiny white lie, we do make a call to strnlen_user()
prior to fetching the argument data. I don't like it, but due to the
way the audit record is structured we really have no choice unless we
copy the entire argument at once (which would require a rather
wasteful allocation). The good news is that with this patch the
kernel no longer relies on this strnlen_user() value for anything
beyond recording it in the log, we also update it with a trustworthy
value whenever possible.
Reported-by: Pengfei Wang <wpengfeinudt@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Paul Moore <paul@paul-moore.com>
---
kernel/auditsc.c | 332 +++++++++++++++++++++++++++----------------------------
1 file changed, 164 insertions(+), 168 deletions(-)
diff --git a/kernel/auditsc.c b/kernel/auditsc.c
index aa3feec..c65af21 100644
--- a/kernel/auditsc.c
+++ b/kernel/auditsc.c
@@ -73,6 +73,7 @@
#include <linux/compat.h>
#include <linux/ctype.h>
#include <linux/string.h>
+#include <linux/uaccess.h>
#include <uapi/linux/limits.h>
#include "audit.h"
@@ -82,7 +83,8 @@
#define AUDITSC_SUCCESS 1
#define AUDITSC_FAILURE 2
-/* no execve audit message should be longer than this (userspace limits) */
+/* no execve audit message should be longer than this (userspace limits),
+ * see the note near the top of audit_log_execve_info() about this value */
#define MAX_EXECVE_AUDIT_LEN 7500
/* max length to print of cmdline/proctitle value during audit */
@@ -992,184 +994,178 @@ static int audit_log_pid_context(struct audit_context *context, pid_t pid,
return rc;
}
-/*
- * to_send and len_sent accounting are very loose estimates. We aren't
- * really worried about a hard cap to MAX_EXECVE_AUDIT_LEN so much as being
- * within about 500 bytes (next page boundary)
- *
- * why snprintf? an int is up to 12 digits long. if we just assumed when
- * logging that a[%d]= was going to be 16 characters long we would be wasting
- * space in every audit message. In one 7500 byte message we can log up to
- * about 1000 min size arguments. That comes down to about 50% waste of space
- * if we didn't do the snprintf to find out how long arg_num_len was.
- */
-static int audit_log_single_execve_arg(struct audit_context *context,
- struct audit_buffer **ab,
- int arg_num,
- size_t *len_sent,
- const char __user *p,
- char *buf)
+static void audit_log_execve_info(struct audit_context *context,
+ struct audit_buffer **ab)
{
- char arg_num_len_buf[12];
- const char __user *tmp_p = p;
- /* how many digits are in arg_num? 5 is the length of ' a=""' */
- size_t arg_num_len = snprintf(arg_num_len_buf, 12, "%d", arg_num) + 5;
- size_t len, len_left, to_send;
- size_t max_execve_audit_len = MAX_EXECVE_AUDIT_LEN;
- unsigned int i, has_cntl = 0, too_long = 0;
- int ret;
-
- /* strnlen_user includes the null we don't want to send */
- len_left = len = strnlen_user(p, MAX_ARG_STRLEN) - 1;
-
- /*
- * We just created this mm, if we can't find the strings
- * we just copied into it something is _very_ wrong. Similar
- * for strings that are too long, we should not have created
- * any.
- */
- if (WARN_ON_ONCE(len < 0 || len > MAX_ARG_STRLEN - 1)) {
- send_sig(SIGKILL, current, 0);
- return -1;
+ long len_max;
+ long len_rem;
+ long len_full;
+ long len_buf;
+ long len_abuf;
+ long len_tmp;
+ bool require_data;
+ bool encode;
+ unsigned int iter;
+ unsigned int arg;
+ char *buf_head;
+ char *buf;
+ const char __user *p = (const char __user *)current->mm->arg_start;
+
+ /* NOTE: this buffer needs to be large enough to hold all the non-arg
+ * data we put in the audit record for this argument (see the
+ * code below) ... at this point in time 96 is plenty */
+ char abuf[96];
+
+ /* NOTE: we set MAX_EXECVE_AUDIT_LEN to a rather arbitrary limit, the
+ * current value of 7500 is not as important as the fact that it
+ * is less than 8k, a setting of 7500 gives us plenty of wiggle
+ * room if we go over a little bit in the logging below */
+ WARN_ON_ONCE(MAX_EXECVE_AUDIT_LEN > 7500);
+ len_max = MAX_EXECVE_AUDIT_LEN;
+
+ /* scratch buffer to hold the userspace args */
+ buf_head = kmalloc(MAX_EXECVE_AUDIT_LEN + 1, GFP_KERNEL);
+ if (!buf_head) {
+ audit_panic("out of memory for argv string");
+ return;
}
+ buf = buf_head;
- /* walk the whole argument looking for non-ascii chars */
+ audit_log_format(*ab, "argc=%d", context->execve.argc);
+
+ len_rem = len_max;
+ len_buf = 0;
+ len_full = 0;
+ require_data = true;
+ encode = false;
+ iter = 0;
+ arg = 0;
do {
- if (len_left > MAX_EXECVE_AUDIT_LEN)
- to_send = MAX_EXECVE_AUDIT_LEN;
- else
- to_send = len_left;
- ret = copy_from_user(buf, tmp_p, to_send);
- /*
- * There is no reason for this copy to be short. We just
- * copied them here, and the mm hasn't been exposed to user-
- * space yet.
- */
- if (ret) {
- WARN_ON(1);
- send_sig(SIGKILL, current, 0);
- return -1;
- }
- buf[to_send] = '\0';
- has_cntl = audit_string_contains_control(buf, to_send);
- if (has_cntl) {
- /*
- * hex messages get logged as 2 bytes, so we can only
- * send half as much in each message
- */
- max_execve_audit_len = MAX_EXECVE_AUDIT_LEN / 2;
- break;
- }
- len_left -= to_send;
- tmp_p += to_send;
- } while (len_left > 0);
-
- len_left = len;
-
- if (len > max_execve_audit_len)
- too_long = 1;
-
- /* rewalk the argument actually logging the message */
- for (i = 0; len_left > 0; i++) {
- int room_left;
-
- if (len_left > max_execve_audit_len)
- to_send = max_execve_audit_len;
- else
- to_send = len_left;
-
- /* do we have space left to send this argument in this ab? */
- room_left = MAX_EXECVE_AUDIT_LEN - arg_num_len - *len_sent;
- if (has_cntl)
- room_left -= (to_send * 2);
- else
- room_left -= to_send;
- if (room_left < 0) {
- *len_sent = 0;
- audit_log_end(*ab);
- *ab = audit_log_start(context, GFP_KERNEL, AUDIT_EXECVE);
- if (!*ab)
- return 0;
- }
+ /* NOTE: we don't ever want to trust this value for anything
+ * serious, but the audit record format insists we
+ * provide an argument length for really long arguments,
+ * e.g. > MAX_EXECVE_AUDIT_LEN, so we have no choice but
+ * to use strncpy_from_user() to obtain this value for
+ * recording in the log, although we don't use it
+ * anywhere here to avoid a double-fetch problem */
+ if (len_full == 0)
+ len_full = strnlen_user(p, MAX_ARG_STRLEN) - 1;
+
+ /* read more data from userspace */
+ if (require_data) {
+ /* can we make more room in the buffer? */
+ if (buf != buf_head) {
+ memmove(buf_head, buf, len_buf);
+ buf = buf_head;
+ }
+
+ /* fetch as much as we can of the argument */
+ len_tmp = strncpy_from_user(&buf_head[len_buf], p,
+ len_max - len_buf);
+ if (len_tmp == -EFAULT) {
+ /* unable to copy from userspace */
+ send_sig(SIGKILL, current, 0);
+ goto out;
+ } else if (len_tmp == (len_max - len_buf)) {
+ /* buffer is not large enough */
+ require_data = true;
+ /* NOTE: if we are going to span multiple
+ * buffers force the encoding so we stand
+ * a chance at a sane len_full value and
+ * consistent record encoding */
+ encode = true;
+ len_full = len_full * 2;
+ p += len_tmp;
+ } else {
+ require_data = false;
+ if (!encode)
+ encode = audit_string_contains_control(
+ buf, len_tmp);
+ /* try to use a trusted value for len_full */
+ if (len_full < len_max)
+ len_full = (encode ?
+ len_tmp * 2 : len_tmp);
+ p += len_tmp + 1;
+ }
+ len_buf += len_tmp;
+ buf_head[len_buf] = '\0';
- /*
- * first record needs to say how long the original string was
- * so we can be sure nothing was lost.
- */
- if ((i == 0) && (too_long))
- audit_log_format(*ab, " a%d_len=%zu", arg_num,
- has_cntl ? 2*len : len);
-
- /*
- * normally arguments are small enough to fit and we already
- * filled buf above when we checked for control characters
- * so don't bother with another copy_from_user
- */
- if (len >= max_execve_audit_len)
- ret = copy_from_user(buf, p, to_send);
- else
- ret = 0;
- if (ret) {
- WARN_ON(1);
- send_sig(SIGKILL, current, 0);
- return -1;
+ /* length of the buffer in the audit record? */
+ len_abuf = (encode ? len_buf * 2 : len_buf + 2);
}
- buf[to_send] = '\0';
-
- /* actually log it */
- audit_log_format(*ab, " a%d", arg_num);
- if (too_long)
- audit_log_format(*ab, "[%d]", i);
- audit_log_format(*ab, "=");
- if (has_cntl)
- audit_log_n_hex(*ab, buf, to_send);
- else
- audit_log_string(*ab, buf);
-
- p += to_send;
- len_left -= to_send;
- *len_sent += arg_num_len;
- if (has_cntl)
- *len_sent += to_send * 2;
- else
- *len_sent += to_send;
- }
- /* include the null we didn't log */
- return len + 1;
-}
-static void audit_log_execve_info(struct audit_context *context,
- struct audit_buffer **ab)
-{
- int i, len;
- size_t len_sent = 0;
- const char __user *p;
- char *buf;
+ /* write as much as we can to the audit log */
+ if (len_buf > 0) {
+ /* NOTE: some magic numbers here - basically if we
+ * can't fit a reasonable amount of data into the
+ * existing audit buffer, flush it and start with
+ * a new buffer */
+ if ((sizeof(abuf) + 8) > len_rem) {
+ len_rem = len_max;
+ audit_log_end(*ab);
+ *ab = audit_log_start(context,
+ GFP_KERNEL, AUDIT_EXECVE);
+ if (!*ab)
+ goto out;
+ }
- p = (const char __user *)current->mm->arg_start;
+ /* create the non-arg portion of the arg record */
+ len_tmp = 0;
+ if (require_data || (iter > 0) ||
+ ((len_abuf + sizeof(abuf)) > len_rem)) {
+ if (iter == 0) {
+ len_tmp += snprintf(&abuf[len_tmp],
+ sizeof(abuf) - len_tmp,
+ " a%d_len=%lu",
+ arg, len_full);
+ }
+ len_tmp += snprintf(&abuf[len_tmp],
+ sizeof(abuf) - len_tmp,
+ " a%d[%d]=", arg, iter++);
+ } else
+ len_tmp += snprintf(&abuf[len_tmp],
+ sizeof(abuf) - len_tmp,
+ " a%d=", arg);
+ WARN_ON(len_tmp >= sizeof(abuf));
+ abuf[sizeof(abuf) - 1] = '\0';
+
+ /* log the arg in the audit record */
+ audit_log_format(*ab, "%s", abuf);
+ len_rem -= len_tmp;
+ len_tmp = len_buf;
+ if (encode) {
+ if (len_abuf > len_rem)
+ len_tmp = len_rem / 2; /* encoding */
+ audit_log_n_hex(*ab, buf, len_tmp);
+ len_rem -= len_tmp * 2;
+ len_abuf -= len_tmp * 2;
+ } else {
+ if (len_abuf > len_rem)
+ len_tmp = len_rem - 2; /* quotes */
+ audit_log_n_string(*ab, buf, len_tmp);
+ len_rem -= len_tmp + 2;
+ /* don't subtract the "2" because we still need
+ * to add quotes to the remaining string */
+ len_abuf -= len_tmp;
+ }
+ len_buf -= len_tmp;
+ buf += len_tmp;
+ }
- audit_log_format(*ab, "argc=%d", context->execve.argc);
+ /* ready to move to the next argument? */
+ if ((len_buf == 0) && !require_data) {
+ arg++;
+ iter = 0;
+ len_full = 0;
+ require_data = true;
+ encode = false;
+ }
+ } while (arg < context->execve.argc);
- /*
- * we need some kernel buffer to hold the userspace args. Just
- * allocate one big one rather than allocating one of the right size
- * for every single argument inside audit_log_single_execve_arg()
- * should be <8k allocation so should be pretty safe.
- */
- buf = kmalloc(MAX_EXECVE_AUDIT_LEN + 1, GFP_KERNEL);
- if (!buf) {
- audit_panic("out of memory for argv string");
- return;
- }
+ /* NOTE: the caller handles the final audit_log_end() call */
- for (i = 0; i < context->execve.argc; i++) {
- len = audit_log_single_execve_arg(context, ab, i,
- &len_sent, p, buf);
- if (len <= 0)
- break;
- p += len;
- }
- kfree(buf);
+out:
+ kfree(buf_head);
}
static void show_special(struct audit_context *context, int *call_panic)

206
bcm283x-upstream-fixes.patch
View File

@ -1,209 +1,3 @@
From 41135d2ce60509e53306e5b76afab98ddc15951b Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 2 Mar 2015 14:36:16 -0800
Subject: [PATCH 26/36] ARM: bcm2835: Add VC4 to the device tree.
VC4 is the GPU (display and 3D) present on the 283x.
v2: Sort by register address, mark HDMI as disabled by default in the
SoC file and enable it from -rpi.
v3: Add references to the pixel/HSM clocks for HDMI. Rename
compatibility strings and clean up node names.
v4: Fix comment marking pv0's interrupt as pwa2 instead of pwa0.
Rename hpd-gpio to hpd-gpios.
v5: Rebase on bcm283x.dtsi change, add v3d.
v6: Make HDMI reference the power domain.
v7: Fix the HDMI HPD gpios active value and HDMI enable for each RPI
board. Change V3D compatible string to 2835.
Signed-off-by: Eric Anholt <eric@anholt.net>
---
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 4 +++
arch/arm/boot/dts/bcm2835-rpi-a.dts | 4 +++
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 4 +++
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 4 +++
arch/arm/boot/dts/bcm2835-rpi-b.dts | 4 +++
arch/arm/boot/dts/bcm2835-rpi.dtsi | 9 ++++++
arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 4 +++
arch/arm/boot/dts/bcm283x.dtsi | 47 ++++++++++++++++++++++++++++++++
8 files changed, 80 insertions(+)
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
index 228614f..35ff4e7a 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
@@ -29,3 +29,7 @@
brcm,function = <BCM2835_FSEL_ALT0>;
};
};
+
+&hdmi {
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+};
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
index ddbbbbd..306a84e 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
@@ -22,3 +22,7 @@
brcm,function = <BCM2835_FSEL_ALT2>;
};
};
+
+&hdmi {
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
+};
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
index ef54050..57d313b 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
@@ -29,3 +29,7 @@
brcm,function = <BCM2835_FSEL_ALT0>;
};
};
+
+&hdmi {
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+};
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
index 86f1f2f..cf2774e 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
@@ -22,3 +22,7 @@
brcm,function = <BCM2835_FSEL_ALT2>;
};
};
+
+&hdmi {
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+};
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
index 4859e9d..8b15f9c 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -16,3 +16,7 @@
&gpio {
pinctrl-0 = <&gpioout &alt0 &alt3>;
};
+
+&hdmi {
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
+};
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 76bdbca..caf2707 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -74,3 +74,12 @@
&usb {
power-domains = <&power RPI_POWER_DOMAIN_USB>;
};
+
+&v3d {
+ power-domains = <&power RPI_POWER_DOMAIN_V3D>;
+};
+
+&hdmi {
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
index ff94666..c4743f4 100644
--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
@@ -33,3 +33,7 @@
brcm,function = <BCM2835_FSEL_ALT0>;
};
};
+
+&hdmi {
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+};
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index fc67964..bbe4eab 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -1,6 +1,7 @@
#include <dt-bindings/pinctrl/bcm2835.h>
#include <dt-bindings/clock/bcm2835.h>
#include <dt-bindings/clock/bcm2835-aux.h>
+#include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
/* This include file covers the common peripherals and configuration between
@@ -153,6 +154,18 @@
status = "disabled";
};
+ pixelvalve@7e206000 {
+ compatible = "brcm,bcm2835-pixelvalve0";
+ reg = <0x7e206000 0x100>;
+ interrupts = <2 13>; /* pwa0 */
+ };
+
+ pixelvalve@7e207000 {
+ compatible = "brcm,bcm2835-pixelvalve1";
+ reg = <0x7e207000 0x100>;
+ interrupts = <2 14>; /* pwa1 */
+ };
+
aux: aux@0x7e215000 {
compatible = "brcm,bcm2835-aux";
#clock-cells = <1>;
@@ -206,6 +219,12 @@
status = "disabled";
};
+ hvs@7e400000 {
+ compatible = "brcm,bcm2835-hvs";
+ reg = <0x7e400000 0x6000>;
+ interrupts = <2 1>;
+ };
+
i2c1: i2c@7e804000 {
compatible = "brcm,bcm2835-i2c";
reg = <0x7e804000 0x1000>;
@@ -226,11 +245,39 @@
status = "disabled";
};
+ pixelvalve@7e807000 {
+ compatible = "brcm,bcm2835-pixelvalve2";
+ reg = <0x7e807000 0x100>;
+ interrupts = <2 10>; /* pixelvalve */
+ };
+
+ hdmi: hdmi@7e902000 {
+ compatible = "brcm,bcm2835-hdmi";
+ reg = <0x7e902000 0x600>,
+ <0x7e808000 0x100>;
+ interrupts = <2 8>, <2 9>;
+ ddc = <&i2c2>;
+ clocks = <&clocks BCM2835_PLLH_PIX>,
+ <&clocks BCM2835_CLOCK_HSM>;
+ clock-names = "pixel", "hdmi";
+ status = "disabled";
+ };
+
usb: usb@7e980000 {
compatible = "brcm,bcm2835-usb";
reg = <0x7e980000 0x10000>;
interrupts = <1 9>;
};
+
+ v3d: v3d@7ec00000 {
+ compatible = "brcm,bcm2835-v3d";
+ reg = <0x7ec00000 0x1000>;
+ interrupts = <1 10>;
+ };
+
+ vc4: gpu {
+ compatible = "brcm,bcm2835-vc4";
+ };
};
clocks {
--
2.7.3
From da77f737f9f5a487f3a1f80f8546585ee18cd7b9 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 4 Mar 2016 10:39:28 -0800

63
config-arm-generic
View File

@ -6,8 +6,9 @@ CONFIG_EARLY_PRINTK=y
CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST=y
CONFIG_FB_SSD1307=m
CONFIG_HW_PERF_EVENTS=y
CONFIG_NFS_FS=y
CONFIG_FORCE_MAX_ZONEORDER=11
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_SCHED_MC=y
CONFIG_SCHED_SMT=y
@ -56,7 +57,6 @@ CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_V2M=y
CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
# CONFIG_HISILICON_IRQ_MBIGEN is not set
CONFIG_ARM_GLOBAL_TIMER=y
CONFIG_ARM_SMMU=y
CONFIG_MMC_ARMMMCI=y
@ -69,6 +69,8 @@ CONFIG_PL330_DMA=m
CONFIG_GPIO_PL061=y
CONFIG_USB_ISP1760=m
CONFIG_ARM_PL172_MPMC=m
CONFIG_DRM_HDLCD=m
# CONFIG_DRM_HDLCD_SHOW_UNDERRUN is not set
# HW crypto and rng
CONFIG_ARM_CRYPTO=y
@ -109,6 +111,41 @@ CONFIG_CLKSRC_VERSATILE=y
CONFIG_POWER_RESET_VERSATILE=y
# CONFIG_ARM_CHARLCD is not set
# Marvell EBU
CONFIG_ARCH_MVEBU=y
CONFIG_SERIAL_MVEBU_UART=y
CONFIG_SERIAL_MVEBU_CONSOLE=y
CONFIG_MVEBU_DEVBUS=y
CONFIG_MVEBU_MBUS=y
CONFIG_PCI_MVEBU=y
CONFIG_PCIE_ARMADA_8K=y
CONFIG_MV_XOR=y
CONFIG_CRYPTO_DEV_MV_CESA=m
CONFIG_CRYPTO_DEV_MARVELL_CESA=m
CONFIG_ARMADA_THERMAL=m
CONFIG_MMC_SDHCI_PXAV3=m
CONFIG_MV643XX_ETH=m
CONFIG_PINCTRL_MVEBU=y
CONFIG_EDAC_MV64X60=m
CONFIG_RTC_DRV_S35390A=m
CONFIG_RTC_DRV_88PM80X=m
CONFIG_RTC_DRV_ISL12057=m
CONFIG_RTC_DRV_MV=m
CONFIG_RTC_DRV_ARMADA38X=m
CONFIG_MVNETA=m
CONFIG_MVNETA_BM_ENABLE=m
CONFIG_GPIO_MVEBU=y
CONFIG_MVEBU_CLK_CORE=y
CONFIG_MVEBU_CLK_COREDIV=y
CONFIG_MMC_MVSDIO=m
CONFIG_SPI_ORION=m
CONFIG_USB_MV_UDC=m
CONFIG_USB_XHCI_MVEBU=m
CONFIG_PHY_MVEBU_SATA=y
CONFIG_AHCI_MVEBU=m
# CONFIG_CACHE_FEROCEON_L2 is not set
# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
# Rockchips
CONFIG_ARCH_ROCKCHIP=y
CONFIG_I2C_RK3X=m
@ -127,9 +164,11 @@ CONFIG_ROCKCHIP_SARADC=m
CONFIG_ROCKCHIP_IOMMU=y
CONFIG_ROCKCHIP_THERMAL=m
CONFIG_DRM_ROCKCHIP=m
CONFIG_ROCKCHIP_ANALOGIX_DP=m
CONFIG_ROCKCHIP_DW_HDMI=m
CONFIG_ROCKCHIP_DW_MIPI_DSI=y
CONFIG_ROCKCHIP_DW_MIPI_DSI=m
CONFIG_ROCKCHIP_INNO_HDMI=m
CONFIG_DRM_ANALOGIX_DP=m
CONFIG_PHY_ROCKCHIP_USB=m
CONFIG_DWMAC_ROCKCHIP=m
CONFIG_SND_SOC_ROCKCHIP=m
@ -166,6 +205,8 @@ CONFIG_RTC_DRV_TEGRA=m
CONFIG_ARM_TEGRA_DEVFREQ=m
CONFIG_ARM_TEGRA124_CPUFREQ=m
CONFIG_TEGRA_SOCTHERM=m
CONFIG_PHY_TEGRA_XUSB=m
CONFIG_USB_XHCI_TEGRA=m
CONFIG_TEGRA_HOST1X=m
CONFIG_TEGRA_HOST1X_FIREWALL=y
@ -174,6 +215,7 @@ CONFIG_DRM_TEGRA=m
CONFIG_DRM_TEGRA_STAGING=y
CONFIG_NOUVEAU_PLATFORM_DRIVER=y
CONFIG_SND_HDA_TEGRA=m
CONFIG_RTC_DRV_MAX77686=m
# CONFIG_ARM_TEGRA20_CPUFREQ is not set
# CONFIG_MFD_NVEC is not set
@ -199,6 +241,8 @@ CONFIG_EFI_VARS=y
CONFIG_EFIVAR_FS=y
CONFIG_EFI_VARS_PSTORE=y
CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y
# CONFIG_EFI_BOOTLOADER_CONTROL is not set
# CONFIG_EFI_CAPSULE_LOADER is not set
# Power management / thermal / cpu scaling
CONFIG_PM_OPP=y
@ -393,6 +437,7 @@ CONFIG_MTD_OF_PARTS=m
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_PHYSMAP=m
CONFIG_MTD_PHYSMAP_OF=m
CONFIG_MTD_PHYSMAP_OF_VERSATILE=y
# CONFIG_MTD_PHYSMAP_COMPAT is not set
# CONFIG_MTD_LPDDR2_NVM is not set
@ -420,6 +465,10 @@ CONFIG_PINCTRL=y
CONFIG_GENERIC_PINCONF=y
CONFIG_PINCTRL_SINGLE=y
# gpio
CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_PCA953X_IRQ=y
#i2c
CONFIG_I2C_ARB_GPIO_CHALLENGE=m
CONFIG_I2C_BOARDINFO=y
@ -578,7 +627,6 @@ CONFIG_NET_VENDOR_MELLANOX=y
# drm
# CONFIG_DRM_VMWGFX is not set
# CONFIG_DRM_HDLCD is not set
# CONFIG_IMX_IPUV3_CORE is not set
# CONFIG_DEBUG_SET_MODULE_RONX is not set
@ -595,3 +643,10 @@ CONFIG_CHECKPOINT_RESTORE=y
# CONFIG_PINCTRL_CHERRYVIEW is not set
# CONFIG_PINCTRL_BROXTON is not set
# CONFIG_PINCTRL_SUNRISEPOINT is not set
# CONFIG_HW_RANDOM_HISI is not set
# CONFIG_HISILICON_IRQ_MBIGEN is not set
# CONFIG_QRTR is not set
# This Xilinx option is now built for arm64 as well as ARM
CONFIG_XILINX_VDMA=m

16
config-arm64
View File

@ -15,7 +15,6 @@ CONFIG_ARCH_XGENE=y
# CONFIG_ARCH_LAYERSCAPE is not set
# CONFIG_ARCH_MEDIATEK is not set
# CONFIG_ARCH_MESON is not set
# CONFIG_ARCH_MVEBU is not set
# CONFIG_ARCH_RENESAS is not set
# CONFIG_ARCH_SPRD is not set
# CONFIG_ARCH_STRATIX10 is not set
@ -23,6 +22,7 @@ CONFIG_ARCH_XGENE=y
# CONFIG_ARCH_VULCAN is not set
# CONFIG_ARCH_ZYNQMP is not set
# CONFIG_ARCH_UNIPHIER is not set
# CONFIG_ARCH_LG1K is not set
# Erratum
CONFIG_ARM64_ERRATUM_826319=y
@ -73,6 +73,7 @@ CONFIG_HVC_DRIVER=y
CONFIG_HZ=100
CONFIG_KVM=y
CONFIG_KVM_NEW_VGIC=y
CONFIG_RCU_FANOUT=64
CONFIG_SPARSE_IRQ=y
@ -151,12 +152,19 @@ CONFIG_STUB_CLK_HI6220=y
CONFIG_REGULATOR_HI655X=m
CONFIG_PHY_HI6220_USB=m
CONFIG_COMMON_RESET_HI6220=m
# CONFIG_ARM_HISI_ACPU_CPUFREQ is not set
CONFIG_HI6220_MBOX=m
CONFIG_RESET_HISI=y
CONFIG_MFD_HI655X_PMIC=m
CONFIG_DRM_HISI_KIRIN=m
CONFIG_HISI_KIRIN_DW_DSI=m
# Tegra
CONFIG_ARCH_TEGRA_132_SOC=y
CONFIG_ARCH_TEGRA_210_SOC=y
CONFIG_TEGRA210_ADMA=y
CONFIG_MFD_MAX77620=y
CONFIG_REGULATOR_MAX77620=m
# CONFIG_GPIO_TEGRA is not set
# AllWinner
CONFIG_MACH_SUN50I=y
@ -278,3 +286,7 @@ CONFIG_DEBUG_SECTION_MISMATCH=y
# CONFIG_FUJITSU_ES is not set
# CONFIG_IMX_THERMAL is not set
# CONFIG_PNP_DEBUG_MESSAGES is not set
# Will probably need to be changed later
# CONFIG_NUMA is not set

9
config-armv7
View File

@ -21,11 +21,12 @@ CONFIG_ARCH_OMAP2PLUS_TYPICAL=y
CONFIG_SOC_OMAP5=y
# CONFIG_SOC_DRA7XX is not set
CONFIG_SOC_OMAP3430=y
# CONFIG_SOC_TI81XX is not set
CONFIG_SOC_TI81XX=y
# CONFIG_MACH_NOKIA_RX51 is not set
# CONFIG_MACH_OMAP_LDP is not set
# CONFIG_MACH_OMAP3517EVM is not set
# CONFIG_MACH_OMAP3_PANDORA is not set
CONFIG_OMAP5_ERRATA_801819=y
CONFIG_SOC_HAS_REALTIME_COUNTER=y
CONFIG_OMAP_RESET_CLOCKS=y
@ -72,6 +73,8 @@ CONFIG_TWL4030_USB=m
CONFIG_TWL6030_USB=m
CONFIG_TWL6040_CORE=y
CONFIG_CLK_TWL6040=m
# DM814x such as hp-t410
CONFIG_COMMON_CLK_TI_ADPLL=m
CONFIG_OMAP_INTERCONNECT=m
CONFIG_MFD_OMAP_USB_HOST=y
CONFIG_HDQ_MASTER_OMAP=m
@ -323,7 +326,6 @@ CONFIG_INPUT_PM8XXX_VIBRATOR=m
CONFIG_INPUT_PMIC8XXX_PWRKEY=m
CONFIG_INPUT_PM8941_PWRKEY=m
CONFIG_RTC_DRV_PM8XXX=m
# CONFIG_DRM_MSM_REGISTER_LOGGING is not set
CONFIG_QCOM_WDT=m
CONFIG_SPMI_MSM_PMIC_ARB=m
CONFIG_QCOM_SPMI_IADC=m
@ -364,6 +366,7 @@ CONFIG_SOC_IMX7D=y
CONFIG_ARM_IMX6Q_CPUFREQ=m
CONFIG_POWER_RESET_IMX=y
CONFIG_PCI_IMX6=y
CONFIG_IMX_GPCV2=y
CONFIG_IMX_THERMAL=m
CONFIG_IMX_SDMA=m
CONFIG_IMX_DMA=m
@ -411,6 +414,7 @@ CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=m
CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=m
# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set
# CONFIG_CRYPTO_DEV_MXS_DCP is not set
# CONFIG_CRYPTO_DEV_MXC_SCC is not set
CONFIG_RTC_DRV_SNVS=m
CONFIG_FB_MXS=m
# CONFIG_FB_MX3 is not set
@ -582,7 +586,6 @@ CONFIG_SPI_CADENCE=m
CONFIG_I2C_CADENCE=m
CONFIG_XILINX_WATCHDOG=m
CONFIG_XILINX_XADC=m
CONFIG_XILINX_VDMA=m
CONFIG_SND_SOC_ADI=m
CONFIG_SND_SOC_ADI_AXI_I2S=m
CONFIG_SND_SOC_ADI_AXI_SPDIF=m

41
config-armv7-generic
View File

@ -30,7 +30,6 @@ CONFIG_ATAGS=y
CONFIG_ATAGS_PROC=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_ARCH_HAS_TICK_BROADCAST=y
CONFIG_IRQ_CROSSBAR=y
CONFIG_IOMMU_IO_PGTABLE_LPAE=y
@ -152,8 +151,6 @@ CONFIG_DEVFREQ_GOV_USERSPACE=y
CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
CONFIG_LSM_MMAP_MIN_ADDR=32768
CONFIG_XZ_DEC_ARM=y
# CONFIG_PCI_LAYERSCAPE is not set
# Do NOT enable this, it breaks stuff and makes things go slow
@ -198,6 +195,7 @@ CONFIG_MACH_SUN8I=y
CONFIG_SUNXI_SRAM=y
CONFIG_DMA_SUN4I=m
CONFIG_DMA_SUN6I=m
CONFIG_DRM_SUN4I=m
CONFIG_SUNXI_WATCHDOG=m
CONFIG_NET_VENDOR_ALLWINNER=y
CONFIG_RTC_DRV_SUNXI=m
@ -208,7 +206,6 @@ CONFIG_SPI_SUN4I=m
CONFIG_SPI_SUN6I=m
CONFIG_MMC_SUNXI=m
CONFIG_I2C_SUN6I_P2WI=m
CONFIG_GPIO_PCA953X=m
CONFIG_GPIO_PCF857X=m
CONFIG_TOUCHSCREEN_SUN4I=m
CONFIG_MFD_AXP20X=y
@ -274,8 +271,10 @@ CONFIG_SERIAL_SAMSUNG_CONSOLE=y
CONFIG_ARM_EXYNOS5440_CPUFREQ=m
# CONFIG_ARM_EXYNOS_CPUIDLE is not set
CONFIG_ARM_EXYNOS5_BUS_DEVFREQ=m
# CONFIG_ARM_EXYNOS_BUS_DEVFREQ is not set
# CONFIG_EXYNOS5420_MCPM not set
CONFIG_DEVFREQ_EVENT_EXYNOS_PPMU=y
# CONFIG_DEVFREQ_EVENT_EXYNOS_NOCP is not set
CONFIG_I2C_EXYNOS5=m
CONFIG_I2C_S3C2410=m
@ -366,7 +365,6 @@ CONFIG_INPUT_MAX8997_HAPTIC=m
CONFIG_CHARGER_MAX8997=m
CONFIG_LEDS_MAX8997=m
CONFIG_RTC_DRV_MAX8997=m
CONFIG_RTC_DRV_MAX77686=m
CONFIG_EXTCON_MAX8997=m
# Tegra
@ -381,6 +379,7 @@ CONFIG_SND_SOC_TEGRA_RT5677=m
CONFIG_AD525X_DPOT=m
CONFIG_AD525X_DPOT_I2C=m
CONFIG_AD525X_DPOT_SPI=m
# CONFIG_GPIO_TEGRA is not set
# Jetson TK1
CONFIG_PINCTRL_AS3722=y
@ -396,7 +395,6 @@ CONFIG_TI_THERMAL=y
CONFIG_MMC_OMAP_HS=m
# mvebu
CONFIG_ARCH_MVEBU=y
CONFIG_MACH_ARMADA_370=y
CONFIG_MACH_ARMADA_375=y
CONFIG_MACH_ARMADA_38X=y
@ -404,45 +402,18 @@ CONFIG_MACH_ARMADA_39X=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_MACH_DOVE=y
CONFIG_MVEBU_DEVBUS=y
CONFIG_PCI_MVEBU=y
CONFIG_CACHE_TAUROS2=y
CONFIG_MV_XOR=y
CONFIG_CRYPTO_DEV_MV_CESA=m
CONFIG_CRYPTO_DEV_MARVELL_CESA=m
CONFIG_MV643XX_ETH=m
CONFIG_PINCTRL_MVEBU=y
CONFIG_PINCTRL_ARMADA_370=y
CONFIG_PINCTRL_ARMADA_XP=y
# CONFIG_ARM_MVEBU_V7_CPUIDLE is not set
CONFIG_PINCTRL_DOVE=y
CONFIG_EDAC_MV64X60=m
CONFIG_RTC_DRV_S35390A=m
CONFIG_RTC_DRV_88PM80X=m
CONFIG_RTC_DRV_ISL12057=m
CONFIG_RTC_DRV_MV=m
CONFIG_RTC_DRV_ARMADA38X=m
CONFIG_MVNETA=m
CONFIG_MVNETA_BM_ENABLE=m
CONFIG_GPIO_MVEBU=y
CONFIG_MVEBU_CLK_CORE=y
CONFIG_MVEBU_CLK_COREDIV=y
CONFIG_MMC_MVSDIO=m
CONFIG_MMC_SDHCI_DOVE=m
CONFIG_SPI_ORION=m
CONFIG_USB_MV_UDC=m
CONFIG_MVEBU_MBUS=y
CONFIG_USB_XHCI_MVEBU=m
CONFIG_PHY_MVEBU_SATA=y
CONFIG_AHCI_MVEBU=m
CONFIG_ARMADA_THERMAL=m
CONFIG_DOVE_THERMAL=m
CONFIG_DRM_ARMADA=m
CONFIG_ORION_WATCHDOG=m
CONFIG_SND_KIRKWOOD_SOC=m
CONFIG_SND_KIRKWOOD_SOC_ARMADA370_DB=m
CONFIG_USB_EHCI_HCD_ORION=m
CONFIG_MMC_SDHCI_PXAV3=m
CONFIG_MVPP2=m
CONFIG_COMMON_CLK_SI5351=m
CONFIG_RTC_DRV_ARMADA38X=m
@ -451,6 +422,7 @@ CONFIG_RTC_DRV_ARMADA38X=m
CONFIG_LEDS_NS2=m
CONFIG_SERIAL_MVEBU_UART=y
# CONFIG_SERIAL_MVEBU_CONSOLE is not set
# CONFIG_PCIE_ARMADA_8K is not set
# DRM panels
CONFIG_DRM_PANEL=y
@ -577,7 +549,6 @@ CONFIG_RTC_DRV_DS1390=m
CONFIG_RTC_DRV_M41T93=m
CONFIG_RTC_DRV_M41T94=m
CONFIG_RTC_DRV_MAX6902=m
CONFIG_RTC_DRV_PCF2123=m
CONFIG_RTC_DRV_R9701=m
CONFIG_RTC_DRV_RS5C348=m
CONFIG_RTC_DRV_RX4581=m
@ -623,6 +594,7 @@ CONFIG_REGULATOR_DA9211=m
CONFIG_REGULATOR_ISL9305=m
CONFIG_REGULATOR_MAX77802=m
# CONFIG_REGULATOR_MT6311 is not set
# CONFIG_REGULATOR_PV88080 is not set
CONFIG_SENSORS_LTC2978_REGULATOR=y
CONFIG_POWER_AVS=y
@ -782,6 +754,7 @@ CONFIG_R8188EU=m
# CONFIG_SERIAL_IFX6X60 is not set
# CONFIG_SERIAL_BCM63XX is not set
# CONFIG_SERIAL_STM32 is not set
# CONFIG_SERIAL_MPS2_UART is not set
# CONFIG_FB_XILINX is not set
# CONFIG_BRCMSTB_GISB_ARB is not set
# CONFIG_SUNGEM is not set

12
config-armv7-lpae
View File

@ -25,8 +25,20 @@ CONFIG_CMA_SIZE_MBYTES=64
CONFIG_ARM_ERRATA_798181=y
CONFIG_ARM_ERRATA_773022=y
# Little.BIG
CONFIG_BIG_LITTLE=y
CONFIG_BL_SWITCHER=y
CONFIG_EXYNOS5420_MCPM=y
CONFIG_ARCH_VEXPRESS_DCSCB=y
CONFIG_ARCH_VEXPRESS_TC2_PM=y
CONFIG_ARM_BIG_LITTLE_CPUFREQ=m
CONFIG_ARM_SCPI_CPUFREQ=m
CONFIG_ARM_VEXPRESS_SPC_CPUFREQ=m
# CONFIG_BL_SWITCHER_DUMMY_IF is not set
CONFIG_KVM=y
CONFIG_KVM_ARM_HOST=y
CONFIG_KVM_NEW_VGIC=y
# CONFIG_XEN is not set
CONFIG_XEN_FBDEV_FRONTEND=y

1
config-debug
View File

@ -25,6 +25,7 @@ CONFIG_FAULT_INJECTION_DEBUG_FS=y
CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
CONFIG_FAIL_IO_TIMEOUT=y
CONFIG_FAIL_MMC_REQUEST=y
# CONFIG_F2FS_FAULT_INJECTION is not set
CONFIG_LOCK_STAT=y

219
config-generic
View File

@ -111,6 +111,7 @@ CONFIG_HOTPLUG_PCI=y
# CONFIG_HOTPLUG_PCI_SHPC is not set
CONFIG_HOTPLUG_PCI_PCIE=y
# CONFIG_PCIE_DW_PLAT is not set
CONFIG_PCIE_DPC=m
# CONFIG_SGI_IOC4 is not set
@ -214,7 +215,8 @@ CONFIG_BINFMT_MISC=m
# CONFIG_COMMON_CLK_CS2000_CP is not set
# CONFIG_COMMON_CLK_PWM is not set
# CONFIG_COMMON_CLK_CDCE925 is not set
#
# CONFIG_COMMON_CLK_OXNAS is not set
# CONFIG_COMMON_CLK_HI3519 is not set
#
# Generic Driver Options
@ -237,6 +239,7 @@ CONFIG_REGMAP_I2C=m
# CONFIG_CMA is not set
# CONFIG_DMA_CMA is not set
# CONFIG_FENCE_TRACE is not set
# CONFIG_SYNC_FILE is not set
# CONFIG_SPI is not set
# CONFIG_SPI_ALTERA is not set
@ -570,6 +573,7 @@ CONFIG_SCSI_WD719X=m
CONFIG_SCSI_DEBUG=m
CONFIG_SCSI_QLA_FC=m
CONFIG_TCM_QLA2XXX=m
# CONFIG_TCM_QLA2XXX_DEBUG is not set
CONFIG_SCSI_QLA_ISCSI=m
CONFIG_SCSI_IPR=m
CONFIG_SCSI_IPR_TRACE=y
@ -595,6 +599,7 @@ CONFIG_ATA_BMDMA=y
CONFIG_ATA_VERBOSE_ERROR=y
CONFIG_ATA_SFF=y
CONFIG_ATA_PIIX=y
# CONFIG_SATA_DWC is not set
# CONFIG_SATA_HIGHBANK is not set
CONFIG_ATA_ACPI=y
CONFIG_BLK_DEV_SX8=m
@ -813,6 +818,7 @@ CONFIG_NET_IPVTI=m
CONFIG_NET_FOU=m
CONFIG_NET_FOU_IP_TUNNELS=y
CONFIG_GENEVE=m
CONFIG_GTP=m
CONFIG_MACSEC=m
CONFIG_INET_AH=m
CONFIG_INET_ESP=m
@ -1564,6 +1570,10 @@ CONFIG_QLGE=m
CONFIG_NETXEN_NIC=m
CONFIG_QED=m
CONFIG_QEDE=m
CONFIG_QED_SRIOV=y
# CONFIG_QEDE_VXLAN is not set
# CONFIG_QEDE_GENEVE is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set
@ -1633,6 +1643,7 @@ CONFIG_VIA_VELOCITY=m
CONFIG_NET_VENDOR_WIZNET=y
CONFIG_WIZNET_W5100=m
CONFIG_WIZNET_W5300=m
CONFIG_WIZNET_W5100_SPI=m
CONFIG_NET_VENDOR_XIRCOM=y
CONFIG_PCMCIA_XIRC2PS=m
@ -1713,6 +1724,7 @@ CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_PCI=m
CONFIG_MLXSW_SWITCHX2=m
CONFIG_MLXSW_SPECTRUM=m
CONFIG_MLXSW_SPECTRUM_DCB=y
# CONFIG_MLX4_DEBUG is not set
# CONFIG_SFC is not set
@ -2106,6 +2118,8 @@ CONFIG_NFC_PORT100=m
CONFIG_NFC_PN544=m
CONFIG_NFC_PN544_I2C=m
CONFIG_NFC_PN533=m
CONFIG_NFC_PN533_USB=m
CONFIG_NFC_PN533_I2C=m
CONFIG_NFC_MICROREAD=m
CONFIG_NFC_MICROREAD_I2C=m
CONFIG_NFC_TRF7970A=m
@ -2563,6 +2577,7 @@ CONFIG_INPUT_MMA8450=m
CONFIG_INPUT_MPU3050=m
CONFIG_INPUT_KXTJ9=m
# CONFIG_INPUT_KXTJ9_POLLED_MODE is not set
# CONFIG_INPUT_PWM_BEEPER is not set
CONFIG_RMI4_CORE=m
CONFIG_RMI4_I2C=m
@ -2625,7 +2640,6 @@ CONFIG_CYCLADES=m
# CONFIG_CYZ_INTR is not set
# CONFIG_MOXA_INTELLIO is not set
# CONFIG_MOXA_SMARTIO is not set
# CONFIG_SERIAL_MVEBU_UART is not set
# CONFIG_ISI is not set
# CONFIG_RIO is not set
CONFIG_SERIAL_JSM=m
@ -2809,6 +2823,7 @@ CONFIG_SENSORS_LTC4260=m
CONFIG_SENSORS_MAX1619=m
CONFIG_SENSORS_MAX6650=m
CONFIG_SENSORS_MAX6697=m
CONFIG_SENSORS_MAX31722=m
CONFIG_SENSORS_MCP3021=m
CONFIG_SENSORS_NCT6775=m
CONFIG_SENSORS_NCT6683=m
@ -3000,6 +3015,8 @@ CONFIG_ACPI_ALS=m
# CONFIG_AD5421 is not set
# CONFIG_AD5449 is not set
# CONFIG_AD5504 is not set
# CONFIG_AD5592R is not set
# CONFIG_AD5593R is not set
# CONFIG_AD5624R_SPI is not set
# CONFIG_AD5686 is not set
# CONFIG_AD5755 is not set
@ -3062,6 +3079,18 @@ CONFIG_PA12203001=m
# CONFIG_TSYS02D is not set
# CONFIG_HI8435 is not set
# CONFIG_IMX7D_ADC is not set
# CONFIG_AM2315 is not set
# CONFIG_BMI160_I2C is not set
# CONFIG_BMI160_SPI is not set
# CONFIG_BH1780 is not set
# CONFIG_MAX44000 is not set
# CONFIG_VEML6070 is not set
# CONFIG_BMC150_MAGN_I2C is not set
# CONFIG_BMC150_MAGN_SPI is not set
# CONFIG_DS1803 is not set
# CONFIG_MCP4131 is not set
# CONFIG_HP03 is not set
# CONFIG_HP206C is not set
# staging IIO drivers
# CONFIG_AD7291 is not set
@ -3288,10 +3317,10 @@ CONFIG_RTC_DRV_PCF85063=m
# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
# CONFIG_RTC_DRV_MOXART is not set
# CONFIG_RTC_DRV_ISL12057 is not set
# CONFIG_RTC_DRV_XGENE is not set
# CONFIG_RTC_DRV_ABB5ZES3 is not set
# CONFIG_RTC_DRV_ZYNQMP is not set
# CONFIG_RTC_DRV_RV8803 is not set
# CONFIG_RTC_DRV_DS1302 is not set
CONFIG_R3964=m
# CONFIG_APPLICOM is not set
@ -3317,6 +3346,8 @@ CONFIG_VGA_ARB_MAX_GPUS=16
CONFIG_DRM=m
CONFIG_DRM_ANALOGIX_ANX78XX=m
# CONFIG_DRM_ARCPGU is not set
CONFIG_DRM_DP_AUX_CHARDEV=y
CONFIG_DRM_FBDEV_EMULATION=y
CONFIG_DRM_LOAD_EDID_FIRMWARE=y
@ -3330,6 +3361,7 @@ CONFIG_DRM_AMDGPU=m
CONFIG_DRM_AMD_ACP=y
# CONFIG_DRM_AMDGPU_CIK is not set
CONFIG_DRM_AMDGPU_USERPTR=y
# CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set
CONFIG_DRM_AMD_POWERPLAY=y
# CONFIG_DRM_I810 is not set
# CONFIG_DRM_MGA is not set
@ -3480,6 +3512,9 @@ CONFIG_VIDEO_TM6000_DVB=m
# CONFIG_VIDEO_VIVID is not set
CONFIG_VIDEO_USBTV=m
# CONFIG_VIDEO_AU0828_RC is not set
CONFIG_VIDEO_TW686X=m
# Staging version?
# CONFIG_VIDEO_TW686X_KH is not set
CONFIG_USB_VIDEO_CLASS=m
CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
@ -4099,6 +4134,7 @@ CONFIG_HID_LENOVO=m
CONFIG_HID_CORSAIR=m
CONFIG_HID_GFRM=m
CONFIG_HID_CMEDIA=m
CONFIG_HID_ASUS=m
#
# USB Imaging devices
@ -4342,6 +4378,7 @@ CONFIG_USB_EZUSB_FX2=m
CONFIG_USB_HSIC_USB3503=m
# CONFIG_USB_LINK_LAYER_TEST is not set
CONFIG_USB_CHAOSKEY=m
CONFIG_UCSI=m
CONFIG_USB_LCD=m
CONFIG_USB_LD=m
CONFIG_USB_LEGOTOWER=m
@ -4404,80 +4441,90 @@ CONFIG_MFD_SM501=m
CONFIG_MFD_SM501_GPIO=y
CONFIG_MFD_RTSX_PCI=m
CONFIG_MFD_RTSX_USB=m
# CONFIG_MFD_TI_AM335X_TSCADC is not set
CONFIG_MFD_VIPERBOARD=m
# CONFIG_MFD_RETU is not set
# CONFIG_MFD_TC6393XB is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_WM8350 is not set
# CONFIG_MFD_WM831X is not set
# CONFIG_AB3100_OTP is not set
# CONFIG_MFD_TIMBERDALE is not set
# CONFIG_MFD_WM8994 is not set
# CONFIG_MFD_88PM860X is not set
# CONFIG_LPC_SCH is not set
# CONFIG_LPC_ICH is not set
# CONFIG_HTC_I2CPLD is not set
# CONFIG_MFD_MAX8925 is not set
# CONFIG_MFD_ASIC3 is not set
# CONFIG_MFD_AS3722 is not set
# CONFIG_HTC_EGPIO is not set
# CONFIG_TPS6507X is not set
# CONFIG_ABX500_CORE is not set
# CONFIG_MFD_RDC321X is not set
# CONFIG_MFD_JANZ_CMODIO is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_WM831X_I2C is not set
# CONFIG_MFD_CS5535 is not set
# CONFIG_MFD_STMPE is not set
# CONFIG_MFD_MAX8998 is not set
# CONFIG_MFD_MT6397 is not set
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_TC3589X is not set
# CONFIG_MFD_WL1273_CORE is not set
# CONFIG_MFD_TPS65217 is not set
# CONFIG_MFD_LM3533 is not set
# CONFIG_MFD_MC13XXX_I2C is not set
# CONFIG_MFD_ARIZONA is not set
# CONFIG_MFD_ARIZONA_I2C is not set
# CONFIG_MFD_CROS_EC is not set
# CONFIG_MFD_SI476X_CORE is not set
# CONFIG_MFD_TPS65912 is not set
# CONFIG_MFD_TPS65912_SPI is not set
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_SYSCON is not set
# CONFIG_MFD_DA9063 is not set
# CONFIG_MFD_DLN2 is not set
# CONFIG_MFD_LP3943 is not set
# CONFIG_MFD_ATMEL_HLCDC is not set
# CONFIG_MFD_BCM590XX is not set
# CONFIG_MFD_TPS65218 is not set
# CONFIG_MFD_WM831X_SPI is not set
# CONFIG_MFD_ARIZONA_SPI is not set
# CONFIG_MFD_MC13XXX_SPI is not set
# CONFIG_MFD_DA9052_SPI is not set
# CONFIG_MFD_MENF21BMC is not set
# CONFIG_MFD_HI6421_PMIC is not set
# CONFIG_MFD_RK808 is not set
# CONFIG_MFD_RN5T618 is not set
# CONFIG_MFD_DA9150 is not set
# CONFIG_MFD_RT5033 is not set
# CONFIG_MFD_SKY81452 is not set
# CONFIG_MFD_MAX77843 is not set
# CONFIG_MFD_DA9062 is not set
# CONFIG_EZX_PCAP is not set
# CONFIG_HTC_EGPIO is not set
# CONFIG_HTC_I2CPLD is not set
# CONFIG_INTEL_SOC_PMIC is not set
# CONFIG_MFD_ATMEL_FLEXCOM is not set
# CONFIG_TS4800_IRQ is not set
# CONFIG_MFD_ACT8945A is not set
# CONFIG_MFD_AXP20X_I2C is not set
# CONFIG_MFD_AXP20X_RSB is not set
# CONFIG_LPC_ICH is not set
# CONFIG_LPC_SCH is not set
# CONFIG_MFD_88PM800 is not set
# CONFIG_MFD_88PM805 is not set
# CONFIG_MFD_88PM860X is not set
# CONFIG_MFD_ACT8945A is not set
# CONFIG_MFD_ARIZONA_I2C is not set
# CONFIG_MFD_ARIZONA is not set
# CONFIG_MFD_ARIZONA_SPI is not set
# CONFIG_MFD_AS3722 is not set
# CONFIG_MFD_ASIC3 is not set
# CONFIG_MFD_ATMEL_FLEXCOM is not set
# CONFIG_MFD_ATMEL_HLCDC is not set
# CONFIG_MFD_AXP20X_I2C is not set
# CONFIG_MFD_AXP20X_RSB is not set
# CONFIG_MFD_BCM590XX is not set
# CONFIG_MFD_CROS_EC is not set
# CONFIG_MFD_CS5535 is not set
# CONFIG_MFD_DA9052_SPI is not set
# CONFIG_MFD_DA9062 is not set
# CONFIG_MFD_DA9063 is not set
# CONFIG_MFD_DA9150 is not set
# CONFIG_MFD_DLN2 is not set
# CONFIG_MFD_HI6421_PMIC is not set
# CONFIG_MFD_JANZ_CMODIO is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_LM3533 is not set
# CONFIG_MFD_LP3943 is not set
# CONFIG_MFD_MAX14577 is not set
# CONFIG_MFD_MAX77620 is not set
# CONFIG_MFD_MAX77686 is not set
# CONFIG_MFD_MAX77693 is not set
# CONFIG_MFD_MAX77843 is not set
# CONFIG_MFD_MAX8907 is not set
# CONFIG_MFD_MAX8925 is not set
# CONFIG_MFD_MAX8997 is not set
# CONFIG_MFD_MAX8998 is not set
# CONFIG_MFD_MC13XXX_I2C is not set
# CONFIG_MFD_MC13XXX_SPI is not set
# CONFIG_MFD_MENF21BMC is not set
# CONFIG_MFD_MT6397 is not set
# CONFIG_MFD_PALMAS is not set
# CONFIG_MFD_RDC321X is not set
# CONFIG_MFD_RETU is not set
# CONFIG_MFD_RK808 is not set
# CONFIG_MFD_RN5T618 is not set
# CONFIG_MFD_RT5033 is not set
# CONFIG_MFD_SI476X_CORE is not set
# CONFIG_MFD_SKY81452 is not set
# CONFIG_MFD_STMPE is not set
# CONFIG_MFD_SYSCON is not set
# CONFIG_MFD_TC3589X is not set
# CONFIG_MFD_TC6393XB is not set
# CONFIG_MFD_TI_AM335X_TSCADC is not set
# CONFIG_MFD_TIMBERDALE is not set
# CONFIG_MFD_TPS65086 is not set
# CONFIG_MFD_TPS65090 is not set
# CONFIG_MFD_TPS65217 is not set
# CONFIG_MFD_TPS65218 is not set
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_TPS65910 is not set
# CONFIG_MFD_TPS65912 is not set
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_TPS65912_SPI is not set
# CONFIG_MFD_TPS80031 is not set
# CONFIG_MFD_WL1273_CORE is not set
# CONFIG_MFD_WM831X_I2C is not set
# CONFIG_MFD_WM831X is not set
# CONFIG_MFD_WM831X_SPI is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_WM8350 is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM8994 is not set
# CONFIG_TPS6507X is not set
# CONFIG_TS4800_IRQ is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_TWL6040_CORE is not set
#
# File systems
@ -4920,6 +4967,7 @@ CONFIG_SECURITY_SELINUX_AVC_STATS=y
# CONFIG_SECURITY_SMACK is not set
# CONFIG_SECURITY_TOMOYO is not set
# CONFIG_SECURITY_APPARMOR is not set
# CONFIG_SECURITY_LOADPIN is not set
CONFIG_SECURITY_YAMA=y
CONFIG_AUDIT=y
CONFIG_AUDITSYSCALL=y
@ -5056,6 +5104,7 @@ CONFIG_PERSISTENT_KEYRINGS=y
CONFIG_BIG_KEYS=y
CONFIG_TRUSTED_KEYS=m
CONFIG_ENCRYPTED_KEYS=m
CONFIG_KEY_DH_OPERATIONS=y
CONFIG_CDROM_PKTCDVD=m
CONFIG_CDROM_PKTCDVD_BUFFERS=8
# CONFIG_CDROM_PKTCDVD_WCACHE is not set
@ -5080,6 +5129,7 @@ CONFIG_BACKLIGHT_LP855X=m
# CONFIG_BACKLIGHT_LV5207LP is not set
# CONFIG_BACKLIGHT_BD6107 is not set
# CONFIG_BACKLIGHT_PM8941_WLED is not set
# CONFIG_BACKLIGHT_PWM is not set
CONFIG_LCD_CLASS_DEVICE=m
CONFIG_LCD_PLATFORM=m
@ -5182,6 +5232,7 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_STAT=m
CONFIG_CPU_FREQ_STAT_DETAILS=y
@ -5311,6 +5362,9 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC_INNO_RK3036 is not set
# CONFIG_SND_SOC_IMG is not set
CONFIG_SND_SOC_AMD_ACP=m
# CONFIG_SND_SOC_TAS5720 is not set
# CONFIG_SND_SOC_WM8960 is not set
CONFIG_BALLOON_COMPACTION=y
CONFIG_COMPACTION=y
@ -5350,6 +5404,8 @@ CONFIG_LEDS_TRIGGER_BACKLIGHT=m
CONFIG_LEDS_TRIGGER_DEFAULT_ON=m
CONFIG_LEDS_TRIGGER_TRANSIENT=m
CONFIG_LEDS_TRIGGER_CAMERA=m
CONFIG_LEDS_TRIGGER_MTD=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_LEDS_CLEVO_MAIL=m
CONFIG_LEDS_INTEL_SS4200=m
CONFIG_LEDS_LM3530=m
@ -5414,6 +5470,7 @@ CONFIG_RING_BUFFER_BENCHMARK=m
CONFIG_FUNCTION_TRACER=y
CONFIG_STACK_TRACER=y
# CONFIG_FUNCTION_GRAPH_TRACER is not set
# CONFIG_HIST_TRIGGERS is not set
CONFIG_KPROBES=y
CONFIG_KPROBE_EVENT=y
@ -5445,6 +5502,7 @@ CONFIG_POWER_SUPPLY=y
# CONFIG_TEST_POWER is not set
CONFIG_APM_POWER=m
# CONFIG_GENERIC_ADC_BATTERY is not set
# CONFIG_GENERIC_ADC_THERMAL is not set
# CONFIG_WM831X_POWER is not set
# CONFIG_BATTERY_DS2760 is not set
@ -5561,10 +5619,7 @@ CONFIG_GPIOLIB=y
CONFIG_NET_DSA=m
CONFIG_NET_DSA_HWMON=y
CONFIG_NET_DSA_MV88E6060=m
CONFIG_NET_DSA_MV88E6131=m
CONFIG_NET_DSA_MV88E6123=m
CONFIG_NET_DSA_MV88E6171=m
CONFIG_NET_DSA_MV88E6352=m
CONFIG_NET_DSA_MV88E6XXX=m
CONFIG_NET_DSA_BCM_SF2=m
# Used by Maemo, we don't care.
@ -5637,6 +5692,7 @@ CONFIG_ALTERA_STAPL=m
CONFIG_USBIP_CORE=m
CONFIG_USBIP_VHCI_HCD=m
CONFIG_USBIP_HOST=m
CONFIG_USBIP_VUDC=m
# CONFIG_USBIP_DEBUG is not set
# CONFIG_INTEL_MEI is not set
# CONFIG_VT6655 is not set
@ -5673,7 +5729,7 @@ CONFIG_IMA_MEASURE_PCR_IDX=10
CONFIG_IMA_LSM_RULES=y
# CONFIG_EVM is not set
# CONFIG_PWM is not set
CONFIG_PWM=y
# CONFIG_PWM_PCA9685 is not set
CONFIG_LSM_MMAP_MIN_ADDR=65536
@ -5695,6 +5751,7 @@ CONFIG_RCU_TORTURE_TEST_SLOW_INIT_DELAY=3
CONFIG_RCU_KTHREAD_PRIO=0
CONFIG_SPARSE_RCU_POINTER=y
# CONFIG_RCU_EXPERT is not set
# CONFIG_RCU_PERF_TEST is not set
# CONFIG_LIVEPATCH is not set
@ -5727,6 +5784,7 @@ CONFIG_CLEANCACHE=y
CONFIG_FRONTSWAP=y
CONFIG_ZSWAP=y
CONFIG_ZBUD=y
CONFIG_Z3FOLD=y
CONFIG_ZSMALLOC=y
# CONFIG_ZSMALLOC_STAT is not set
# CONFIG_PGTABLE_MAPPING is not set
@ -5807,6 +5865,7 @@ CONFIG_XZ_DEC_ARM=y
CONFIG_TARGET_CORE=m
CONFIG_ISCSI_TARGET=m
CONFIG_ISCSI_TARGET_CXGB4=m
CONFIG_LOOPBACK_TARGET=m
CONFIG_SBP_TARGET=m
CONFIG_TCM_IBLOCK=m
@ -5833,6 +5892,8 @@ CONFIG_PSTORE_RAM=m
# CONFIG_TEST_STATIC_KEYS is not set
# CONFIG_TEST_PRINTF is not set
# CONFIG_TEST_BITMAP is not set
# CONFIG_TEST_UUID is not set
# CONFIG_TEST_HASH is not set
# CONFIG_AVERAGE is not set
# CONFIG_VMXNET3 is not set
@ -5842,6 +5903,7 @@ CONFIG_PSTORE_RAM=m
# CONFIG_GOLDFISH is not set
CONFIG_CHROME_PLATFORMS=y
# CONFIG_CROS_KBD_LED_BACKLIGHT is not set
CONFIG_BCMA=m
CONFIG_BCMA_BLOCKIO=y
@ -5891,6 +5953,7 @@ CONFIG_POWERCAP=y
# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set
# CONFIG_DEVFREQ_GOV_POWERSAVE is not set
# CONFIG_DEVFREQ_GOV_USERSPACE is not set
# CONFIG_DEVFREQ_GOV_PASSIVE is not set
# CONFIG_CPUFREQ_DT is not set
@ -5902,6 +5965,7 @@ CONFIG_MODULE_SIG_SHA256=y
CONFIG_MODULE_SIG_KEY="certs/signing_key.pem"
CONFIG_SYSTEM_TRUSTED_KEYS=""
# CONFIG_SYSTEM_EXTRA_CERTIFICATE is not set
CONFIG_SECONDARY_TRUSTED_KEYRING=y
CONFIG_PKCS7_MESSAGE_PARSER=y
# CONFIG_PKCS7_TEST_KEY is not set
CONFIG_SIGNED_PE_FILE_VERIFICATION=y
@ -5930,3 +5994,14 @@ CONFIG_SYSTEM_BLACKLIST_KEYRING=y
# CONFIG_AHCI_QORIQ is not set
# CONFIG_COMMON_CLK_SI514 is not set
# CONFIG_CLK_QORIQ is not set
# CONFIG_PWRSEQ_EMMC is not set
# CONFIG_PWRSEQ_SIMPLE is not set
# The kernel code has a nice comment
# WARNING: Do not even assume this interface is staying stable!
# CONFIG_MCE_AMD_INJ is not set
# CONFIG_EZNPS_GIC is not set
CONFIG_NMI_LOG_BUF_SHIFT=13

1
config-nodebug
View File

@ -25,6 +25,7 @@ CONFIG_CPUMASK_OFFSTACK=y
# CONFIG_FAULT_INJECTION_STACKTRACE_FILTER is not set
# CONFIG_FAIL_IO_TIMEOUT is not set
# CONFIG_FAIL_MMC_REQUEST is not set
# CONFIG_F2FS_FAULT_INJECTION is not set
# CONFIG_LOCK_STAT is not set

7
config-powerpc64-generic
View File

@ -14,6 +14,8 @@ CONFIG_PPC_PSERIES=y
# CONFIG_PPC_PMAC64 is not set
# CONFIG_PPC_PS3 is not set
CONFIG_HIBERNATION=n
CONFIG_PPC_RADIX_MMU=y
# CONFIG_FSL_LBC is not set
CONFIG_EXTRA_TARGETS=""
@ -54,6 +56,7 @@ CONFIG_PPC_64K_PAGES=y
CONFIG_PPC_SUBPAGE_PROT=y
CONFIG_SCHED_SMT=y
CONFIG_MEMORY_HOTPLUG=y
CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y
CONFIG_MEMORY_HOTREMOVE=y
CONFIG_PPC64_SUPPORTS_MEMORY_FAILURE=y
@ -318,10 +321,6 @@ CONFIG_GPIO_WM831X=m
# CONFIG_CAN_MSCAN is not set
# CONFIG_CAN_MPC5XXX is not set
# CONFIG_PMIC_ADP5520 is not set
# CONFIG_MFD_MAX8997 is not set
# CONFIG_MFD_TPS65910 is not set
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_WL1273_CORE is not set
# CONFIG_XPS_USB_HCD_XILINX is not set
# CONFIG_MMC_SDHCI_OF_HLWD is not set

1
config-s390x
View File

@ -183,6 +183,7 @@ CONFIG_VIRTIO_CONSOLE=y
CONFIG_MEMORY_HOTPLUG=y
CONFIG_MEMORY_HOTREMOVE=y
CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y
CONFIG_CHSC_SCH=m
# drivers/isdn/hardware/mISDN/hfcmulti.c:5255:2: error: #error "not running on big endian machines now"

26
config-x86-generic
View File

@ -17,6 +17,10 @@ CONFIG_MICROCODE_INTEL=y
CONFIG_MICROCODE_AMD=y
CONFIG_PERF_EVENTS_AMD_POWER=m
CONFIG_PERF_EVENTS_INTEL_UNCORE=m
CONFIG_PERF_EVENTS_INTEL_RAPL=m
CONFIG_PERF_EVENTS_CSTATE=m
CONFIG_PERF_EVENTS_INTEL_CSTATE=m
CONFIG_X86_MSR=y
CONFIG_X86_CPUID=y
@ -48,6 +52,8 @@ CONFIG_FB_EFI=y
CONFIG_EARLY_PRINTK_EFI=y
CONFIG_EFI_RUNTIME_MAP=y
# CONFIG_EFI_FAKE_MEMMAP is not set
# CONFIG_EFI_BOOTLOADER_CONTROL is not set
# CONFIG_EFI_CAPSULE_LOADER is not set
# needs FB_SIMPLE to work correctly
# CONFIG_X86_SYSFB is not set
@ -104,6 +110,7 @@ CONFIG_ACPI_CUSTOM_METHOD=m
CONFIG_ACPI_BGRT=y
# CONFIG_ACPI_EXTLOG is not set
# CONFIG_ACPI_REV_OVERRIDE_POSSIBLE is not set
CONFIG_ACPI_TABLE_UPGRADE=y
CONFIG_INTEL_SOC_PMIC=y
CONFIG_PMIC_OPREGION=y
@ -326,6 +333,7 @@ CONFIG_SPI_MASTER=y
CONFIG_SPI_PXA2XX=m
# CONFIG_SPI_CADENCE is not set
# CONFIG_SPI_ZYNQMP_GQSPI is not set
# CONFIG_SPI_ROCKCHIP is not set
# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set
# CONFIG_DRM_PANEL_LG_LG4573 is not set
# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
@ -354,7 +362,6 @@ CONFIG_DMI_SYSFS=y
CONFIG_ISCSI_IBFT_FIND=y
CONFIG_ISCSI_IBFT=m
CONFIG_DMADEVICES=y
CONFIG_INTEL_IOATDMA=m
CONFIG_INTEL_IDMA64=m
@ -430,22 +437,10 @@ CONFIG_GPIO_ICH=m
# CONFIG_MFD_DA9055 is not set
# CONFIG_MFD_88PM800 is not set
# CONFIG_MFD_88PM805 is not set
# CONFIG_MFD_MAX14577 is not set
# CONFIG_MFD_MAX77686 is not set
# CONFIG_MFD_MAX77693 is not set
# CONFIG_MFD_MAX8907 is not set
# CONFIG_MFD_MAX8997 is not set
# CONFIG_MFD_RC5T583 is not set
# CONFIG_MFD_SEC_CORE is not set
# CONFIG_MFD_SMSC is not set
# CONFIG_MFD_LP8788 is not set
# CONFIG_MFD_PALMAS is not set
# CONFIG_MFD_TPS65090 is not set
# CONFIG_MFD_TPS65910 is not set
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_TPS80031 is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_TWL6040_CORE is not set
CONFIG_PCI_CNB20LE_QUIRK=y
@ -461,6 +456,7 @@ CONFIG_HPWDT_NMI_DECODING=y
# CONFIG_GPIO_INTEL_MID is not set
CONFIG_PCH_DMA=m
CONFIG_INTEL_IPS=m
CONFIG_INTEL_PMC_CORE=y
# CONFIG_IBM_RTL is not set
CONFIG_VIDEO_VIA_CAMERA=m
@ -568,17 +564,19 @@ CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=m
CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=m
CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=m
CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=m
CONFIG_SND_SOC_INTEL_BXT_RT298_MACH=m
CONFIG_SND_SOC_AC97_CODEC=m
# CONFIG_SND_SOC_TAS571X is not set
# CONFIG_SND_SUN4I_CODEC is not set
# CONFIG_SND_SUN4I_SPDIF is not set
# CONFIG_INTEL_POWERCLAMP is not set
CONFIG_INTEL_POWERCLAMP=m
CONFIG_X86_PKG_TEMP_THERMAL=m
CONFIG_INTEL_SOC_DTS_THERMAL=m
CONFIG_INT340X_THERMAL=m
CONFIG_INTEL_RAPL=m
CONFIG_INTEL_PCH_THERMAL=m
CONFIG_INT3406_THERMAL=m
CONFIG_VMWARE_VMCI=m
CONFIG_VMWARE_VMCI_VSOCKETS=m

5
config-x86_64-generic
View File

@ -117,6 +117,7 @@ CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP=y
# CONFIG_MOVABLE_NODE is not set
CONFIG_MEMORY_HOTPLUG=y
CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE=y
# CONFIG_ARCH_MEMORY_PROBE is not set
CONFIG_MEMORY_HOTREMOVE=y
# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
@ -222,8 +223,12 @@ CONFIG_CMA_AREAS=7
CONFIG_ZONE_DMA=y
CONFIG_ZONE_DEVICE=y
CONFIG_NVDIMM_PFN=y
CONFIG_NVDIMM_DAX=y
CONFIG_ND_PFN=m
CONFIG_DEV_DAX=m
CONFIG_DEV_DAX_PMEM=m
# Staging
CONFIG_STAGING_RDMA=y
CONFIG_INFINIBAND_HFI1=m

70
drm-amdgpu-Disable-RPM-helpers-while-reprobing.patch Normal file
View File

@ -0,0 +1,70 @@
From patchwork Fri Jul 8 15:37:35 2016
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: drm/amdgpu: Disable RPM helpers while reprobing connectors on resume
From: cpaul@redhat.com
X-Patchwork-Id: 97837
Message-Id: <1467992256-23832-1-git-send-email-cpaul@redhat.com>
To: amd-gfx@lists.freedesktop.org
Cc: Tom St Denis <tom.stdenis@amd.com>, Jammy Zhou <Jammy.Zhou@amd.com>,
open list <linux-kernel@vger.kernel.org>, stable@vger.kernel.org,
"open list:RADEON and AMDGPU DRM DRIVERS"
<dri-devel@lists.freedesktop.org>,
Alex Deucher <alexander.deucher@amd.com>, Lyude <cpaul@redhat.com>,
Flora Cui <Flora.Cui@amd.com>,
=?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>,
Monk Liu <Monk.Liu@amd.com>
Date: Fri, 8 Jul 2016 11:37:35 -0400
Just about all of amdgpu's connector probing functions try to acquire
runtime PM refs. If we try to do this in the context of
amdgpu_resume_kms by calling drm_helper_hpd_irq_event(), we end up
deadlocking the system.
Since we're guaranteed to be holding the spinlock for RPM in
amdgpu_resume_kms, and we already know the GPU is in working order, we
need to prevent the RPM helpers from trying to run during the initial
connector reprobe on resume.
There's a couple of solutions I've explored for fixing this, but this
one by far seems to be the simplest and most reliable (plus I'm pretty
sure that's what disable_depth is there for anyway).
Reproduction recipe:
- Get any laptop dual GPUs using PRIME
- Make sure runtime PM is enabled for amdgpu
- Boot the machine
- If the machine managed to boot without hanging, switch out of X to
another VT. This should definitely cause X to hang infinitely.
Cc: stable@vger.kernel.org
Signed-off-by: Lyude <cpaul@redhat.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 6e92008..46c1fee 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1841,7 +1841,19 @@ int amdgpu_resume_kms(struct drm_device *dev, bool resume, bool fbcon)
}
drm_kms_helper_poll_enable(dev);
+
+ /*
+ * Most of the connector probing functions try to acquire runtime pm
+ * refs to ensure that the GPU is powered on when connector polling is
+ * performed. Since we're calling this from a runtime PM callback,
+ * trying to acquire rpm refs will cause us to deadlock.
+ *
+ * Since we're guaranteed to be holding the rpm lock, it's safe to
+ * temporarily disable the rpm helpers so this doesn't deadlock us.
+ */
+ dev->dev->power.disable_depth++;
drm_helper_hpd_irq_event(dev);
+ dev->dev->power.disable_depth--;
if (fbcon) {
amdgpu_fbdev_set_suspend(adev, 0);

24
drm-i915-hush-check-crtc-state.patch
View File

@ -1,4 +1,4 @@
From 02f47b49ab1cdbe62ceb71b658e2c469799ae368 Mon Sep 17 00:00:00 2001
From 5550f20b5f9becb485fb3a67bf0193025d40bc6f Mon Sep 17 00:00:00 2001
From: Adam Jackson <ajax@redhat.com>
Date: Wed, 13 Nov 2013 10:17:24 -0500
Subject: [PATCH] drm/i915: hush check crtc state
@ -15,18 +15,18 @@ Upstream-status: http://lists.freedesktop.org/archives/intel-gfx/2013-November/0
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ca9278be49f7..308ac0539a87 100644
index 46f9be3ad5a2..ad2e62e4cdba 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12688,7 +12688,7 @@ check_crtc_state(struct drm_device *dev, struct drm_atomic_state *old_state)
sw_config = to_intel_crtc_state(crtc->state);
if (!intel_pipe_config_compare(dev, sw_config,
pipe_config, false)) {
- I915_STATE_WARN(1, "pipe state doesn't match!\n");
+ DRM_DEBUG_KMS("pipe state doesn't match!\n");
intel_dump_pipe_config(intel_crtc, pipe_config,
"[hw state]");
intel_dump_pipe_config(intel_crtc, sw_config,
@@ -12970,7 +12970,7 @@ verify_crtc_state(struct drm_crtc *crtc,
sw_config = to_intel_crtc_state(crtc->state);
if (!intel_pipe_config_compare(dev, sw_config,
pipe_config, false)) {
- I915_STATE_WARN(1, "pipe state doesn't match!\n");
+ DRM_DEBUG_KMS("pipe state doesn't match!\n");
intel_dump_pipe_config(intel_crtc, pipe_config,
"[hw state]");
intel_dump_pipe_config(intel_crtc, sw_config,
--
2.4.3
2.5.5

230
drm-i915-skl-Add-support-for-the-SAGV-fix-underrun-hangs.patch Normal file
View File

@ -0,0 +1,230 @@
From 5fc9d375bac02e054fcaaf14a06bebc6c7118008 Mon Sep 17 00:00:00 2001
From: "cpaul@redhat.com" <cpaul@redhat.com>
Date: Tue, 12 Jul 2016 13:36:03 -0400
Subject: [PATCH] drm/i915/skl: Add support for the SAGV, fix underrun hangs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Since the watermark calculations for Skylake are still broken, we're apt
to hitting underruns very easily under multi-monitor configurations.
While it would be lovely if this was fixed, it's not. Another problem
that's been coming from this however, is the mysterious issue of
underruns causing full system hangs. An easy way to reproduce this with
a skylake system:
- Get a laptop with a skylake GPU, and hook up two external monitors to
it
- Move the cursor from the built-in LCD to one of the external displays
as quickly as you can
- You'll get a few pipe underruns, and eventually the entire system will
just freeze.
After doing a lot of investigation and reading through the bspec, I
found the existence of the SAGV, which is responsible for adjusting the
system agent voltage and clock frequencies depending on how much power
we need. According to the bspec:
"The display engine access to system memory is blocked during the
adjustment time. SAGV defaults to enabled. Software must use the
GT-driver pcode mailbox to disable SAGV when the display engine is not
able to tolerate the blocking time."
The rest of the bspec goes on to explain that software can simply leave
the SAGV enabled, and disable it when we use interlaced pipes/have more
then one pipe active.
Sure enough, with this patchset the system hangs resulting from pipe
underruns on Skylake have completely vanished on my T460s. Additionally,
the bspec mentions turning off the SAGV with more then one pipe enabled
as a workaround for display underruns. While this patch doesn't entirely
fix that, it looks like it does improve the situation a little bit so
it's likely this is going to be required to make watermarks on Skylake
fully functional.
Changes since v2:
- Really apply minor style nitpicks to patch this time
Changes since v1:
- Added comments about this probably being one of the requirements to
fixing Skylake's watermark issues
- Minor style nitpicks from Matt Roper
- Disable these functions on Broxton, since it doesn't have an SAGV
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Lyude <cpaul@redhat.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_reg.h | 5 ++
drivers/gpu/drm/i915/intel_pm.c | 110 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 117 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 608f8e44f353..274b57ac1a91 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1942,6 +1942,8 @@ struct drm_i915_private {
struct i915_suspend_saved_registers regfile;
struct vlv_s0ix_state vlv_s0ix_state;
+ bool skl_sagv_enabled;
+
struct {
/*
* Raw watermark latency values:
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b407411e31ba..9472949e8442 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7094,6 +7094,11 @@ enum skl_disp_power_wells {
#define HSW_PCODE_DE_WRITE_FREQ_REQ 0x17
#define DISPLAY_IPS_CONTROL 0x19
#define HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL 0x1A
+#define GEN9_PCODE_SAGV_CONTROL 0x21
+#define GEN9_SAGV_DISABLE 0x0
+#define GEN9_SAGV_LOW_FREQ 0x1
+#define GEN9_SAGV_HIGH_FREQ 0x2
+#define GEN9_SAGV_DYNAMIC_FREQ 0x3
#define GEN6_PCODE_DATA _MMIO(0x138128)
#define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8
#define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f764d284e6a0..439a38b08760 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2847,6 +2847,109 @@ skl_wm_plane_id(const struct intel_plane *plane)
}
static void
+skl_sagv_get_hw_state(struct drm_i915_private *dev_priv)
+{
+ u32 temp;
+ int ret;
+
+ if (IS_BROXTON(dev_priv))
+ return;
+
+ mutex_lock(&dev_priv->rps.hw_lock);
+ ret = sandybridge_pcode_read(dev_priv, GEN9_PCODE_SAGV_CONTROL, &temp);
+ mutex_unlock(&dev_priv->rps.hw_lock);
+
+ if (!ret) {
+ dev_priv->skl_sagv_enabled = !!(temp & GEN9_SAGV_DYNAMIC_FREQ);
+ } else {
+ /*
+ * If for some reason we can't access the SAGV state, follow
+ * the bspec and assume it's enabled
+ */
+ DRM_ERROR("Failed to get SAGV state, assuming enabled\n");
+ dev_priv->skl_sagv_enabled = true;
+ }
+}
+
+/*
+ * SAGV dynamically adjusts the system agent voltage and clock frequencies
+ * depending on power and performance requirements. The display engine access
+ * to system memory is blocked during the adjustment time. Having this enabled
+ * in multi-pipe configurations can cause issues (such as underruns causing
+ * full system hangs), and the bspec also suggests that software disable it
+ * when more then one pipe is enabled.
+ */
+static int
+skl_enable_sagv(struct drm_i915_private *dev_priv)
+{
+ int ret;
+
+ if (IS_BROXTON(dev_priv))
+ return 0;
+ if (dev_priv->skl_sagv_enabled)
+ return 0;
+
+ mutex_lock(&dev_priv->rps.hw_lock);
+ DRM_DEBUG_KMS("Enabling the SAGV\n");
+
+ ret = sandybridge_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL,
+ GEN9_SAGV_DYNAMIC_FREQ);
+ if (!ret)
+ dev_priv->skl_sagv_enabled = true;
+ else
+ DRM_ERROR("Failed to enable the SAGV\n");
+
+ /* We don't need to wait for SAGV when enabling */
+ mutex_unlock(&dev_priv->rps.hw_lock);
+ return ret;
+}
+
+static int
+skl_disable_sagv(struct drm_i915_private *dev_priv)
+{
+ int ret = 0;
+ unsigned long timeout;
+ u32 temp;
+
+ if (IS_BROXTON(dev_priv))
+ return 0;
+ if (!dev_priv->skl_sagv_enabled)
+ return 0;
+
+ mutex_lock(&dev_priv->rps.hw_lock);
+ DRM_DEBUG_KMS("Disabling the SAGV\n");
+
+ /* bspec says to keep retrying for at least 1 ms */
+ timeout = jiffies + msecs_to_jiffies(1);
+ do {
+ ret = sandybridge_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL,
+ GEN9_SAGV_DISABLE);
+ if (ret) {
+ DRM_ERROR("Failed to disable the SAGV\n");
+ goto out;
+ }
+
+ ret = sandybridge_pcode_read(dev_priv, GEN9_PCODE_SAGV_CONTROL,
+ &temp);
+ if (ret) {
+ DRM_ERROR("Failed to check the status of the SAGV\n");
+ goto out;
+ }
+ } while (!(temp & 0x1) && jiffies < timeout);
+
+ if (temp & 0x1) {
+ dev_priv->skl_sagv_enabled = false;
+ } else {
+ ret = -1;
+ DRM_ERROR("Request to disable SAGV timed out\n");
+ }
+
+out:
+ mutex_unlock(&dev_priv->rps.hw_lock);
+ return ret;
+}
+
+static void
skl_ddb_get_pipe_allocation_limits(struct drm_device *dev,
const struct intel_crtc_state *cstate,
struct skl_ddb_entry *alloc, /* out */
@@ -3525,6 +3628,11 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv,
struct drm_device *dev = dev_priv->dev;
struct intel_crtc *crtc;
+ if (dev_priv->active_crtcs == 1)
+ skl_enable_sagv(dev_priv);
+ else
+ skl_disable_sagv(dev_priv);
+
for_each_intel_crtc(dev, crtc) {
int i, level, max_level = ilk_wm_max_level(dev);
enum pipe pipe = crtc->pipe;
@@ -4072,6 +4180,8 @@ void skl_wm_get_hw_state(struct drm_device *dev)
skl_plane_relative_data_rate(cstate, pstate, 1);
}
}
+
+ skl_sagv_get_hw_state(dev_priv);
}
static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc)
--
2.7.4

367
geekbox-v4-device-tree-support.patch
View File

@ -1,26 +1,24 @@
From 4d321bf15d2d5e5b1b674f2a26a1c5202090a800 Mon Sep 17 00:00:00 2001
From 277aa4c25655e8f746f02879d26298772244958a Mon Sep 17 00:00:00 2001
From: Peter Robinson <pbrobinson@gmail.com>
Date: Thu, 17 Mar 2016 15:19:04 +0000
Subject: [PATCH] geekbox v4 patchset
---
Documentation/devicetree/bindings/arm/rockchip.txt | 9 +
arch/arm64/boot/dts/rockchip/Makefile | 2 +
arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi | 2 +-
.../dts/rockchip/rk3368-geekbox-landingship.dts | 57 ++++
arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts | 319 +++++++++++++++++++++
arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 2 +-
6 files changed, 389 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/arm/rockchip.txt | 9 ++++
arch/arm64/boot/dts/rockchip/Makefile | 1 +
arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi | 2 +-
.../dts/rockchip/rk3368-geekbox-landingship.dts | 57 ++++++++++++++++++++++
arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 2 +-
5 files changed, 69 insertions(+), 2 deletions(-)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-geekbox-landingship.dts
create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index 078c14f..ae84f4e 100644
index 715d960..7cfadac 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -87,6 +87,15 @@ Rockchip platforms device tree bindings
"google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
"google,veyron-speedy", "google,veyron", "rockchip,rk3288";
@@ -95,6 +95,15 @@ Rockchip platforms device tree bindings
Required root node properties:
- compatible = "mqmaker,miqi", "rockchip,rk3288";
+- GeekBuying GeekBox:
+ Required root node properties:
@ -35,21 +33,21 @@ index 078c14f..ae84f4e 100644
Required root node properties:
- compatible = "rockchip,rk3368-evb-act8846", "rockchip,rk3368";
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index e3f0b5f..201bcd9 100644
index 7037a16..e002ebe 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -1,4 +1,6 @@
@@ -1,5 +1,6 @@
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox-landingship.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
always := $(dtb-y)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
index 8c219cc..e4ceb53 100644
index fff8b19..bd4f2cf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
@@ -48,7 +48,7 @@
@@ -49,7 +49,7 @@
stdout-path = "serial2:115200n8";
};
@ -121,336 +119,11 @@ index 0000000..a28ace9
+&i2c2 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
new file mode 100644
index 0000000..46cdddf
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3368-geekbox.dts
@@ -0,0 +1,319 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "rk3368.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "GeekBox";
+ compatible = "geekbuying,geekbox", "rockchip,rk3368";
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>;
+ };
+
+ ext_gmac: gmac-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "ext_gmac";
+ #clock-cells = <0>;
+ };
+
+ ir: ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_int>;
+ };
+
+ keys: gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_key>;
+
+ power {
+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ label = "GPIO Power";
+ linux,code = <KEY_POWER>;
+ wakeup-source;
+ };
+ };
+
+ leds: gpio-leds {
+ compatible = "gpio-leds";
+
+ blue {
+ gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
+ label = "geekbox:blue:led";
+ default-state = "on";
+ };
+
+ red {
+ gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+ label = "geekbox:red:led";
+ default-state = "off";
+ };
+ };
+
+ vcc_sys: vcc-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&emmc {
+ status = "okay";
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ clock-frequency = <150000000>;
+ disable-wp;
+ keep-power-in-suspend;
+ non-removable;
+ num-slots = <1>;
+ vmmc-supply = <&vcc_io>;
+ vqmmc-supply = <&vcc18_flash>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
+};
+
+&gmac {
+ status = "okay";
+ phy-supply = <&vcc_lan>;
+ phy-mode = "rgmii";
+ clock_in_out = "input";
+ assigned-clocks = <&cru SCLK_MAC>;
+ assigned-clock-parents = <&ext_gmac>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ tx_delay = <0x30>;
+ rx_delay = <0x10>;
+};
+
+&i2c0 {
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int>, <&pmic_sleep>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+ rockchip,system-power-controller;
+ vcc1-supply = <&vcc_sys>;
+ vcc2-supply = <&vcc_sys>;
+ vcc3-supply = <&vcc_sys>;
+ vcc4-supply = <&vcc_sys>;
+ vcc6-supply = <&vcc_sys>;
+ vcc7-supply = <&vcc_sys>;
+ vcc8-supply = <&vcc_io>;
+ vcc9-supply = <&vcc_sys>;
+ vcc10-supply = <&vcc_sys>;
+ vcc11-supply = <&vcc_sys>;
+ vcc12-supply = <&vcc_io>;
+ clock-output-names = "xin32k", "rk808-clkout2";
+ #clock-cells = <1>;
+
+ regulators {
+ vdd_cpu: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_cpu";
+ };
+
+ vdd_log: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd_log";
+ };
+
+ vcc_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_ddr";
+ };
+
+ vcc_io: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_io";
+ };
+
+ vcc18_flash: LDO_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_flash";
+ };
+
+ vcc33_lcd: LDO_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33_lcd";
+ };
+
+ vdd_10: LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-name = "vdd_10";
+ };
+
+ vcca_18: LDO_REG4 {
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcca_18";
+ };
+
+ vccio_sd: LDO_REG5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vccio_sd";
+ };
+
+ vdd10_lcd: LDO_REG6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ regulator-name = "vdd10_lcd";
+ };
+
+ vcc_18: LDO_REG7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_18";
+ };
+
+ vcc18_lcd: LDO_REG8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18_lcd";
+ };
+
+ vcc_sd: SWITCH_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_sd";
+ };
+
+ vcc_lan: SWITCH_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc_lan";
+ };
+ };
+ };
+};
+
+&pinctrl {
+ ir {
+ ir_int: ir-int {
+ rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ keys {
+ pwr_key: pwr-key {
+ rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pmic {
+ pmic_sleep: pmic-sleep {
+ rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+ };
+
+ pmic_int: pmic-int {
+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&tsadc {
+ status = "okay";
+ rockchip,hw-tshut-mode = <0>; /* CRU */
+ rockchip,hw-tshut-polarity = <1>; /* high */
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_otg {
+ status = "okay";
+};
+
+&wdt {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
index 104cbee..9548129 100644
index b56b720..5ea68c4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
@@ -51,7 +51,7 @@
@@ -52,7 +52,7 @@
stdout-path = "serial2:115200n8";
};
@ -460,5 +133,5 @@ index 104cbee..9548129 100644
reg = <0x0 0x0 0x0 0x40000000>;
};
--
2.5.0
2.5.5

66
kernel.spec
View File

@ -48,13 +48,13 @@ Summary: The Linux kernel
# base_sublevel is the kernel version we're starting with and patching
# on top of -- for example, 3.1-rc7-git1 starts with a 3.0 base,
# which yields a base_sublevel of 0.
%define base_sublevel 6
%define base_sublevel 7
## If this is a released kernel ##
%if 0%{?released_kernel}
# Do we have a -stable update to apply?
%define stable_update 3
%define stable_update 0
# Set rpm version accordingly
%if 0%{?stable_update}
%define stablerev %{stable_update}
@ -371,7 +371,7 @@ Requires: kernel-modules-uname-r = %{KVERREL}%{?variant}
# List the packages used during the kernel build
#
BuildRequires: kmod, patch, bash, sh-utils, tar, git
BuildRequires: bzip2, xz, findutils, gzip, m4, perl, perl-Carp, make, diffutils, gawk
BuildRequires: bzip2, xz, findutils, gzip, m4, perl, perl-Carp, perl-devel, perl-generators, make, diffutils, gawk
BuildRequires: gcc, binutils, redhat-rpm-config, hmaccalc
BuildRequires: net-tools, hostname, bc
%if %{with_sparse}
@ -499,13 +499,15 @@ Source5005: kbuild-AFTER_LINK.patch
Patch420: arm64-avoid-needing-console-to-enable-serial-console.patch
Patch421: arm64-acpi-drop-expert-patch.patch
# http://www.spinics.net/lists/arm-kernel/msg490981.html
Patch422: geekbox-v4-device-tree-support.patch
# http://www.spinics.net/lists/arm-kernel/msg483898.html
Patch423: Initial-AllWinner-A64-and-PINE64-support.patch
# This has major conflicts and needs to be rebased
# Patch423: Initial-AllWinner-A64-and-PINE64-support.patch
Patch424: arm64-pcie-acpi.patch
Patch425: arm64-pcie-quirks-xgene.patch
# http://www.spinics.net/lists/linux-tegra/msg26029.html
Patch426: usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch
@ -513,13 +515,10 @@ Patch426: usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch
# http://patchwork.ozlabs.org/patch/587554/
Patch430: ARM-tegra-usb-no-reset.patch
# http://www.spinics.net/lists/linux-tegra/msg25152.html
Patch431: Fix-tegra-to-use-stdout-path-for-serial-console.patch
Patch431: bcm283x-upstream-fixes.patch
Patch432: arm-i.MX6-Utilite-device-dtb.patch
Patch433: bcm283x-upstream-fixes.patch
Patch460: lib-cpumask-Make-CPUMASK_OFFSTACK-usable-without-deb.patch
Patch466: input-kill-stupid-messages.patch
@ -556,8 +555,6 @@ Patch482: Add-option-to-automatically-enforce-module-signature.patch
Patch483: efi-Disable-secure-boot-if-shim-is-in-insecure-mode.patch
Patch484: efi-Make-EFI_SECURE_BOOT_SIG_ENFORCE-depend-on-EFI.patch
Patch485: efi-Add-EFI_SECURE_BOOT-bit.patch
Patch486: hibernate-Disable-in-a-signed-modules-environment.patch
@ -566,6 +563,9 @@ Patch487: Add-EFI-signature-data-types.patch
Patch488: Add-an-EFI-signature-blob-parser-and-key-loader.patch
# This doesn't apply. It seems like it could be replaced by
# https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=5ac7eace2d00eab5ae0e9fdee63e38aee6001f7c
# which has an explicit line about blacklisting
Patch489: KEYS-Add-a-system-blacklist-keyring.patch
Patch490: MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch
@ -598,31 +598,11 @@ Patch502: firmware-Drop-WARN-from-usermodehelper_read_trylock-.patch
Patch508: kexec-uefi-copy-secure_boot-flag-in-boot-params.patch
#rhbz 1286293
Patch571: ideapad-laptop-Add-Lenovo-ideapad-Y700-17ISK-to-no_h.patch
#Required for some persistent memory options
Patch641: disable-CONFIG_EXPERT-for-ZONE_DMA.patch
#CVE-2016-4482 rhbz 1332931 1332932
Patch706: USB-usbfs-fix-potential-infoleak-in-devio.patch
#CVE-2016-4569 rhbz 1334643 1334645
Patch714: ALSA-timer-Fix-leak-in-SNDRV_TIMER_IOCTL_PARAMS.patch
Patch715: ALSA-timer-Fix-leak-in-events-via-snd_timer_user_cca.patch
Patch716: ALSA-timer-Fix-leak-in-events-via-snd_timer_user_tin.patch
#CVE-2016-4440 rhbz 1337806 1337807
Patch719: kvm-vmx-more-complete-state-update-on-APICv-on-off.patch
#CVE-2016-5243 rhbz 1343338 1343335
Patch721: tipc-fix-an-infoleak-in-tipc_nl_compat_link_dump.patch
#CVE-2016-5244 rhbz 1343338 1343337
Patch722: rds-fix-an-infoleak-in-rds_inc_info_copy.txt
#CVE-2016-4470 rhbz 1341716 1346626
Patch727: KEYS-potential-uninitialized-variable.patch
#CVE-2016-3134 rhbz 1317383 1317384
Patch665: netfilter-x_tables-deal-with-bogus-nextoffset-values.patch
#rhbz 1338025
Patch728: hp-wmi-fix-wifi-cannot-be-hard-unblock.patch
@ -646,12 +626,16 @@ Patch815: 0015-drm-i915-gen9-Calculate-watermarks-during-atomic-che.patch
Patch816: 0016-drm-i915-gen9-Reject-display-updates-that-exceed-wm-.patch
Patch817: 0017-drm-i915-Remove-wm_config-from-dev_priv-intel_atomic.patch
#other drm/kms fixes (most Cc-ed stable)
Patch821: 0001-drm-mgag200-Black-screen-fix-for-G200e-rev-4.patch
Patch822: 0002-drm-nouveau-fbcon-fix-out-of-bounds-memory-accesses.patch
Patch823: 0003-drm-nouveau-disp-sor-gf119-both-links-use-the-same-t.patch
Patch824: 0004-drm-nouveau-disp-sor-gm107-training-pattern-register.patch
Patch825: 0005-i915-fbc-Disable-on-HSW-by-default-for-now.patch
#Workaround for glibc update
Patch835: 0001-Work-around-for-addition-of-metag-def-but-not-reloca.patch
# https://lists.fedoraproject.org/archives/list/kernel@lists.fedoraproject.org/message/A4YCP7OGMX6JLFT5V44H57GOMAQLC3M4/
Patch837: drm-amdgpu-Disable-RPM-helpers-while-reprobing.patch
Patch838: drm-i915-skl-Add-support-for-the-SAGV-fix-underrun-hangs.patch
Patch839: Revert-ALSA-hda-remove-controller-dependency-on-i915.patch
#CVE-2016-6136 rhbz 1353533 1353534
Patch841: audit-fix-a-double-fetch-in-audit_log_single_execve_arg.patch
# END OF PATCH DEFINITIONS
@ -2094,7 +2078,7 @@ fi
%ifarch %{cpupowerarchs}
%files -n kernel-tools-libs
%{_libdir}/libcpupower.so.0
%{_libdir}/libcpupower.so.0.0.0
%{_libdir}/libcpupower.so.0.0.1
%files -n kernel-tools-libs-devel
%{_libdir}/libcpupower.so

109
netfilter-x_tables-deal-with-bogus-nextoffset-values.patch Normal file
View File

@ -0,0 +1,109 @@
From 2b32a7d82223d76ace432305b18c5816cadff878 Mon Sep 17 00:00:00 2001
From: Florian Westphal <fw () strlen ! de>
Date: Thu, 10 Mar 2016 00:56:02 -0800
Subject: [PATCH] netfilter: x_tables: deal with bogus nextoffset values
Ben Hawkes says:
In the mark_source_chains function (net/ipv4/netfilter/ip_tables.c) it
is possible for a user-supplied ipt_entry structure to have a large
next_offset field. This field is not bounds checked prior to writing a
counter value at the supplied offset.
Problem is that xt_entry_foreach() macro stops iterating once e->next_offset
is out of bounds, assuming this is the last entry.
With malformed data thats not necessarily the case so we can
write outside of allocated area later as we might not have walked the
entire blob.
Fix this by simplifying mark_source_chains -- it already has to check
if nextoff is in range to catch invalid jumps, so just do the check
when we move to a next entry as well.
Signed-off-by: Florian Westphal <fw@strlen.de>
---
net/ipv4/netfilter/arp_tables.c | 8 ++++++++
net/ipv4/netfilter/ip_tables.c | 8 ++++++++
net/ipv6/netfilter/ip6_tables.c | 6 ++++++
3 files changed, 22 insertions(+)
diff --git a/net/ipv4/netfilter/arp_tables.c b/net/ipv4/netfilter/arp_tables.c
index 2033f92..a9b6c76 100644
--- a/net/ipv4/netfilter/arp_tables.c
+++ b/net/ipv4/netfilter/arp_tables.c
@@ -376,6 +376,10 @@ static int mark_source_chains(const struct xt_table_info *newinfo,
/* Move along one */
size = e->next_offset;
+
+ if (pos + size > newinfo->size - sizeof(*e))
+ return 0;
+
e = (struct arpt_entry *)
(entry0 + pos + size);
if (pos + size >= newinfo->size)
@@ -399,6 +403,10 @@ static int mark_source_chains(const struct xt_table_info *newinfo,
if (newpos >= newinfo->size)
return 0;
}
+
+ if (newpos > newinfo->size - sizeof(*e))
+ return 0;
+
e = (struct arpt_entry *)
(entry0 + newpos);
e->counters.pcnt = pos;
diff --git a/net/ipv4/netfilter/ip_tables.c b/net/ipv4/netfilter/ip_tables.c
index 54906e0..7530ecd 100644
--- a/net/ipv4/netfilter/ip_tables.c
+++ b/net/ipv4/netfilter/ip_tables.c
@@ -447,6 +447,10 @@ mark_source_chains(const struct xt_table_info *newinfo,
/* Move along one */
size = e->next_offset;
+
+ if (pos + size > newinfo->size - sizeof(*e))
+ return 0;
+
e = (struct ipt_entry *)
(entry0 + pos + size);
if (pos + size >= newinfo->size)
@@ -470,6 +474,10 @@ mark_source_chains(const struct xt_table_info *newinfo,
if (newpos >= newinfo->size)
return 0;
}
+
+ if (newpos > newinfo->size - sizeof(*e))
+ return 0;
+
e = (struct ipt_entry *)
(entry0 + newpos);
e->counters.pcnt = pos;
diff --git a/net/ipv6/netfilter/ip6_tables.c b/net/ipv6/netfilter/ip6_tables.c
index 63e06c3..894da69 100644
--- a/net/ipv6/netfilter/ip6_tables.c
+++ b/net/ipv6/netfilter/ip6_tables.c
@@ -474,6 +474,8 @@ mark_source_chains(const struct xt_table_info *newinfo,
/* Move along one */
size = e->next_offset;
+ if (pos + size > newinfo->size - sizeof(*e))
+ return 0;
e = (struct ip6t_entry *)
(entry0 + pos + size);
if (pos + size >= newinfo->size)
@@ -497,6 +499,10 @@ mark_source_chains(const struct xt_table_info *newinfo,
if (newpos >= newinfo->size)
return 0;
}
+
+ if (newpos > newinfo->size - sizeof(*e))
+ return 0;
+
e = (struct ip6t_entry *)
(entry0 + newpos);
e->counters.pcnt = pos;
--
2.5.5

5
sources
View File

@ -1,3 +1,2 @@
d2927020e24a76da4ab482a8bc3e9ef3 linux-4.6.tar.xz
fd23b14b9d474c3dfacb6e8ee82d3a51 perf-man-4.6.tar.gz
0d59cb81eb7c0daf0f5019deda65af90 patch-4.6.3.xz
5276563eb1f39a048e4a8a887408c031 linux-4.7.tar.xz
fe259c02c75eec61d1aa4b1211f3c853 perf-man-4.7.tar.gz