Rebase 0002-SiFive-Unleashed-CPUFreq.patch

Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
This commit is contained in:
David Abdurachmanov 2020-03-21 18:38:59 +02:00
parent 544a6b0067
commit dfc1773495
Signed by: davidlt
GPG Key ID: 8B7F1DA0E2C9FDBB
1 changed files with 13 additions and 13 deletions

View File

@ -1,6 +1,6 @@
From 8120ac611ab6881d6fcf31c1df02d77125434485 Mon Sep 17 00:00:00 2001
From 15a265961efbd382dee76c84bae098b9ead59bab Mon Sep 17 00:00:00 2001
From: Fedora Kernel Team <kernel-team@fedoraproject.org>
Date: Mon, 6 Jan 2020 16:47:56 +0000
Date: Sat, 21 Mar 2020 16:37:24 +0000
Subject: [PATCH] SiFive Unleashed CPUFreq
---
@ -11,10 +11,10 @@ Subject: [PATCH] SiFive Unleashed CPUFreq
4 files changed, 52 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index a31169b..06ad604 100644
index 1a3b5a5..3896246 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -355,6 +355,14 @@ endchoice
@@ -357,6 +357,14 @@ endchoice
endmenu
@ -30,7 +30,7 @@ index a31169b..06ad604 100644
source "kernel/power/Kconfig"
diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
index a2e3d54..a380bc7 100644
index 7db8610..023a8fd 100644
--- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
+++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
@@ -30,6 +30,7 @@ cpu0: cpu@0 {
@ -74,12 +74,12 @@ index a2e3d54..a380bc7 100644
cpu4_intc: interrupt-controller {
#interrupt-cells = <1>;
diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
index 88cfcb9..e1724e3 100644
index 4a2729f..6dd6fa4 100644
--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
@@ -41,6 +41,40 @@ rtcclk: rtcclk {
clock-frequency = <RTCCLK_FREQ>;
clock-output-names = "rtcclk";
@@ -46,6 +46,40 @@ gpio-restart {
compatible = "gpio-restart";
gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
};
+
+ fu540_c000_opp_table: opp-table {
@ -119,12 +119,12 @@ index 88cfcb9..e1724e3 100644
&uart0 {
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index e2ff95c..a2fb392 100644
index c8f0842..6c47c7c 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -16,6 +16,11 @@ CONFIG_EXPERT=y
CONFIG_BPF_SYSCALL=y
@@ -17,6 +17,11 @@ CONFIG_BPF_SYSCALL=y
CONFIG_SOC_SIFIVE=y
CONFIG_SOC_VIRT=y
CONFIG_SMP=y
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_FREQ=y
@ -135,5 +135,5 @@ index e2ff95c..a2fb392 100644
CONFIG_MODULE_UNLOAD=y
CONFIG_NET=y
--
2.24.1
2.26.0.rc2