Minor ARM config cleanups, new bcm283x mmc driver (enabling us to get wifi on RPi3)
This commit is contained in:
parent
aca291d93b
commit
d85c975120
@ -1 +0,0 @@
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# CONFIG_MVPP2 is not set
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1
baseconfig/arm/CONFIG_MMC_BCM2835
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1
baseconfig/arm/CONFIG_MMC_BCM2835
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@ -0,0 +1 @@
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CONFIG_MMC_BCM2835=m
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1
baseconfig/arm/arm64/CONFIG_QCOM_QDF2400_ERRATUM_0065
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1
baseconfig/arm/arm64/CONFIG_QCOM_QDF2400_ERRATUM_0065
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@ -0,0 +1 @@
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CONFIG_QCOM_QDF2400_ERRATUM_0065=y
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1893
bcm283x-mmc-bcm2835.patch
Normal file
1893
bcm283x-mmc-bcm2835.patch
Normal file
File diff suppressed because it is too large
Load Diff
@ -3004,6 +3004,7 @@ CONFIG_MMA7660=m
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# CONFIG_MMA9553 is not set
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# CONFIG_MMA9553 is not set
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# CONFIG_MMC35240 is not set
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# CONFIG_MMC35240 is not set
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CONFIG_MMC_ARMMMCI=m
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CONFIG_MMC_ARMMMCI=m
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CONFIG_MMC_BCM2835=m
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CONFIG_MMC_BLOCK_BOUNCE=y
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CONFIG_MMC_BLOCK_BOUNCE=y
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CONFIG_MMC_BLOCK=m
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CONFIG_MMC_BLOCK=m
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CONFIG_MMC_BLOCK_MINORS=8
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CONFIG_MMC_BLOCK_MINORS=8
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@ -3186,7 +3187,7 @@ CONFIG_MVEBU_MBUS=y
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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CONFIG_MVNETA_BM_ENABLE=m
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CONFIG_MVNETA_BM_ENABLE=m
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CONFIG_MVNETA=m
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CONFIG_MVNETA=m
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# CONFIG_MVPP2 is not set
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CONFIG_MVPP2=m
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# CONFIG_MV_XOR_V2 is not set
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# CONFIG_MV_XOR_V2 is not set
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CONFIG_MV_XOR=y
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CONFIG_MV_XOR=y
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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@ -4081,6 +4082,7 @@ CONFIG_QCOM_HIDMA_MGMT=m
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CONFIG_QCOM_IRQ_COMBINER=y
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CONFIG_QCOM_IRQ_COMBINER=y
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CONFIG_QCOM_L2_PMU=y
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CONFIG_QCOM_L2_PMU=y
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# CONFIG_QCOM_Q6V5_PIL is not set
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# CONFIG_QCOM_Q6V5_PIL is not set
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CONFIG_QCOM_QDF2400_ERRATUM_0065=y
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CONFIG_QCOM_QFPROM=m
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CONFIG_QCOM_QFPROM=m
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CONFIG_QCOM_SMD=m
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CONFIG_QCOM_SMD=m
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CONFIG_QCOM_SMD_RPM=m
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CONFIG_QCOM_SMD_RPM=m
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@ -2984,6 +2984,7 @@ CONFIG_MMA7660=m
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# CONFIG_MMA9553 is not set
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# CONFIG_MMA9553 is not set
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# CONFIG_MMC35240 is not set
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# CONFIG_MMC35240 is not set
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CONFIG_MMC_ARMMMCI=m
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CONFIG_MMC_ARMMMCI=m
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CONFIG_MMC_BCM2835=m
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CONFIG_MMC_BLOCK_BOUNCE=y
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CONFIG_MMC_BLOCK_BOUNCE=y
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CONFIG_MMC_BLOCK=m
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CONFIG_MMC_BLOCK=m
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CONFIG_MMC_BLOCK_MINORS=8
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CONFIG_MMC_BLOCK_MINORS=8
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@ -3165,7 +3166,7 @@ CONFIG_MVEBU_MBUS=y
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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CONFIG_MVNETA_BM_ENABLE=m
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CONFIG_MVNETA_BM_ENABLE=m
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CONFIG_MVNETA=m
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CONFIG_MVNETA=m
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# CONFIG_MVPP2 is not set
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CONFIG_MVPP2=m
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# CONFIG_MV_XOR_V2 is not set
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# CONFIG_MV_XOR_V2 is not set
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CONFIG_MV_XOR=y
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CONFIG_MV_XOR=y
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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@ -4059,6 +4060,7 @@ CONFIG_QCOM_HIDMA_MGMT=m
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CONFIG_QCOM_IRQ_COMBINER=y
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CONFIG_QCOM_IRQ_COMBINER=y
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CONFIG_QCOM_L2_PMU=y
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CONFIG_QCOM_L2_PMU=y
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# CONFIG_QCOM_Q6V5_PIL is not set
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# CONFIG_QCOM_Q6V5_PIL is not set
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CONFIG_QCOM_QDF2400_ERRATUM_0065=y
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CONFIG_QCOM_QFPROM=m
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CONFIG_QCOM_QFPROM=m
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CONFIG_QCOM_SMD=m
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CONFIG_QCOM_SMD=m
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CONFIG_QCOM_SMD_RPM=m
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CONFIG_QCOM_SMD_RPM=m
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@ -3227,6 +3227,7 @@ CONFIG_MMA7660=m
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# CONFIG_MMA9553 is not set
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# CONFIG_MMA9553 is not set
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# CONFIG_MMC35240 is not set
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# CONFIG_MMC35240 is not set
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CONFIG_MMC_ARMMMCI=m
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CONFIG_MMC_ARMMMCI=m
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CONFIG_MMC_BCM2835=m
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CONFIG_MMC_BLOCK_BOUNCE=y
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CONFIG_MMC_BLOCK_BOUNCE=y
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CONFIG_MMC_BLOCK=m
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CONFIG_MMC_BLOCK=m
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CONFIG_MMC_BLOCK_MINORS=8
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CONFIG_MMC_BLOCK_MINORS=8
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@ -3092,6 +3092,7 @@ CONFIG_MMA7660=m
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# CONFIG_MMA9553 is not set
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# CONFIG_MMA9553 is not set
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# CONFIG_MMC35240 is not set
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# CONFIG_MMC35240 is not set
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CONFIG_MMC_ARMMMCI=m
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CONFIG_MMC_ARMMMCI=m
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CONFIG_MMC_BCM2835=m
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CONFIG_MMC_BLOCK_BOUNCE=y
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CONFIG_MMC_BLOCK_BOUNCE=y
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CONFIG_MMC_BLOCK=m
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CONFIG_MMC_BLOCK=m
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CONFIG_MMC_BLOCK_MINORS=8
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CONFIG_MMC_BLOCK_MINORS=8
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@ -3072,6 +3072,7 @@ CONFIG_MMA7660=m
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# CONFIG_MMA9553 is not set
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# CONFIG_MMA9553 is not set
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# CONFIG_MMC35240 is not set
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# CONFIG_MMC35240 is not set
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CONFIG_MMC_ARMMMCI=m
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CONFIG_MMC_ARMMMCI=m
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CONFIG_MMC_BCM2835=m
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CONFIG_MMC_BLOCK_BOUNCE=y
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CONFIG_MMC_BLOCK_BOUNCE=y
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CONFIG_MMC_BLOCK=m
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CONFIG_MMC_BLOCK=m
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CONFIG_MMC_BLOCK_MINORS=8
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CONFIG_MMC_BLOCK_MINORS=8
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@ -3207,6 +3207,7 @@ CONFIG_MMA7660=m
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# CONFIG_MMA9553 is not set
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# CONFIG_MMA9553 is not set
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# CONFIG_MMC35240 is not set
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# CONFIG_MMC35240 is not set
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CONFIG_MMC_ARMMMCI=m
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CONFIG_MMC_ARMMMCI=m
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CONFIG_MMC_BCM2835=m
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CONFIG_MMC_BLOCK_BOUNCE=y
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CONFIG_MMC_BLOCK_BOUNCE=y
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CONFIG_MMC_BLOCK=m
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CONFIG_MMC_BLOCK=m
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CONFIG_MMC_BLOCK_MINORS=8
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CONFIG_MMC_BLOCK_MINORS=8
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@ -3077,7 +3077,6 @@ CONFIG_MTRR_SANITIZER=y
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CONFIG_MTRR=y
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CONFIG_MTRR=y
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# CONFIG_MVIAC3_2 is not set
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# CONFIG_MVIAC3_2 is not set
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -3097,7 +3097,6 @@ CONFIG_MTRR_SANITIZER=y
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CONFIG_MTRR=y
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CONFIG_MTRR=y
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# CONFIG_MVIAC3_2 is not set
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# CONFIG_MVIAC3_2 is not set
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -3097,7 +3097,6 @@ CONFIG_MTRR_SANITIZER=y
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CONFIG_MTRR=y
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CONFIG_MTRR=y
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# CONFIG_MVIAC3_2 is not set
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# CONFIG_MVIAC3_2 is not set
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -3077,7 +3077,6 @@ CONFIG_MTRR_SANITIZER=y
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CONFIG_MTRR=y
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CONFIG_MTRR=y
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# CONFIG_MVIAC3_2 is not set
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# CONFIG_MVIAC3_2 is not set
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -2951,7 +2951,6 @@ CONFIG_MTD_UBI_BEB_LIMIT=20
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -2929,7 +2929,6 @@ CONFIG_MTD_UBI_BEB_LIMIT=20
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -2896,7 +2896,6 @@ CONFIG_MTD_UBI_BEB_LIMIT=20
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -2874,7 +2874,6 @@ CONFIG_MTD_UBI_BEB_LIMIT=20
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -2895,7 +2895,6 @@ CONFIG_MTD_UBI_BEB_LIMIT=20
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -2873,7 +2873,6 @@ CONFIG_MTD_UBI_BEB_LIMIT=20
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -2828,7 +2828,6 @@ CONFIG_MTD_UBI_BEB_LIMIT=20
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -2806,7 +2806,6 @@ CONFIG_MTD_UBI_BEB_LIMIT=20
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI=m
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MTD_UBI_WL_THRESHOLD=4096
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -3121,7 +3121,6 @@ CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1
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CONFIG_MTRR_SANITIZER=y
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CONFIG_MTRR_SANITIZER=y
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CONFIG_MTRR=y
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CONFIG_MTRR=y
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -3101,7 +3101,6 @@ CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1
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CONFIG_MTRR_SANITIZER=y
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CONFIG_MTRR_SANITIZER=y
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CONFIG_MTRR=y
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CONFIG_MTRR=y
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CONFIG_MVMDIO=m
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CONFIG_MVMDIO=m
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# CONFIG_MVPP2 is not set
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CONFIG_MWAVE=m
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CONFIG_MWAVE=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX=m
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CONFIG_MWIFIEX_PCIE=m
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CONFIG_MWIFIEX_PCIE=m
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@ -530,6 +530,9 @@ Patch430: bcm2837-initial-support.patch
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# http://www.spinics.net/lists/dri-devel/msg132235.html
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# http://www.spinics.net/lists/dri-devel/msg132235.html
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Patch433: drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch
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Patch433: drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch
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# bcm283x mmc for wifi http://www.spinics.net/lists/arm-kernel/msg567077.html
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Patch434: bcm283x-mmc-bcm2835.patch
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# Upstream fixes for i2c/serial/ethernet MAC addresses
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# Upstream fixes for i2c/serial/ethernet MAC addresses
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Patch435: bcm283x-fixes.patch
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Patch435: bcm283x-fixes.patch
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@ -2166,6 +2169,8 @@ fi
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* Sun Mar 12 2017 Peter Robinson <pbrobinson@fedoraproject.org>
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* Sun Mar 12 2017 Peter Robinson <pbrobinson@fedoraproject.org>
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- Update kernel source location now ftp is retired
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- Update kernel source location now ftp is retired
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- Enable STi h407 SoC
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- Enable STi h407 SoC
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- Minor ARM config cleanups
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- bcm283x mmc driver improvements
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* Fri Mar 10 2017 Laura Abbott <labbott@fedoraproject.org> - 4.11.0-0.rc1.git3.1
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* Fri Mar 10 2017 Laura Abbott <labbott@fedoraproject.org> - 4.11.0-0.rc1.git3.1
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- Linux v4.11-rc1-136-gc1aa905
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- Linux v4.11-rc1-136-gc1aa905
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