- ARM updates for 3.16

- Cleanup some old removed options - Disable legacy USB OTG (using new configfs equivilents) - Upstream patch to fix display on qemu (VExpress A9)
2014-08-15 13:26:22 +01:00 · 2014-08-15 13:26:22 +01:00 · d7bf642034
parent 1c39e37061
commit d7bf642034
6 changed files with 516 additions and 50 deletions
--- a/arm-qemu-fixdisplay.patch
+++ b/arm-qemu-fixdisplay.patch
@ -0,0 +1,472 @@
+commit d10715be03bd8bad59ddc50236cb140c3bd73c7b
+Author: Pawel Moll <pawel.moll@arm.com>
+Date:   Tue Jun 24 12:55:11 2014 +0100
+
+    video: ARM CLCD: Add DT support
+    
+    This patch adds basic DT bindings for the PL11x CLCD cells
+    and make their fbdev driver use them.
+    
+    Signed-off-by: Pawel Moll <pawel.moll@arm.com>
+    Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
+
+diff --git a/Documentation/devicetree/bindings/video/arm,pl11x.txt b/Documentation/devicetree/bindings/video/arm,pl11x.txt
+new file mode 100644
+index 0000000..3e3039a
+--- /dev/null
+++ b/Documentation/devicetree/bindings/video/arm,pl11x.txt
+@@ -0,0 +1,109 @@
+* ARM PrimeCell Color LCD Controller PL110/PL111
+
+See also Documentation/devicetree/bindings/arm/primecell.txt
+
+Required properties:
+
+- compatible: must be one of:
+	"arm,pl110", "arm,primecell"
+	"arm,pl111", "arm,primecell"
+
+- reg: base address and size of the control registers block
+
+- interrupt-names: either the single entry "combined" representing a
+	combined interrupt output (CLCDINTR), or the four entries
+	"mbe", "vcomp", "lnbu", "fuf" representing the individual
+	CLCDMBEINTR, CLCDVCOMPINTR, CLCDLNBUINTR, CLCDFUFINTR interrupts
+
+- interrupts: contains an interrupt specifier for each entry in
+	interrupt-names
+
+- clock-names: should contain "clcdclk" and "apb_pclk"
+
+- clocks: contains phandle and clock specifier pairs for the entries
+	in the clock-names property. See
+	Documentation/devicetree/binding/clock/clock-bindings.txt
+
+Optional properties:
+
+- memory-region: phandle to a node describing memory (see
+	Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
+	to be used for the framebuffer; if not present, the framebuffer
+	may be located anywhere in the memory
+
+- max-memory-bandwidth: maximum bandwidth in bytes per second that the
+	cell's memory interface can handle; if not present, the memory
+	interface is fast enough to handle all possible video modes
+
+Required sub-nodes:
+
+- port: describes LCD panel signals, following the common binding
+	for video transmitter interfaces; see
+	Documentation/devicetree/bindings/media/video-interfaces.txt;
+	when it is a TFT panel, the port's endpoint must define the
+	following property:
+
+	- arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values,
+		defining the way CLD pads are wired up; first value
+		contains index of the "CLD" external pin (pad) used
+		as R0 (first bit of the red component), second value
+	        index of the pad used as G0, third value index of the
+		pad used as B0, see also "LCD panel signal multiplexing
+		details" paragraphs in the PL110/PL111 Technical
+		Reference Manuals; this implicitly defines available
+		color modes, for example:
+		- PL111 TFT 4:4:4 panel:
+			arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
+		- PL110 TFT (1:)5:5:5 panel:
+			arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
+		- PL111 TFT (1:)5:5:5 panel:
+			arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
+		- PL111 TFT 5:6:5 panel:
+			arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
+		- PL110 and PL111 TFT 8:8:8 panel:
+			arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
+		- PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:
+			arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
+
+
+Example:
+
+	clcd@10020000 {
+		compatible = "arm,pl111", "arm,primecell";
+		reg = <0x10020000 0x1000>;
+		interrupt-names = "combined";
+		interrupts = <0 44 4>;
+		clocks = <&oscclk1>, <&oscclk2>;
+		clock-names = "clcdclk", "apb_pclk";
+		max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */
+
+		port {
+			clcd_pads: endpoint {
+				remote-endpoint = <&clcd_panel>;
+				arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
+			};
+		};
+
+	};
+
+	panel {
+		compatible = "panel-dpi";
+
+		port {
+			clcd_panel: endpoint {
+				remote-endpoint = <&clcd_pads>;
+			};
+		};
+
+		panel-timing {
+			clock-frequency = <25175000>;
+			hactive = <640>;
+			hback-porch = <40>;
+			hfront-porch = <24>;
+			hsync-len = <96>;
+			vactive = <480>;
+			vback-porch = <32>;
+			vfront-porch = <11>;
+			vsync-len = <2>;
+		};
+	};
+diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
+index 4a7098f..6f451ad 100644
+--- a/drivers/video/fbdev/Kconfig
+++ b/drivers/video/fbdev/Kconfig
+@@ -280,6 +280,7 @@ config FB_ARMCLCD
+ 	select FB_CFB_FILLRECT
+ 	select FB_CFB_COPYAREA
+ 	select FB_CFB_IMAGEBLIT
+	select VIDEOMODE_HELPERS if OF
+ 	help
+ 	  This framebuffer device driver is for the ARM PrimeCell PL110
+ 	  Colour LCD controller.  ARM PrimeCells provide the building
+diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c
+index 14d6b37..23b3519 100644
+--- a/drivers/video/fbdev/amba-clcd.c
+++ b/drivers/video/fbdev/amba-clcd.c
+@@ -26,6 +26,13 @@
+ #include <linux/amba/clcd.h>
+ #include <linux/clk.h>
+ #include <linux/hardirq.h>
+#include <linux/dma-mapping.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_graph.h>
+#include <video/display_timing.h>
+#include <video/of_display_timing.h>
+#include <video/videomode.h>
+ 
+ #include <asm/sizes.h>
+ 
+@@ -543,6 +550,259 @@ static int clcdfb_register(struct clcd_fb *fb)
+ 	return ret;
+ }
+ 
+#ifdef CONFIG_OF
+static int clcdfb_of_get_dpi_panel_mode(struct device_node *node,
+		struct fb_videomode *mode)
+{
+	int err;
+	struct display_timing timing;
+	struct videomode video;
+
+	err = of_get_display_timing(node, "panel-timing", &timing);
+	if (err)
+		return err;
+
+	videomode_from_timing(&timing, &video);
+
+	err = fb_videomode_from_videomode(&video, mode);
+	if (err)
+		return err;
+
+	return 0;
+}
+
+static int clcdfb_snprintf_mode(char *buf, int size, struct fb_videomode *mode)
+{
+	return snprintf(buf, size, "%ux%u@%u", mode->xres, mode->yres,
+			mode->refresh);
+}
+
+static int clcdfb_of_get_mode(struct device *dev, struct device_node *endpoint,
+		struct fb_videomode *mode)
+{
+	int err;
+	struct device_node *panel;
+	char *name;
+	int len;
+
+	panel = of_graph_get_remote_port_parent(endpoint);
+	if (!panel)
+		return -ENODEV;
+
+	/* Only directly connected DPI panels supported for now */
+	if (of_device_is_compatible(panel, "panel-dpi"))
+		err = clcdfb_of_get_dpi_panel_mode(panel, mode);
+	else
+		err = -ENOENT;
+	if (err)
+		return err;
+
+	len = clcdfb_snprintf_mode(NULL, 0, mode);
+	name = devm_kzalloc(dev, len + 1, GFP_KERNEL);
+	clcdfb_snprintf_mode(name, len + 1, mode);
+	mode->name = name;
+
+	return 0;
+}
+
+static int clcdfb_of_init_tft_panel(struct clcd_fb *fb, u32 r0, u32 g0, u32 b0)
+{
+	static struct {
+		unsigned int part;
+		u32 r0, g0, b0;
+		u32 caps;
+	} panels[] = {
+		{ 0x110, 1,  7, 13, CLCD_CAP_5551 },
+		{ 0x110, 0,  8, 16, CLCD_CAP_888 },
+		{ 0x111, 4, 14, 20, CLCD_CAP_444 },
+		{ 0x111, 3, 11, 19, CLCD_CAP_444 | CLCD_CAP_5551 },
+		{ 0x111, 3, 10, 19, CLCD_CAP_444 | CLCD_CAP_5551 |
+				    CLCD_CAP_565 },
+		{ 0x111, 0,  8, 16, CLCD_CAP_444 | CLCD_CAP_5551 |
+				    CLCD_CAP_565 | CLCD_CAP_888 },
+	};
+	int i;
+
+	/* Bypass pixel clock divider, data output on the falling edge */
+	fb->panel->tim2 = TIM2_BCD | TIM2_IPC;
+
+	/* TFT display, vert. comp. interrupt at the start of the back porch */
+	fb->panel->cntl |= CNTL_LCDTFT | CNTL_LCDVCOMP(1);
+
+	fb->panel->caps = 0;
+
+	/* Match the setup with known variants */
+	for (i = 0; i < ARRAY_SIZE(panels) && !fb->panel->caps; i++) {
+		if (amba_part(fb->dev) != panels[i].part)
+			continue;
+		if (g0 != panels[i].g0)
+			continue;
+		if (r0 == panels[i].r0 && b0 == panels[i].b0)
+			fb->panel->caps = panels[i].caps & CLCD_CAP_RGB;
+		if (r0 == panels[i].b0 && b0 == panels[i].r0)
+			fb->panel->caps = panels[i].caps & CLCD_CAP_BGR;
+	}
+
+	return fb->panel->caps ? 0 : -EINVAL;
+}
+
+static int clcdfb_of_init_display(struct clcd_fb *fb)
+{
+	struct device_node *endpoint;
+	int err;
+	u32 max_bandwidth;
+	u32 tft_r0b0g0[3];
+
+	fb->panel = devm_kzalloc(&fb->dev->dev, sizeof(*fb->panel), GFP_KERNEL);
+	if (!fb->panel)
+		return -ENOMEM;
+
+	endpoint = of_graph_get_next_endpoint(fb->dev->dev.of_node, NULL);
+	if (!endpoint)
+		return -ENODEV;
+
+	err = clcdfb_of_get_mode(&fb->dev->dev, endpoint, &fb->panel->mode);
+	if (err)
+		return err;
+
+	err = of_property_read_u32(fb->dev->dev.of_node, "max-memory-bandwidth",
+			&max_bandwidth);
+	if (!err)
+		fb->panel->bpp = 8 * max_bandwidth / (fb->panel->mode.xres *
+				fb->panel->mode.yres * fb->panel->mode.refresh);
+	else
+		fb->panel->bpp = 32;
+
+#ifdef CONFIG_CPU_BIG_ENDIAN
+	fb->panel->cntl |= CNTL_BEBO;
+#endif
+	fb->panel->width = -1;
+	fb->panel->height = -1;
+
+	if (of_property_read_u32_array(endpoint,
+			"arm,pl11x,tft-r0g0b0-pads",
+			tft_r0b0g0, ARRAY_SIZE(tft_r0b0g0)) == 0)
+		return clcdfb_of_init_tft_panel(fb, tft_r0b0g0[0],
+				 tft_r0b0g0[1],  tft_r0b0g0[2]);
+
+	return -ENOENT;
+}
+
+static int clcdfb_of_vram_setup(struct clcd_fb *fb)
+{
+	int err;
+	struct device_node *memory;
+	u64 size;
+
+	err = clcdfb_of_init_display(fb);
+	if (err)
+		return err;
+
+	memory = of_parse_phandle(fb->dev->dev.of_node, "memory-region", 0);
+	if (!memory)
+		return -ENODEV;
+
+	fb->fb.screen_base = of_iomap(memory, 0);
+	if (!fb->fb.screen_base)
+		return -ENOMEM;
+
+	fb->fb.fix.smem_start = of_translate_address(memory,
+			of_get_address(memory, 0, &size, NULL));
+	fb->fb.fix.smem_len = size;
+
+	return 0;
+}
+
+static int clcdfb_of_vram_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
+{
+	unsigned long off, user_size, kernel_size;
+
+
+	off = vma->vm_pgoff << PAGE_SHIFT;
+	user_size = vma->vm_end - vma->vm_start;
+	kernel_size = fb->fb.fix.smem_len;
+
+	if (off >= kernel_size || user_size > (kernel_size - off))
+		return -ENXIO;
+
+	return remap_pfn_range(vma, vma->vm_start,
+			__phys_to_pfn(fb->fb.fix.smem_start) + vma->vm_pgoff,
+			user_size,
+			pgprot_writecombine(vma->vm_page_prot));
+}
+
+static void clcdfb_of_vram_remove(struct clcd_fb *fb)
+{
+	iounmap(fb->fb.screen_base);
+}
+
+static int clcdfb_of_dma_setup(struct clcd_fb *fb)
+{
+	unsigned long framesize;
+	dma_addr_t dma;
+	int err;
+
+	err = clcdfb_of_init_display(fb);
+	if (err)
+		return err;
+
+	framesize = fb->panel->mode.xres * fb->panel->mode.yres *
+			fb->panel->bpp / 8;
+	fb->fb.screen_base = dma_alloc_coherent(&fb->dev->dev, framesize,
+			&dma, GFP_KERNEL);
+	if (!fb->fb.screen_base)
+		return -ENOMEM;
+
+	fb->fb.fix.smem_start = dma;
+	fb->fb.fix.smem_len = framesize;
+
+	return 0;
+}
+
+static int clcdfb_of_dma_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
+{
+	return dma_mmap_writecombine(&fb->dev->dev, vma, fb->fb.screen_base,
+			fb->fb.fix.smem_start, fb->fb.fix.smem_len);
+}
+
+static void clcdfb_of_dma_remove(struct clcd_fb *fb)
+{
+	dma_free_coherent(&fb->dev->dev, fb->fb.fix.smem_len,
+			fb->fb.screen_base, fb->fb.fix.smem_start);
+}
+
+static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
+{
+	struct clcd_board *board = devm_kzalloc(&dev->dev, sizeof(*board),
+			GFP_KERNEL);
+	struct device_node *node = dev->dev.of_node;
+
+	if (!board)
+		return NULL;
+
+	board->name = of_node_full_name(node);
+	board->caps = CLCD_CAP_ALL;
+	board->check = clcdfb_check;
+	board->decode = clcdfb_decode;
+	if (of_find_property(node, "memory-region", NULL)) {
+		board->setup = clcdfb_of_vram_setup;
+		board->mmap = clcdfb_of_vram_mmap;
+		board->remove = clcdfb_of_vram_remove;
+	} else {
+		board->setup = clcdfb_of_dma_setup;
+		board->mmap = clcdfb_of_dma_mmap;
+		board->remove = clcdfb_of_dma_remove;
+	}
+
+	return board;
+}
+#else
+static struct clcd_board *clcdfb_of_get_board(struct amba_dev *dev)
+{
+	return NULL;
+}
+#endif
+
+ static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id)
+ {
+ 	struct clcd_board *board = dev_get_platdata(&dev->dev);
+@@ -550,6 +810,9 @@ static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id)
+ 	int ret;
+ 
+ 	if (!board)
+		board = clcdfb_of_get_board(dev);
+
+	if (!board)
+ 		return -EINVAL;
+ 
+ 	ret = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
+commit 1d5167b72ca05b2096760e1200fcd53b5f9a7562
+Author: Pawel Moll <pawel.moll@arm.com>
+Date:   Fri Aug 1 15:43:34 2014 +0100
+
+    video: ARM CLCD: Fix DT-related build problems
+    
+    This patch fixes the following error when !CONFIG_OF:
+    
+    drivers/video/fbdev/amba-clcd.c:800:54: warning: ‘struct amba_dev’ declared inside parameter list [enabled by default]
+     static struct clcd_board *clcdfb_of_get_board(struct amba_dev *dev)
+                                                          ^
+    and adds a missing Kconfig select causing this
+    when CONFIG_OF && !CONFIG_FB_MODE_HELPERS:
+    
+    drivers/video/fbdev/amba-clcd.c:567: undefined reference to `fb_videomode_from_videomode'
+    
+    Reported-by: Fengguang Wu <fengguang.wu@intel.com>
+    Signed-off-by: Pawel Moll <pawel.moll@arm.com>
+    Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
+
+diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
+index 6f451ad..ef94623 100644
+--- a/drivers/video/fbdev/Kconfig
+++ b/drivers/video/fbdev/Kconfig
+@@ -280,6 +280,7 @@ config FB_ARMCLCD
+ 	select FB_CFB_FILLRECT
+ 	select FB_CFB_COPYAREA
+ 	select FB_CFB_IMAGEBLIT
+	select FB_MODE_HELPERS if OF
+ 	select VIDEOMODE_HELPERS if OF
+ 	help
+ 	  This framebuffer device driver is for the ARM PrimeCell PL110
+diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c
+index 23b3519..beadd3e 100644
+--- a/drivers/video/fbdev/amba-clcd.c
+++ b/drivers/video/fbdev/amba-clcd.c
+@@ -797,7 +797,7 @@ static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
+ 	return board;
+ }
+ #else
+-static struct clcd_board *clcdfb_of_get_board(struct amba_dev *dev)
+static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
+ {
+ 	return NULL;
+ }
--- a/22
+++ b/22
@ -142,6 +142,9 @@ CONFIG_I2C_MUX_PINCTRL=m
 CONFIG_I2C_MUX_PCA9541=m
 CONFIG_I2C_MUX_PCA954x=m

+# spi
+CONFIG_SPI_PL022=m
+
 # Sensors
 CONFIG_SENSORS_IIO_HWMON=m
 CONFIG_IIO_SYSFS_TRIGGER=m
@ -173,29 +176,18 @@ CONFIG_CMA_AREAS=7
 # CONFIG_CRYPTO_TEST is not set
 # CONFIG_TRANSPARENT_HUGEPAGE is not set
 # CONFIG_XEN is not set
-# CONFIG_DRM_RCAR_DU is not set
-# CONFIG_I2C_RCAR is not set
-# CONFIG_DRM_SHMOBILE is not set
-# CONFIG_I2C_SH_MOBILE is not set
+
 # CONFIG_MMC_DW_SOCFPGA is not set
 # CONFIG_I2C_NOMADIK is not set
-# CONFIG_IRQ_DOMAIN_DEBUG is not set
 # CONFIG_LEDS_RENESAS_TPU is not set
-# CONFIG_LOCK_STAT is not set
-
 # CONFIG_DRM_ARMADA is not set
-# CONFIG_DRM_TEGRA is not set
-# CONFIG_SHMOBILE_IOMMU is not set
-
 # CONFIG_COMMON_CLK_SI570 is not set
 # CONFIG_COMMON_CLK_QCOM is not set

+# CONFIG_IRQ_DOMAIN_DEBUG is not set
 # CONFIG_ARM_PTDUMP is not set

-# CONFIG_PATA_PLATFORM is not set
-# CONFIG_USB_ULPI is not set
-
-### turn off things which make no sense on embedded SoC
+### turn off things which make no sense on ARM

 # core

@ -208,6 +200,8 @@ CONFIG_CMA_AREAS=7
 # CONFIG_ISDN is not set
 # CONFIG_GAMEPORT is not set
 # CONFIG_AGP is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_USB_ULPI is not set

 # netdrv

--- a/40
+++ b/40
@ -67,6 +67,7 @@ CONFIG_SND_KIRKWOOD_SOC=m
 CONFIG_SND_KIRKWOOD_SOC_ARMADA370_DB=m
 CONFIG_USB_EHCI_HCD_ORION=m
 CONFIG_MMC_SDHCI_PXAV3=m
+CONFIG_MVPP2=m
 # CONFIG_CACHE_FEROCEON_L2 is not set
 # CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set

@ -109,7 +110,6 @@ CONFIG_OMAP_PACKAGE_CUS=y

 CONFIG_OMAP_MCBSP=y
 CONFIG_OMAP2PLUS_MBOX=m
-CONFIG_OMAP_MBOX_FWK=m
 CONFIG_OMAP_MBOX_KFIFO_SIZE=256
 CONFIG_OMAP_DM_TIMER=y
 CONFIG_OMAP_PM_NOOP=y
@ -302,15 +302,6 @@ CONFIG_RADIO_WL128X=m
 CONFIG_OMAP_REMOTEPROC=m

 # CONFIG_TIDSPBRIDGE is not set
-# CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE=0x600000
-# CONFIG_TIDSPBRIDGE_DEBUG is not set
-# CONFIG_TIDSPBRIDGE_RECOVERY=y
-# CONFIG_TIDSPBRIDGE_CACHE_LINE_CHECK is not set
-# CONFIG_TIDSPBRIDGE_WDT3=y
-# CONFIG_TIDSPBRIDGE_WDT_TIMEOUT=5
-# CONFIG_TIDSPBRIDGE_NTFY_PWRERR is not set
-# CONFIG_TIDSPBRIDGE_BACKTRACE is not set
-
 # CONFIG_OMAP2_DSS_DEBUGFS is not set
 # CONFIG_OMAP_IOMMU_DEBUG is not set
 # CONFIG_OMAP_MUX_DEBUG is not set
@ -359,6 +350,17 @@ CONFIG_SERIAL_MSM=y
 CONFIG_SERIAL_MSM_CONSOLE=y
 CONFIG_PINCTRL_APQ8064=m
 CONFIG_PINCTRL_IPQ8064=m
+CONFIG_PINCTRL_MSM8960=m
+CONFIG_PINCTRL_MSM8960=m
+CONFIG_COMMON_CLK_QCOM=m
+CONFIG_APQ_GCC_8084=m
+CONFIG_APQ_MMCC_8084=m
+CONFIG_IPQ_GCC_806X=m
+CONFIG_MSM_GCC_8660=m
+CONFIG_MSM_GCC_8960=m
+CONFIG_MSM_MMCC_8960=m
+CONFIG_MSM_GCC_8974=m
+CONFIG_MSM_MMCC_8974=m
 CONFIG_HW_RANDOM_MSM=m
 CONFIG_I2C_QUP=m
 CONFIG_SPI_QUP=m
@ -378,17 +380,21 @@ CONFIG_USB_EHCI_MSM=m
 CONFIG_MXC_IRQ_PRIOR=y
 # CONFIG_MXC_DEBUG_BOARD is not set
 CONFIG_SOC_IMX50=y
+CONFIG_SOC_IMX51=y
 CONFIG_SOC_IMX53=y
 CONFIG_SOC_IMX6Q=y
 CONFIG_SOC_IMX6SL=y
 CONFIG_SOC_IMX6SX=y
 # CONFIG_SOC_VF610 is not set
 CONFIG_MACH_IMX51_DT=y
-# CONFIG_MACH_MX51_BABBAGE is not set
 CONFIG_ARM_IMX6Q_CPUFREQ=m
-CONFIG_IMX_THERMAL=m
-CONFIG_PATA_IMX=m
 CONFIG_PCI_IMX6=y
+CONFIG_IMX_THERMAL=m
+CONFIG_IMX_SDMA=m
+CONFIG_IMX_DMA=m
+CONFIG_MXS_DMA=y
+CONFIG_AHCI_IMX=m
+CONFIG_PATA_IMX=m
 CONFIG_USB_EHCI_MXC=m
 CONFIG_USB_CHIPIDEA=m
 CONFIG_USB_CHIPIDEA_UDC=y
@ -406,10 +412,12 @@ CONFIG_PINCTRL_IMX6SL=y
 CONFIG_I2C_IMX=m
 CONFIG_STMPE_I2C=y
 CONFIG_SPI_IMX=m
+CONFIG_SPI_FSL_QUADSPI=m
 CONFIG_STMPE_SPI=y
 CONFIG_MFD_MC13783=m
 CONFIG_MFD_MC13XXX_SPI=m
 CONFIG_MFD_STMPE=y
+CONFIG_MTD_NAND_GPMI_NAND=m
 CONFIG_W1_MASTER_MXC=m
 CONFIG_IMX_WEIM=y
 CONFIG_IMX2_WDT=m
@ -435,6 +443,7 @@ CONFIG_SND_SOC_IMX_MC13783=m
 CONFIG_SND_SOC_IMX_SPDIF=m
 CONFIG_SND_SOC_EUKREA_TLV320=m
 CONFIG_SND_SOC_TVL320AIC32X4=m
+CONFIG_SND_SOC_WM8731=m

 CONFIG_USB_IMX21_HCD=m
 CONFIG_USB_MXS_PHY=m
@ -445,10 +454,6 @@ CONFIG_RTC_DRV_IMXDI=m
 CONFIG_RTC_DRV_MXC=m
 # CONFIG_MX3_IPU is not set
 # CONFIG_MX3_IPU_IRQS is not set
-CONFIG_IMX_SDMA=m
-CONFIG_IMX_DMA=m
-CONFIG_AHCI_IMX=m
-# CONFIG_MXS_DMA is not set

 CONFIG_PWM_IMX=m
 CONFIG_DRM_IMX=m
@ -631,6 +636,7 @@ CONFIG_DRM_PANEL=y
 CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_DRM_PANEL_LD9040=m
 CONFIG_DRM_PANEL_S6E8AA0=m
+CONFIG_NOUVEAU_PLATFORM_DRIVER=m

 # OLPC XO
 CONFIG_SERIO_OLPC_APSP=m
--- a/22
+++ b/22
@ -205,6 +205,7 @@ CONFIG_ARM_EXYNOS5250_CPUFREQ=y
 CONFIG_ARM_EXYNOS5440_CPUFREQ=y
 CONFIG_ARM_EXYNOS_CPU_FREQ_BOOST_SW=y
 CONFIG_ARM_EXYNOS_CPUIDLE=y
+# CONFIG_EXYNOS5420_MCPM not set

 CONFIG_I2C_EXYNOS5=m
 CONFIG_I2C_S3C2410=m
@ -248,6 +249,7 @@ CONFIG_DRM_EXYNOS_IOMMU=y
 CONFIG_DRM_EXYNOS_IPP=y
 CONFIG_DRM_EXYNOS_ROTATOR=y
 CONFIG_DRM_EXYNOS_VIDI=y
+CONFIG_PHY_EXYNOS_DP_VIDEO=m
 # CONFIG_FB_S3C is not set
 # CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS is not set
 CONFIG_VIDEO_SAMSUNG_S5P_G2D=m
@ -261,6 +263,7 @@ CONFIG_SND_SOC_SAMSUNG_SMDK_SPDIF=m
 CONFIG_SND_SOC_SAMSUNG_SMDK_WM8994=m
 CONFIG_SND_SOC_SMDK_WM8994_PCM=m
 CONFIG_SND_SOC_SNOW=m
+CONFIG_SND_SOC_ODROIDX2=m
 # CONFIG_GPIO_WM8994 is not set
 # CONFIG_REGULATOR_WM8994 is not set
 # CONFIG_EXYNOS_IOMMU_DEBUG is not set
@ -299,15 +302,14 @@ CONFIG_GENERIC_CPUFREQ_CPU0=m
 # usb
 CONFIG_USB_OHCI_HCD_PLATFORM=m
 CONFIG_USB_EHCI_HCD_PLATFORM=m
-CONFIG_USB_OTG=y
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
 CONFIG_USB_ULPI=y
 CONFIG_AX88796=m
 CONFIG_AX88796_93CX6=y
-CONFIG_USB_ISP1760_HCD=m

 # usb gadget 
+CONFIG_USB_OTG=y
 CONFIG_USB_GADGET=m
 CONFIG_USB_GADGET_MUSB_HDRC=m
 CONFIG_USB_GADGET_VBUS_DRAW=100
@ -316,19 +318,6 @@ CONFIG_USB_MUSB_HDRC=m
 CONFIG_USB_MUSB_DUAL_ROLE=y
 CONFIG_USB_MUSB_DSPS=m
 CONFIG_USB_GPIO_VBUS=m
-CONFIG_USB_G_ACM_MS=m
-CONFIG_USB_G_DBGP=m
-CONFIG_USB_G_DBGP_SERIAL=y
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
-# CONFIG_USB_G_MULTI_RNDIS is not set
-CONFIG_USB_G_NCM=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_ETH_EEM=y
-# CONFIG_USB_ETH_RNDIS is not set
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_GADGET_TARGET=m
-CONFIG_USB_MASS_STORAGE=m
 CONFIG_USB_CONFIGFS=m
 CONFIG_USB_CONFIGFS_ACM=y
 CONFIG_USB_CONFIGFS_ECM=y
@ -425,7 +414,6 @@ CONFIG_SPI_BUTTERFLY=m
 CONFIG_SPI_DESIGNWARE=m
 CONFIG_SPI_LM70_LLP=m
 CONFIG_SPI_OC_TINY=m
-CONFIG_SPI_PL022=m
 CONFIG_SPI_SC18IS602=m
 CONFIG_SPI_TLE62X0=m
 CONFIG_SPI_XCOMM=m
@ -439,7 +427,6 @@ CONFIG_NFC_NCI_SPI=y
 CONFIG_I2C_DESIGNWARE_CORE=m
 CONFIG_I2C_DESIGNWARE_PLATFORM=m
 CONFIG_I2C_MV64XXX=m
-# CONFIG_I2C_CROS_EC_TUNNEL is not set

 # HW crypto and rng
 CONFIG_CRYPTO_SHA1_ARM=m
@ -732,6 +719,7 @@ CONFIG_MFD_CROS_EC=m
 CONFIG_MFD_CROS_EC_I2C=m
 CONFIG_MFD_CROS_EC_SPI=m
 CONFIG_KEYBOARD_CROS_EC=m
+CONFIG_I2C_CROS_EC_TUNNEL=m

 # Should be in generic
 CONFIG_BPF_JIT=y
--- a/2
+++ b/2
@ -3905,7 +3905,6 @@ CONFIG_USB_CXACRU=m
 # CONFIG_USB_C67X00_HCD is not set
 # CONFIG_USB_CYTHERM is not set
 CONFIG_USB_EMI26=m
-CONFIG_USB_ETH=m
 CONFIG_USB_FTDI_ELAN=m
 CONFIG_USB_FILE_STORAGE=m
 # CONFIG_USB_FILE_STORAGE_TEST is not set
@ -3943,7 +3942,6 @@ CONFIG_USB_TRANCEVIBRATOR=m
 CONFIG_USB_U132_HCD=m
 CONFIG_USB_UEAGLEATM=m
 CONFIG_USB_XUSBATM=m
-CONFIG_USB_ZERO=m

 # CONFIG_USB_DWC2 is not set

--- a/kernel.spec
+++ b/kernel.spec
@ -606,6 +606,7 @@ Patch21021: arm-beagle.patch
 Patch21022: arm-imx6-utilite.patch
 # http://www.spinics.net/lists/linux-tegra/msg17948.html
 Patch21023: arm-tegra-drmdetection.patch
+Patch21024: arm-qemu-fixdisplay.patch

 #rhbz 754518
 Patch21235: scsi-sd_revalidate_disk-prevent-NULL-ptr-deref.patch
@ -1251,6 +1252,7 @@ ApplyPatch arm-tegra-usb-no-reset-linux33.patch
 ApplyPatch arm-beagle.patch
 ApplyPatch arm-imx6-utilite.patch
 ApplyPatch arm-tegra-drmdetection.patch
+ApplyPatch arm-qemu-fixdisplay.patch

 #
 # bugfixes to drivers and filesystems
@ -2271,6 +2273,12 @@ fi
 #                                    ||----w |
 #                                    ||     ||
 %changelog
+* Fri Aug 15 2014 Peter Robinson <pbrobinson@fedoraproject.org>
+- ARM updates for 3.16
+- Cleanup some old removed options
+- Disable legacy USB OTG (using new configfs equivilents)
+- Upstream patch to fix display on qemu (VExpress A9)
+
 * Thu Aug 14 2014 Josh Boyer <jwboyer@fedoraproject.org> - 3.16.1-300
 - Linux v3.16.1