Linux v4.9-10415-g73e2e0c

This commit is contained in:
Justin M. Forbes 2016-12-16 09:42:31 -06:00
parent 84f938c2ad
commit ccbb099501
44 changed files with 357 additions and 1696 deletions

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@ -1,46 +0,0 @@
From patchwork Wed Oct 26 15:17:01 2016
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [3/5] ARM: OMAP4+: Fix bad fallthrough for cpuidle
From: Tony Lindgren <tony@atomide.com>
X-Patchwork-Id: 9397501
Message-Id: <20161026151703.24730-4-tony@atomide.com>
To: linux-omap@vger.kernel.org
Cc: Nishanth Menon <nm@ti.com>, Dmitry Lifshitz <lifshitz@compulab.co.il>,
Dave Gerlach <d-gerlach@ti.com>,
Enric Balletbo Serra <eballetbo@gmail.com>,
"Dr . H . Nikolaus Schaller" <hns@goldelico.com>,
Pau Pajuel <ppajuel@gmail.com>, Grazvydas Ignotas <notasas@gmail.com>,
Benoit Cousson <bcousson@baylibre.com>,
Santosh Shilimkar <ssantosh@kernel.org>,
Javier Martinez Canillas <javier@dowhile0.org>,
Robert Nelson <robertcnelson@gmail.com>,
Marek Belisko <marek@goldelico.com>, linux-arm-kernel@lists.infradead.org
Date: Wed, 26 Oct 2016 08:17:01 -0700
We don't want to fall through to a bunch of errors for retention
if PM_OMAP4_CPU_OSWR_DISABLE is not configured for a SoC.
Fixes: 6099dd37c669 ("ARM: OMAP5 / DRA7: Enable CPU RET on suspend")
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -244,10 +244,9 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
save_state = 1;
break;
case PWRDM_POWER_RET:
- if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE)) {
+ if (IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE))
save_state = 0;
- break;
- }
+ break;
default:
/*
* CPUx CSWR is invalid hardware state. Also CPUx OSWR

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@ -1,977 +0,0 @@
From 5c4f8b5b68451e5d208a5aefb195fdd108629da4 Mon Sep 17 00:00:00 2001
From: Tomasz Nowicki <tn@semihalf.com>
Date: Fri, 9 Sep 2016 21:24:03 +0200
Subject: [PATCH 1/6] PCI/ACPI: Extend pci_mcfg_lookup() responsibilities
In preparation for adding MCFG platform specific quirk handling move
CFG resource calculation and ECAM ops assignment to pci_mcfg_lookup().
It becomes the gate for further ops and CFG resource manipulation
in arch-agnostic code (drivers/acpi/pci_mcfg.c).
No functionality changes in this patch.
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
---
arch/arm64/kernel/pci.c | 17 +++++------------
drivers/acpi/pci_mcfg.c | 28 +++++++++++++++++++++++++---
include/linux/pci-acpi.h | 4 +++-
3 files changed, 33 insertions(+), 16 deletions(-)
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
index acf3872..fb439c7 100644
--- a/arch/arm64/kernel/pci.c
+++ b/arch/arm64/kernel/pci.c
@@ -125,24 +125,17 @@ pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root)
u16 seg = root->segment;
struct pci_config_window *cfg;
struct resource cfgres;
- unsigned int bsz;
+ struct pci_ecam_ops *ecam_ops;
+ int ret;
- /* Use address from _CBA if present, otherwise lookup MCFG */
- if (!root->mcfg_addr)
- root->mcfg_addr = pci_mcfg_lookup(seg, bus_res);
-
- if (!root->mcfg_addr) {
+ ret = pci_mcfg_lookup(root, &cfgres, &ecam_ops);
+ if (ret) {
dev_err(&root->device->dev, "%04x:%pR ECAM region not found\n",
seg, bus_res);
return NULL;
}
- bsz = 1 << pci_generic_ecam_ops.bus_shift;
- cfgres.start = root->mcfg_addr + bus_res->start * bsz;
- cfgres.end = cfgres.start + resource_size(bus_res) * bsz - 1;
- cfgres.flags = IORESOURCE_MEM;
- cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res,
- &pci_generic_ecam_ops);
+ cfg = pci_ecam_create(&root->device->dev, &cfgres, bus_res, ecam_ops);
if (IS_ERR(cfg)) {
dev_err(&root->device->dev, "%04x:%pR error %ld mapping ECAM\n",
seg, bus_res, PTR_ERR(cfg));
diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index b5b376e..ffcc651 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -22,6 +22,7 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/pci-acpi.h>
+#include <linux/pci-ecam.h>
/* Structure to hold entries from the MCFG table */
struct mcfg_entry {
@@ -35,9 +36,18 @@ struct mcfg_entry {
/* List to save MCFG entries */
static LIST_HEAD(pci_mcfg_list);
-phys_addr_t pci_mcfg_lookup(u16 seg, struct resource *bus_res)
+int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
+ struct pci_ecam_ops **ecam_ops)
{
+ struct pci_ecam_ops *ops = &pci_generic_ecam_ops;
+ struct resource *bus_res = &root->secondary;
+ u16 seg = root->segment;
struct mcfg_entry *e;
+ struct resource res;
+
+ /* Use address from _CBA if present, otherwise lookup MCFG */
+ if (root->mcfg_addr)
+ goto skip_lookup;
/*
* We expect exact match, unless MCFG entry end bus covers more than
@@ -45,10 +55,22 @@ phys_addr_t pci_mcfg_lookup(u16 seg, struct resource *bus_res)
*/
list_for_each_entry(e, &pci_mcfg_list, list) {
if (e->segment == seg && e->bus_start == bus_res->start &&
- e->bus_end >= bus_res->end)
- return e->addr;
+ e->bus_end >= bus_res->end) {
+ root->mcfg_addr = e->addr;
+ }
+
}
+ if (!root->mcfg_addr)
+ return -ENXIO;
+
+skip_lookup:
+ memset(&res, 0, sizeof(res));
+ res.start = root->mcfg_addr + (bus_res->start << 20);
+ res.end = res.start + (resource_size(bus_res) << 20) - 1;
+ res.flags = IORESOURCE_MEM;
+ *cfgres = res;
+ *ecam_ops = ops;
return 0;
}
diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h
index 7d63a66..7a4e83a 100644
--- a/include/linux/pci-acpi.h
+++ b/include/linux/pci-acpi.h
@@ -24,7 +24,9 @@ static inline acpi_status pci_acpi_remove_pm_notifier(struct acpi_device *dev)
}
extern phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle);
-extern phys_addr_t pci_mcfg_lookup(u16 domain, struct resource *bus_res);
+struct pci_ecam_ops;
+extern int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
+ struct pci_ecam_ops **ecam_ops);
static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
{
--
2.9.3
From 16c02d9cc0e67b48c343aecc4b5566e729a97683 Mon Sep 17 00:00:00 2001
From: Tomasz Nowicki <tn@semihalf.com>
Date: Fri, 9 Sep 2016 21:24:04 +0200
Subject: [PATCH 2/6] PCI/ACPI: Check platform specific ECAM quirks
Some platforms may not be fully compliant with generic set of PCI config
accessors. For these cases we implement the way to overwrite CFG accessors
set and configuration space range.
In first place pci_mcfg_parse() saves machine's IDs and revision number
(these come from MCFG header) in order to match against known quirk entries.
Then the algorithm traverses available quirk list (static array),
matches against <oem_id, oem_table_id, rev, domain, bus number range> and
returns custom PCI config ops and/or CFG resource structure.
When adding new quirk there are two possibilities:
1. Override default pci_generic_ecam_ops ops but CFG resource comes from MCFG
{ "OEM_ID", "OEM_TABLE_ID", <REV>, <DOMAIN>, <BUS_NR>, &foo_ops, MCFG_RES_EMPTY },
2. Override default pci_generic_ecam_ops ops and CFG resource. For this case
it is also allowed get CFG resource from quirk entry w/o having it in MCFG.
{ "OEM_ID", "OEM_TABLE_ID", <REV>, <DOMAIN>, <BUS_NR>, &boo_ops,
DEFINE_RES_MEM(START, SIZE) },
pci_generic_ecam_ops and MCFG entries will be used for platforms
free from quirks.
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
Signed-off-by: Christopher Covington <cov@codeaurora.org>
---
drivers/acpi/pci_mcfg.c | 80 +++++++++++++++++++++++++++++++++++++++++++++----
1 file changed, 74 insertions(+), 6 deletions(-)
diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index ffcc651..2b8acc7 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -32,6 +32,59 @@ struct mcfg_entry {
u8 bus_start;
u8 bus_end;
};
+struct mcfg_fixup {
+ char oem_id[ACPI_OEM_ID_SIZE + 1];
+ char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
+ u32 oem_revision;
+ u16 seg;
+ struct resource bus_range;
+ struct pci_ecam_ops *ops;
+ struct resource cfgres;
+};
+
+#define MCFG_DOM_ANY (-1)
+#define MCFG_BUS_RANGE(start, end) DEFINE_RES_NAMED((start), \
+ ((end) - (start) + 1), \
+ NULL, IORESOURCE_BUS)
+#define MCFG_BUS_ANY MCFG_BUS_RANGE(0x0, 0xff)
+#define MCFG_RES_EMPTY DEFINE_RES_NAMED(0, 0, NULL, 0)
+
+static struct mcfg_fixup mcfg_quirks[] = {
+/* { OEM_ID, OEM_TABLE_ID, REV, DOMAIN, BUS_RANGE, cfgres, ops }, */
+};
+
+static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
+static char mcfg_oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
+static u32 mcfg_oem_revision;
+
+static void pci_mcfg_match_quirks(struct acpi_pci_root *root,
+ struct resource *cfgres,
+ struct pci_ecam_ops **ecam_ops)
+{
+ struct mcfg_fixup *f;
+ int i;
+
+ /*
+ * First match against PCI topology <domain:bus> then use OEM ID, OEM
+ * table ID, and OEM revision from MCFG table standard header.
+ */
+ for (i = 0, f = mcfg_quirks; i < ARRAY_SIZE(mcfg_quirks); i++, f++) {
+ if (f->seg == root->segment &&
+ resource_contains(&f->bus_range, &root->secondary) &&
+ !memcmp(f->oem_id, mcfg_oem_id, ACPI_OEM_ID_SIZE) &&
+ !memcmp(f->oem_table_id, mcfg_oem_table_id,
+ ACPI_OEM_TABLE_ID_SIZE) &&
+ f->oem_revision == mcfg_oem_revision) {
+ if (f->cfgres.start)
+ *cfgres = f->cfgres;
+ if (f->ops)
+ *ecam_ops = f->ops;
+ dev_info(&root->device->dev, "Applying PCI MCFG quirks for %s %s rev: %d\n",
+ f->oem_id, f->oem_table_id, f->oem_revision);
+ return;
+ }
+ }
+}
/* List to save MCFG entries */
static LIST_HEAD(pci_mcfg_list);
@@ -61,14 +114,24 @@ int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
}
- if (!root->mcfg_addr)
- return -ENXIO;
-
skip_lookup:
memset(&res, 0, sizeof(res));
- res.start = root->mcfg_addr + (bus_res->start << 20);
- res.end = res.start + (resource_size(bus_res) << 20) - 1;
- res.flags = IORESOURCE_MEM;
+ if (root->mcfg_addr) {
+ res.start = root->mcfg_addr + (bus_res->start << 20);
+ res.end = res.start + (resource_size(bus_res) << 20) - 1;
+ res.flags = IORESOURCE_MEM;
+ }
+
+ /*
+ * Let to override default ECAM ops and CFG resource range.
+ * Also, this might even retrieve CFG resource range in case MCFG
+ * does not have it. Invalid CFG start address means MCFG firmware bug
+ * or we need another quirk in array.
+ */
+ pci_mcfg_match_quirks(root, &res, &ops);
+ if (!res.start)
+ return -ENXIO;
+
*cfgres = res;
*ecam_ops = ops;
return 0;
@@ -101,6 +164,11 @@ static __init int pci_mcfg_parse(struct acpi_table_header *header)
list_add(&e->list, &pci_mcfg_list);
}
+ /* Save MCFG IDs and revision for quirks matching */
+ memcpy(mcfg_oem_id, header->oem_id, ACPI_OEM_ID_SIZE);
+ memcpy(mcfg_oem_table_id, header->oem_table_id, ACPI_OEM_TABLE_ID_SIZE);
+ mcfg_oem_revision = header->revision;
+
pr_info("MCFG table detected, %d entries\n", n);
return 0;
}
--
2.9.3
From 2243ab64c12a873e47b72c8e636b40ed09c5f0d4 Mon Sep 17 00:00:00 2001
From: Tomasz Nowicki <tn@semihalf.com>
Date: Fri, 9 Sep 2016 21:24:05 +0200
Subject: [PATCH 3/6] PCI: thunder-pem: Allow to probe PEM-specific register
range for ACPI case
thunder-pem driver stands for being ACPI based PCI host controller.
However, there is no standard way to describe its PEM-specific register
ranges in ACPI tables. Thus we add thunder_pem_init() ACPI extension
to obtain hardcoded addresses from static resource array.
Although it is not pretty, it prevents from creating standard mechanism to
handle similar cases in future.
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
---
drivers/pci/host/pci-thunder-pem.c | 61 ++++++++++++++++++++++++++++++--------
1 file changed, 48 insertions(+), 13 deletions(-)
diff --git a/drivers/pci/host/pci-thunder-pem.c b/drivers/pci/host/pci-thunder-pem.c
index 6abaf80..b048761 100644
--- a/drivers/pci/host/pci-thunder-pem.c
+++ b/drivers/pci/host/pci-thunder-pem.c
@@ -18,6 +18,7 @@
#include <linux/init.h>
#include <linux/of_address.h>
#include <linux/of_pci.h>
+#include <linux/pci-acpi.h>
#include <linux/pci-ecam.h>
#include <linux/platform_device.h>
@@ -284,6 +285,40 @@ static int thunder_pem_config_write(struct pci_bus *bus, unsigned int devfn,
return pci_generic_config_write(bus, devfn, where, size, val);
}
+#ifdef CONFIG_ACPI
+static struct resource thunder_pem_reg_res[] = {
+ [4] = DEFINE_RES_MEM(0x87e0c0000000UL, SZ_16M),
+ [5] = DEFINE_RES_MEM(0x87e0c1000000UL, SZ_16M),
+ [6] = DEFINE_RES_MEM(0x87e0c2000000UL, SZ_16M),
+ [7] = DEFINE_RES_MEM(0x87e0c3000000UL, SZ_16M),
+ [8] = DEFINE_RES_MEM(0x87e0c4000000UL, SZ_16M),
+ [9] = DEFINE_RES_MEM(0x87e0c5000000UL, SZ_16M),
+ [14] = DEFINE_RES_MEM(0x97e0c0000000UL, SZ_16M),
+ [15] = DEFINE_RES_MEM(0x97e0c1000000UL, SZ_16M),
+ [16] = DEFINE_RES_MEM(0x97e0c2000000UL, SZ_16M),
+ [17] = DEFINE_RES_MEM(0x97e0c3000000UL, SZ_16M),
+ [18] = DEFINE_RES_MEM(0x97e0c4000000UL, SZ_16M),
+ [19] = DEFINE_RES_MEM(0x97e0c5000000UL, SZ_16M),
+};
+
+static struct resource *thunder_pem_acpi_res(struct pci_config_window *cfg)
+{
+ struct acpi_device *adev = to_acpi_device(cfg->parent);
+ struct acpi_pci_root *root = acpi_driver_data(adev);
+
+ if ((root->segment >= 4 && root->segment <= 9) ||
+ (root->segment >= 14 && root->segment <= 19))
+ return &thunder_pem_reg_res[root->segment];
+
+ return NULL;
+}
+#else
+static struct resource *thunder_pem_acpi_res(struct pci_config_window *cfg)
+{
+ return NULL;
+}
+#endif
+
static int thunder_pem_init(struct pci_config_window *cfg)
{
struct device *dev = cfg->parent;
@@ -292,24 +327,24 @@ static int thunder_pem_init(struct pci_config_window *cfg)
struct thunder_pem_pci *pem_pci;
struct platform_device *pdev;
- /* Only OF support for now */
- if (!dev->of_node)
- return -EINVAL;
-
pem_pci = devm_kzalloc(dev, sizeof(*pem_pci), GFP_KERNEL);
if (!pem_pci)
return -ENOMEM;
- pdev = to_platform_device(dev);
-
- /*
- * The second register range is the PEM bridge to the PCIe
- * bus. It has a different config access method than those
- * devices behind the bridge.
- */
- res_pem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (acpi_disabled) {
+ pdev = to_platform_device(dev);
+
+ /*
+ * The second register range is the PEM bridge to the PCIe
+ * bus. It has a different config access method than those
+ * devices behind the bridge.
+ */
+ res_pem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ } else {
+ res_pem = thunder_pem_acpi_res(cfg);
+ }
if (!res_pem) {
- dev_err(dev, "missing \"reg[1]\"property\n");
+ dev_err(dev, "missing configuration region\n");
return -EINVAL;
}
--
2.9.3
From 443d85d47ee00b3f0b6f39d470a11e7eb116817d Mon Sep 17 00:00:00 2001
From: Tomasz Nowicki <tn@semihalf.com>
Date: Fri, 9 Sep 2016 21:24:06 +0200
Subject: [PATCH 4/6] PCI: thunder: Enable ACPI PCI controller for ThunderX
pass2.x silicon version
ThunderX PCIe controller to off-chip devices (so-called PEM) is not fully
compliant with ECAM standard. It uses non-standard configuration space
accessors (see pci_thunder_pem_ops) and custom configuration space granulation
(see bus_shift = 24). In order to access configuration space and
probe PEM as ACPI based PCI host controller we need to add MCFG quirk
infrastructure. This involves:
1. Export PEM pci_thunder_pem_ops structure so it is visible to MCFG quirk
code.
2. New quirk entries for each PEM segment. Each contains platform IDs,
mentioned pci_thunder_pem_ops and CFG resources.
Quirk is considered for ThunderX silicon pass2.x only which is identified
via MCFG revision 1.
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
---
drivers/acpi/pci_mcfg.c | 27 +++++++++++++++++++++++++++
drivers/pci/host/pci-thunder-pem.c | 2 +-
include/linux/pci-ecam.h | 4 ++++
3 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index 2b8acc7..1f73d7b 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -51,6 +51,33 @@ struct mcfg_fixup {
static struct mcfg_fixup mcfg_quirks[] = {
/* { OEM_ID, OEM_TABLE_ID, REV, DOMAIN, BUS_RANGE, cfgres, ops }, */
+#ifdef CONFIG_PCI_HOST_THUNDER_PEM
+ /* SoC pass2.x */
+ { "CAVIUM", "THUNDERX", 1, 4, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x88001f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 1, 5, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x884057000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 1, 6, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x88808f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 1, 7, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x89001f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 1, 8, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x894057000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 1, 9, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x89808f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 1, 14, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x98001f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 1, 15, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x984057000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 1, 16, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x98808f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 1, 17, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x99001f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 1, 18, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x994057000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 1, 19, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x99808f000000UL, 0x39 * SZ_16M) },
+#endif
};
static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
diff --git a/drivers/pci/host/pci-thunder-pem.c b/drivers/pci/host/pci-thunder-pem.c
index b048761..d7c10cc 100644
--- a/drivers/pci/host/pci-thunder-pem.c
+++ b/drivers/pci/host/pci-thunder-pem.c
@@ -367,7 +367,7 @@ static int thunder_pem_init(struct pci_config_window *cfg)
return 0;
}
-static struct pci_ecam_ops pci_thunder_pem_ops = {
+struct pci_ecam_ops pci_thunder_pem_ops = {
.bus_shift = 24,
.init = thunder_pem_init,
.pci_ops = {
diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h
index 7adad20..65505ea 100644
--- a/include/linux/pci-ecam.h
+++ b/include/linux/pci-ecam.h
@@ -58,6 +58,10 @@ void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn,
int where);
/* default ECAM ops */
extern struct pci_ecam_ops pci_generic_ecam_ops;
+/* ECAM ops for known quirks */
+#ifdef CONFIG_PCI_HOST_THUNDER_PEM
+extern struct pci_ecam_ops pci_thunder_pem_ops;
+#endif
#ifdef CONFIG_PCI_HOST_GENERIC
/* for DT-based PCI controllers that support ECAM */
--
2.9.3
From 6eca99cc392a11bb07b9ef88bca71a85f8bbe273 Mon Sep 17 00:00:00 2001
From: Tomasz Nowicki <tn@semihalf.com>
Date: Fri, 9 Sep 2016 21:24:07 +0200
Subject: [PATCH 5/6] PCI: thunder: Enable ACPI PCI controller for ThunderX
pass1.x silicon version
ThunderX pass1.x requires to emulate the EA headers for on-chip devices
hence it has to use custom pci_thunder_ecam_ops for accessing PCI config
space (pci-thuner-ecam.c). Add new entries to MCFG quirk array where they
can be applied while probing ACPI based PCI host controller.
ThunderX pass1.x is using the same way for accessing off-chip devices
(so-called PEM) as silicon pass-2.x so we need to add PEM quirk
entries too.
Quirk is considered for ThunderX silicon pass1.x only which is identified
via MCFG revision 2.
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
---
drivers/acpi/pci_mcfg.c | 45 +++++++++++++++++++++++++++++++++++++
drivers/pci/host/pci-thunder-ecam.c | 2 +-
include/linux/pci-ecam.h | 3 +++
3 files changed, 49 insertions(+), 1 deletion(-)
diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index 1f73d7b..eb14f74 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -77,6 +77,51 @@ static struct mcfg_fixup mcfg_quirks[] = {
DEFINE_RES_MEM(0x994057000000UL, 0x39 * SZ_16M) },
{ "CAVIUM", "THUNDERX", 1, 19, MCFG_BUS_ANY, &pci_thunder_pem_ops,
DEFINE_RES_MEM(0x99808f000000UL, 0x39 * SZ_16M) },
+
+ /* SoC pass1.x */
+ { "CAVIUM", "THUNDERX", 2, 4, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x88001f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 2, 5, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x884057000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 2, 6, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x88808f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 2, 7, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x89001f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 2, 8, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x894057000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 2, 9, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x89808f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 2, 14, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x98001f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 2, 15, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x984057000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 2, 16, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x98808f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 2, 17, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x99001f000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 2, 18, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x994057000000UL, 0x39 * SZ_16M) },
+ { "CAVIUM", "THUNDERX", 2, 19, MCFG_BUS_ANY, &pci_thunder_pem_ops,
+ DEFINE_RES_MEM(0x99808f000000UL, 0x39 * SZ_16M) },
+#endif
+#ifdef CONFIG_PCI_HOST_THUNDER_ECAM
+ /* SoC pass1.x */
+ { "CAVIUM", "THUNDERX", 2, 0, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+ MCFG_RES_EMPTY},
+ { "CAVIUM", "THUNDERX", 2, 1, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+ MCFG_RES_EMPTY},
+ { "CAVIUM", "THUNDERX", 2, 2, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+ MCFG_RES_EMPTY},
+ { "CAVIUM", "THUNDERX", 2, 3, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+ MCFG_RES_EMPTY},
+ { "CAVIUM", "THUNDERX", 2, 10, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+ MCFG_RES_EMPTY},
+ { "CAVIUM", "THUNDERX", 2, 11, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+ MCFG_RES_EMPTY},
+ { "CAVIUM", "THUNDERX", 2, 12, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+ MCFG_RES_EMPTY},
+ { "CAVIUM", "THUNDERX", 2, 13, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
+ MCFG_RES_EMPTY},
#endif
};
diff --git a/drivers/pci/host/pci-thunder-ecam.c b/drivers/pci/host/pci-thunder-ecam.c
index d50a3dc..b6c17e2 100644
--- a/drivers/pci/host/pci-thunder-ecam.c
+++ b/drivers/pci/host/pci-thunder-ecam.c
@@ -346,7 +346,7 @@ static int thunder_ecam_config_write(struct pci_bus *bus, unsigned int devfn,
return pci_generic_config_write(bus, devfn, where, size, val);
}
-static struct pci_ecam_ops pci_thunder_ecam_ops = {
+struct pci_ecam_ops pci_thunder_ecam_ops = {
.bus_shift = 20,
.pci_ops = {
.map_bus = pci_ecam_map_bus,
diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h
index 65505ea..35f0e81 100644
--- a/include/linux/pci-ecam.h
+++ b/include/linux/pci-ecam.h
@@ -62,6 +62,9 @@ extern struct pci_ecam_ops pci_generic_ecam_ops;
#ifdef CONFIG_PCI_HOST_THUNDER_PEM
extern struct pci_ecam_ops pci_thunder_pem_ops;
#endif
+#ifdef CONFIG_PCI_HOST_THUNDER_ECAM
+extern struct pci_ecam_ops pci_thunder_ecam_ops;
+#endif
#ifdef CONFIG_PCI_HOST_GENERIC
/* for DT-based PCI controllers that support ECAM */
--
2.9.3
From 3080ac5bb527155ccdf8490ce221b1c6ad01f502 Mon Sep 17 00:00:00 2001
From: Duc Dang <dhdang@apm.com>
Date: Sat, 17 Sep 2016 07:24:38 -0700
Subject: [PATCH 6/6] PCI/ACPI: xgene: Add ECAM quirk for X-Gene PCIe
controller
PCIe controller in X-Gene SoCs is not ECAM compliant: software
needs to configure additional concontroller register to address
device at bus:dev:function.
This patch depends on "ECAM quirks handling for ARM64 platforms"
series (http://www.spinics.net/lists/arm-kernel/msg530692.html)
to address the limitation above for X-Gene PCIe controller.
The quirk will only be applied for X-Gene PCIe MCFG table with
OEM revison 1, 2, 3 or 4 (PCIe controller v1 and v2 on X-Gene SoCs).
Signed-off-by: Duc Dang <dhdang@apm.com>
---
drivers/acpi/pci_mcfg.c | 32 +++++
drivers/pci/host/Makefile | 2 +-
drivers/pci/host/pci-xgene-ecam.c | 280 ++++++++++++++++++++++++++++++++++++++
include/linux/pci-ecam.h | 5 +
4 files changed, 318 insertions(+), 1 deletion(-)
create mode 100644 drivers/pci/host/pci-xgene-ecam.c
diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index eb14f74..635ab24 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -123,6 +123,38 @@ static struct mcfg_fixup mcfg_quirks[] = {
{ "CAVIUM", "THUNDERX", 2, 13, MCFG_BUS_ANY, &pci_thunder_ecam_ops,
MCFG_RES_EMPTY},
#endif
+#ifdef CONFIG_PCI_XGENE
+ {"APM ", "XGENE ", 1, 0, MCFG_BUS_ANY,
+ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 1, 1, MCFG_BUS_ANY,
+ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 1, 2, MCFG_BUS_ANY,
+ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 1, 3, MCFG_BUS_ANY,
+ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 1, 4, MCFG_BUS_ANY,
+ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 2, 0, MCFG_BUS_ANY,
+ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 2, 1, MCFG_BUS_ANY,
+ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 2, 2, MCFG_BUS_ANY,
+ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 2, 3, MCFG_BUS_ANY,
+ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 2, 4, MCFG_BUS_ANY,
+ &xgene_v1_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 3, 0, MCFG_BUS_ANY,
+ &xgene_v2_1_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 3, 1, MCFG_BUS_ANY,
+ &xgene_v2_1_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 4, 0, MCFG_BUS_ANY,
+ &xgene_v2_2_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 4, 1, MCFG_BUS_ANY,
+ &xgene_v2_2_pcie_ecam_ops, MCFG_RES_EMPTY},
+ {"APM ", "XGENE ", 4, 2, MCFG_BUS_ANY,
+ &xgene_v2_2_pcie_ecam_ops, MCFG_RES_EMPTY},
+#endif
};
static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
index 8843410..af4f505 100644
--- a/drivers/pci/host/Makefile
+++ b/drivers/pci/host/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o
obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone-dw.o pci-keystone.o
obj-$(CONFIG_PCIE_XILINX) += pcie-xilinx.o
obj-$(CONFIG_PCIE_XILINX_NWL) += pcie-xilinx-nwl.o
-obj-$(CONFIG_PCI_XGENE) += pci-xgene.o
+obj-$(CONFIG_PCI_XGENE) += pci-xgene.o pci-xgene-ecam.o
obj-$(CONFIG_PCI_XGENE_MSI) += pci-xgene-msi.o
obj-$(CONFIG_PCI_LAYERSCAPE) += pci-layerscape.o
obj-$(CONFIG_PCI_VERSATILE) += pci-versatile.o
diff --git a/drivers/pci/host/pci-xgene-ecam.c b/drivers/pci/host/pci-xgene-ecam.c
new file mode 100644
index 0000000..b66a04f
--- /dev/null
+++ b/drivers/pci/host/pci-xgene-ecam.c
@@ -0,0 +1,280 @@
+/*
+ * APM X-Gene PCIe ECAM fixup driver
+ *
+ * Copyright (c) 2016, Applied Micro Circuits Corporation
+ * Author:
+ * Duc Dang <dhdang@apm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_pci.h>
+#include <linux/pci-acpi.h>
+#include <linux/platform_device.h>
+#include <linux/pci-ecam.h>
+
+#ifdef CONFIG_ACPI
+#define RTDID 0x160
+#define ROOT_CAP_AND_CTRL 0x5C
+
+/* PCIe IP version */
+#define XGENE_PCIE_IP_VER_UNKN 0
+#define XGENE_PCIE_IP_VER_1 1
+#define XGENE_PCIE_IP_VER_2 2
+
+#define XGENE_CSR_LENGTH 0x10000
+
+struct xgene_pcie_acpi_root {
+ void __iomem *csr_base;
+ u32 version;
+};
+
+static int xgene_v1_pcie_ecam_init(struct pci_config_window *cfg)
+{
+ struct xgene_pcie_acpi_root *xgene_root;
+ struct device *dev = cfg->parent;
+ u32 csr_base;
+
+ xgene_root = devm_kzalloc(dev, sizeof(*xgene_root), GFP_KERNEL);
+ if (!xgene_root)
+ return -ENOMEM;
+
+ switch (cfg->res.start) {
+ case 0xE0D0000000ULL:
+ csr_base = 0x1F2B0000;
+ break;
+ case 0xD0D0000000ULL:
+ csr_base = 0x1F2C0000;
+ break;
+ case 0x90D0000000ULL:
+ csr_base = 0x1F2D0000;
+ break;
+ case 0xA0D0000000ULL:
+ csr_base = 0x1F500000;
+ break;
+ case 0xC0D0000000ULL:
+ csr_base = 0x1F510000;
+ break;
+ default:
+ return -ENODEV;
+ }
+
+ xgene_root->csr_base = ioremap(csr_base, XGENE_CSR_LENGTH);
+ if (!xgene_root->csr_base) {
+ kfree(xgene_root);
+ return -ENODEV;
+ }
+
+ xgene_root->version = XGENE_PCIE_IP_VER_1;
+
+ cfg->priv = xgene_root;
+
+ return 0;
+}
+
+static int xgene_v2_1_pcie_ecam_init(struct pci_config_window *cfg)
+{
+ struct xgene_pcie_acpi_root *xgene_root;
+ struct device *dev = cfg->parent;
+ resource_size_t csr_base;
+
+ xgene_root = devm_kzalloc(dev, sizeof(*xgene_root), GFP_KERNEL);
+ if (!xgene_root)
+ return -ENOMEM;
+
+ switch (cfg->res.start) {
+ case 0xC0D0000000ULL:
+ csr_base = 0x1F2B0000;
+ break;
+ case 0xA0D0000000ULL:
+ csr_base = 0x1F2C0000;
+ break;
+ default:
+ return -ENODEV;
+ }
+
+ xgene_root->csr_base = ioremap(csr_base, XGENE_CSR_LENGTH);
+ if (!xgene_root->csr_base) {
+ kfree(xgene_root);
+ return -ENODEV;
+ }
+
+ xgene_root->version = XGENE_PCIE_IP_VER_2;
+
+ cfg->priv = xgene_root;
+
+ return 0;
+}
+
+static int xgene_v2_2_pcie_ecam_init(struct pci_config_window *cfg)
+{
+ struct xgene_pcie_acpi_root *xgene_root;
+ struct device *dev = cfg->parent;
+ resource_size_t csr_base;
+
+ xgene_root = devm_kzalloc(dev, sizeof(*xgene_root), GFP_KERNEL);
+ if (!xgene_root)
+ return -ENOMEM;
+
+ switch (cfg->res.start) {
+ case 0xE0D0000000ULL:
+ csr_base = 0x1F2B0000;
+ break;
+ case 0xA0D0000000ULL:
+ csr_base = 0x1F500000;
+ break;
+ case 0x90D0000000ULL:
+ csr_base = 0x1F2D0000;
+ break;
+ default:
+ return -ENODEV;
+ }
+
+ xgene_root->csr_base = ioremap(csr_base, XGENE_CSR_LENGTH);
+ if (!xgene_root->csr_base) {
+ kfree(xgene_root);
+ return -ENODEV;
+ }
+
+ xgene_root->version = XGENE_PCIE_IP_VER_2;
+
+ cfg->priv = xgene_root;
+
+ return 0;
+}
+/*
+ * For Configuration request, RTDID register is used as Bus Number,
+ * Device Number and Function number of the header fields.
+ */
+static void xgene_pcie_set_rtdid_reg(struct pci_bus *bus, uint devfn)
+{
+ struct pci_config_window *cfg = bus->sysdata;
+ struct xgene_pcie_acpi_root *port = cfg->priv;
+ unsigned int b, d, f;
+ u32 rtdid_val = 0;
+
+ b = bus->number;
+ d = PCI_SLOT(devfn);
+ f = PCI_FUNC(devfn);
+
+ if (!pci_is_root_bus(bus))
+ rtdid_val = (b << 8) | (d << 3) | f;
+
+ writel(rtdid_val, port->csr_base + RTDID);
+ /* read the register back to ensure flush */
+ readl(port->csr_base + RTDID);
+}
+
+/*
+ * X-Gene PCIe port uses BAR0-BAR1 of RC's configuration space as
+ * the translation from PCI bus to native BUS. Entire DDR region
+ * is mapped into PCIe space using these registers, so it can be
+ * reached by DMA from EP devices. The BAR0/1 of bridge should be
+ * hidden during enumeration to avoid the sizing and resource allocation
+ * by PCIe core.
+ */
+static bool xgene_pcie_hide_rc_bars(struct pci_bus *bus, int offset)
+{
+ if (pci_is_root_bus(bus) && ((offset == PCI_BASE_ADDRESS_0) ||
+ (offset == PCI_BASE_ADDRESS_1)))
+ return true;
+
+ return false;
+}
+
+void __iomem *xgene_pcie_ecam_map_bus(struct pci_bus *bus,
+ unsigned int devfn, int where)
+{
+ struct pci_config_window *cfg = bus->sysdata;
+ unsigned int busn = bus->number;
+ void __iomem *base;
+
+ if (busn < cfg->busr.start || busn > cfg->busr.end)
+ return NULL;
+
+ if ((pci_is_root_bus(bus) && devfn != 0) ||
+ xgene_pcie_hide_rc_bars(bus, where))
+ return NULL;
+
+ xgene_pcie_set_rtdid_reg(bus, devfn);
+
+ if (busn > cfg->busr.start)
+ base = cfg->win + (1 << cfg->ops->bus_shift);
+ else
+ base = cfg->win;
+
+ return base + where;
+}
+
+static int xgene_pcie_config_read32(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 *val)
+{
+ struct pci_config_window *cfg = bus->sysdata;
+ struct xgene_pcie_acpi_root *port = cfg->priv;
+
+ if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val) !=
+ PCIBIOS_SUCCESSFUL)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ /*
+ * The v1 controller has a bug in its Configuration Request
+ * Retry Status (CRS) logic: when CRS is enabled and we read the
+ * Vendor and Device ID of a non-existent device, the controller
+ * fabricates return data of 0xFFFF0001 ("device exists but is not
+ * ready") instead of 0xFFFFFFFF ("device does not exist"). This
+ * causes the PCI core to retry the read until it times out.
+ * Avoid this by not claiming to support CRS.
+ */
+ if (pci_is_root_bus(bus) && (port->version == XGENE_PCIE_IP_VER_1) &&
+ ((where & ~0x3) == ROOT_CAP_AND_CTRL))
+ *val &= ~(PCI_EXP_RTCAP_CRSVIS << 16);
+
+ if (size <= 2)
+ *val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1);
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+struct pci_ecam_ops xgene_v1_pcie_ecam_ops = {
+ .bus_shift = 16,
+ .init = xgene_v1_pcie_ecam_init,
+ .pci_ops = {
+ .map_bus = xgene_pcie_ecam_map_bus,
+ .read = xgene_pcie_config_read32,
+ .write = pci_generic_config_write,
+ }
+};
+
+struct pci_ecam_ops xgene_v2_1_pcie_ecam_ops = {
+ .bus_shift = 16,
+ .init = xgene_v2_1_pcie_ecam_init,
+ .pci_ops = {
+ .map_bus = xgene_pcie_ecam_map_bus,
+ .read = xgene_pcie_config_read32,
+ .write = pci_generic_config_write,
+ }
+};
+
+struct pci_ecam_ops xgene_v2_2_pcie_ecam_ops = {
+ .bus_shift = 16,
+ .init = xgene_v2_2_pcie_ecam_init,
+ .pci_ops = {
+ .map_bus = xgene_pcie_ecam_map_bus,
+ .read = xgene_pcie_config_read32,
+ .write = pci_generic_config_write,
+ }
+};
+#endif
diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h
index 35f0e81..40da3e7 100644
--- a/include/linux/pci-ecam.h
+++ b/include/linux/pci-ecam.h
@@ -65,6 +65,11 @@ extern struct pci_ecam_ops pci_thunder_pem_ops;
#ifdef CONFIG_PCI_HOST_THUNDER_ECAM
extern struct pci_ecam_ops pci_thunder_ecam_ops;
#endif
+#ifdef CONFIG_PCI_XGENE
+extern struct pci_ecam_ops xgene_v1_pcie_ecam_ops;
+extern struct pci_ecam_ops xgene_v2_1_pcie_ecam_ops;
+extern struct pci_ecam_ops xgene_v2_2_pcie_ecam_ops;
+#endif
#ifdef CONFIG_PCI_HOST_GENERIC
/* for DT-based PCI controllers that support ECAM */
--
2.9.3

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@ -0,0 +1 @@
# CONFIG_ARCH_TEGRA_186_SOC is not set

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@ -0,0 +1 @@
CONFIG_ARM_PSCI_CHECKER=y

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@ -0,0 +1 @@
CONFIG_CRYPTO_DEV_VIRTIO=m

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@ -0,0 +1 @@
CONFIG_I2C_IMX_LPI2C=m

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@ -0,0 +1 @@
CONFIG_I2C_MLXCPLD=m

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@ -0,0 +1 @@
CONFIG_I2C_MUX_MLXCPLD=m

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@ -0,0 +1 @@
CONFIG_I2C_PXA=m

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@ -0,0 +1 @@
# CONFIG_I2C_PXA_SLAVE is not set

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@ -0,0 +1 @@
CONFIG_INFINIBAND_VMWARE_PVRDMA=m

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@ -0,0 +1 @@
CONFIG_MLX_CPLD_PLATFORM=m

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@ -0,0 +1 @@
CONFIG_PWM_HIBVT=m

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@ -1 +1 @@
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set

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@ -1 +1 @@
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set

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@ -0,0 +1 @@
CONFIG_TEGRA_GMI=m

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@ -0,0 +1 @@
CONFIG_TEGRA_IVC=y

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@ -0,0 +1 @@
CONFIG_TI_SCI_PROTOCOL=m

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@ -0,0 +1 @@
CONFIG_UBIFS_FS_ENCRYPTION=y

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@ -18,7 +18,7 @@ index 55f388f..989a039 100644
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -99,6 +99,15 @@ Rockchip platforms device tree bindings
Required root node properties:
- compatible = "mqmaker,miqi", "rockchip,rk3288";
- compatible = "rockchip,rk1108-evb", "rockchip,rk1108";
+- GeekBuying GeekBox:
+ Required root node properties:
@ -41,9 +41,9 @@ index 87669f6..9aec54e 100644
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox-landingship.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi
index fff8b19..bd4f2cf 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi

2
gitrev
View File

@ -1 +1 @@
5cc60aeedf315a7513f92e98314e86d515b986d1
73e2e0c9b13c97df1c8565f6e158caac3c481b44

View File

@ -1,619 +0,0 @@
From 76e691fc7653b85d390e58710e5c7db73ca49367 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
Date: Sun, 16 Oct 2016 16:44:23 +0200
Subject: [PATCH 0732/2073] ARM: dts: imx6sx: Add UDOO Neo support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Add initial device trees for UDOO Neo Basic, Extended and Full boards:
* Serial console is enabled, other serial ports are prepared.
* I2C based PMIC is enabled.
* Ethernet is enabled for Basic and Full.
* SDHC is enabled, with the SDIO_PWR GPIO modeled as a regulator.
* Both user LEDs are enabled, with the orange one reserved for the M4
and with the SD card as default trigger for the red LED.
The decision on a board compatible string is deferred to later.
Cc: Ettore Chimenti <ettore.chimenti@udoo.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
---
arch/arm/boot/dts/Makefile | 5 +-
arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts | 69 ++++++
arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts | 54 +++++
arch/arm/boot/dts/imx6sx-udoo-neo-full.dts | 69 ++++++
arch/arm/boot/dts/imx6sx-udoo-neo.dtsi | 293 +++++++++++++++++++++++++
5 files changed, 489 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
create mode 100644 arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
create mode 100644 arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
create mode 100644 arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 019976b..da0197d 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -417,7 +417,10 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
imx6sx-sabreauto.dtb \
imx6sx-sdb-reva.dtb \
imx6sx-sdb-sai.dtb \
- imx6sx-sdb.dtb
+ imx6sx-sdb.dtb \
+ imx6sx-udoo-neo-basic.dtb \
+ imx6sx-udoo-neo-extended.dtb \
+ imx6sx-udoo-neo-full.dtb
dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ul-14x14-evk.dtb \
imx6ul-geam-kit.dtb \
diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
new file mode 100644
index 0000000..0b88878
--- /dev/null
+++ b/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6sx-udoo-neo.dtsi"
+
+/ {
+ model = "UDOO Neo Basic";
+ compatible = "fsl,imx6sx";
+
+ memory {
+ reg = <0x80000000 0x20000000>;
+ };
+};
+
+&fec1 {
+ phy-handle = <&ethphy1>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy1: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
new file mode 100644
index 0000000..d6fdd17
--- /dev/null
+++ b/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6sx-udoo-neo.dtsi"
+
+/ {
+ model = "UDOO Neo Extended";
+ compatible = "fsl,imx6sx";
+
+ memory {
+ reg = <0x80000000 0x40000000>;
+ };
+};
diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
new file mode 100644
index 0000000..d8c3577
--- /dev/null
+++ b/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "imx6sx-udoo-neo.dtsi"
+
+/ {
+ model = "UDOO Neo Full";
+ compatible = "fsl,imx6sx";
+
+ memory {
+ reg = <0x80000000 0x40000000>;
+ };
+};
+
+&fec1 {
+ phy-handle = <&ethphy1>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy1: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
new file mode 100644
index 0000000..2b65d26
--- /dev/null
+++ b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
@@ -0,0 +1,293 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "imx6sx.dtsi"
+
+/ {
+ compatible = "fsl,imx6sx";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ red {
+ label = "udoo-neo:red:mmc";
+ gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ linux,default-trigger = "mmc0";
+ };
+
+ orange {
+ label = "udoo-neo:orange:user";
+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
+ default-state = "keep";
+ };
+ };
+
+ reg_sdio_pwr: regulator-sdio-pwr {
+ compatible = "regulator-fixed";
+ gpio = <&gpio6 1 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-name = "SDIO_PWR";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ };
+};
+
+&cpu0 {
+ arm-supply = <&sw1a_reg>;
+ soc-supply = <&sw1c_reg>;
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet1>;
+ phy-mode = "rmii";
+ phy-reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+};
+
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ clock-frequency = <100000>;
+ status = "okay";
+
+ pmic: pmic@08 {
+ compatible = "fsl,pfuze3000";
+ reg = <0x08>;
+
+ regulators {
+ sw1a_reg: sw1a {
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1475000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <6250>;
+ };
+
+ sw1c_reg: sw1b {
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1475000>;
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-ramp-delay = <6250>;
+ };
+
+ sw2_reg: sw2 {
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1850000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ sw3a_reg: sw3 {
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1650000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ swbst_reg: swbst {
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5150000>;
+ };
+
+ snvs_reg: vsnvs {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vref_reg: vrefddr {
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vgen1_reg: vldo1 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ vgen2_reg: vldo2 {
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1550000>;
+ };
+
+ vgen3_reg: vccsd {
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ vgen4_reg: v33 {
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ vgen5_reg: vldo3 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ vgen6_reg: vldo4 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
+&iomuxc {
+ pinctrl_enet1: enet1grp {
+ fsl,pins =
+ <MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0xa0b1>,
+ <MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1>,
+ <MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1>,
+ <MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1>,
+ <MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1>,
+ <MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1>,
+
+ <MX6SX_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x3081>,
+ <MX6SX_PAD_ENET2_TX_CLK__GPIO2_IO_9 0x3081>,
+ <MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081>,
+ <MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081>,
+ <MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081>,
+ <MX6SX_PAD_RGMII1_RXC__ENET1_RX_ER 0x3081>,
+
+ <MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91>;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins =
+ <MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1>,
+ <MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1>;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins =
+ <MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1>,
+ <MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1>;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins =
+ <MX6SX_PAD_GPIO1_IO06__UART2_TX 0x1b0b1>,
+ <MX6SX_PAD_GPIO1_IO07__UART2_RX 0x1b0b1>;
+ };
+
+ pinctrl_uart5: uart5grp {
+ fsl,pins =
+ <MX6SX_PAD_SD4_DATA4__UART5_RX 0x1b0b1>,
+ <MX6SX_PAD_SD4_DATA5__UART5_TX 0x1b0b1>;
+ };
+
+ pinctrl_uart6: uart6grp {
+ fsl,pins =
+ <MX6SX_PAD_CSI_DATA00__UART6_RI_B 0x1b0b1>,
+ <MX6SX_PAD_CSI_DATA01__UART6_DSR_B 0x1b0b1>,
+ <MX6SX_PAD_CSI_DATA02__UART6_DTR_B 0x1b0b1>,
+ <MX6SX_PAD_CSI_DATA03__UART6_DCD_B 0x1b0b1>,
+ <MX6SX_PAD_CSI_DATA04__UART6_RX 0x1b0b1>,
+ <MX6SX_PAD_CSI_DATA05__UART6_TX 0x1b0b1>,
+ <MX6SX_PAD_CSI_DATA06__UART6_RTS_B 0x1b0b1>,
+ <MX6SX_PAD_CSI_DATA07__UART6_CTS_B 0x1b0b1>;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins =
+ <MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059>,
+ <MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059>,
+ <MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059>,
+ <MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059>,
+ <MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059>,
+ <MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059>,
+ <MX6SX_PAD_SD1_DATA0__GPIO6_IO_2 0x17059>; /* CD */
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+/* Cortex-M4 serial */
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "disabled";
+};
+
+/* Arduino serial */
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart5>;
+ status = "disabled";
+};
+
+&uart6 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart6>;
+ uart-has-rtscts;
+ status = "disabled";
+};
+
+&usdhc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ vmmc-supply = <&reg_sdio_pwr>;
+ bus-width = <4>;
+ cd-gpios = <&gpio6 2 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ keep-power-in-suspend;
+ wakeup-source;
+ status = "okay";
+};
--
2.9.3
From 841310d00a76800a8407ee214eb7242541aac178 Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@nxp.com>
Date: Tue, 1 Nov 2016 15:38:12 -0200
Subject: [PATCH 1789/2073] ARM: dts: imx6sx-udoo: Add board specific
compatible strings
Add a compatible entry for the specific board versions.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
---
arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts | 2 +-
arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts | 2 +-
arch/arm/boot/dts/imx6sx-udoo-neo-full.dts | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
index 0b88878..0c1fc1a 100644
--- a/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
+++ b/arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
@@ -46,7 +46,7 @@
/ {
model = "UDOO Neo Basic";
- compatible = "fsl,imx6sx";
+ compatible = "udoo,neobasic", "fsl,imx6sx";
memory {
reg = <0x80000000 0x20000000>;
diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
index d6fdd17..5d6c227 100644
--- a/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
+++ b/arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
@@ -46,7 +46,7 @@
/ {
model = "UDOO Neo Extended";
- compatible = "fsl,imx6sx";
+ compatible = "udoo,neoextended", "fsl,imx6sx";
memory {
reg = <0x80000000 0x40000000>;
diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts b/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
index d8c3577..653ceb2 100644
--- a/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
+++ b/arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
@@ -46,7 +46,7 @@
/ {
model = "UDOO Neo Full";
- compatible = "fsl,imx6sx";
+ compatible = "udoo,neofull", "fsl,imx6sx";
memory {
reg = <0x80000000 0x40000000>;
--
2.9.3

View File

@ -236,6 +236,7 @@ CONFIG_ARCH_SEATTLE=y
# CONFIG_ARCH_STRATIX10 is not set
CONFIG_ARCH_SUNXI=y
CONFIG_ARCH_TEGRA_132_SOC=y
# CONFIG_ARCH_TEGRA_186_SOC is not set
CONFIG_ARCH_TEGRA_210_SOC=y
CONFIG_ARCH_TEGRA=y
CONFIG_ARCH_THUNDER=y
@ -292,6 +293,7 @@ CONFIG_ARM_GLOBAL_TIMER=y
CONFIG_ARM_MHU=m
CONFIG_ARM_PL172_MPMC=m
CONFIG_ARM_PMU=y
CONFIG_ARM_PSCI_CHECKER=y
CONFIG_ARM_PSCI=y
# CONFIG_ARM_PTDUMP is not set
# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set
@ -960,6 +962,7 @@ CONFIG_CRYPTO_DEV_MARVELL_CESA=m
CONFIG_CRYPTO_DEV_MV_CESA=m
CONFIG_CRYPTO_DEV_QCE=m
CONFIG_CRYPTO_DEV_ROCKCHIP=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -1937,10 +1940,13 @@ CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
# CONFIG_I2C_HIX5HD2 is not set
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
# CONFIG_I2C_ISCH is not set
CONFIG_I2C=m
CONFIG_I2C_MLXCPLD=m
CONFIG_I2C_MUX_GPIO=m
CONFIG_I2C_MUX=m
CONFIG_I2C_MUX_MLXCPLD=m
CONFIG_I2C_MUX_PCA9541=m
CONFIG_I2C_MUX_PCA954x=m
CONFIG_I2C_MUX_PINCTRL=m
@ -1954,6 +1960,8 @@ CONFIG_I2C_PARPORT_LIGHT=m
CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
# CONFIG_I2C_PIIX4 is not set
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
CONFIG_I2C_QUP=m
CONFIG_I2C_RK3X=m
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
@ -2090,6 +2098,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2918,6 +2927,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3961,6 +3971,7 @@ CONFIG_PTP_1588_CLOCK=m
CONFIG_PTP_1588_CLOCK_PCH=m
CONFIG_PWM_BCM2835=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM_ROCKCHIP=m
CONFIG_PWM_SUN4I=m
@ -4941,8 +4952,8 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC is not set
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -5228,9 +5239,11 @@ CONFIG_TEGRA20_APB_DMA=y
CONFIG_TEGRA210_ADMA=y
CONFIG_TEGRA_ACONNECT=m
CONFIG_TEGRA_AHB=y
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_HOST1X_FIREWALL=y
CONFIG_TEGRA_HOST1X=m
CONFIG_TEGRA_IOMMU_SMMU=y
CONFIG_TEGRA_IVC=y
CONFIG_TEGRA_MC=y
CONFIG_TEGRA_SOCTHERM=m
CONFIG_TEGRA_WATCHDOG=m
@ -5290,6 +5303,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
# CONFIG_TLAN is not set
@ -5398,6 +5412,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -236,6 +236,7 @@ CONFIG_ARCH_SEATTLE=y
# CONFIG_ARCH_STRATIX10 is not set
CONFIG_ARCH_SUNXI=y
CONFIG_ARCH_TEGRA_132_SOC=y
# CONFIG_ARCH_TEGRA_186_SOC is not set
CONFIG_ARCH_TEGRA_210_SOC=y
CONFIG_ARCH_TEGRA=y
CONFIG_ARCH_THUNDER=y
@ -292,6 +293,7 @@ CONFIG_ARM_GLOBAL_TIMER=y
CONFIG_ARM_MHU=m
CONFIG_ARM_PL172_MPMC=m
CONFIG_ARM_PMU=y
CONFIG_ARM_PSCI_CHECKER=y
CONFIG_ARM_PSCI=y
# CONFIG_ARM_PTDUMP is not set
# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set
@ -959,6 +961,7 @@ CONFIG_CRYPTO_DEV_MARVELL_CESA=m
CONFIG_CRYPTO_DEV_MV_CESA=m
CONFIG_CRYPTO_DEV_QCE=m
CONFIG_CRYPTO_DEV_ROCKCHIP=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -1920,10 +1923,13 @@ CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
# CONFIG_I2C_HIX5HD2 is not set
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
# CONFIG_I2C_ISCH is not set
CONFIG_I2C=m
CONFIG_I2C_MLXCPLD=m
CONFIG_I2C_MUX_GPIO=m
CONFIG_I2C_MUX=m
CONFIG_I2C_MUX_MLXCPLD=m
CONFIG_I2C_MUX_PCA9541=m
CONFIG_I2C_MUX_PCA954x=m
CONFIG_I2C_MUX_PINCTRL=m
@ -1937,6 +1943,8 @@ CONFIG_I2C_PARPORT_LIGHT=m
CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
# CONFIG_I2C_PIIX4 is not set
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
CONFIG_I2C_QUP=m
CONFIG_I2C_RK3X=m
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
@ -2073,6 +2081,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2898,6 +2907,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3939,6 +3949,7 @@ CONFIG_PTP_1588_CLOCK=m
CONFIG_PTP_1588_CLOCK_PCH=m
CONFIG_PWM_BCM2835=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM_ROCKCHIP=m
CONFIG_PWM_SUN4I=m
@ -4918,8 +4929,8 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC is not set
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -5205,9 +5216,11 @@ CONFIG_TEGRA20_APB_DMA=y
CONFIG_TEGRA210_ADMA=y
CONFIG_TEGRA_ACONNECT=m
CONFIG_TEGRA_AHB=y
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_HOST1X_FIREWALL=y
CONFIG_TEGRA_HOST1X=m
CONFIG_TEGRA_IOMMU_SMMU=y
CONFIG_TEGRA_IVC=y
CONFIG_TEGRA_MC=y
CONFIG_TEGRA_SOCTHERM=m
CONFIG_TEGRA_WATCHDOG=m
@ -5267,6 +5280,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
# CONFIG_TLAN is not set
@ -5375,6 +5389,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -241,6 +241,7 @@ CONFIG_ARCH_SUNXI=y
# CONFIG_ARCH_TANGO is not set
CONFIG_ARCH_TEGRA_114_SOC=y
CONFIG_ARCH_TEGRA_124_SOC=y
# CONFIG_ARCH_TEGRA_186_SOC is not set
CONFIG_ARCH_TEGRA_2x_SOC=y
CONFIG_ARCH_TEGRA_3x_SOC=y
CONFIG_ARCH_TEGRA=y
@ -321,6 +322,7 @@ CONFIG_ARM_MVEBU_V7_CPUIDLE=y
CONFIG_ARM_PATCH_IDIV=y
CONFIG_ARM_PL172_MPMC=m
CONFIG_ARM_PMU=y
CONFIG_ARM_PSCI_CHECKER=y
CONFIG_ARM_PSCI=y
# CONFIG_ARM_PTDUMP is not set
# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set
@ -1037,6 +1039,7 @@ CONFIG_CRYPTO_DEV_ROCKCHIP=m
CONFIG_CRYPTO_DEV_S5P=m
CONFIG_CRYPTO_DEV_SAHARA=m
CONFIG_CRYPTO_DEV_SUN4I_SS=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -2108,10 +2111,13 @@ CONFIG_I2C_GPIO=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
CONFIG_I2C_IMX=m
# CONFIG_I2C_ISCH is not set
CONFIG_I2C_MLXCPLD=m
CONFIG_I2C_MUX_GPIO=m
CONFIG_I2C_MUX=m
CONFIG_I2C_MUX_MLXCPLD=m
CONFIG_I2C_MUX_PCA9541=m
CONFIG_I2C_MUX_PCA954x=m
CONFIG_I2C_MUX_PINCTRL=m
@ -2271,6 +2277,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -3169,6 +3176,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -4320,6 +4328,7 @@ CONFIG_PTP_1588_CLOCK_PCH=m
CONFIG_PWM_BCM2835=m
CONFIG_PWM_CROS_EC=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
CONFIG_PWM_IMX=m
CONFIG_PWM_OMAP_DMTIMER=m
# CONFIG_PWM_PCA9685 is not set
@ -5422,8 +5431,8 @@ CONFIG_SND_SOC_LPASS_PLATFORM=m
CONFIG_SND_SOC=m
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -5774,10 +5783,12 @@ CONFIG_TEGRA124_EMC=y
CONFIG_TEGRA20_APB_DMA=y
CONFIG_TEGRA20_MC=y
CONFIG_TEGRA_AHB=y
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_HOST1X_FIREWALL=y
CONFIG_TEGRA_HOST1X=m
CONFIG_TEGRA_IOMMU_GART=y
CONFIG_TEGRA_IOMMU_SMMU=y
CONFIG_TEGRA_IVC=y
CONFIG_TEGRA_MC=y
CONFIG_TEGRA_SOCTHERM=m
CONFIG_TEGRA_WATCHDOG=m
@ -5845,6 +5856,7 @@ CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_PIPE3=m
CONFIG_TI_SCI_PROTOCOL=m
CONFIG_TI_SOC_THERMAL=m
CONFIG_TI_ST=m
CONFIG_TI_SYSCON_RESET=m
@ -5965,6 +5977,7 @@ CONFIG_TYPHOON=m
# CONFIG_UACCESS_WITH_MEMCPY is not set
CONFIG_UBIFS_ATIME_SUPPORT=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS=m
CONFIG_UBIFS_FS_ZLIB=y

View File

@ -233,6 +233,7 @@ CONFIG_ARCH_SUNXI=y
# CONFIG_ARCH_TANGO is not set
CONFIG_ARCH_TEGRA_114_SOC=y
CONFIG_ARCH_TEGRA_124_SOC=y
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCH_TEGRA_2x_SOC is not set
# CONFIG_ARCH_TEGRA_3x_SOC is not set
CONFIG_ARCH_TEGRA=y
@ -311,6 +312,7 @@ CONFIG_ARM_MVEBU_V7_CPUIDLE=y
CONFIG_ARM_PATCH_IDIV=y
CONFIG_ARM_PL172_MPMC=m
CONFIG_ARM_PMU=y
CONFIG_ARM_PSCI_CHECKER=y
CONFIG_ARM_PSCI=y
# CONFIG_ARM_PTDUMP is not set
# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set
@ -993,6 +995,7 @@ CONFIG_CRYPTO_DEV_MV_CESA=m
CONFIG_CRYPTO_DEV_ROCKCHIP=m
CONFIG_CRYPTO_DEV_S5P=m
CONFIG_CRYPTO_DEV_SUN4I_SS=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -2015,9 +2018,12 @@ CONFIG_I2C_GPIO=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
# CONFIG_I2C_ISCH is not set
CONFIG_I2C_MLXCPLD=m
CONFIG_I2C_MUX_GPIO=m
CONFIG_I2C_MUX=m
CONFIG_I2C_MUX_MLXCPLD=m
CONFIG_I2C_MUX_PCA9541=m
CONFIG_I2C_MUX_PCA954x=m
CONFIG_I2C_MUX_PINCTRL=m
@ -2031,6 +2037,8 @@ CONFIG_I2C_PARPORT_LIGHT=m
CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
# CONFIG_I2C_PIIX4 is not set
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
CONFIG_I2C_RK3X=m
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_S3C2410=m
@ -2166,6 +2174,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -3040,6 +3049,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -4104,6 +4114,7 @@ CONFIG_PTP_1588_CLOCK_PCH=m
CONFIG_PWM_BCM2835=m
CONFIG_PWM_CROS_EC=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM_ROCKCHIP=m
CONFIG_PWM_SAMSUNG=m
@ -5106,8 +5117,8 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
CONFIG_SND_SOC=m
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -5428,10 +5439,12 @@ CONFIG_TEGRA124_EMC=y
CONFIG_TEGRA20_APB_DMA=y
# CONFIG_TEGRA20_MC is not set
CONFIG_TEGRA_AHB=y
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_HOST1X_FIREWALL=y
CONFIG_TEGRA_HOST1X=m
# CONFIG_TEGRA_IOMMU_GART is not set
CONFIG_TEGRA_IOMMU_SMMU=y
CONFIG_TEGRA_IVC=y
CONFIG_TEGRA_MC=y
CONFIG_TEGRA_SOCTHERM=m
CONFIG_TEGRA_WATCHDOG=m
@ -5492,6 +5505,7 @@ CONFIG_TI_MESSAGE_MANAGER=m
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
CONFIG_TI_SOC_THERMAL=m
# CONFIG_TI_ST is not set
CONFIG_TI_SYSCON_RESET=m
@ -5604,6 +5618,7 @@ CONFIG_TYPHOON=m
# CONFIG_UACCESS_WITH_MEMCPY is not set
CONFIG_UBIFS_ATIME_SUPPORT=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS=m
CONFIG_UBIFS_FS_ZLIB=y

View File

@ -233,6 +233,7 @@ CONFIG_ARCH_SUNXI=y
# CONFIG_ARCH_TANGO is not set
CONFIG_ARCH_TEGRA_114_SOC=y
CONFIG_ARCH_TEGRA_124_SOC=y
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCH_TEGRA_2x_SOC is not set
# CONFIG_ARCH_TEGRA_3x_SOC is not set
CONFIG_ARCH_TEGRA=y
@ -311,6 +312,7 @@ CONFIG_ARM_MVEBU_V7_CPUIDLE=y
CONFIG_ARM_PATCH_IDIV=y
CONFIG_ARM_PL172_MPMC=m
CONFIG_ARM_PMU=y
CONFIG_ARM_PSCI_CHECKER=y
CONFIG_ARM_PSCI=y
# CONFIG_ARM_PTDUMP is not set
# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set
@ -992,6 +994,7 @@ CONFIG_CRYPTO_DEV_MV_CESA=m
CONFIG_CRYPTO_DEV_ROCKCHIP=m
CONFIG_CRYPTO_DEV_S5P=m
CONFIG_CRYPTO_DEV_SUN4I_SS=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -1999,9 +2002,12 @@ CONFIG_I2C_GPIO=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
# CONFIG_I2C_ISCH is not set
CONFIG_I2C_MLXCPLD=m
CONFIG_I2C_MUX_GPIO=m
CONFIG_I2C_MUX=m
CONFIG_I2C_MUX_MLXCPLD=m
CONFIG_I2C_MUX_PCA9541=m
CONFIG_I2C_MUX_PCA954x=m
CONFIG_I2C_MUX_PINCTRL=m
@ -2015,6 +2021,8 @@ CONFIG_I2C_PARPORT_LIGHT=m
CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
# CONFIG_I2C_PIIX4 is not set
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
CONFIG_I2C_RK3X=m
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_S3C2410=m
@ -2150,6 +2158,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -3021,6 +3030,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -4083,6 +4093,7 @@ CONFIG_PTP_1588_CLOCK_PCH=m
CONFIG_PWM_BCM2835=m
CONFIG_PWM_CROS_EC=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM_ROCKCHIP=m
CONFIG_PWM_SAMSUNG=m
@ -5084,8 +5095,8 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
CONFIG_SND_SOC=m
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -5406,10 +5417,12 @@ CONFIG_TEGRA124_EMC=y
CONFIG_TEGRA20_APB_DMA=y
# CONFIG_TEGRA20_MC is not set
CONFIG_TEGRA_AHB=y
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_HOST1X_FIREWALL=y
CONFIG_TEGRA_HOST1X=m
# CONFIG_TEGRA_IOMMU_GART is not set
CONFIG_TEGRA_IOMMU_SMMU=y
CONFIG_TEGRA_IVC=y
CONFIG_TEGRA_MC=y
CONFIG_TEGRA_SOCTHERM=m
CONFIG_TEGRA_WATCHDOG=m
@ -5470,6 +5483,7 @@ CONFIG_TI_MESSAGE_MANAGER=m
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
CONFIG_TI_SOC_THERMAL=m
# CONFIG_TI_ST is not set
CONFIG_TI_SYSCON_RESET=m
@ -5582,6 +5596,7 @@ CONFIG_TYPHOON=m
# CONFIG_UACCESS_WITH_MEMCPY is not set
CONFIG_UBIFS_ATIME_SUPPORT=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS=m
CONFIG_UBIFS_FS_ZLIB=y

View File

@ -241,6 +241,7 @@ CONFIG_ARCH_SUNXI=y
# CONFIG_ARCH_TANGO is not set
CONFIG_ARCH_TEGRA_114_SOC=y
CONFIG_ARCH_TEGRA_124_SOC=y
# CONFIG_ARCH_TEGRA_186_SOC is not set
CONFIG_ARCH_TEGRA_2x_SOC=y
CONFIG_ARCH_TEGRA_3x_SOC=y
CONFIG_ARCH_TEGRA=y
@ -321,6 +322,7 @@ CONFIG_ARM_MVEBU_V7_CPUIDLE=y
CONFIG_ARM_PATCH_IDIV=y
CONFIG_ARM_PL172_MPMC=m
CONFIG_ARM_PMU=y
CONFIG_ARM_PSCI_CHECKER=y
CONFIG_ARM_PSCI=y
# CONFIG_ARM_PTDUMP is not set
# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set
@ -1036,6 +1038,7 @@ CONFIG_CRYPTO_DEV_ROCKCHIP=m
CONFIG_CRYPTO_DEV_S5P=m
CONFIG_CRYPTO_DEV_SAHARA=m
CONFIG_CRYPTO_DEV_SUN4I_SS=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -2092,10 +2095,13 @@ CONFIG_I2C_GPIO=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
CONFIG_I2C_IMX=m
# CONFIG_I2C_ISCH is not set
CONFIG_I2C_MLXCPLD=m
CONFIG_I2C_MUX_GPIO=m
CONFIG_I2C_MUX=m
CONFIG_I2C_MUX_MLXCPLD=m
CONFIG_I2C_MUX_PCA9541=m
CONFIG_I2C_MUX_PCA954x=m
CONFIG_I2C_MUX_PINCTRL=m
@ -2255,6 +2261,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -3150,6 +3157,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -4299,6 +4307,7 @@ CONFIG_PTP_1588_CLOCK_PCH=m
CONFIG_PWM_BCM2835=m
CONFIG_PWM_CROS_EC=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
CONFIG_PWM_IMX=m
CONFIG_PWM_OMAP_DMTIMER=m
# CONFIG_PWM_PCA9685 is not set
@ -5400,8 +5409,8 @@ CONFIG_SND_SOC_LPASS_PLATFORM=m
CONFIG_SND_SOC=m
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -5752,10 +5761,12 @@ CONFIG_TEGRA124_EMC=y
CONFIG_TEGRA20_APB_DMA=y
CONFIG_TEGRA20_MC=y
CONFIG_TEGRA_AHB=y
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_HOST1X_FIREWALL=y
CONFIG_TEGRA_HOST1X=m
CONFIG_TEGRA_IOMMU_GART=y
CONFIG_TEGRA_IOMMU_SMMU=y
CONFIG_TEGRA_IVC=y
CONFIG_TEGRA_MC=y
CONFIG_TEGRA_SOCTHERM=m
CONFIG_TEGRA_WATCHDOG=m
@ -5823,6 +5834,7 @@ CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_PIPE3=m
CONFIG_TI_SCI_PROTOCOL=m
CONFIG_TI_SOC_THERMAL=m
CONFIG_TI_ST=m
CONFIG_TI_SYSCON_RESET=m
@ -5943,6 +5955,7 @@ CONFIG_TYPHOON=m
# CONFIG_UACCESS_WITH_MEMCPY is not set
CONFIG_UBIFS_ATIME_SUPPORT=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS=m
CONFIG_UBIFS_FS_ZLIB=y

View File

@ -223,10 +223,12 @@ CONFIG_APPLE_PROPERTIES=y
CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
# CONFIG_ARM64_PTDUMP is not set
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
CONFIG_ASUS_LAPTOP=m
@ -859,6 +861,7 @@ CONFIG_CRYPTO_DEV_QAT_C62X=m
CONFIG_CRYPTO_DEV_QAT_C62XVF=m
CONFIG_CRYPTO_DEV_QAT_DH895xCC=m
CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -1850,10 +1853,13 @@ CONFIG_I2C_DIOLAN_U2C=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
CONFIG_I2C_I801=m
CONFIG_I2C_IMX_LPI2C=m
CONFIG_I2C_ISCH=m
CONFIG_I2C_ISMT=m
CONFIG_I2C_MLXCPLD=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1866,6 +1872,7 @@ CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
CONFIG_I2C_PIIX4=m
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SCMI=m
@ -2000,6 +2007,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2877,6 +2885,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
# CONFIG_MLX5_INFINIBAND is not set
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3859,6 +3868,7 @@ CONFIG_PTP_1588_CLOCK_PCH=m
CONFIG_PVPANIC=m
CONFIG_PWM_CRC=y
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
CONFIG_PWM_LPSS=m
CONFIG_PWM_LPSS_PCI=m
CONFIG_PWM_LPSS_PLATFORM=m
@ -4770,8 +4780,8 @@ CONFIG_SND_SOC_INTEL_SST=m
CONFIG_SND_SOC=m
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -5029,6 +5039,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -5087,6 +5099,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -5199,6 +5212,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -223,10 +223,12 @@ CONFIG_APPLE_PROPERTIES=y
CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
CONFIG_ARM64_PTDUMP=y
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
CONFIG_ASUS_LAPTOP=m
@ -860,6 +862,7 @@ CONFIG_CRYPTO_DEV_QAT_C62X=m
CONFIG_CRYPTO_DEV_QAT_C62XVF=m
CONFIG_CRYPTO_DEV_QAT_DH895xCC=m
CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -1867,10 +1870,13 @@ CONFIG_I2C_DIOLAN_U2C=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
CONFIG_I2C_I801=m
CONFIG_I2C_IMX_LPI2C=m
CONFIG_I2C_ISCH=m
CONFIG_I2C_ISMT=m
CONFIG_I2C_MLXCPLD=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1883,6 +1889,7 @@ CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
CONFIG_I2C_PIIX4=m
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SCMI=m
@ -2017,6 +2024,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2896,6 +2904,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
# CONFIG_MLX5_INFINIBAND is not set
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3879,6 +3888,7 @@ CONFIG_PTP_1588_CLOCK_PCH=m
CONFIG_PVPANIC=m
CONFIG_PWM_CRC=y
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
CONFIG_PWM_LPSS=m
CONFIG_PWM_LPSS_PCI=m
CONFIG_PWM_LPSS_PLATFORM=m
@ -4791,8 +4801,8 @@ CONFIG_SND_SOC_INTEL_SST=m
CONFIG_SND_SOC=m
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -5050,6 +5060,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -5108,6 +5120,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -5220,6 +5233,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -223,10 +223,12 @@ CONFIG_APPLE_PROPERTIES=y
CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
CONFIG_ARM64_PTDUMP=y
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
CONFIG_ASUS_LAPTOP=m
@ -860,6 +862,7 @@ CONFIG_CRYPTO_DEV_QAT_C62X=m
CONFIG_CRYPTO_DEV_QAT_C62XVF=m
CONFIG_CRYPTO_DEV_QAT_DH895xCC=m
CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -1867,10 +1870,13 @@ CONFIG_I2C_DIOLAN_U2C=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
CONFIG_I2C_I801=m
CONFIG_I2C_IMX_LPI2C=m
CONFIG_I2C_ISCH=m
CONFIG_I2C_ISMT=m
CONFIG_I2C_MLXCPLD=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1883,6 +1889,7 @@ CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
CONFIG_I2C_PIIX4=m
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SCMI=m
@ -2017,6 +2024,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2896,6 +2904,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
# CONFIG_MLX5_INFINIBAND is not set
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3879,6 +3888,7 @@ CONFIG_PTP_1588_CLOCK_PCH=m
CONFIG_PVPANIC=m
CONFIG_PWM_CRC=y
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
CONFIG_PWM_LPSS=m
CONFIG_PWM_LPSS_PCI=m
CONFIG_PWM_LPSS_PLATFORM=m
@ -4791,8 +4801,8 @@ CONFIG_SND_SOC_INTEL_SST=m
CONFIG_SND_SOC=m
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -5050,6 +5060,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -5108,6 +5120,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -5220,6 +5233,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -223,10 +223,12 @@ CONFIG_APPLE_PROPERTIES=y
CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
# CONFIG_ARM64_PTDUMP is not set
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
CONFIG_ASUS_LAPTOP=m
@ -859,6 +861,7 @@ CONFIG_CRYPTO_DEV_QAT_C62X=m
CONFIG_CRYPTO_DEV_QAT_C62XVF=m
CONFIG_CRYPTO_DEV_QAT_DH895xCC=m
CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -1850,10 +1853,13 @@ CONFIG_I2C_DIOLAN_U2C=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
CONFIG_I2C_I801=m
CONFIG_I2C_IMX_LPI2C=m
CONFIG_I2C_ISCH=m
CONFIG_I2C_ISMT=m
CONFIG_I2C_MLXCPLD=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1866,6 +1872,7 @@ CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
CONFIG_I2C_PIIX4=m
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SCMI=m
@ -2000,6 +2007,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2877,6 +2885,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
# CONFIG_MLX5_INFINIBAND is not set
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3859,6 +3868,7 @@ CONFIG_PTP_1588_CLOCK_PCH=m
CONFIG_PVPANIC=m
CONFIG_PWM_CRC=y
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
CONFIG_PWM_LPSS=m
CONFIG_PWM_LPSS_PCI=m
CONFIG_PWM_LPSS_PLATFORM=m
@ -4770,8 +4780,8 @@ CONFIG_SND_SOC_INTEL_SST=m
CONFIG_SND_SOC=m
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -5029,6 +5039,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -5087,6 +5099,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -5199,6 +5212,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -185,10 +185,12 @@ CONFIG_APPLE_AIRPORT=m
CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
CONFIG_ARM64_PTDUMP=y
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set
@ -847,6 +849,7 @@ CONFIG_CRYPTO_DEV_NX_COMPRESS_POWERNV=m
CONFIG_CRYPTO_DEV_NX_COMPRESS_PSERIES=m
CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
CONFIG_CRYPTO_DEV_NX=y
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DEV_VMX_ENCRYPT=m
CONFIG_CRYPTO_DEV_VMX=y
CONFIG_CRYPTO_DH=m
@ -1789,11 +1792,14 @@ CONFIG_I2C_DIOLAN_U2C=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
# CONFIG_I2C_ISCH is not set
CONFIG_I2C=m
CONFIG_I2C_MLXCPLD=m
CONFIG_I2C_MPC=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1807,6 +1813,8 @@ CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
# CONFIG_I2C_PIIX4 is not set
CONFIG_I2C_POWERMAC=y
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SI470X=m
@ -1946,6 +1954,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2770,6 +2779,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3739,6 +3749,7 @@ CONFIG_PSTORE=y
CONFIG_PTP_1588_CLOCK=m
CONFIG_PTP_1588_CLOCK_PCH=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM=y
# CONFIG_PWRSEQ_EMMC is not set
@ -4635,8 +4646,8 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC is not set
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -4886,6 +4897,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -4938,6 +4951,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -5044,6 +5058,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -185,10 +185,12 @@ CONFIG_APPLE_AIRPORT=m
CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
# CONFIG_ARM64_PTDUMP is not set
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set
@ -846,6 +848,7 @@ CONFIG_CRYPTO_DEV_NX_COMPRESS_POWERNV=m
CONFIG_CRYPTO_DEV_NX_COMPRESS_PSERIES=m
CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
CONFIG_CRYPTO_DEV_NX=y
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DEV_VMX_ENCRYPT=m
CONFIG_CRYPTO_DEV_VMX=y
CONFIG_CRYPTO_DH=m
@ -1772,11 +1775,14 @@ CONFIG_I2C_DIOLAN_U2C=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
# CONFIG_I2C_ISCH is not set
CONFIG_I2C=m
CONFIG_I2C_MLXCPLD=m
CONFIG_I2C_MPC=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1790,6 +1796,8 @@ CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
# CONFIG_I2C_PIIX4 is not set
CONFIG_I2C_POWERMAC=y
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SI470X=m
@ -1929,6 +1937,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2750,6 +2759,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3717,6 +3727,7 @@ CONFIG_PSTORE=y
CONFIG_PTP_1588_CLOCK=m
CONFIG_PTP_1588_CLOCK_PCH=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM=y
# CONFIG_PWRSEQ_EMMC is not set
@ -4612,8 +4623,8 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC is not set
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -4863,6 +4874,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -4915,6 +4928,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -5021,6 +5035,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -179,10 +179,12 @@ CONFIG_APM_POWER=m
CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
CONFIG_ARM64_PTDUMP=y
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set
@ -802,6 +804,7 @@ CONFIG_CRYPTO_DEV_NX_COMPRESS_POWERNV=m
CONFIG_CRYPTO_DEV_NX_COMPRESS_PSERIES=m
CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
CONFIG_CRYPTO_DEV_NX=y
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DEV_VMX_ENCRYPT=m
CONFIG_CRYPTO_DEV_VMX=y
CONFIG_CRYPTO_DH=m
@ -1742,11 +1745,14 @@ CONFIG_I2C_DIOLAN_U2C=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
# CONFIG_I2C_ISCH is not set
CONFIG_I2C=m
CONFIG_I2C_MLXCPLD=m
CONFIG_I2C_MPC=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1759,6 +1765,8 @@ CONFIG_I2C_PARPORT_LIGHT=m
CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
# CONFIG_I2C_PIIX4 is not set
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SI470X=m
@ -1892,6 +1900,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2716,6 +2725,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3679,6 +3689,7 @@ CONFIG_PSTORE=y
CONFIG_PTP_1588_CLOCK=m
CONFIG_PTP_1588_CLOCK_PCH=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM=y
# CONFIG_PWRSEQ_EMMC is not set
@ -4564,8 +4575,8 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC is not set
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -4815,6 +4826,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -4867,6 +4880,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -4973,6 +4987,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -179,10 +179,12 @@ CONFIG_APM_POWER=m
CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
# CONFIG_ARM64_PTDUMP is not set
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set
@ -801,6 +803,7 @@ CONFIG_CRYPTO_DEV_NX_COMPRESS_POWERNV=m
CONFIG_CRYPTO_DEV_NX_COMPRESS_PSERIES=m
CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
CONFIG_CRYPTO_DEV_NX=y
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DEV_VMX_ENCRYPT=m
CONFIG_CRYPTO_DEV_VMX=y
CONFIG_CRYPTO_DH=m
@ -1725,11 +1728,14 @@ CONFIG_I2C_DIOLAN_U2C=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
# CONFIG_I2C_ISCH is not set
CONFIG_I2C=m
CONFIG_I2C_MLXCPLD=m
CONFIG_I2C_MPC=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1742,6 +1748,8 @@ CONFIG_I2C_PARPORT_LIGHT=m
CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
# CONFIG_I2C_PIIX4 is not set
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SI470X=m
@ -1875,6 +1883,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2696,6 +2705,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3657,6 +3667,7 @@ CONFIG_PSTORE=y
CONFIG_PTP_1588_CLOCK=m
CONFIG_PTP_1588_CLOCK_PCH=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM=y
# CONFIG_PWRSEQ_EMMC is not set
@ -4541,8 +4552,8 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC is not set
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -4792,6 +4803,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -4844,6 +4857,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -4950,6 +4964,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -179,10 +179,12 @@ CONFIG_APM_POWER=m
CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
CONFIG_ARM64_PTDUMP=y
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set
@ -802,6 +804,7 @@ CONFIG_CRYPTO_DEV_NX_COMPRESS_POWERNV=m
CONFIG_CRYPTO_DEV_NX_COMPRESS_PSERIES=m
CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
CONFIG_CRYPTO_DEV_NX=y
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DEV_VMX_ENCRYPT=m
CONFIG_CRYPTO_DEV_VMX=y
CONFIG_CRYPTO_DH=m
@ -1741,11 +1744,14 @@ CONFIG_I2C_DIOLAN_U2C=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
# CONFIG_I2C_ISCH is not set
CONFIG_I2C=m
CONFIG_I2C_MLXCPLD=m
CONFIG_I2C_MPC=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1758,6 +1764,8 @@ CONFIG_I2C_PARPORT_LIGHT=m
CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
# CONFIG_I2C_PIIX4 is not set
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SI470X=m
@ -1891,6 +1899,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2715,6 +2724,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3678,6 +3688,7 @@ CONFIG_PSTORE=y
CONFIG_PTP_1588_CLOCK=m
CONFIG_PTP_1588_CLOCK_PCH=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM=y
# CONFIG_PWRSEQ_EMMC is not set
@ -4563,8 +4574,8 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC is not set
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -4814,6 +4825,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -4866,6 +4879,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -4972,6 +4986,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -179,10 +179,12 @@ CONFIG_APM_POWER=m
CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
# CONFIG_ARM64_PTDUMP is not set
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set
@ -801,6 +803,7 @@ CONFIG_CRYPTO_DEV_NX_COMPRESS_POWERNV=m
CONFIG_CRYPTO_DEV_NX_COMPRESS_PSERIES=m
CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
CONFIG_CRYPTO_DEV_NX=y
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DEV_VMX_ENCRYPT=m
CONFIG_CRYPTO_DEV_VMX=y
CONFIG_CRYPTO_DH=m
@ -1724,11 +1727,14 @@ CONFIG_I2C_DIOLAN_U2C=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
# CONFIG_I2C_ISCH is not set
CONFIG_I2C=m
CONFIG_I2C_MLXCPLD=m
CONFIG_I2C_MPC=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1741,6 +1747,8 @@ CONFIG_I2C_PARPORT_LIGHT=m
CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
# CONFIG_I2C_PIIX4 is not set
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SI470X=m
@ -1874,6 +1882,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2695,6 +2704,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3656,6 +3666,7 @@ CONFIG_PSTORE=y
CONFIG_PTP_1588_CLOCK=m
CONFIG_PTP_1588_CLOCK_PCH=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM=y
# CONFIG_PWRSEQ_EMMC is not set
@ -4540,8 +4551,8 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC is not set
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -4791,6 +4802,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -4843,6 +4856,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -4949,6 +4963,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -181,10 +181,12 @@ CONFIG_APPLDATA_OS=m
CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
CONFIG_ARM64_PTDUMP=y
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set
@ -794,6 +796,7 @@ CONFIG_CRYPTO_DES_S390=m
CONFIG_CRYPTO_DEV_CHELSIO=m
CONFIG_CRYPTO_DEV_HIFN_795X=m
CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -1697,10 +1700,13 @@ CONFIG_I2C_DIOLAN_U2C=m
# CONFIG_I2C_HELPER_AUTO is not set
CONFIG_I2C_HID=m
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
# CONFIG_I2C_ISCH is not set
# CONFIG_I2C is not set
CONFIG_I2C_MLXCPLD=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1712,6 +1718,8 @@ CONFIG_I2C_HID=m
# CONFIG_I2C_PARPORT_LIGHT is not set
CONFIG_I2C_PCA_PLATFORM=m
# CONFIG_I2C_PIIX4 is not set
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SI470X=m
@ -1841,6 +1849,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2649,6 +2658,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3558,6 +3568,7 @@ CONFIG_PSTORE=y
# CONFIG_PTP_1588_CLOCK is not set
CONFIG_PTP_1588_CLOCK_PCH=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM=y
# CONFIG_PWRSEQ_EMMC is not set
@ -4450,8 +4461,8 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
CONFIG_SND_SOC=m
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -4697,6 +4708,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -4749,6 +4762,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -4861,6 +4875,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -181,10 +181,12 @@ CONFIG_APPLDATA_OS=m
CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
# CONFIG_ARM64_PTDUMP is not set
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set
@ -793,6 +795,7 @@ CONFIG_CRYPTO_DES_S390=m
CONFIG_CRYPTO_DEV_CHELSIO=m
CONFIG_CRYPTO_DEV_HIFN_795X=m
CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -1680,10 +1683,13 @@ CONFIG_I2C_DIOLAN_U2C=m
# CONFIG_I2C_HELPER_AUTO is not set
CONFIG_I2C_HID=m
# CONFIG_I2C_I801 is not set
CONFIG_I2C_IMX_LPI2C=m
# CONFIG_I2C_ISCH is not set
# CONFIG_I2C is not set
CONFIG_I2C_MLXCPLD=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1695,6 +1701,8 @@ CONFIG_I2C_HID=m
# CONFIG_I2C_PARPORT_LIGHT is not set
CONFIG_I2C_PCA_PLATFORM=m
# CONFIG_I2C_PIIX4 is not set
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SI470X=m
@ -1824,6 +1832,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2629,6 +2638,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
CONFIG_MLXSW_CORE_THERMAL=y
@ -3536,6 +3546,7 @@ CONFIG_PSTORE=y
# CONFIG_PTP_1588_CLOCK is not set
CONFIG_PTP_1588_CLOCK_PCH=m
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM=y
# CONFIG_PWRSEQ_EMMC is not set
@ -4427,8 +4438,8 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
CONFIG_SND_SOC=m
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -4674,6 +4685,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -4726,6 +4739,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -4838,6 +4852,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -222,10 +222,12 @@ CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_MEMORY_PROBE is not set
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
CONFIG_ARM64_PTDUMP=y
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
CONFIG_ASUS_LAPTOP=m
@ -875,6 +877,7 @@ CONFIG_CRYPTO_DEV_QAT_C62X=m
CONFIG_CRYPTO_DEV_QAT_C62XVF=m
CONFIG_CRYPTO_DEV_QAT_DH895xCC=m
CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -1892,10 +1895,13 @@ CONFIG_I2C_DIOLAN_U2C=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
CONFIG_I2C_I801=m
CONFIG_I2C_IMX_LPI2C=m
CONFIG_I2C_ISCH=m
CONFIG_I2C_ISMT=m
CONFIG_I2C_MLXCPLD=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1907,6 +1913,8 @@ CONFIG_I2C_PARPORT_LIGHT=m
CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
CONFIG_I2C_PIIX4=m
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SCMI=m
@ -2045,6 +2053,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2924,6 +2933,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLX_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
@ -3898,6 +3908,7 @@ CONFIG_PTP_1588_CLOCK_PCH=m
CONFIG_PVPANIC=m
CONFIG_PWM_CRC=y
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
CONFIG_PWM_LPSS=m
CONFIG_PWM_LPSS_PCI=m
CONFIG_PWM_LPSS_PLATFORM=m
@ -4817,8 +4828,8 @@ CONFIG_SND_SOC_INTEL_SST=m
CONFIG_SND_SOC=m
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -5079,6 +5090,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -5137,6 +5150,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -5249,6 +5263,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -222,10 +222,12 @@ CONFIG_AQUANTIA_PHY=m
CONFIG_AR5523=m
CONFIG_ARC_EMAC=m
# CONFIG_ARCH_MEMORY_PROBE is not set
# CONFIG_ARCH_TEGRA_186_SOC is not set
# CONFIG_ARCNET is not set
# CONFIG_ARM64_PTDUMP is not set
# CONFIG_ARM64_SW_TTBR0_PAN is not set
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
CONFIG_ARM_PSCI_CHECKER=y
# CONFIG_ARM_SCPI_PROTOCOL is not set
# CONFIG_AS3935 is not set
CONFIG_ASUS_LAPTOP=m
@ -874,6 +876,7 @@ CONFIG_CRYPTO_DEV_QAT_C62X=m
CONFIG_CRYPTO_DEV_QAT_C62XVF=m
CONFIG_CRYPTO_DEV_QAT_DH895xCC=m
CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m
CONFIG_CRYPTO_DEV_VIRTIO=m
CONFIG_CRYPTO_DH=m
CONFIG_CRYPTO_DRBG_CTR=y
CONFIG_CRYPTO_DRBG_HASH=y
@ -1875,10 +1878,13 @@ CONFIG_I2C_DIOLAN_U2C=m
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_HID=m
CONFIG_I2C_I801=m
CONFIG_I2C_IMX_LPI2C=m
CONFIG_I2C_ISCH=m
CONFIG_I2C_ISMT=m
CONFIG_I2C_MLXCPLD=m
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_MUX_MLXCPLD=m
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_MUX_PINCTRL is not set
@ -1890,6 +1896,8 @@ CONFIG_I2C_PARPORT_LIGHT=m
CONFIG_I2C_PARPORT=m
CONFIG_I2C_PCA_PLATFORM=m
CONFIG_I2C_PIIX4=m
CONFIG_I2C_PXA=m
# CONFIG_I2C_PXA_SLAVE is not set
# CONFIG_I2C_RK3X is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
CONFIG_I2C_SCMI=m
@ -2028,6 +2036,7 @@ CONFIG_INFINIBAND_SRPT=m
CONFIG_INFINIBAND_USER_ACCESS=m
CONFIG_INFINIBAND_USER_MAD=m
CONFIG_INFINIBAND_USNIC=m
CONFIG_INFINIBAND_VMWARE_PVRDMA=m
# CONFIG_INFTL is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY_USER=y
@ -2905,6 +2914,7 @@ CONFIG_MLX5_CORE_EN=y
CONFIG_MLX5_CORE=m
CONFIG_MLX5_INFINIBAND=m
# CONFIG_MLX90614 is not set
CONFIG_MLX_CPLD_PLATFORM=m
CONFIG_MLX_PLATFORM=m
CONFIG_MLXSW_CORE_HWMON=y
CONFIG_MLXSW_CORE=m
@ -3878,6 +3888,7 @@ CONFIG_PTP_1588_CLOCK_PCH=m
CONFIG_PVPANIC=m
CONFIG_PWM_CRC=y
# CONFIG_PWM_FSL_FTM is not set
CONFIG_PWM_HIBVT=m
CONFIG_PWM_LPSS=m
CONFIG_PWM_LPSS_PCI=m
CONFIG_PWM_LPSS_PLATFORM=m
@ -4796,8 +4807,8 @@ CONFIG_SND_SOC_INTEL_SST=m
CONFIG_SND_SOC=m
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9860 is not set
CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m
CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m
# CONFIG_SND_SOC_MSM8916_WCD_ANALOG is not set
# CONFIG_SND_SOC_MSM8916_WCD_DIGITAL is not set
# CONFIG_SND_SOC_NAU8810 is not set
# CONFIG_SND_SOC_PCM1681 is not set
# CONFIG_SND_SOC_PCM179X_I2C is not set
@ -5058,6 +5069,8 @@ CONFIG_TCP_CONG_YEAH=m
CONFIG_TCP_MD5SIG=y
# CONFIG_TCS3414 is not set
# CONFIG_TCS3472 is not set
CONFIG_TEGRA_GMI=m
CONFIG_TEGRA_IVC=y
CONFIG_TEHUTI=m
CONFIG_TEKRAM_DONGLE=m
CONFIG_TELCLOCK=m
@ -5116,6 +5129,7 @@ CONFIG_TIMER_STATS=y
CONFIG_TIPC=m
# CONFIG_TIPC_MEDIA_IB is not set
CONFIG_TIPC_MEDIA_UDP=y
CONFIG_TI_SCI_PROTOCOL=m
# CONFIG_TI_ST is not set
# CONFIG_TI_SYSCON_RESET is not set
CONFIG_TLAN=m
@ -5228,6 +5242,7 @@ CONFIG_TUN=m
CONFIG_TYPHOON=m
CONFIG_UBIFS_ATIME_SUPPORT=y
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
CONFIG_UBIFS_FS_ENCRYPTION=y
CONFIG_UBIFS_FS=m
# CONFIG_UBSAN_ALIGNMENT is not set
# CONFIG_UBSAN is not set

View File

@ -69,7 +69,7 @@ Summary: The Linux kernel
# The rc snapshot level
%global rcrev 0
# The git snapshot level
%define gitrev 3
%define gitrev 4
# Set rpm version accordingly
%define rpmversion 4.%{upstream_sublevel}.0
%endif
@ -498,16 +498,11 @@ Patch421: qcom-QDF2432-tmp-errata.patch
# http://www.spinics.net/lists/arm-kernel/msg490981.html
Patch422: geekbox-v4-device-tree-support.patch
# http://www.spinics.net/lists/linux-pci/msg53991.html
# https://patchwork.kernel.org/patch/9337113/
Patch425: arm64-pcie-quirks.patch
# http://www.spinics.net/lists/linux-tegra/msg26029.html
Patch426: usb-phy-tegra-Add-38.4MHz-clock-table-entry.patch
# Fix OMAP4 (pandaboard)
Patch427: arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch
Patch428: ARM-OMAP4-Fix-crashes.patch
# Not particularly happy we don't yet have a proper upstream resolution this is the right direction
# https://www.spinics.net/lists/arm-kernel/msg535191.html
@ -522,8 +517,6 @@ Patch433: AllWinner-net-emac.patch
Patch434: ARM-Drop-fixed-200-Hz-timer-requirement-from-Samsung-platforms.patch
Patch435: imx6sx-Add-UDOO-Neo-support.patch
Patch460: lib-cpumask-Make-CPUMASK_OFFSTACK-usable-without-deb.patch
Patch466: input-kill-stupid-messages.patch
@ -2139,6 +2132,9 @@ fi
#
#
%changelog
* Fri Dec 16 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.10.0-0.rc0.git4.1
- Linux v4.9-10415-g73e2e0c
* Thu Dec 15 2016 Justin M. Forbes <jforbes@fedoraproject.org> - 4.10.0-0.rc0.git3.1
- Linux v4.9-8648-g5cc60ae

View File

@ -1,3 +1,3 @@
SHA512 (linux-4.9.tar.xz) = bf67ff812cc3cb7e5059e82cc5db0d9a7c5637f7ed9a42e4730c715bf7047c81ed3a571225f92a33ef0b6d65f35595bc32d773356646df2627da55e9bc7f1f1a
SHA512 (perf-man-4.9.tar.gz) = d23bb3da1eadd6623fddbf4696948de7675f3dcf57c711a7427dd7ae111394f58d8f42752938bbea7cd219f1e7f6f116fc67a1c74f769711063940a065f37b99
SHA512 (patch-4.9-git3.xz) = 05f6b1ffaba6152fc314a528989f7ab283ae3b7617896b5dd33f224046ff479e2042132afa6140dff207aac06a77bd8375722c90904f6034398af3ba7fe198c2
SHA512 (patch-4.9-git4.xz) = 8236459a75c386cf678bb448438fdf44d5dc5659a4ee8b47eb75e05287830dbd588794c4a79bf7730e62df52a858ed70cf88a55c205cde9e9154ee4a9243f389