Linux v4.15-2341-g3da90b159b14
This commit is contained in:
Justin M. Forbes
parent
98c76e090f
commit
c0522a6391
@ -1,106 +0,0 @@
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From cb1072f66e72eda65a8f7ac37d32c9f4217af6ba Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Tue, 21 Nov 2017 14:44:15 +0100
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Subject: [PATCH 1/3] ahci: Annotate PCI ids for mobile Intel chipsets as such
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Intel uses different SATA PCI ids for the Desktop and Mobile SKUs of their
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chipsets. For older models the comment describing which chipset the PCI id
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is for, aksi indicates when we're dealing with a mobile SKU. Extend the
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comments for recent chipsets to also indicate mobile SKUs.
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The information this commit adds comes from Intel's chipset datasheets.
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This commit is a preparation patch for allowing a different default
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sata link powermanagement policy for mobile chipsets.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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drivers/ata/ahci.c | 32 ++++++++++++++++----------------
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1 file changed, 16 insertions(+), 16 deletions(-)
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diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
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index 5443cb71d7ba..9d842ff6ec51 100644
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--- a/drivers/ata/ahci.c
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+++ b/drivers/ata/ahci.c
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@@ -268,9 +268,9 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */
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{ PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */
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{ PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */
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- { PCI_VDEVICE(INTEL, 0x3b29), board_ahci }, /* PCH AHCI */
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+ { PCI_VDEVICE(INTEL, 0x3b29), board_ahci }, /* PCH M AHCI */
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{ PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
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- { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
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+ { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH M RAID */
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{ PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
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{ PCI_VDEVICE(INTEL, 0x19b0), board_ahci }, /* DNV AHCI */
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{ PCI_VDEVICE(INTEL, 0x19b1), board_ahci }, /* DNV AHCI */
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@@ -293,9 +293,9 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0x19cE), board_ahci }, /* DNV AHCI */
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{ PCI_VDEVICE(INTEL, 0x19cF), board_ahci }, /* DNV AHCI */
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{ PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
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- { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */
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+ { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT M AHCI */
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{ PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
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- { PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT RAID */
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+ { PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT M RAID */
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{ PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */
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{ PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */
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{ PCI_VDEVICE(INTEL, 0x1d02), board_ahci }, /* PBG AHCI */
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@@ -304,20 +304,20 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* PBG RAID */
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{ PCI_VDEVICE(INTEL, 0x2323), board_ahci }, /* DH89xxCC AHCI */
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{ PCI_VDEVICE(INTEL, 0x1e02), board_ahci }, /* Panther Point AHCI */
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- { PCI_VDEVICE(INTEL, 0x1e03), board_ahci }, /* Panther Point AHCI */
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+ { PCI_VDEVICE(INTEL, 0x1e03), board_ahci }, /* Panther Point M AHCI */
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{ PCI_VDEVICE(INTEL, 0x1e04), board_ahci }, /* Panther Point RAID */
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{ PCI_VDEVICE(INTEL, 0x1e05), board_ahci }, /* Panther Point RAID */
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{ PCI_VDEVICE(INTEL, 0x1e06), board_ahci }, /* Panther Point RAID */
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- { PCI_VDEVICE(INTEL, 0x1e07), board_ahci }, /* Panther Point RAID */
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+ { PCI_VDEVICE(INTEL, 0x1e07), board_ahci }, /* Panther Point M RAID */
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{ PCI_VDEVICE(INTEL, 0x1e0e), board_ahci }, /* Panther Point RAID */
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{ PCI_VDEVICE(INTEL, 0x8c02), board_ahci }, /* Lynx Point AHCI */
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- { PCI_VDEVICE(INTEL, 0x8c03), board_ahci }, /* Lynx Point AHCI */
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+ { PCI_VDEVICE(INTEL, 0x8c03), board_ahci }, /* Lynx Point M AHCI */
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{ PCI_VDEVICE(INTEL, 0x8c04), board_ahci }, /* Lynx Point RAID */
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- { PCI_VDEVICE(INTEL, 0x8c05), board_ahci }, /* Lynx Point RAID */
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+ { PCI_VDEVICE(INTEL, 0x8c05), board_ahci }, /* Lynx Point M RAID */
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{ PCI_VDEVICE(INTEL, 0x8c06), board_ahci }, /* Lynx Point RAID */
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- { PCI_VDEVICE(INTEL, 0x8c07), board_ahci }, /* Lynx Point RAID */
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+ { PCI_VDEVICE(INTEL, 0x8c07), board_ahci }, /* Lynx Point M RAID */
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{ PCI_VDEVICE(INTEL, 0x8c0e), board_ahci }, /* Lynx Point RAID */
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- { PCI_VDEVICE(INTEL, 0x8c0f), board_ahci }, /* Lynx Point RAID */
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+ { PCI_VDEVICE(INTEL, 0x8c0f), board_ahci }, /* Lynx Point M RAID */
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{ PCI_VDEVICE(INTEL, 0x9c02), board_ahci }, /* Lynx Point-LP AHCI */
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{ PCI_VDEVICE(INTEL, 0x9c03), board_ahci }, /* Lynx Point-LP AHCI */
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{ PCI_VDEVICE(INTEL, 0x9c04), board_ahci }, /* Lynx Point-LP RAID */
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@@ -358,21 +358,21 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0x9c87), board_ahci }, /* Wildcat Point-LP RAID */
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{ PCI_VDEVICE(INTEL, 0x9c8f), board_ahci }, /* Wildcat Point-LP RAID */
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{ PCI_VDEVICE(INTEL, 0x8c82), board_ahci }, /* 9 Series AHCI */
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- { PCI_VDEVICE(INTEL, 0x8c83), board_ahci }, /* 9 Series AHCI */
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+ { PCI_VDEVICE(INTEL, 0x8c83), board_ahci }, /* 9 Series M AHCI */
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{ PCI_VDEVICE(INTEL, 0x8c84), board_ahci }, /* 9 Series RAID */
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- { PCI_VDEVICE(INTEL, 0x8c85), board_ahci }, /* 9 Series RAID */
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+ { PCI_VDEVICE(INTEL, 0x8c85), board_ahci }, /* 9 Series M RAID */
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{ PCI_VDEVICE(INTEL, 0x8c86), board_ahci }, /* 9 Series RAID */
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- { PCI_VDEVICE(INTEL, 0x8c87), board_ahci }, /* 9 Series RAID */
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+ { PCI_VDEVICE(INTEL, 0x8c87), board_ahci }, /* 9 Series M RAID */
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{ PCI_VDEVICE(INTEL, 0x8c8e), board_ahci }, /* 9 Series RAID */
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- { PCI_VDEVICE(INTEL, 0x8c8f), board_ahci }, /* 9 Series RAID */
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+ { PCI_VDEVICE(INTEL, 0x8c8f), board_ahci }, /* 9 Series M RAID */
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{ PCI_VDEVICE(INTEL, 0x9d03), board_ahci }, /* Sunrise Point-LP AHCI */
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{ PCI_VDEVICE(INTEL, 0x9d05), board_ahci }, /* Sunrise Point-LP RAID */
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{ PCI_VDEVICE(INTEL, 0x9d07), board_ahci }, /* Sunrise Point-LP RAID */
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{ PCI_VDEVICE(INTEL, 0xa102), board_ahci }, /* Sunrise Point-H AHCI */
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- { PCI_VDEVICE(INTEL, 0xa103), board_ahci }, /* Sunrise Point-H AHCI */
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+ { PCI_VDEVICE(INTEL, 0xa103), board_ahci }, /* Sunrise Point-H M AHCI */
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{ PCI_VDEVICE(INTEL, 0xa105), board_ahci }, /* Sunrise Point-H RAID */
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{ PCI_VDEVICE(INTEL, 0xa106), board_ahci }, /* Sunrise Point-H RAID */
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- { PCI_VDEVICE(INTEL, 0xa107), board_ahci }, /* Sunrise Point-H RAID */
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+ { PCI_VDEVICE(INTEL, 0xa107), board_ahci }, /* Sunrise Point-H M RAID */
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{ PCI_VDEVICE(INTEL, 0xa10f), board_ahci }, /* Sunrise Point-H RAID */
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{ PCI_VDEVICE(INTEL, 0x2822), board_ahci }, /* Lewisburg RAID*/
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{ PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Lewisburg AHCI*/
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--
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2.14.3
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@ -1,33 +0,0 @@
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From eab582db4b6c04a20a8bd792faa9ebf7adf1ec17 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Mon, 27 Nov 2017 12:07:34 +0100
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Subject: [PATCH 2/3] ahci: Add PCI ids for Intel Bay Trail, Cherry Trail and
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Apollo Lake AHCI
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Add PCI ids for Intel Bay Trail, Cherry Trail and Apollo Lake AHCI
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SATA controllers. This commit is a preparation patch for allowing a
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different default sata link powermanagement policy for mobile chipsets.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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drivers/ata/ahci.c | 4 ++++
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1 file changed, 4 insertions(+)
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diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
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index 9d842ff6ec51..844f697bedbf 100644
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--- a/drivers/ata/ahci.c
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+++ b/drivers/ata/ahci.c
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@@ -386,6 +386,10 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0xa206), board_ahci }, /* Lewisburg RAID*/
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{ PCI_VDEVICE(INTEL, 0xa252), board_ahci }, /* Lewisburg RAID*/
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{ PCI_VDEVICE(INTEL, 0xa256), board_ahci }, /* Lewisburg RAID*/
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+ { PCI_VDEVICE(INTEL, 0x0f22), board_ahci }, /* Bay Trail AHCI */
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+ { PCI_VDEVICE(INTEL, 0x0f23), board_ahci }, /* Bay Trail AHCI */
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+ { PCI_VDEVICE(INTEL, 0x22a3), board_ahci }, /* Cherry Trail AHCI */
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+ { PCI_VDEVICE(INTEL, 0x5ae3), board_ahci }, /* Apollo Lake AHCI */
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/* JMicron 360/1/3/5/6, match class to avoid IDE function */
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{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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--
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2.14.3
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@ -1,274 +0,0 @@
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From 262135cf058c28d248b997bd11b2c124e27d8d47 Mon Sep 17 00:00:00 2001
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From: Hans de Goede <hdegoede@redhat.com>
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Date: Mon, 27 Nov 2017 15:32:01 +0100
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Subject: [PATCH 3/3] ahci: Allow setting a default LPM policy for mobile
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chipsets
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On many laptops setting a different LPM policy then unknown /
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max_performance can lead to power-savings of 1.0 - 1.5 Watts (when idle).
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Modern ultrabooks idle around 6W (at 50% screen brightness), 1.0 - 1.5W
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is a significant chunk of this.
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There are some performance / latency costs to enabling LPM by default,
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so it is desirable to make it possible to set a different LPM policy
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for mobile / laptop variants of chipsets / "South Bridges" vs their
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desktop / server counterparts. Also enabling LPM by default is not
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entirely without risk of regressions. At least min_power is known to
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cause issues with some disks, including some reports of data corruption.
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This commits adds a new ahci.mobile_lpm_policy kernel cmdline option,
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which defaults to a new SATA_MOBILE_LPM_POLICY Kconfig option so that
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Linux distributions can choose to set a LPM policy for mobile chipsets
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by default.
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The reason to have both a kernel cmdline option and a Kconfig default
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value for it, is to allow easy overriding of the default to allow
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trouble-shooting without needing to rebuild the kernel.
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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Changes in v2:
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-Remove .config changes from the patch
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---
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drivers/ata/Kconfig | 19 +++++++++++
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drivers/ata/ahci.c | 97 +++++++++++++++++++++++++++++++----------------------
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drivers/ata/ahci.h | 3 ++
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3 files changed, 78 insertions(+), 41 deletions(-)
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diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
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index cb5339166563..b3fad5663aeb 100644
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--- a/drivers/ata/Kconfig
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+++ b/drivers/ata/Kconfig
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@@ -92,6 +92,25 @@ config SATA_AHCI
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If unsure, say N.
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+config SATA_MOBILE_LPM_POLICY
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+ int "Default SATA Link Power Management policy for mobile chipsets"
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+ range 0 4
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+ default 0
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+ depends on SATA_AHCI
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+ help
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+ Select the Default SATA Link Power Management (LPM) policy to use
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+ for mobile / laptop variants of chipsets / "South Bridges".
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+
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+ The value set has the following meanings:
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+ 0 => Keep firmware settings
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+ 1 => Maximum performance
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+ 2 => Medium power
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+ 3 => Medium power with Device Initiated PM enabled
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+ 4 => Minimum power
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+
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+ Note "Minimum power" is known to cause issues, including disk
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+ corruption, with some disks and should not be used.
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+
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config SATA_AHCI_PLATFORM
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tristate "Platform AHCI SATA support"
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help
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diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
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index 844f697bedbf..8e910fae8892 100644
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--- a/drivers/ata/ahci.c
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+++ b/drivers/ata/ahci.c
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@@ -65,6 +65,7 @@ enum board_ids {
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/* board IDs by feature in alphabetical order */
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board_ahci,
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board_ahci_ign_iferr,
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+ board_ahci_mobile,
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board_ahci_nomsi,
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board_ahci_noncq,
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board_ahci_nosntf,
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@@ -140,6 +141,13 @@ static const struct ata_port_info ahci_port_info[] = {
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_ops,
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},
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+ [board_ahci_mobile] = {
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+ AHCI_HFLAGS (AHCI_HFLAG_IS_MOBILE),
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+ .flags = AHCI_FLAG_COMMON,
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+ .pio_mask = ATA_PIO4,
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+ .udma_mask = ATA_UDMA6,
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+ .port_ops = &ahci_ops,
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+ },
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[board_ahci_nomsi] = {
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AHCI_HFLAGS (AHCI_HFLAG_NO_MSI),
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.flags = AHCI_FLAG_COMMON,
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@@ -252,13 +260,13 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0x2924), board_ahci }, /* ICH9 */
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{ PCI_VDEVICE(INTEL, 0x2925), board_ahci }, /* ICH9 */
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{ PCI_VDEVICE(INTEL, 0x2927), board_ahci }, /* ICH9 */
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- { PCI_VDEVICE(INTEL, 0x2929), board_ahci }, /* ICH9M */
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- { PCI_VDEVICE(INTEL, 0x292a), board_ahci }, /* ICH9M */
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- { PCI_VDEVICE(INTEL, 0x292b), board_ahci }, /* ICH9M */
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- { PCI_VDEVICE(INTEL, 0x292c), board_ahci }, /* ICH9M */
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- { PCI_VDEVICE(INTEL, 0x292f), board_ahci }, /* ICH9M */
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+ { PCI_VDEVICE(INTEL, 0x2929), board_ahci_mobile }, /* ICH9M */
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+ { PCI_VDEVICE(INTEL, 0x292a), board_ahci_mobile }, /* ICH9M */
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+ { PCI_VDEVICE(INTEL, 0x292b), board_ahci_mobile }, /* ICH9M */
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+ { PCI_VDEVICE(INTEL, 0x292c), board_ahci_mobile }, /* ICH9M */
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+ { PCI_VDEVICE(INTEL, 0x292f), board_ahci_mobile }, /* ICH9M */
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{ PCI_VDEVICE(INTEL, 0x294d), board_ahci }, /* ICH9 */
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- { PCI_VDEVICE(INTEL, 0x294e), board_ahci }, /* ICH9M */
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+ { PCI_VDEVICE(INTEL, 0x294e), board_ahci_mobile }, /* ICH9M */
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{ PCI_VDEVICE(INTEL, 0x502a), board_ahci }, /* Tolapai */
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{ PCI_VDEVICE(INTEL, 0x502b), board_ahci }, /* Tolapai */
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{ PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */
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@@ -268,9 +276,9 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */
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{ PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */
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{ PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */
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- { PCI_VDEVICE(INTEL, 0x3b29), board_ahci }, /* PCH M AHCI */
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+ { PCI_VDEVICE(INTEL, 0x3b29), board_ahci_mobile }, /* PCH M AHCI */
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{ PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
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- { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH M RAID */
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+ { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci_mobile }, /* PCH M RAID */
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{ PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
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{ PCI_VDEVICE(INTEL, 0x19b0), board_ahci }, /* DNV AHCI */
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{ PCI_VDEVICE(INTEL, 0x19b1), board_ahci }, /* DNV AHCI */
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@@ -293,9 +301,9 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0x19cE), board_ahci }, /* DNV AHCI */
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{ PCI_VDEVICE(INTEL, 0x19cF), board_ahci }, /* DNV AHCI */
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{ PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
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- { PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT M AHCI */
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+ { PCI_VDEVICE(INTEL, 0x1c03), board_ahci_mobile }, /* CPT M AHCI */
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{ PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
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- { PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT M RAID */
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+ { PCI_VDEVICE(INTEL, 0x1c05), board_ahci_mobile }, /* CPT M RAID */
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{ PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */
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{ PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */
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{ PCI_VDEVICE(INTEL, 0x1d02), board_ahci }, /* PBG AHCI */
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@@ -304,28 +312,28 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* PBG RAID */
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{ PCI_VDEVICE(INTEL, 0x2323), board_ahci }, /* DH89xxCC AHCI */
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{ PCI_VDEVICE(INTEL, 0x1e02), board_ahci }, /* Panther Point AHCI */
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- { PCI_VDEVICE(INTEL, 0x1e03), board_ahci }, /* Panther Point M AHCI */
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+ { PCI_VDEVICE(INTEL, 0x1e03), board_ahci_mobile }, /* Panther M AHCI */
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{ PCI_VDEVICE(INTEL, 0x1e04), board_ahci }, /* Panther Point RAID */
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{ PCI_VDEVICE(INTEL, 0x1e05), board_ahci }, /* Panther Point RAID */
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{ PCI_VDEVICE(INTEL, 0x1e06), board_ahci }, /* Panther Point RAID */
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- { PCI_VDEVICE(INTEL, 0x1e07), board_ahci }, /* Panther Point M RAID */
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+ { PCI_VDEVICE(INTEL, 0x1e07), board_ahci_mobile }, /* Panther M RAID */
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{ PCI_VDEVICE(INTEL, 0x1e0e), board_ahci }, /* Panther Point RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x8c02), board_ahci }, /* Lynx Point AHCI */
|
||||
- { PCI_VDEVICE(INTEL, 0x8c03), board_ahci }, /* Lynx Point M AHCI */
|
||||
+ { PCI_VDEVICE(INTEL, 0x8c03), board_ahci_mobile }, /* Lynx M AHCI */
|
||||
{ PCI_VDEVICE(INTEL, 0x8c04), board_ahci }, /* Lynx Point RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x8c05), board_ahci }, /* Lynx Point M RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x8c05), board_ahci_mobile }, /* Lynx M RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x8c06), board_ahci }, /* Lynx Point RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x8c07), board_ahci }, /* Lynx Point M RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x8c07), board_ahci_mobile }, /* Lynx M RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x8c0e), board_ahci }, /* Lynx Point RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x8c0f), board_ahci }, /* Lynx Point M RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x9c02), board_ahci }, /* Lynx Point-LP AHCI */
|
||||
- { PCI_VDEVICE(INTEL, 0x9c03), board_ahci }, /* Lynx Point-LP AHCI */
|
||||
- { PCI_VDEVICE(INTEL, 0x9c04), board_ahci }, /* Lynx Point-LP RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x9c05), board_ahci }, /* Lynx Point-LP RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x9c06), board_ahci }, /* Lynx Point-LP RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x9c07), board_ahci }, /* Lynx Point-LP RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x9c0e), board_ahci }, /* Lynx Point-LP RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x9c0f), board_ahci }, /* Lynx Point-LP RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x8c0f), board_ahci_mobile }, /* Lynx M RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9c02), board_ahci_mobile }, /* Lynx LP AHCI */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9c03), board_ahci_mobile }, /* Lynx LP AHCI */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9c04), board_ahci_mobile }, /* Lynx LP RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9c05), board_ahci_mobile }, /* Lynx LP RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9c06), board_ahci_mobile }, /* Lynx LP RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9c07), board_ahci_mobile }, /* Lynx LP RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9c0e), board_ahci_mobile }, /* Lynx LP RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9c0f), board_ahci_mobile }, /* Lynx LP RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x1f22), board_ahci }, /* Avoton AHCI */
|
||||
{ PCI_VDEVICE(INTEL, 0x1f23), board_ahci }, /* Avoton AHCI */
|
||||
{ PCI_VDEVICE(INTEL, 0x1f24), board_ahci }, /* Avoton RAID */
|
||||
@@ -353,26 +361,26 @@ static const struct pci_device_id ahci_pci_tbl[] = {
|
||||
{ PCI_VDEVICE(INTEL, 0x8d66), board_ahci }, /* Wellsburg RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x8d6e), board_ahci }, /* Wellsburg RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x23a3), board_ahci }, /* Coleto Creek AHCI */
|
||||
- { PCI_VDEVICE(INTEL, 0x9c83), board_ahci }, /* Wildcat Point-LP AHCI */
|
||||
- { PCI_VDEVICE(INTEL, 0x9c85), board_ahci }, /* Wildcat Point-LP RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x9c87), board_ahci }, /* Wildcat Point-LP RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x9c8f), board_ahci }, /* Wildcat Point-LP RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9c83), board_ahci_mobile }, /* Wildcat LP AHCI */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9c85), board_ahci_mobile }, /* Wildcat LP RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9c87), board_ahci_mobile }, /* Wildcat LP RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9c8f), board_ahci_mobile }, /* Wildcat LP RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x8c82), board_ahci }, /* 9 Series AHCI */
|
||||
- { PCI_VDEVICE(INTEL, 0x8c83), board_ahci }, /* 9 Series M AHCI */
|
||||
+ { PCI_VDEVICE(INTEL, 0x8c83), board_ahci_mobile }, /* 9 Series M AHCI */
|
||||
{ PCI_VDEVICE(INTEL, 0x8c84), board_ahci }, /* 9 Series RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x8c85), board_ahci }, /* 9 Series M RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x8c85), board_ahci_mobile }, /* 9 Series M RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x8c86), board_ahci }, /* 9 Series RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x8c87), board_ahci }, /* 9 Series M RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x8c87), board_ahci_mobile }, /* 9 Series M RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x8c8e), board_ahci }, /* 9 Series RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x8c8f), board_ahci }, /* 9 Series M RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x9d03), board_ahci }, /* Sunrise Point-LP AHCI */
|
||||
- { PCI_VDEVICE(INTEL, 0x9d05), board_ahci }, /* Sunrise Point-LP RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0x9d07), board_ahci }, /* Sunrise Point-LP RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x8c8f), board_ahci_mobile }, /* 9 Series M RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9d03), board_ahci_mobile }, /* Sunrise LP AHCI */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9d05), board_ahci_mobile }, /* Sunrise LP RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0x9d07), board_ahci_mobile }, /* Sunrise LP RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0xa102), board_ahci }, /* Sunrise Point-H AHCI */
|
||||
- { PCI_VDEVICE(INTEL, 0xa103), board_ahci }, /* Sunrise Point-H M AHCI */
|
||||
+ { PCI_VDEVICE(INTEL, 0xa103), board_ahci_mobile }, /* Sunrise M AHCI */
|
||||
{ PCI_VDEVICE(INTEL, 0xa105), board_ahci }, /* Sunrise Point-H RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0xa106), board_ahci }, /* Sunrise Point-H RAID */
|
||||
- { PCI_VDEVICE(INTEL, 0xa107), board_ahci }, /* Sunrise Point-H M RAID */
|
||||
+ { PCI_VDEVICE(INTEL, 0xa107), board_ahci_mobile }, /* Sunrise M RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0xa10f), board_ahci }, /* Sunrise Point-H RAID */
|
||||
{ PCI_VDEVICE(INTEL, 0x2822), board_ahci }, /* Lewisburg RAID*/
|
||||
{ PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Lewisburg AHCI*/
|
||||
@@ -386,10 +394,10 @@ static const struct pci_device_id ahci_pci_tbl[] = {
|
||||
{ PCI_VDEVICE(INTEL, 0xa206), board_ahci }, /* Lewisburg RAID*/
|
||||
{ PCI_VDEVICE(INTEL, 0xa252), board_ahci }, /* Lewisburg RAID*/
|
||||
{ PCI_VDEVICE(INTEL, 0xa256), board_ahci }, /* Lewisburg RAID*/
|
||||
- { PCI_VDEVICE(INTEL, 0x0f22), board_ahci }, /* Bay Trail AHCI */
|
||||
- { PCI_VDEVICE(INTEL, 0x0f23), board_ahci }, /* Bay Trail AHCI */
|
||||
- { PCI_VDEVICE(INTEL, 0x22a3), board_ahci }, /* Cherry Trail AHCI */
|
||||
- { PCI_VDEVICE(INTEL, 0x5ae3), board_ahci }, /* Apollo Lake AHCI */
|
||||
+ { PCI_VDEVICE(INTEL, 0x0f22), board_ahci_mobile }, /* Bay Trail AHCI */
|
||||
+ { PCI_VDEVICE(INTEL, 0x0f23), board_ahci_mobile }, /* Bay Trail AHCI */
|
||||
+ { PCI_VDEVICE(INTEL, 0x22a3), board_ahci_mobile }, /* Cherry Tr. AHCI */
|
||||
+ { PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_mobile }, /* ApolloLake AHCI */
|
||||
|
||||
/* JMicron 360/1/3/5/6, match class to avoid IDE function */
|
||||
{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
|
||||
@@ -597,6 +605,9 @@ static int marvell_enable = 1;
|
||||
module_param(marvell_enable, int, 0644);
|
||||
MODULE_PARM_DESC(marvell_enable, "Marvell SATA via AHCI (1 = enabled)");
|
||||
|
||||
+static int mobile_lpm_policy = CONFIG_SATA_MOBILE_LPM_POLICY;
|
||||
+module_param(mobile_lpm_policy, int, 0644);
|
||||
+MODULE_PARM_DESC(mobile_lpm_policy, "Default LPM policy for mobile chipsets");
|
||||
|
||||
static void ahci_pci_save_initial_config(struct pci_dev *pdev,
|
||||
struct ahci_host_priv *hpriv)
|
||||
@@ -1732,6 +1743,10 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
if (ap->flags & ATA_FLAG_EM)
|
||||
ap->em_message_type = hpriv->em_msg_type;
|
||||
|
||||
+ if ((hpriv->flags & AHCI_HFLAG_IS_MOBILE) &&
|
||||
+ mobile_lpm_policy >= ATA_LPM_UNKNOWN &&
|
||||
+ mobile_lpm_policy <= ATA_LPM_MIN_POWER)
|
||||
+ ap->target_lpm_policy = mobile_lpm_policy;
|
||||
|
||||
/* disabled/not-implemented port */
|
||||
if (!(hpriv->port_map & (1 << i)))
|
||||
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
|
||||
index 749fd94441b0..a9d996e17d75 100644
|
||||
--- a/drivers/ata/ahci.h
|
||||
+++ b/drivers/ata/ahci.h
|
||||
@@ -251,6 +251,9 @@ enum {
|
||||
AHCI_HFLAG_YES_ALPM = (1 << 23), /* force ALPM cap on */
|
||||
AHCI_HFLAG_NO_WRITE_TO_RO = (1 << 24), /* don't write to read
|
||||
only registers */
|
||||
+ AHCI_HFLAG_IS_MOBILE = (1 << 25), /* mobile chipset, use
|
||||
+ SATA_MOBILE_LPM_POLICY
|
||||
+ as default lpm_policy */
|
||||
|
||||
/* ap->flags bits */
|
||||
|
||||
--
|
||||
2.14.3
|
||||
|
||||
2
gitrev
2
gitrev
@ -1 +1 @@
|
||||
6304672b7f0a5c010002e63a075160856dc4f88d
|
||||
3da90b159b146672f830bcd2489dd3a1f4e9e089
|
||||
|
||||
@ -262,6 +262,7 @@ CONFIG_ARM64_PAN=y
|
||||
CONFIG_ARM64_PTDUMP_DEBUGFS=y
|
||||
CONFIG_ARM64_PTDUMP=y
|
||||
# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
|
||||
CONFIG_ARM64_RAS_EXTN=y
|
||||
# CONFIG_ARM64_RELOC_TEST is not set
|
||||
CONFIG_ARM64_SVE=y
|
||||
CONFIG_ARM64_SW_TTBR0_PAN=y
|
||||
@ -287,6 +288,7 @@ CONFIG_ARM_CPUIDLE=y
|
||||
CONFIG_ARM_CRYPTO=y
|
||||
CONFIG_ARM_DMA_IOMMU_ALIGNMENT=8
|
||||
CONFIG_ARM_DMA_USE_IOMMU=y
|
||||
CONFIG_ARM_DSU_PMU=m
|
||||
# CONFIG_ARM_DT_BL_CPUFREQ is not set
|
||||
CONFIG_ARM_GIC_V2M=y
|
||||
CONFIG_ARM_GIC_V3_ITS=y
|
||||
@ -303,6 +305,7 @@ CONFIG_ARM_RK3399_DMC_DEVFREQ=m
|
||||
CONFIG_ARM_SBSA_WATCHDOG=m
|
||||
CONFIG_ARM_SCPI_POWER_DOMAIN=m
|
||||
CONFIG_ARM_SCPI_PROTOCOL=m
|
||||
CONFIG_ARM_SDE_INTERFACE=y
|
||||
CONFIG_ARM_SMMU_V3=y
|
||||
CONFIG_ARM_SMMU=y
|
||||
CONFIG_ARM_SP805_WATCHDOG=m
|
||||
|
||||
@ -262,6 +262,7 @@ CONFIG_ARM64_PAN=y
|
||||
CONFIG_ARM64_PTDUMP_DEBUGFS=y
|
||||
# CONFIG_ARM64_PTDUMP is not set
|
||||
# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
|
||||
CONFIG_ARM64_RAS_EXTN=y
|
||||
# CONFIG_ARM64_RELOC_TEST is not set
|
||||
CONFIG_ARM64_SVE=y
|
||||
CONFIG_ARM64_SW_TTBR0_PAN=y
|
||||
@ -287,6 +288,7 @@ CONFIG_ARM_CPUIDLE=y
|
||||
CONFIG_ARM_CRYPTO=y
|
||||
CONFIG_ARM_DMA_IOMMU_ALIGNMENT=8
|
||||
CONFIG_ARM_DMA_USE_IOMMU=y
|
||||
CONFIG_ARM_DSU_PMU=m
|
||||
# CONFIG_ARM_DT_BL_CPUFREQ is not set
|
||||
CONFIG_ARM_GIC_V2M=y
|
||||
CONFIG_ARM_GIC_V3_ITS=y
|
||||
@ -303,6 +305,7 @@ CONFIG_ARM_RK3399_DMC_DEVFREQ=m
|
||||
CONFIG_ARM_SBSA_WATCHDOG=m
|
||||
CONFIG_ARM_SCPI_POWER_DOMAIN=m
|
||||
CONFIG_ARM_SCPI_PROTOCOL=m
|
||||
CONFIG_ARM_SDE_INTERFACE=y
|
||||
CONFIG_ARM_SMMU_V3=y
|
||||
CONFIG_ARM_SMMU=y
|
||||
CONFIG_ARM_SP805_WATCHDOG=m
|
||||
|
||||
12
kernel.spec
12
kernel.spec
@ -69,7 +69,7 @@ Summary: The Linux kernel
|
||||
# The rc snapshot level
|
||||
%global rcrev 0
|
||||
# The git snapshot level
|
||||
%define gitrev 1
|
||||
%define gitrev 2
|
||||
# Set rpm version accordingly
|
||||
%define rpmversion 4.%{upstream_sublevel}.0
|
||||
%endif
|
||||
@ -622,13 +622,6 @@ Patch630: 0001-HID-multitouch-Properly-deal-with-Win8-PTP-reports-w.patch
|
||||
Patch631: 0002-HID-multitouch-Only-look-at-non-touch-fields-in-firs.patch
|
||||
Patch632: 0003-HID-multitouch-Combine-all-left-button-events-in-a-f.patch
|
||||
|
||||
# Make SATA link powermanagement policy configurable for:
|
||||
# https://fedoraproject.org/wiki/Changes/ImprovedLaptopBatteryLife
|
||||
# Queued upstream for merging into 4.16
|
||||
Patch636: 0001-ahci-Annotate-PCI-ids-for-mobile-Intel-chipsets-as-s.patch
|
||||
Patch637: 0002-ahci-Add-PCI-ids-for-Intel-Bay-Trail-Cherry-Trail-an.patch
|
||||
Patch638: 0003-ahci-Allow-setting-a-default-LPM-policy-for-mobile-c.patch
|
||||
|
||||
# rhbz1514969, submitted upstream
|
||||
Patch640: 0001-platform-x86-dell-laptop-Filter-out-spurious-keyboar.patch
|
||||
|
||||
@ -1902,6 +1895,9 @@ fi
|
||||
#
|
||||
#
|
||||
%changelog
|
||||
* Wed Jan 31 2018 Justin M. Forbes <jforbes@fedoraproject.org> - 4.16.0-0.rc0.git2.1
|
||||
- Linux v4.15-2341-g3da90b159b14
|
||||
|
||||
* Tue Jan 30 2018 Justin M. Forbes <jforbes@fedoraproject.org> - 4.16.0-0.rc0.git1.1
|
||||
- Linux v4.15-1549-g6304672b7f0a
|
||||
- Reenable debugging options.
|
||||
|
||||
2
sources
2
sources
@ -1,2 +1,2 @@
|
||||
SHA512 (linux-4.15.tar.xz) = c00d92659df815a53dcac7dde145b742b1f20867d380c07cb09ddb3295d6ff10f8931b21ef0b09d7156923a3957b39d74d87c883300173b2e20690d2b4ec35ea
|
||||
SHA512 (patch-4.15-git1.xz) = e241c0964f412b6199f8186a2d151f39d02363a3b6851aa14afae73856018ec26ca039b8b3c06437e2848286ed74761b0ada1655bf01c6882e157e274e729a02
|
||||
SHA512 (patch-4.15-git2.xz) = 1846ed5cb0c256126b87435f2e8708931abf6aaac8f76c4f4e96da70329308ba27d15bae5a7d049d583cd480b4258748bee92ae390743fcc2d9925523f26bcbf
|
||||
|
||||
Loading…
Reference in New Issue
Block a user