rpms
/
kernel
2
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Linux v4.17-11346-g8efcf34a2639

This commit is contained in:
Laura Abbott 2018-06-12 08:50:20 -07:00
parent bbfe8b3016
commit bdc446c43d
27 changed files with 80 additions and 1133 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
0001-Revert-debugfs-inode-debugfs_create_dir-uses-mode-pe.patch Normal file
View File

@ -0,0 +1,33 @@
From 9c625d3a4eb215369b10b075b2006f9c3035c93f Mon Sep 17 00:00:00 2001
From: Laura Abbott <labbott@redhat.com>
Date: Tue, 12 Jun 2018 08:48:18 -0700
Subject: [PATCH] Revert "debugfs: inode: debugfs_create_dir uses mode
permission from parent"
This reverts commit 95cde3c59966f6371b6bcd9e4e2da2ba64ee9775.
A custom revert due to secure boot lockdown conflicts.
Signed-off-by: Laura Abbott <labbott@redhat.com>
---
fs/debugfs/inode.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/fs/debugfs/inode.c b/fs/debugfs/inode.c
index e392ca19bdd4..4daec17b8215 100644
--- a/fs/debugfs/inode.c
+++ b/fs/debugfs/inode.c
@@ -538,9 +538,7 @@ struct dentry *debugfs_create_dir(const char *name, struct dentry *parent)
if (unlikely(!inode))
return failed_creating(dentry);
- if (!parent)
- parent = debugfs_mount->mnt_root;
- inode->i_mode = S_IFDIR | ((d_inode(parent)->i_mode & 0770));
+ inode->i_mode = S_IFDIR | S_IRWXU | S_IRUGO | S_IXUGO;
inode->i_op = &debugfs_dir_inode_operations;
inode->i_fop = &simple_dir_operations;
--
2.17.0

432
arm-dts-Add-am335x-pocketbeagle.patch
View File

@ -1,432 +0,0 @@
From patchwork Tue Apr 17 17:14:04 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [v3] ARM: dts: Add am335x-pocketbeagle
From: Robert Nelson <robertcnelson@gmail.com>
X-Patchwork-Id: 10346089
Message-Id: <20180417171404.13624-1-robertcnelson@gmail.com>
To: tony@atomide.com,
devicetree@vger.kernel.org
Cc: Drew Fustini <drew@beagleboard.org>,
Peter Robinson <pbrobinson@redhat.com>,
Jason Kridner <jkridner@beagleboard.org>, linux-omap@vger.kernel.org,
Robert Nelson <robertcnelson@gmail.com>,
linux-arm-kernel@lists.infradead.org
Date: Tue, 17 Apr 2018 12:14:04 -0500
PocketBeagle is an ultra-tiny-yet-complete open-source USB-key-fob computer.
This board family can be indentified by the A335PBGL in the at24 eeprom:
A2: [aa 55 33 ee 41 33 33 35 50 42 47 4c 30 30 41 32 |.U3.A335PBGL00A2|]
http://beagleboard.org/pocket
https://github.com/beagleboard/pocketbeagle
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tony Lindgren <tony@atomide.com>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Drew Fustini <drew@beagleboard.org>
CC: Peter Robinson <pbrobinson@redhat.com>
---
Changes in v3:
- Fix: Board eeprom in subject message. (accidently copied PocketBone)
Changes in v2:
- Use SPDX tags.
- Use eeprom@50, remove repeated node and fix and remove '_' to fix node_name_chars_strict Warning
- Fix: PocketBeagle Name in Subject (not PocketBeagle Blue)
- Fix: leds remove '_' to fix node_name_chars_strict warning
- Fix: node_name_chars_strict pinmux_*_pins label's.
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/am335x-osd335x-common.dtsi | 124 ++++++++++
arch/arm/boot/dts/am335x-pocketbeagle.dts | 237 +++++++++++++++++++
3 files changed, 362 insertions(+)
create mode 100644 arch/arm/boot/dts/am335x-osd335x-common.dtsi
create mode 100644 arch/arm/boot/dts/am335x-pocketbeagle.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e2424957809..5a09ff15743b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -688,6 +688,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-pdu001.dtb \
am335x-pepper.dtb \
am335x-phycore-rdk.dtb \
+ am335x-pocketbeagle.dtb \
am335x-shc.dtb \
am335x-sbc-t335.dtb \
am335x-sl50.dtb \
diff --git a/arch/arm/boot/dts/am335x-osd335x-common.dtsi b/arch/arm/boot/dts/am335x-osd335x-common.dtsi
new file mode 100644
index 000000000000..d2150d207b7a
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-osd335x-common.dtsi
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Author: Robert Nelson <robertcnelson@gmail.com>
+ */
+
+/ {
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&dcdc2_reg>;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x20000000>; /* 512 MB */
+ };
+};
+
+&cpu0_opp_table {
+ /*
+ * Octavo Systems:
+ * The EFUSE_SMA register is not programmed for any of the AM335x wafers
+ * we get and we are not programming them during our production test.
+ * Therefore, from a DEVICE_ID revision point of view, the silicon looks
+ * like it is Revision 2.1. However, from an EFUSE_SMA point of view for
+ * the HW OPP table, the silicon looks like it is Revision 1.0 (ie the
+ * EFUSE_SMA register reads as all zeros).
+ */
+ oppnitro-1000000000 {
+ opp-supported-hw = <0x06 0x0100>;
+ };
+};
+
+&am33xx_pinmux {
+ i2c0_pins: pinmux-i2c0-pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */
+ AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */
+ >;
+ };
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ tps: tps@24 {
+ reg = <0x24>;
+ };
+};
+
+/include/ "tps65217.dtsi"
+
+&tps {
+ interrupts = <7>; /* NMI */
+ interrupt-parent = <&intc>;
+
+ ti,pmic-shutdown-controller;
+
+ pwrbutton {
+ interrupts = <2>;
+ status = "okay";
+ };
+
+ regulators {
+ dcdc1_reg: regulator@0 {
+ regulator-name = "vdds_dpr";
+ regulator-always-on;
+ };
+
+ dcdc2_reg: regulator@1 {
+ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+ regulator-name = "vdd_mpu";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1351500>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ dcdc3_reg: regulator@2 {
+ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1_reg: regulator@3 {
+ regulator-name = "vio,vrtc,vdds";
+ regulator-always-on;
+ };
+
+ ldo2_reg: regulator@4 {
+ regulator-name = "vdd_3v3aux";
+ regulator-always-on;
+ };
+
+ ldo3_reg: regulator@5 {
+ regulator-name = "vdd_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ ldo4_reg: regulator@6 {
+ regulator-name = "vdd_3v3a";
+ regulator-always-on;
+ };
+ };
+};
+
+&aes {
+ status = "okay";
+};
+
+&sham {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/am335x-pocketbeagle.dts b/arch/arm/boot/dts/am335x-pocketbeagle.dts
new file mode 100644
index 000000000000..62fe5cab9fae
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-pocketbeagle.dts
@@ -0,0 +1,237 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Author: Robert Nelson <robertcnelson@gmail.com>
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-osd335x-common.dtsi"
+
+/ {
+ model = "TI AM335x PocketBeagle";
+ compatible = "ti,am335x-pocketbeagle", "ti,am335x-bone", "ti,am33xx";
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ leds {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usr_leds_pins>;
+
+ compatible = "gpio-leds";
+
+ usr0 {
+ label = "beaglebone:green:usr0";
+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ usr1 {
+ label = "beaglebone:green:usr1";
+ gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+ };
+
+ usr2 {
+ label = "beaglebone:green:usr2";
+ gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "cpu0";
+ default-state = "off";
+ };
+
+ usr3 {
+ label = "beaglebone:green:usr3";
+ gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ vmmcsd_fixed: fixedregulator0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vmmcsd_fixed";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&am33xx_pinmux {
+ i2c2_pins: pinmux-i2c2-pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
+ AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
+ >;
+ };
+
+ ehrpwm0_pins: pinmux-ehrpwm0-pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */
+ >;
+ };
+
+ ehrpwm1_pins: pinmux-ehrpwm1-pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */
+ >;
+ };
+
+ mmc0_pins: pinmux-mmc0-pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */
+ AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* (G16) mmc0_dat0.mmc0_dat0 */
+ AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* (G15) mmc0_dat1.mmc0_dat1 */
+ AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* (F18) mmc0_dat2.mmc0_dat2 */
+ AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* (F17) mmc0_dat3.mmc0_dat3 */
+ AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */
+ AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */
+ AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4) /* (B12) mcasp0_aclkr.mmc0_sdwp */
+ >;
+ };
+
+ spi0_pins: pinmux-spi0-pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
+ AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
+ AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
+ AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
+ >;
+ };
+
+ spi1_pins: pinmux-spi1-pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */
+ AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */
+ AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */
+ AM33XX_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */
+ >;
+ };
+
+ usr_leds_pins: pinmux-usr-leds-pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
+ AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */
+ AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */
+ AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */
+ >;
+ };
+
+ uart0_pins: pinmux-uart0-pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* (E15) uart0_rxd.uart0_rxd */
+ AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* (E16) uart0_txd.uart0_txd */
+ >;
+ };
+
+ uart4_pins: pinmux-uart4-pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
+ AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
+ >;
+ };
+};
+
+&epwmss0 {
+ status = "okay";
+};
+
+&ehrpwm0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ehrpwm0_pins>;
+};
+
+&epwmss1 {
+ status = "okay";
+};
+
+&ehrpwm1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ehrpwm1_pins>;
+};
+
+&i2c0 {
+ eeprom: eeprom@50 {
+ compatible = "atmel,24c256";
+ reg = <0x50>;
+ };
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+
+ status = "okay";
+ clock-frequency = <400000>;
+};
+
+&mmc1 {
+ status = "okay";
+ vmmc-supply = <&vmmcsd_fixed>;
+ bus-width = <4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+};
+
+&rtc {
+ system-power-controller;
+};
+
+&tscadc {
+ status = "okay";
+ adc {
+ ti,adc-channels = <0 1 2 3 4 5 6 7>;
+ ti,chan-step-avg = <16 16 16 16 16 16 16 16>;
+ ti,chan-step-opendelay = <0x98 0x98 0x98 0x98 0x98 0x98 0x98 0x98>;
+ ti,chan-step-sampledelay = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins>;
+
+ status = "okay";
+};
+
+&usb {
+ status = "okay";
+};
+
+&usb_ctrl_mod {
+ status = "okay";
+};
+
+&usb0_phy {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "otg";
+};
+
+&usb1_phy {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&cppi41dma {
+ status = "okay";
+};

560
bcm2837-rpi-initial-3plus-support.patch
View File

@ -1,560 +0,0 @@
From patchwork Sat Apr 21 11:28:34 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [V2,1/9] ARM: dts: bcm283x: Fix PWM pin assignment
From: Stefan Wahren <stefan.wahren@i2se.com>
X-Patchwork-Id: 10354085
Message-Id: <1524310122-9439-2-git-send-email-stefan.wahren@i2se.com>
To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
Eric Anholt <eric@anholt.net>, Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>, devicetree@vger.kernel.org,
Florian Fainelli <f.fainelli@gmail.com>, Arnd Bergmann <arnd@arndb.de>,
Scott Branden <sbranden@broadcom.com>, Ray Jui <rjui@broadcom.com>,
Phil Elwell <phil@raspberrypi.org>, Alexander Graf <agraf@suse.de>,
bcm-kernel-feedback-list@broadcom.com,
linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org
Date: Sat, 21 Apr 2018 13:28:34 +0200
All RPi 1 and 2 boards used the PWM (audio out) on pin 40 and 45.
So it was easy to define them in bcm2835-rpi.dtsi. Starting with RPi 3
this wont work anymore, because it uses pin 40 and 41. Furthermore the
Zero variants doesn't have audio out.
This patch fixes this pin conflict by moving the PWM node to the board-level.
Change summary:
RPi 3 B: PWM1 45 -> 41
Zero, Zero W: PWM disabled
all other: no functional change
Reported-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
---
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 6 ++++++
arch/arm/boot/dts/bcm2835-rpi-a.dts | 6 ++++++
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 6 ++++++
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 6 ++++++
arch/arm/boot/dts/bcm2835-rpi-b.dts | 6 ++++++
arch/arm/boot/dts/bcm2835-rpi.dtsi | 6 ------
arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 6 ++++++
arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 6 ++++++
8 files changed, 42 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
index aa1fc7b..2cd9c5e 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
@@ -101,6 +101,12 @@
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
index 425f6b0..067d1f0 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
@@ -96,6 +96,12 @@
hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
index effa195..cfbdaac 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
@@ -103,6 +103,12 @@
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
index 772ec3b..5641d16 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
@@ -96,6 +96,12 @@
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
index 434483d..31ff602 100644
--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
@@ -91,6 +91,12 @@
hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
index 6c3cfaa..cb2d6d7 100644
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
@@ -83,12 +83,6 @@
bus-width = <4>;
};
-&pwm {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
- status = "okay";
-};
-
&usb {
power-domains = <&power RPI_POWER_DOMAIN_USB>;
};
diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
index 5c339ad..2fef70a 100644
--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
@@ -41,6 +41,12 @@
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
index 0b31d99..cc39b6f 100644
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
@@ -42,6 +42,12 @@
};
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio41>;
+ status = "okay";
+};
+
/* uart0 communicates with the BT module */
&uart0 {
pinctrl-names = "default";
From patchwork Sat Apr 21 11:28:35 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [V2,2/9] ARM: dts: bcm2837: Add missing GPIOs of Expander
From: Stefan Wahren <stefan.wahren@i2se.com>
X-Patchwork-Id: 10354079
Message-Id: <1524310122-9439-3-git-send-email-stefan.wahren@i2se.com>
To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
Eric Anholt <eric@anholt.net>, Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>, devicetree@vger.kernel.org,
Florian Fainelli <f.fainelli@gmail.com>, Arnd Bergmann <arnd@arndb.de>,
Scott Branden <sbranden@broadcom.com>, Ray Jui <rjui@broadcom.com>,
Phil Elwell <phil@raspberrypi.org>, Alexander Graf <agraf@suse.de>,
bcm-kernel-feedback-list@broadcom.com,
linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org
Date: Sat, 21 Apr 2018 13:28:35 +0200
After commit a98d90e7d588 ("gpio: raspberrypi-exp: Driver for RPi3 GPIO
expander via mailbox service") we are able to control the rest of the
GPIOs of the RPi 3. So add all the missing parts (ACT LED,
Wifi & BT control, HDMI detect) to the DT.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
---
arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
index cc39b6f..c318bcb 100644
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
@@ -20,9 +20,14 @@
leds {
act {
- gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
+ gpios = <&expgpio 2 GPIO_ACTIVE_HIGH>;
};
};
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&expgpio 1 GPIO_ACTIVE_HIGH>;
+ };
};
&firmware {
@@ -48,6 +53,10 @@
status = "okay";
};
+&hdmi {
+ hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
+};
+
/* uart0 communicates with the BT module */
&uart0 {
pinctrl-names = "default";
@@ -57,6 +66,7 @@
bluetooth {
compatible = "brcm,bcm43438-bt";
max-speed = <2000000>;
+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
};
};
@@ -69,11 +79,19 @@
/* SDHCI is used to control the SDIO for wireless */
&sdhci {
+ #address-cells = <1>;
+ #size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_gpio34>;
status = "okay";
bus-width = <4>;
non-removable;
+ mmc-pwrseq = <&wifi_pwrseq>;
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
};
/* SDHOST is used to drive the SD card */
From patchwork Sat Apr 21 11:28:36 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [V2,3/9] dt-bindings: bcm: Add Raspberry Pi 3 B+
From: Stefan Wahren <stefan.wahren@i2se.com>
X-Patchwork-Id: 10354081
Message-Id: <1524310122-9439-4-git-send-email-stefan.wahren@i2se.com>
To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
Eric Anholt <eric@anholt.net>, Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>, devicetree@vger.kernel.org,
Florian Fainelli <f.fainelli@gmail.com>, Arnd Bergmann <arnd@arndb.de>,
Scott Branden <sbranden@broadcom.com>, Ray Jui <rjui@broadcom.com>,
Phil Elwell <phil@raspberrypi.org>, Alexander Graf <agraf@suse.de>,
bcm-kernel-feedback-list@broadcom.com,
linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org
Date: Sat, 21 Apr 2018 13:28:36 +0200
This adds the root properties for the Raspberry Pi 3 B+
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
index 3e3efa0..1e3e29a 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
@@ -34,6 +34,10 @@ Raspberry Pi 3 Model B
Required root node properties:
compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
+Raspberry Pi 3 Model B+
+Required root node properties:
+compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
+
Raspberry Pi Compute Module
Required root node properties:
compatible = "raspberrypi,compute-module", "brcm,bcm2835";
From patchwork Sat Apr 21 11:28:37 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [V2,4/9] ARM: dts: bcm2837: Add Raspberry Pi 3 B+
From: Stefan Wahren <stefan.wahren@i2se.com>
X-Patchwork-Id: 10354075
Message-Id: <1524310122-9439-5-git-send-email-stefan.wahren@i2se.com>
To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
Eric Anholt <eric@anholt.net>, Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>, devicetree@vger.kernel.org,
Florian Fainelli <f.fainelli@gmail.com>, Arnd Bergmann <arnd@arndb.de>,
Scott Branden <sbranden@broadcom.com>, Ray Jui <rjui@broadcom.com>,
Phil Elwell <phil@raspberrypi.org>, Alexander Graf <agraf@suse.de>,
bcm-kernel-feedback-list@broadcom.com,
linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org
Date: Sat, 21 Apr 2018 13:28:37 +0200
The Raspberry Pi 3 B+ has the following major differences compared
to the model 3 B:
* Microchip LAN7515 (Gigabit Ethernet with integrated USB 2.0 HUB)
* Cypress CYW43455 (802.11n/ac and BT 4.2)
We need to add the USB LAN chip so the bootloader can add the MAC address.
This is necessary because there ain't an EEPROM or a valid OTP.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts | 108 +++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 27 ++++++++
3 files changed, 136 insertions(+)
create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
create mode 100644 arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e24249..a300a35 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -75,6 +75,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
bcm2835-rpi-a-plus.dtb \
bcm2836-rpi-2-b.dtb \
bcm2837-rpi-3-b.dtb \
+ bcm2837-rpi-3-b-plus.dtb \
bcm2835-rpi-zero.dtb \
bcm2835-rpi-zero-w.dtb
dtb-$(CONFIG_ARCH_BCM_5301X) += \
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
new file mode 100644
index 0000000..4adb85e
--- /dev/null
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
@@ -0,0 +1,108 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+#include "bcm2837.dtsi"
+#include "bcm2835-rpi.dtsi"
+#include "bcm283x-rpi-lan7515.dtsi"
+#include "bcm283x-rpi-usb-host.dtsi"
+
+/ {
+ compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
+ model = "Raspberry Pi 3 Model B+";
+
+ chosen {
+ /* 8250 auxiliary UART instead of pl011 */
+ stdout-path = "serial1:115200n8";
+ };
+
+ memory {
+ reg = <0 0x40000000>;
+ };
+
+ leds {
+ act {
+ gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
+ };
+
+ pwr {
+ label = "PWR";
+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&expgpio 1 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&firmware {
+ expgpio: gpio {
+ compatible = "raspberrypi,firmware-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "BT_ON",
+ "WL_ON",
+ "STATUS_LED",
+ "LAN_RUN",
+ "",
+ "CAM_GPIO0",
+ "CAM_GPIO1",
+ "";
+ status = "okay";
+ };
+};
+
+&hdmi {
+ hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio41>;
+ status = "okay";
+};
+
+/* SDHCI is used to control the SDIO for wireless */
+&sdhci {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_gpio34>;
+ status = "okay";
+ bus-width = <4>;
+ non-removable;
+ mmc-pwrseq = <&wifi_pwrseq>;
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+/* SDHOST is used to drive the SD card */
+&sdhost {
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhost_gpio48>;
+ status = "okay";
+ bus-width = <4>;
+};
+
+/* uart0 communicates with the BT module */
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32 &gpclk2_gpio43>;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <2000000>;
+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+/* uart1 is mapped to the pin header */
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_gpio14>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
new file mode 100644
index 0000000..9403da0
--- /dev/null
+++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0
+/ {
+ aliases {
+ ethernet0 = &ethernet;
+ };
+};
+
+&usb {
+ usb-port@1 {
+ compatible = "usb424,2514";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb-port@1 {
+ compatible = "usb424,2514";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet: ethernet@1 {
+ compatible = "usb424,7800";
+ reg = <1>;
+ };
+ };
+ };
+};
From patchwork Sat Apr 21 11:28:42 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: [V2,9/9] arm64: dts: broadcom: Add reference to Raspberry Pi 3 B+
From: Stefan Wahren <stefan.wahren@i2se.com>
X-Patchwork-Id: 10354077
Message-Id: <1524310122-9439-10-git-send-email-stefan.wahren@i2se.com>
To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
Eric Anholt <eric@anholt.net>, Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>
Cc: Stefan Wahren <stefan.wahren@i2se.com>, devicetree@vger.kernel.org,
Florian Fainelli <f.fainelli@gmail.com>, Arnd Bergmann <arnd@arndb.de>,
Scott Branden <sbranden@broadcom.com>, Ray Jui <rjui@broadcom.com>,
Phil Elwell <phil@raspberrypi.org>, Alexander Graf <agraf@suse.de>,
bcm-kernel-feedback-list@broadcom.com,
linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org
Date: Sat, 21 Apr 2018 13:28:42 +0200
This adds a reference to the dts of the Raspberry Pi 3 B+
in arm, so don't need to maintain the content in arm64.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
---
arch/arm64/boot/dts/broadcom/Makefile | 3 ++-
arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b-plus.dts | 2 ++
2 files changed, 4 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b-plus.dts
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
index 2a2591e..1193a9e 100644
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb \
+ bcm2837-rpi-3-b-plus.dtb
subdir-y += northstar2
subdir-y += stingray
diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b-plus.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b-plus.dts
new file mode 100644
index 0000000..46ad202
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b-plus.dts
@@ -0,0 +1,2 @@
+// SPDX-License-Identifier: GPL-2.0
+#include "arm/bcm2837-rpi-3-b-plus.dts"

1
configs/fedora/generic/CONFIG_QCOM_COMMAND_DB Normal file
View File

@ -0,0 +1 @@
# CONFIG_QCOM_COMMAND_DB is not set

1
configs/fedora/generic/CONFIG_QCOM_GENI_SE Normal file
View File

@ -0,0 +1 @@
# CONFIG_QCOM_GENI_SE is not set

2
gitrev
View File

@ -1 +1 @@
a2225d931f75ddd3c39f4d0d195fad99dfd68671
8efcf34a263965e471e3999904f94d1f6799d42a

2
kernel-aarch64-debug.config
View File

@ -4563,11 +4563,13 @@ CONFIG_QCOM_CLK_APCS_MSM8916=m
CONFIG_QCOM_CLK_RPM=m
CONFIG_QCOM_CLK_SMD_RPM=m
CONFIG_QCOM_COINCELL=m
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EBI2 is not set
CONFIG_QCOM_EMAC=m
# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set
CONFIG_QCOM_FALKOR_ERRATUM_1009=y
CONFIG_QCOM_FALKOR_ERRATUM_E1041=y
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
CONFIG_QCOM_GSBI=y
CONFIG_QCOM_HIDMA=m

2
kernel-aarch64.config
View File

@ -4540,11 +4540,13 @@ CONFIG_QCOM_CLK_APCS_MSM8916=m
CONFIG_QCOM_CLK_RPM=m
CONFIG_QCOM_CLK_SMD_RPM=m
CONFIG_QCOM_COINCELL=m
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EBI2 is not set
CONFIG_QCOM_EMAC=m
# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set
CONFIG_QCOM_FALKOR_ERRATUM_1009=y
CONFIG_QCOM_FALKOR_ERRATUM_E1041=y
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
CONFIG_QCOM_GSBI=y
CONFIG_QCOM_HIDMA=m

2
kernel-armv7hl-debug.config
View File

@ -4851,8 +4851,10 @@ CONFIG_QCOM_CLK_APCS_MSM8916=m
CONFIG_QCOM_CLK_RPM=m
CONFIG_QCOM_CLK_SMD_RPM=m
CONFIG_QCOM_COINCELL=m
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EBI2 is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
CONFIG_QCOM_GSBI=m
# CONFIG_QCOM_HIDMA is not set

2
kernel-armv7hl-lpae-debug.config
View File

@ -4592,8 +4592,10 @@ CONFIG_PWRSEQ_SIMPLE=y
CONFIG_QCOM_A53PLL=m
# CONFIG_QCOM_APR is not set
CONFIG_QCOM_CLK_APCS_MSM8916=m
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EBI2 is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

2
kernel-armv7hl-lpae.config
View File

@ -4569,8 +4569,10 @@ CONFIG_PWRSEQ_SIMPLE=y
CONFIG_QCOM_A53PLL=m
# CONFIG_QCOM_APR is not set
CONFIG_QCOM_CLK_APCS_MSM8916=m
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EBI2 is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

2
kernel-armv7hl.config
View File

@ -4828,8 +4828,10 @@ CONFIG_QCOM_CLK_APCS_MSM8916=m
CONFIG_QCOM_CLK_RPM=m
CONFIG_QCOM_CLK_SMD_RPM=m
CONFIG_QCOM_COINCELL=m
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EBI2 is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
CONFIG_QCOM_GSBI=m
# CONFIG_QCOM_HIDMA is not set

2
kernel-i686-PAE.config
View File

@ -4330,7 +4330,9 @@ CONFIG_PWRSEQ_SIMPLE=m
# CONFIG_QCA7000_SPI is not set
# CONFIG_QCA7000_UART is not set
# CONFIG_QCOM_APR is not set
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

2
kernel-i686-PAEdebug.config
View File

@ -4354,7 +4354,9 @@ CONFIG_PWRSEQ_SIMPLE=m
# CONFIG_QCA7000_SPI is not set
# CONFIG_QCA7000_UART is not set
# CONFIG_QCOM_APR is not set
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

2
kernel-i686-debug.config
View File

@ -4354,7 +4354,9 @@ CONFIG_PWRSEQ_SIMPLE=m
# CONFIG_QCA7000_SPI is not set
# CONFIG_QCA7000_UART is not set
# CONFIG_QCOM_APR is not set
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

2
kernel-i686.config
View File

@ -4330,7 +4330,9 @@ CONFIG_PWRSEQ_SIMPLE=m
# CONFIG_QCA7000_SPI is not set
# CONFIG_QCA7000_UART is not set
# CONFIG_QCOM_APR is not set
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

2
kernel-ppc64-debug.config
View File

@ -4162,7 +4162,9 @@ CONFIG_PWRSEQ_SIMPLE=m
# CONFIG_QCA7000_SPI is not set
# CONFIG_QCA7000_UART is not set
# CONFIG_QCOM_APR is not set
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

2
kernel-ppc64.config
View File

@ -4136,7 +4136,9 @@ CONFIG_PWRSEQ_SIMPLE=m
# CONFIG_QCA7000_SPI is not set
# CONFIG_QCA7000_UART is not set
# CONFIG_QCOM_APR is not set
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

2
kernel-ppc64le-debug.config
View File

@ -4100,7 +4100,9 @@ CONFIG_PWRSEQ_SIMPLE=m
# CONFIG_QCA7000_SPI is not set
# CONFIG_QCA7000_UART is not set
# CONFIG_QCOM_APR is not set
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

2
kernel-ppc64le.config
View File

@ -4074,7 +4074,9 @@ CONFIG_PWRSEQ_SIMPLE=m
# CONFIG_QCA7000_SPI is not set
# CONFIG_QCA7000_UART is not set
# CONFIG_QCOM_APR is not set
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

2
kernel-s390x-debug.config
View File

@ -3987,7 +3987,9 @@ CONFIG_PWRSEQ_SIMPLE=m
# CONFIG_QCA7000_SPI is not set
# CONFIG_QCA7000_UART is not set
# CONFIG_QCOM_APR is not set
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

2
kernel-s390x.config
View File

@ -3961,7 +3961,9 @@ CONFIG_PWRSEQ_SIMPLE=m
# CONFIG_QCA7000_SPI is not set
# CONFIG_QCA7000_UART is not set
# CONFIG_QCOM_APR is not set
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

2
kernel-x86_64-debug.config
View File

@ -4397,7 +4397,9 @@ CONFIG_PWRSEQ_SIMPLE=m
# CONFIG_QCA7000_SPI is not set
# CONFIG_QCA7000_UART is not set
# CONFIG_QCOM_APR is not set
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

2
kernel-x86_64.config
View File

@ -4373,7 +4373,9 @@ CONFIG_PWRSEQ_SIMPLE=m
# CONFIG_QCA7000_SPI is not set
# CONFIG_QCA7000_UART is not set
# CONFIG_QCOM_APR is not set
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_EMAC is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GLINK_SSR is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set

18
kernel.spec
View File

@ -69,7 +69,7 @@ Summary: The Linux kernel
# The rc snapshot level
%global rcrev 0
# The git snapshot level
%define gitrev 6
%define gitrev 7
# Set rpm version accordingly
%define rpmversion 4.%{upstream_sublevel}.0
%endif
@ -583,19 +583,9 @@ Patch306: arm-dts-imx6qdl-udoo-Disable-usbh1-to-avoid-kernel-hang.patch
Patch309: arm-tegra-fix-nouveau-crash.patch
# https://patchwork.kernel.org/patch/10346089/
Patch310: arm-dts-Add-am335x-pocketbeagle.patch
# https://patchwork.kernel.org/patch/10354521/
# https://patchwork.kernel.org/patch/10354187/
# https://patchwork.kernel.org/patch/10306793/
# https://patchwork.kernel.org/patch/10133165/
Patch313: mvebu-a37xx-fixes.patch
Patch324: bcm283x-clk-audio-fixes.patch
# Enabling Patches for the RPi3+
Patch330: bcm2837-rpi-initial-3plus-support.patch
Patch332: bcm2837-enable-pmu.patch
Patch333: bcm2837-lan78xx-fixes.patch
@ -611,6 +601,9 @@ Patch501: Fix-for-module-sig-verification.patch
# rhbz 1431375
Patch502: input-rmi4-remove-the-need-for-artifical-IRQ.patch
# rhbz 1589855
Patch503: 0001-Revert-debugfs-inode-debugfs_create_dir-uses-mode-pe.patch
# END OF PATCH DEFINITIONS
%endif
@ -1846,6 +1839,9 @@ fi
#
#
%changelog
* Tue Jun 12 2018 Laura Abbott <labbott@redhat.com> - 4.18.0-0.rc0.git7.1
- Linux v4.17-11346-g8efcf34a2639
* Mon Jun 11 2018 Justin M. Forbes <jforbes@fedoraproject.org>
- Secure Boot updates

128
mvebu-a37xx-fixes.patch
View File

@ -1,128 +0,0 @@
From patchwork Sun Mar 25 19:57:36 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Subject: arm64: dts: armada-3720-espressobin: wire up spi flash
From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= <u.kleine-koenig@pengutronix.de>
X-Patchwork-Id: 10306793
Message-Id: <20180325195736.19782-1-u.kleine-koenig@pengutronix.de>
To: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Gregory Clement <gregory.clement@bootlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Ellie Reeves <ellierevves@gmail.com>,
linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de
Date: Sun, 25 Mar 2018 21:57:36 +0200
From: Ellie Reeves <ellierevves@gmail.com>
This is the storage the machine boots from by default. The partitioning
is taken from the U-Boot that is shipped with the board. There is some
more space on the flash that isn't used.
Signed-off-by: Ellie Reeves <ellierevves@gmail.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
.../boot/dts/marvell/armada-3720-espressobin.dts | 27 ++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
index 882d6e4a04e4..5f98c2fecca4 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
@@ -108,6 +108,33 @@
status = "okay";
};
+&spi0 {
+ status = "okay";
+
+ flash@0 {
+ reg = <0>;
+ compatible = "winbond,w25q32dw", "jedec,spi-flash";
+ spi-max-frequency = <104000000>;
+ m25p,fast-read;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "uboot";
+ reg = <0 0x180000>;
+ };
+
+ partition@180000 {
+ label = "ubootenv";
+ reg = <0x180000 0x10000>;
+ };
+ };
+ };
+};
+
/* Exported on the micro USB connector J5 through an FTDI */
&uart0 {
pinctrl-names = "default";
From patchwork Sat Apr 21 14:03:42 2018
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: arm64: dts: marvell: armada-37xx: reserve memory for ATF
From: Miquel Raynal <miquel.raynal@bootlin.com>
X-Patchwork-Id: 10354187
Message-Id: <20180421140342.25082-1-miquel.raynal@bootlin.com>
To: Gregory Clement <gregory.clement@bootlin.com>,
Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>, devicetree@vger.kernel.org,
Antoine Tenart <antoine.tenart@bootlin.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Nadav Haklai <nadavh@marvell.com>, Rob Herring <robh+dt@kernel.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Miquel Raynal <miquel.raynal@bootlin.com>, Victor Gu <xigu@marvell.com>,
linux-arm-kernel@lists.infradead.org
Date: Sat, 21 Apr 2018 16:03:42 +0200
From: Victor Gu <xigu@marvell.com>
The PSCI area should be reserved in Linux for PSCI operations such as
suspend/resume.
Reserve 2MiB of memory which matches the area used by ATF (BL1, BL2,
BL3x, see [1] in ATF source code). This covers all PSCI code and data
area and is 2MiB aligned, which is required by Linux for huge pages
handling.
[1] plat/marvell/a3700/common/include/platform_def.h
Signed-off-by: Victor Gu <xigu@marvell.com>
[miquel.raynal@bootlin.com: reword of commit message]
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index 97207a61bc79..429ce91bfc39 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -22,6 +22,17 @@
serial1 = &uart1;
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ psci-area@4000000 {
+ reg = <0 0x4000000 0 0x200000>;
+ no-map;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;

2
sources
View File

@ -1,2 +1,2 @@
SHA512 (linux-4.17.tar.xz) = 4d9de340a26155a89ea8773131c76220cc2057f2b5d031b467b60e8b14c1842518e2d60a863d8c695f0f7640f3f18d43826201984a238dade857b6cef79837db
SHA512 (patch-4.17-git6.xz) = a40b0435f65ba46eaddfd7245c2c66db3c865367aed0f7a933ae07bfad09830318aec007adcff1e367da4741cfdb71c2ecc341d246d6957354b70e23ede03731
SHA512 (patch-4.17-git7.xz) = 5f191dfe18e0de3433aec757a994d768ce67e2661c15feb06ddf64bbe0074436ddf6c21354b95c7eebd725dc8b5bfe82555212a431a937909d55d2afd122757e