Add back an old hack to make an SDV e1000e variant work.

This commit is contained in:
Dave Jones 2010-09-29 17:58:18 -04:00
parent 04093b926b
commit bbaea70ee5
2 changed files with 38 additions and 0 deletions

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@ -646,6 +646,8 @@ Patch580: linux-2.6-sparc-selinux-mprotect-checks.patch
Patch610: hda_intel-prealloc-4mb-dmabuffer.patch
Patch700: linux-2.6-e1000-ich9-montevina.patch
Patch800: linux-2.6-crash-driver.patch
# crypto/
@ -1280,6 +1282,9 @@ ApplyPatch create-sys-fs-cgroup-to-mount-cgroupfs-on.patch
# /dev/crash driver.
ApplyPatch linux-2.6-crash-driver.patch
# Hack e1000e to work on Montevina SDV
ApplyPatch linux-2.6-e1000-ich9-montevina.patch
# crypto/
# Assorted Virt Fixes
@ -1963,6 +1968,9 @@ fi
# and build.
%changelog
* Wed Sep 29 2010 Dave Jones <davej@redhat.com>
- Add back an old hack to make an SDV e1000e variant work.
* Wed Sep 29 2010 Dave Jones <davej@redhat.com>
- Enable IB700 watchdog (used by qemu/kvm). (#637152)

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@ -0,0 +1,30 @@
This only showed up in one SDV (Montevina).
The PCIE slots don't seem to like network cards, so this is the only hope
to get networking working. It's never going upstream, but it's low impact
enough to carry just to keep those SDVs working.
--- linux-2.6.35.noarch/drivers/net/e1000e/ich8lan.c~ 2010-09-29 17:53:13.000000000 -0400
+++ linux-2.6.35.noarch/drivers/net/e1000e/ich8lan.c 2010-09-29 17:54:00.000000000 -0400
@@ -424,6 +424,12 @@ static s32 e1000_init_phy_params_ich8lan
/* Verify phy id */
switch (phy->id) {
+ case 0:
+ if (hw->adapter->pdev->device == 0x10be)
+ hw_dbg(hw, "got 0 phy id, trying anyway");
+ /* Fall through to IGP03E1000 case below */
+ else
+ return -E1000_ERR_PHY;
case IGP03E1000_E_PHY_ID:
phy->type = e1000_phy_igp_3;
phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
--- linux-2.6.35.noarch/drivers/net/e1000e/netdev.c~ 2010-09-29 17:54:07.000000000 -0400
+++ linux-2.6.35.noarch/drivers/net/e1000e/netdev.c 2010-09-29 17:54:29.000000000 -0400
@@ -5994,6 +5994,7 @@ static DEFINE_PCI_DEVICE_TABLE(e1000_pci
{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
+ { PCI_VDEVICE(INTEL, 0x10be), board_ich9lan },
{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },