Linux v4.13.1

0001-Input-gpio_keys-Allow-suppression-of-input-events-fo.patch

@@ -0,0 +1,163 @@
+From 25bb14c1e78e641049fd1ee0c404a9ccd2755e44 Mon Sep 17 00:00:00 2001
+From: Hans de Goede <hdegoede@redhat.com>
+Date: Sat, 22 Jul 2017 13:00:05 +0200
+Subject: [PATCH 1/2] Input: gpio_keys - Allow suppression of input events for
+ wakeup button presses
+
+In some cases it is undesirable for a wakeup button to send input events
+to userspace if pressed to wakeup the system (if pressed during suspend).
+
+A typical example of this is the power-button on laptops / tablets,
+sending a KEY_POWER event to userspace when woken up with the power-button
+will cause userspace to immediately suspend the system again which is
+undesirable.
+
+For power-buttons attached to a PMIC, or handled by e.g. ACPI, not sending
+an input event in this case is take care of by the PMIC / ACPI hardware /
+code. But in the case of a GPIO button we need to explicitly suppress the
+sending of the input event.
+
+This commit adds support for this by adding a no_wakeup_events bool to
+struct gpio_keys_button, which platform code can set to suppress the
+input events for presses of wakeup keys during suspend.
+
+Signed-off-by: Hans de Goede <hdegoede@redhat.com>
+---
+Changes in v2:
+-This is a rewrite if my "Input: gpio_keys - Do not report wake button
+ presses as evdev events" patch.
+-Instead of unconditionally ignoring presses of all wake-up buttons during
+ suspend, this rewrite makes this configurable per button
+-This version uses a timer to delay clearing the suspended flag for software
+ debouncing, rather then jiffy compare magic
+---
+ drivers/input/keyboard/gpio_keys.c | 33 +++++++++++++++++++++++++++++++--
+ include/linux/gpio_keys.h          |  3 +++
+ 2 files changed, 34 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c
+index a047b9af8369..fa3a58620407 100644
+--- a/drivers/input/keyboard/gpio_keys.c
++++ b/drivers/input/keyboard/gpio_keys.c
+@@ -38,6 +38,7 @@ struct gpio_button_data {
+ 
+ 	unsigned short *code;
+ 
++	struct timer_list unsuspend_timer;
+ 	struct timer_list release_timer;
+ 	unsigned int release_delay;	/* in msecs, for IRQ-only buttons */
+ 
+@@ -371,6 +372,9 @@ static void gpio_keys_gpio_report_event(struct gpio_button_data *bdata)
+ 		return;
+ 	}
+ 
++	if (state && bdata->button->no_wakeup_events && bdata->suspended)
++		return;
++
+ 	if (type == EV_ABS) {
+ 		if (state)
+ 			input_event(input, type, button->code, button->value);
+@@ -400,6 +404,9 @@ static irqreturn_t gpio_keys_gpio_isr(int irq, void *dev_id)
+ 	if (bdata->button->wakeup) {
+ 		const struct gpio_keys_button *button = bdata->button;
+ 
++		if (bdata->button->no_wakeup_events && bdata->suspended)
++			return IRQ_HANDLED;
++
+ 		pm_stay_awake(bdata->input->dev.parent);
+ 		if (bdata->suspended  &&
+ 		    (button->type == 0 || button->type == EV_KEY)) {
+@@ -445,9 +452,13 @@ static irqreturn_t gpio_keys_irq_isr(int irq, void *dev_id)
+ 	spin_lock_irqsave(&bdata->lock, flags);
+ 
+ 	if (!bdata->key_pressed) {
+-		if (bdata->button->wakeup)
++		if (bdata->button->wakeup) {
+ 			pm_wakeup_event(bdata->input->dev.parent, 0);
+ 
++			if (bdata->button->no_wakeup_events && bdata->suspended)
++				goto out;
++		}
++
+ 		input_event(input, EV_KEY, *bdata->code, 1);
+ 		input_sync(input);
+ 
+@@ -468,6 +479,13 @@ static irqreturn_t gpio_keys_irq_isr(int irq, void *dev_id)
+ 	return IRQ_HANDLED;
+ }
+ 
++static void gpio_keys_unsuspend_timer(unsigned long _data)
++{
++	struct gpio_button_data *bdata = (struct gpio_button_data *)_data;
++
++	bdata->suspended = false;
++}
++
+ static void gpio_keys_quiesce_key(void *data)
+ {
+ 	struct gpio_button_data *bdata = data;
+@@ -476,6 +494,8 @@ static void gpio_keys_quiesce_key(void *data)
+ 		cancel_delayed_work_sync(&bdata->work);
+ 	else
+ 		del_timer_sync(&bdata->release_timer);
++
++	del_timer_sync(&bdata->unsuspend_timer);
+ }
+ 
+ static int gpio_keys_setup_key(struct platform_device *pdev,
+@@ -496,6 +516,8 @@ static int gpio_keys_setup_key(struct platform_device *pdev,
+ 	bdata->input = input;
+ 	bdata->button = button;
+ 	spin_lock_init(&bdata->lock);
++	setup_timer(&bdata->unsuspend_timer, gpio_keys_unsuspend_timer,
++		    (unsigned long)bdata);
+ 
+ 	if (child) {
+ 		bdata->gpiod = devm_fwnode_get_gpiod_from_child(dev, NULL,
+@@ -868,6 +890,7 @@ static int __maybe_unused gpio_keys_suspend(struct device *dev)
+ 			struct gpio_button_data *bdata = &ddata->data[i];
+ 			if (bdata->button->wakeup)
+ 				enable_irq_wake(bdata->irq);
++			del_timer_sync(&bdata->unsuspend_timer);
+ 			bdata->suspended = true;
+ 		}
+ 	} else {
+@@ -892,7 +915,13 @@ static int __maybe_unused gpio_keys_resume(struct device *dev)
+ 			struct gpio_button_data *bdata = &ddata->data[i];
+ 			if (bdata->button->wakeup)
+ 				disable_irq_wake(bdata->irq);
+-			bdata->suspended = false;
++			if (bdata->button->no_wakeup_events) {
++				mod_timer(&bdata->unsuspend_timer, jiffies +
++					  msecs_to_jiffies(
++						    bdata->software_debounce));
++			} else {
++				bdata->suspended = false;
++			}
+ 		}
+ 	} else {
+ 		mutex_lock(&input->mutex);
+diff --git a/include/linux/gpio_keys.h b/include/linux/gpio_keys.h
+index 0b71024c082c..d8a85e52b6bb 100644
+--- a/include/linux/gpio_keys.h
++++ b/include/linux/gpio_keys.h
+@@ -15,6 +15,8 @@ struct device;
+  * @debounce_interval:	debounce ticks interval in msecs
+  * @can_disable:	%true indicates that userspace is allowed to
+  *			disable button via sysfs
++ * @no_wakeup_events:	For wake-up source buttons only, if %true then no input
++ *			events will be generated if pressed while suspended
+  * @value:		axis value for %EV_ABS
+  * @irq:		Irq number in case of interrupt keys
+  */
+@@ -27,6 +29,7 @@ struct gpio_keys_button {
+ 	int wakeup;
+ 	int debounce_interval;
+ 	bool can_disable;
++	bool no_wakeup_events;
+ 	int value;
+ 	unsigned int irq;
+ };
+-- 
+2.13.4
+

0001-power-supply-max17042_battery-Add-support-for-ACPI-e.patch

@@ -0,0 +1,78 @@
+From 075bb90dbb4d894938c5859e3850987238db9cd8 Mon Sep 17 00:00:00 2001
+From: Hans de Goede <hdegoede@redhat.com>
+Date: Fri, 11 Aug 2017 22:30:55 +0200
+Subject: [PATCH 1/2] power: supply: max17042_battery: Add support for ACPI
+ enumeration
+
+Some x86 devices enumerate a max17047 fuel-gauge through a MAX17047
+ACPI firmware-node, add support for this.
+
+Signed-off-by: Hans de Goede <hdegoede@redhat.com>
+---
+ drivers/power/supply/max17042_battery.c | 22 +++++++++++++++++++++-
+ 1 file changed, 21 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/power/supply/max17042_battery.c b/drivers/power/supply/max17042_battery.c
+index aecaaa2b0586..b2ddb7eb69c6 100644
+--- a/drivers/power/supply/max17042_battery.c
++++ b/drivers/power/supply/max17042_battery.c
+@@ -22,6 +22,7 @@
+  * This driver is based on max17040_battery.c
+  */
+ 
++#include <linux/acpi.h>
+ #include <linux/init.h>
+ #include <linux/module.h>
+ #include <linux/slab.h>
+@@ -982,6 +983,8 @@ static int max17042_probe(struct i2c_client *client,
+ 	struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
+ 	const struct power_supply_desc *max17042_desc = &max17042_psy_desc;
+ 	struct power_supply_config psy_cfg = {};
++	const struct acpi_device_id *acpi_id;
++	struct device *dev = &client->dev;
+ 	struct max17042_chip *chip;
+ 	int ret;
+ 	int i;
+@@ -995,7 +998,15 @@ static int max17042_probe(struct i2c_client *client,
+ 		return -ENOMEM;
+ 
+ 	chip->client = client;
+-	chip->chip_type = id->driver_data;
++	if (id) {
++		chip->chip_type = id->driver_data;
++	} else {
++		acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
++		if (!acpi_id)
++			return -ENODEV;
++
++		chip->chip_type = acpi_id->driver_data;
++	}
+ 	chip->regmap = devm_regmap_init_i2c(client, &max17042_regmap_config);
+ 	if (IS_ERR(chip->regmap)) {
+ 		dev_err(&client->dev, "Failed to initialize regmap\n");
+@@ -1104,6 +1115,14 @@ static int max17042_resume(struct device *dev)
+ static SIMPLE_DEV_PM_OPS(max17042_pm_ops, max17042_suspend,
+ 			max17042_resume);
+ 
++#ifdef CONFIG_ACPI
++static const struct acpi_device_id max17042_acpi_match[] = {
++	{ "MAX17047", MAXIM_DEVICE_TYPE_MAX17047 },
++	{ }
++};
++MODULE_DEVICE_TABLE(acpi, max17042_acpi_match);
++#endif
++
+ #ifdef CONFIG_OF
+ static const struct of_device_id max17042_dt_match[] = {
+ 	{ .compatible = "maxim,max17042" },
+@@ -1125,6 +1144,7 @@ MODULE_DEVICE_TABLE(i2c, max17042_id);
+ static struct i2c_driver max17042_i2c_driver = {
+ 	.driver	= {
+ 		.name	= "max17042",
++		.acpi_match_table = ACPI_PTR(max17042_acpi_match),
+ 		.of_match_table = of_match_ptr(max17042_dt_match),
+ 		.pm	= &max17042_pm_ops,
+ 	},
+-- 
+2.13.4
+

0002-Input-soc_button_array-Suppress-power-button-presses.patch

@@ -0,0 +1,62 @@
+From d561f0543506bc12e7b3355efddb0bfd7ca83c74 Mon Sep 17 00:00:00 2001
+From: Hans de Goede <hdegoede@redhat.com>
+Date: Sat, 22 Jul 2017 13:17:36 +0200
+Subject: [PATCH 2/2] Input: soc_button_array - Suppress power button presses
+ during suspend
+
+If the power-button is pressed to wakeup the laptop/tablet from suspend
+and we report a KEY_POWER event to userspace when woken up this will cause
+userspace to immediately suspend the system again which is undesirable.
+
+This commit sets the new no_wakeup_events flag in the gpio_keys_button
+struct for the power-button suppressing the undesirable KEY_POWER input
+events on wake-up.
+
+Signed-off-by: Hans de Goede <hdegoede@redhat.com>
+---
+Changes in v2:
+-New patch in v2 of this patch-set
+---
+ drivers/input/misc/soc_button_array.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/input/misc/soc_button_array.c b/drivers/input/misc/soc_button_array.c
+index f600f3a7a3c6..27b99831cb97 100644
+--- a/drivers/input/misc/soc_button_array.c
++++ b/drivers/input/misc/soc_button_array.c
+@@ -27,6 +27,7 @@ struct soc_button_info {
+ 	unsigned int event_code;
+ 	bool autorepeat;
+ 	bool wakeup;
++	bool no_wakeup_events;
+ };
+ 
+ /*
+@@ -100,6 +101,7 @@ soc_button_device_create(struct platform_device *pdev,
+ 		gpio_keys[n_buttons].active_low = 1;
+ 		gpio_keys[n_buttons].desc = info->name;
+ 		gpio_keys[n_buttons].wakeup = info->wakeup;
++		gpio_keys[n_buttons].no_wakeup_events = info->no_wakeup_events;
+ 		/* These devices often use cheap buttons, use 50 ms debounce */
+ 		gpio_keys[n_buttons].debounce_interval = 50;
+ 		n_buttons++;
+@@ -185,6 +187,7 @@ static int soc_button_parse_btn_desc(struct device *dev,
+ 		info->name = "power";
+ 		info->event_code = KEY_POWER;
+ 		info->wakeup = true;
++		info->no_wakeup_events = true;
+ 	} else if (upage == 0x07 && usage == 0xe3) {
+ 		info->name = "home";
+ 		info->event_code = KEY_LEFTMETA;
+@@ -369,7 +372,7 @@ static int soc_button_probe(struct platform_device *pdev)
+  * Platforms"
+  */
+ static struct soc_button_info soc_button_PNP0C40[] = {
+-	{ "power", 0, EV_KEY, KEY_POWER, false, true },
++	{ "power", 0, EV_KEY, KEY_POWER, false, true, true },
+ 	{ "home", 1, EV_KEY, KEY_LEFTMETA, false, true },
+ 	{ "volume_up", 2, EV_KEY, KEY_VOLUMEUP, true, false },
+ 	{ "volume_down", 3, EV_KEY, KEY_VOLUMEDOWN, true, false },
+-- 
+2.13.4
+

0002-power-supply-max17042_battery-Fix-ACPI-interrupt-iss.patch

@@ -0,0 +1,80 @@
+From 27b9d46d25c873b351757c44ce523bf0ede1d08e Mon Sep 17 00:00:00 2001
+From: Hans de Goede <hdegoede@redhat.com>
+Date: Mon, 14 Aug 2017 11:02:59 +0200
+Subject: [PATCH 2/2] power: supply: max17042_battery: Fix ACPI interrupt
+ issues
+
+On some x86/ACPI boards the DSDT defines an ACPI event handler for
+the max17047 IRQ, this causes several problems:
+
+1) We need to share the IRQ to avoid an error getting it
+
+2) Even of we are willing to share, we may fail to share because some
+   DSDTs claim it exclusivly
+
+3) If we are unable to share the IRQ, or the IRQ is only listed as an
+   ACPI event source and not in the max1704 firmware node, then the
+   charge threshold IRQ (which is used to give an IRQ every 1 percent
+   charge change) becomes a problem, the ACPI event handler will not
+   update this to the next 1 percent threshold, so the IRQ keeps firing
+   and we get an IRQ storm pegging 1 CPU core.
+
+   This happens despite the max17042 driver not setting the charge
+   threshold because Windows uses it and leaves it set on reboot.
+
+   So if we are unable to get the IRQ we need to reprogram the
+   charge threshold to its disabled setting.
+
+This commit fixes al of the above, while at it it also makes the error
+msg when being unable to get the IRQ consistent with other messages.
+
+Signed-off-by: Hans de Goede <hdegoede@redhat.com>
+---
+ drivers/power/supply/max17042_battery.c | 20 +++++++++++++++-----
+ 1 file changed, 15 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/power/supply/max17042_battery.c b/drivers/power/supply/max17042_battery.c
+index b2ddb7eb69c6..18a44e4ed6ff 100644
+--- a/drivers/power/supply/max17042_battery.c
++++ b/drivers/power/supply/max17042_battery.c
+@@ -1050,11 +1050,18 @@ static int max17042_probe(struct i2c_client *client,
+ 	}
+ 
+ 	if (client->irq) {
++		unsigned int flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT;
++
++		/*
++		 * On ACPI systems the IRQ may be handled by ACPI-event code,
++		 * so we need to share (if the ACPI code is willing to share).
++		 */
++		if (acpi_id)
++			flags |= IRQF_SHARED | IRQF_PROBE_SHARED;
++
+ 		ret = devm_request_threaded_irq(&client->dev, client->irq,
+ 						NULL,
+-						max17042_thread_handler,
+-						IRQF_TRIGGER_FALLING |
+-						IRQF_ONESHOT,
++						max17042_thread_handler, flags,
+ 						chip->battery->desc->name,
+ 						chip);
+ 		if (!ret) {
+@@ -1064,10 +1071,13 @@ static int max17042_probe(struct i2c_client *client,
+ 			max17042_set_soc_threshold(chip, 1);
+ 		} else {
+ 			client->irq = 0;
+-			dev_err(&client->dev, "%s(): cannot get IRQ\n",
+-				__func__);
++			if (ret != -EBUSY)
++				dev_err(&client->dev, "Failed to get IRQ\n");
+ 		}
+ 	}
++	/* Not able to update the charge threshold when exceeded? -> disable */
++	if (!client->irq)
++		regmap_write(chip->regmap, MAX17042_SALRT_Th, 0xff00);
+ 
+ 	regmap_read(chip->regmap, MAX17042_STATUS, &val);
+ 	if (val & STATUS_POR_BIT) {
+-- 
+2.13.4
+

Fix-for-module-sig-verification.patch

@@ -0,0 +1,24 @@
+From ea6e7d9d0fe3e448aef19b3943d4897ae0bef128 Mon Sep 17 00:00:00 2001
+From: Fedora Kernel Team <kernel-team@fedoraproject.org>
+Date: Thu, 3 Aug 2017 13:46:51 -0500
+Subject: [PATCH] Fix for module sig verification
+
+---
+ kernel/module_signing.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/kernel/module_signing.c b/kernel/module_signing.c
+index 937c844..d3d6f95 100644
+--- a/kernel/module_signing.c
++++ b/kernel/module_signing.c
+@@ -81,6 +81,6 @@ int mod_verify_sig(const void *mod, unsigned long *_modlen)
+ 	}
+
+ 	return verify_pkcs7_signature(mod, modlen, mod + modlen, sig_len,
+-				      NULL, VERIFYING_MODULE_SIGNATURE,
++				      (void *)1UL, VERIFYING_MODULE_SIGNATURE,
+ 				      NULL, NULL);
+ }
+-- 
+2.13.3
+

allwinner-net-emac.patch

@@ -0,0 +1,746 @@
+From 83e18f0ad4793ea83e03cb8e608bdd2939e76d78 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Mon, 4 Sep 2017 13:04:34 +0100
+Subject: [PATCH 1/4] Revert "net: stmmac: sun8i: Remove the compatibles"
+
+This reverts commit ad4540cc5aa3dccb8e1e12458d57f8c40fae5a1c.
+---
+ drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+index 39c2122a4f26..fffd6d5fc907 100644
+--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+@@ -979,6 +979,14 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
+ }
+ 
+ static const struct of_device_id sun8i_dwmac_match[] = {
++	{ .compatible = "allwinner,sun8i-h3-emac",
++		.data = &emac_variant_h3 },
++	{ .compatible = "allwinner,sun8i-v3s-emac",
++		.data = &emac_variant_v3s },
++	{ .compatible = "allwinner,sun8i-a83t-emac",
++		.data = &emac_variant_a83t },
++	{ .compatible = "allwinner,sun50i-a64-emac",
++		.data = &emac_variant_a64 },
+ 	{ }
+ };
+ MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
+-- 
+2.13.5
+
+From fa4788d88903c1e535d034c3dd3fcd386685a02c Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Mon, 4 Sep 2017 13:04:41 +0100
+Subject: [PATCH 2/4] Revert "arm: dts: sunxi: Revert EMAC changes"
+
+This reverts commit fe45174b72aead678da581bab9e9a37c9b26a070.
+---
+ arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts |  9 ++++++++
+ arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 19 +++++++++++++++++
+ arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts         |  7 ++++++
+ arch/arm/boot/dts/sun8i-h3-orangepi-2.dts         |  8 +++++++
+ arch/arm/boot/dts/sun8i-h3-orangepi-one.dts       |  8 +++++++
+ arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   |  5 +++++
+ arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts        |  8 +++++++
+ arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts      | 22 +++++++++++++++++++
+ arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts    | 16 ++++++++++++++
+ arch/arm/boot/dts/sunxi-h3-h5.dtsi                | 26 +++++++++++++++++++++++
+ 10 files changed, 128 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+index b1502df7b509..6713d0f2b3f4 100644
+--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+@@ -56,6 +56,8 @@
+ 
+ 	aliases {
+ 		serial0 = &uart0;
++		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
++		ethernet0 = &emac;
+ 		ethernet1 = &xr819;
+ 	};
+ 
+@@ -102,6 +104,13 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	phy-handle = <&int_mii_phy>;
++	phy-mode = "mii";
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>;
+diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+index a337af1de322..d756ff825116 100644
+--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
++++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+@@ -52,6 +52,7 @@
+ 	compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 		serial1 = &uart1;
+ 	};
+@@ -114,12 +115,30 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii";
++
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
+ &ir {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&ir_pins_a>;
+ 	status = "okay";
+ };
+ 
++&mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <0>;
++	};
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+index 8d2cc6e9a03f..78f6c24952dd 100644
+--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+@@ -46,3 +46,10 @@
+ 	model = "FriendlyARM NanoPi NEO";
+ 	compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
+ };
++
++&emac {
++	phy-handle = <&int_mii_phy>;
++	phy-mode = "mii";
++	allwinner,leds-active-low;
++	status = "okay";
++};
+diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+index 8ff71b1bb45b..17cdeae19c6f 100644
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+@@ -54,6 +54,7 @@
+ 	aliases {
+ 		serial0 = &uart0;
+ 		/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
++		ethernet0 = &emac;
+ 		ethernet1 = &rtl8189;
+ 	};
+ 
+@@ -117,6 +118,13 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	phy-handle = <&int_mii_phy>;
++	phy-mode = "mii";
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
+ &ir {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&ir_pins_a>;
+diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+index 5fea430e0eb1..6880268e8b87 100644
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+@@ -52,6 +52,7 @@
+ 	compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 	};
+ 
+@@ -97,6 +98,13 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	phy-handle = <&int_mii_phy>;
++	phy-mode = "mii";
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+index 8b93f5c781a7..a10281b455f5 100644
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+@@ -53,6 +53,11 @@
+ 	};
+ };
+ 
++&emac {
++	/* LEDs changed to active high on the plus */
++	/delete-property/ allwinner,leds-active-low;
++};
++
+ &mmc1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc1_pins_a>;
+diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+index 1a044b17d6c6..998b60f8d295 100644
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+@@ -52,6 +52,7 @@
+ 	compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 	};
+ 
+@@ -113,6 +114,13 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	phy-handle = <&int_mii_phy>;
++	phy-mode = "mii";
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
+ &ir {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&ir_pins_a>;
+diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+index 828ae7a526d9..331ed683ac62 100644
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
+@@ -47,6 +47,10 @@
+ 	model = "Xunlong Orange Pi Plus / Plus 2";
+ 	compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
+ 
++	aliases {
++		ethernet0 = &emac;
++	};
++
+ 	reg_gmac_3v3: gmac-3v3 {
+ 		compatible = "regulator-fixed";
+ 		regulator-name = "gmac-3v3";
+@@ -74,6 +78,24 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii";
++
++	allwinner,leds-active-low;
++	status = "okay";
++};
++
++&mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <0>;
++	};
++};
++
+ &mmc2 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc2_8bit_pins>;
+diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
+index 97920b12a944..80026f3caafc 100644
+--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
+@@ -61,3 +61,19 @@
+ 		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
+ 	};
+ };
++
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii";
++	status = "okay";
++};
++
++&mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
+diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+index 11240a8313c2..d38282b9e5d4 100644
+--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+@@ -391,6 +391,32 @@
+ 			clocks = <&osc24M>;
+ 		};
+ 
++		emac: ethernet@1c30000 {
++			compatible = "allwinner,sun8i-h3-emac";
++			syscon = <&syscon>;
++			reg = <0x01c30000 0x10000>;
++			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-names = "macirq";
++			resets = <&ccu RST_BUS_EMAC>;
++			reset-names = "stmmaceth";
++			clocks = <&ccu CLK_BUS_EMAC>;
++			clock-names = "stmmaceth";
++			#address-cells = <1>;
++			#size-cells = <0>;
++			status = "disabled";
++
++			mdio: mdio {
++				#address-cells = <1>;
++				#size-cells = <0>;
++				int_mii_phy: ethernet-phy@1 {
++					compatible = "ethernet-phy-ieee802.3-c22";
++					reg = <1>;
++					clocks = <&ccu CLK_BUS_EPHY>;
++					resets = <&ccu RST_BUS_EPHY>;
++				};
++			};
++		};
++
+ 		spi0: spi@01c68000 {
+ 			compatible = "allwinner,sun8i-h3-spi";
+ 			reg = <0x01c68000 0x1000>;
+-- 
+2.13.5
+
+From 4aba5ca95496899165ee7ceef5d9c60a6e7b15dd Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Mon, 4 Sep 2017 13:04:47 +0100
+Subject: [PATCH 3/4] Revert "arm64: dts: allwinner: Revert EMAC changes"
+
+This reverts commit 87e1f5e8bb4bd584de0a8f3b1e42196dca221d02.
+---
+ .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts   | 16 ++++++++++++++++
+ .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts    | 15 +++++++++++++++
+ arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts  | 17 +++++++++++++++++
+ .../dts/allwinner/sun50i-a64-sopine-baseboard.dts    | 16 ++++++++++++++++
+ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi        | 20 ++++++++++++++++++++
+ .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts     | 17 +++++++++++++++++
+ .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts    | 17 +++++++++++++++++
+ .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts  | 17 +++++++++++++++++
+ 8 files changed, 135 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+index 6872135d7f84..ba2fde2909f9 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+@@ -51,6 +51,7 @@
+ 	compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 		serial1 = &uart1;
+ 	};
+@@ -67,6 +68,14 @@
+ 	};
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&rgmii_pins>;
++	phy-mode = "rgmii";
++	phy-handle = <&ext_rgmii_phy>;
++	status = "okay";
++};
++
+ &i2c1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c1_pins>;
+@@ -77,6 +86,13 @@
+ 	bias-pull-up;
+ };
+ 
++&mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins>;
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+index f82ccf332c0f..24f1aac366d6 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+@@ -48,3 +48,18 @@
+ 
+ 	/* TODO: Camera, touchscreen, etc. */
+ };
++
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&rgmii_pins>;
++	phy-mode = "rgmii";
++	phy-handle = <&ext_rgmii_phy>;
++	status = "okay";
++};
++
++&mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+index 7c533b6d4ba9..827168bc22ed 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+@@ -51,6 +51,7 @@
+ 	compatible = "pine64,pine64", "allwinner,sun50i-a64";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 		serial1 = &uart1;
+ 		serial2 = &uart2;
+@@ -78,6 +79,15 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&rmii_pins>;
++	phy-mode = "rmii";
++	phy-handle = <&ext_rmii_phy1>;
++	status = "okay";
++
++};
++
+ &i2c1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&i2c1_pins>;
+@@ -88,6 +98,13 @@
+ 	bias-pull-up;
+ };
+ 
++&mdio {
++	ext_rmii_phy1: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins>;
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+index d891a1a27f6c..216e3a5dafae 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+@@ -53,6 +53,7 @@
+ 		     "allwinner,sun50i-a64";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 	};
+ 
+@@ -76,6 +77,21 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&rgmii_pins>;
++	phy-mode = "rgmii";
++	phy-handle = <&ext_rgmii_phy>;
++	status = "okay";
++};
++
++&mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
++
+ &mmc2 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc2_pins>;
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+index 68aadc9b96dc..bd0f33b77f57 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+@@ -449,6 +449,26 @@
+ 			#size-cells = <0>;
+ 		};
+ 
++		emac: ethernet@1c30000 {
++			compatible = "allwinner,sun50i-a64-emac";
++			syscon = <&syscon>;
++			reg = <0x01c30000 0x10000>;
++			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
++			interrupt-names = "macirq";
++			resets = <&ccu RST_BUS_EMAC>;
++			reset-names = "stmmaceth";
++			clocks = <&ccu CLK_BUS_EMAC>;
++			clock-names = "stmmaceth";
++			status = "disabled";
++			#address-cells = <1>;
++			#size-cells = <0>;
++
++			mdio: mdio {
++				#address-cells = <1>;
++				#size-cells = <0>;
++			};
++		};
++
+ 		gic: interrupt-controller@1c81000 {
+ 			compatible = "arm,gic-400";
+ 			reg = <0x01c81000 0x1000>,
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+index 1c2387bd5df6..968908761194 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+@@ -50,6 +50,7 @@
+ 	compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 	};
+ 
+@@ -108,6 +109,22 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii";
++	status = "okay";
++};
++
++&mdio {
++	ext_rgmii_phy: ethernet-phy@7 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <7>;
++	};
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+index 4f77c8470f6c..a8296feee884 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+@@ -59,6 +59,7 @@
+ 	};
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 	};
+ 
+@@ -136,12 +137,28 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii";
++	status = "okay";
++};
++
+ &ir {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&ir_pins_a>;
+ 	status = "okay";
+ };
+ 
++&mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+index 6be06873e5af..d906b302cbcd 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+@@ -54,6 +54,7 @@
+ 	compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
+ 
+ 	aliases {
++		ethernet0 = &emac;
+ 		serial0 = &uart0;
+ 	};
+ 
+@@ -143,12 +144,28 @@
+ 	status = "okay";
+ };
+ 
++&emac {
++	pinctrl-names = "default";
++	pinctrl-0 = <&emac_rgmii_pins>;
++	phy-supply = <&reg_gmac_3v3>;
++	phy-handle = <&ext_rgmii_phy>;
++	phy-mode = "rgmii";
++	status = "okay";
++};
++
+ &ir {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&ir_pins_a>;
+ 	status = "okay";
+ };
+ 
++&mdio {
++	ext_rgmii_phy: ethernet-phy@1 {
++		compatible = "ethernet-phy-ieee802.3-c22";
++		reg = <1>;
++	};
++};
++
+ &mmc0 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+-- 
+2.13.5
+
+From 11190f020b948ccdf15061b6df8cc2836a2afcb1 Mon Sep 17 00:00:00 2001
+From: Peter Robinson <pbrobinson@gmail.com>
+Date: Mon, 4 Sep 2017 13:04:55 +0100
+Subject: [PATCH 4/4] Revert "dt-bindings: net: Revert sun8i dwmac binding"
+
+This reverts commit 8aa33ec2f4812d1ee96f4c02ba013f5b9c514343.
+---
+ .../devicetree/bindings/net/dwmac-sun8i.txt        | 84 ++++++++++++++++++++++
+ 1 file changed, 84 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+
+diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+new file mode 100644
+index 000000000000..725f3b187886
+--- /dev/null
++++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+@@ -0,0 +1,84 @@
++* Allwinner sun8i GMAC ethernet controller
++
++This device is a platform glue layer for stmmac.
++Please see stmmac.txt for the other unchanged properties.
++
++Required properties:
++- compatible: should be one of the following string:
++		"allwinner,sun8i-a83t-emac"
++		"allwinner,sun8i-h3-emac"
++		"allwinner,sun8i-v3s-emac"
++		"allwinner,sun50i-a64-emac"
++- reg: address and length of the register for the device.
++- interrupts: interrupt for the device
++- interrupt-names: should be "macirq"
++- clocks: A phandle to the reference clock for this device
++- clock-names: should be "stmmaceth"
++- resets: A phandle to the reset control for this device
++- reset-names: should be "stmmaceth"
++- phy-mode: See ethernet.txt
++- phy-handle: See ethernet.txt
++- #address-cells: shall be 1
++- #size-cells: shall be 0
++- syscon: A phandle to the syscon of the SoC with one of the following
++ compatible string:
++  - allwinner,sun8i-h3-system-controller
++  - allwinner,sun8i-v3s-system-controller
++  - allwinner,sun50i-a64-system-controller
++  - allwinner,sun8i-a83t-system-controller
++
++Optional properties:
++- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0)
++- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0)
++Both delay properties need to be a multiple of 100. They control the delay for
++external PHY.
++
++Optional properties for the following compatibles:
++  - "allwinner,sun8i-h3-emac",
++  - "allwinner,sun8i-v3s-emac":
++- allwinner,leds-active-low: EPHY LEDs are active low
++
++Required child node of emac:
++- mdio bus node: should be named mdio
++
++Required properties of the mdio node:
++- #address-cells: shall be 1
++- #size-cells: shall be 0
++
++The device node referenced by "phy" or "phy-handle" should be a child node
++of the mdio node. See phy.txt for the generic PHY bindings.
++
++Required properties of the phy node with the following compatibles:
++  - "allwinner,sun8i-h3-emac",
++  - "allwinner,sun8i-v3s-emac":
++- clocks: a phandle to the reference clock for the EPHY
++- resets: a phandle to the reset control for the EPHY
++
++Example:
++
++emac: ethernet@1c0b000 {
++	compatible = "allwinner,sun8i-h3-emac";
++	syscon = <&syscon>;
++	reg = <0x01c0b000 0x104>;
++	interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
++	interrupt-names = "macirq";
++	resets = <&ccu RST_BUS_EMAC>;
++	reset-names = "stmmaceth";
++	clocks = <&ccu CLK_BUS_EMAC>;
++	clock-names = "stmmaceth";
++	#address-cells = <1>;
++	#size-cells = <0>;
++
++	phy-handle = <&int_mii_phy>;
++	phy-mode = "mii";
++	allwinner,leds-active-low;
++	mdio: mdio {
++		#address-cells = <1>;
++		#size-cells = <0>;
++		int_mii_phy: ethernet-phy@1 {
++			reg = <1>;
++			clocks = <&ccu CLK_BUS_EPHY>;
++			resets = <&ccu RST_BUS_EPHY>;
++		};
++	};
++};
+-- 
+2.13.5
+

arm-tegra-fix-gpu-iommu.patch

@@ -37,59 +37,3 @@ index 187a36c6d0fc..b3b89befffeb 100644
  
  		#address-cells = <2>;
  		#size-cells = <2>;
-From patchwork Mon Jul 10 19:33:05 2017
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: gpu: host1x: Free the IOMMU domain when there is no device to attach
-From: Paul Kocialkowski <contact@paulk.fr>
-X-Patchwork-Id: 9833721
-Message-Id: <20170710193305.5987-1-contact@paulk.fr>
-To: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org,
- linux-kernel@vger.kernel.org
-Cc: Thierry Reding <thierry.reding@gmail.com>,
- Stephen Warren <swarren@wwwdotorg.org>,
- Mikko Perttunen <mperttunen@nvidia.com>,
- Paul Kocialkowski <contact@paulk.fr>, 
- Jonathan Hunter <jonathanh@nvidia.com>
-Date: Mon, 10 Jul 2017 21:33:05 +0200
-
-When there is no device to attach to the IOMMU domain, as may be the
-case when the device-tree does not contain the proper iommu node, it is
-best to keep going without IOMMU support rather than failing.
-This allows the driver to probe and function instead of taking down
-all of the tegra drm driver, leading to missing display support.
-
-Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
-Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
----
- drivers/gpu/host1x/dev.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
-index ac65f52850a6..f296738d0de8 100644
---- a/drivers/gpu/host1x/dev.c
-+++ b/drivers/gpu/host1x/dev.c
-@@ -186,8 +186,13 @@ static int host1x_probe(struct platform_device *pdev)
- 			return -ENOMEM;
- 
- 		err = iommu_attach_device(host->domain, &pdev->dev);
--		if (err)
-+		if (err == -ENODEV) {
-+			iommu_domain_free(host->domain);
-+			host->domain = NULL;
-+			goto iommu_skip;
-+		} else if (err) {
- 			goto fail_free_domain;
-+		}
- 
- 		geometry = &host->domain->geometry;
- 
-@@ -198,6 +203,7 @@ static int host1x_probe(struct platform_device *pdev)
- 		host->iova_end = geometry->aperture_end;
- 	}
- 
-+iommu_skip:
- 	err = host1x_channel_list_init(host);
- 	if (err) {
- 		dev_err(&pdev->dev, "failed to initialize channel list\n");

baseconfig/CONFIG_ATH10K_SDIO

@@ -0,0 +1 @@
+CONFIG_ATH10K_SDIO=m

baseconfig/CONFIG_BRCMSTB_GISB_ARB

@@ -0,0 +1 @@
+# CONFIG_BRCMSTB_GISB_ARB is not set

baseconfig/CONFIG_CHARGER_LTC3651

@@ -0,0 +1 @@
+# CONFIG_CHARGER_LTC3651 is not set

baseconfig/CONFIG_CIFS_DEBUG_DUMP_KEYS

@@ -0,0 +1 @@
+# CONFIG_CIFS_DEBUG_DUMP_KEYS is not set

baseconfig/CONFIG_CORTINA_PHY

@@ -0,0 +1 @@
+CONFIG_CORTINA_PHY=m

baseconfig/CONFIG_CRC4

@@ -0,0 +1 @@
+CONFIG_CRC4=m

baseconfig/CONFIG_CRYPTO_DEV_NITROX_CNN55XX

@@ -0,0 +1 @@
+CONFIG_CRYPTO_DEV_NITROX_CNN55XX=m

baseconfig/CONFIG_DM_ZONED

@@ -0,0 +1 @@
+CONFIG_DM_ZONED=m

baseconfig/CONFIG_DRM_AMDGPU_CIK

@@ -1 +1 @@
-# CONFIG_DRM_AMDGPU_CIK is not set
+CONFIG_DRM_AMDGPU_CIK=y

baseconfig/CONFIG_DRM_PANEL_INNOLUX_P079ZCA

@@ -0,0 +1 @@
+# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set

baseconfig/CONFIG_DRM_VBOXVIDEO

@@ -0,0 +1 @@
+# CONFIG_DRM_VBOXVIDEO is not set

baseconfig/CONFIG_EXTCON

@@ -1 +1 @@
-# CONFIG_EXTCON is not set
+CONFIG_EXTCON=y

baseconfig/CONFIG_EXTCON_GPIO

@@ -0,0 +1 @@
+# CONFIG_EXTCON_GPIO is not set

baseconfig/CONFIG_EXTCON_MAX3355

@@ -0,0 +1 @@
+# CONFIG_EXTCON_MAX3355 is not set

baseconfig/CONFIG_EXTCON_RT8973A

@@ -0,0 +1 @@
+# CONFIG_EXTCON_RT8973A is not set

baseconfig/CONFIG_EXTCON_SM5502

@@ -0,0 +1 @@
+# CONFIG_EXTCON_SM5502 is not set

baseconfig/CONFIG_EXTCON_USB_GPIO

@@ -0,0 +1 @@
+# CONFIG_EXTCON_USB_GPIO is not set

baseconfig/CONFIG_FORTIFY_SOURCE

@@ -0,0 +1 @@
+CONFIG_FORTIFY_SOURCE=y

baseconfig/CONFIG_FSI_MASTER_GPIO

@@ -0,0 +1 @@
+CONFIG_FSI_MASTER_GPIO=m

baseconfig/CONFIG_FSI_MASTER_HUB

@@ -0,0 +1 @@
+CONFIG_FSI_MASTER_HUB=m

baseconfig/CONFIG_FSI_SCOM

@@ -0,0 +1 @@
+CONFIG_FSI_SCOM=m

baseconfig/CONFIG_GENERIC_IRQ_DEBUGFS

@@ -0,0 +1 @@
+# CONFIG_GENERIC_IRQ_DEBUGFS is not set

baseconfig/CONFIG_GPIO_XRA1403

@@ -0,0 +1 @@
+# CONFIG_GPIO_XRA1403 is not set

baseconfig/CONFIG_HID_ITE

@@ -0,0 +1 @@
+CONFIG_HID_ITE=m

baseconfig/CONFIG_HID_RETRODE

@@ -0,0 +1 @@
+CONFIG_HID_RETRODE=m

baseconfig/CONFIG_I2C_DESIGNWARE_SLAVE

@@ -0,0 +1 @@
+CONFIG_I2C_DESIGNWARE_SLAVE=y

baseconfig/CONFIG_I2C_MUX_GPMUX

@@ -0,0 +1 @@
+CONFIG_I2C_MUX_GPMUX=m

baseconfig/CONFIG_IIO_MUX

@@ -0,0 +1 @@
+CONFIG_IIO_MUX=m

baseconfig/CONFIG_INFINIBAND_VMWARE_PVRDMA

@@ -1 +1 @@
-CONFIG_INFINIBAND_VMWARE_PVRDMA=m
+# CONFIG_INFINIBAND_VMWARE_PVRDMA is not set

baseconfig/CONFIG_KEYBOARD_DLINK_DIR685

@@ -0,0 +1 @@
+# CONFIG_KEYBOARD_DLINK_DIR685 is not set

baseconfig/CONFIG_MACB_USE_HWSTAMP

@@ -0,0 +1 @@
+CONFIG_MACB_USE_HWSTAMP=y

baseconfig/CONFIG_MARVELL_10G_PHY

@@ -0,0 +1 @@
+CONFIG_MARVELL_10G_PHY=m

baseconfig/CONFIG_MFD_TI_LP87565

@@ -0,0 +1 @@
+# CONFIG_MFD_TI_LP87565 is not set

baseconfig/CONFIG_MICROCHIP_KSZ

@@ -0,0 +1 @@
+CONFIG_MICROCHIP_KSZ=m

baseconfig/CONFIG_MICROCHIP_KSZ_SPI_DRIVER

@@ -0,0 +1 @@
+CONFIG_MICROCHIP_KSZ_SPI_DRIVER=m

baseconfig/CONFIG_MLX5_EN_IPSEC

@@ -0,0 +1 @@
+# CONFIG_MLX5_EN_IPSEC is not set

baseconfig/CONFIG_MLX5_FPGA

@@ -0,0 +1 @@
+# CONFIG_MLX5_FPGA is not set

baseconfig/CONFIG_MLXFW

@@ -0,0 +1 @@
+CONFIG_MLXFW=m

baseconfig/CONFIG_MTD_MCHP23K256

@@ -0,0 +1 @@
+# CONFIG_MTD_MCHP23K256 is not set

baseconfig/CONFIG_MULTIPLEXER

@@ -0,0 +1 @@
+CONFIG_MULTIPLEXER=m

baseconfig/CONFIG_MUX_ADG792A

@@ -0,0 +1 @@
+CONFIG_MUX_ADG792A=m

baseconfig/CONFIG_MUX_GPIO

@@ -0,0 +1 @@
+CONFIG_MUX_GPIO=m

baseconfig/CONFIG_MUX_MMIO

@@ -0,0 +1 @@
+CONFIG_MUX_MMIO=m

baseconfig/CONFIG_NET_VENDOR_AQUANTIA

@@ -1 +1 @@
-# CONFIG_NET_VENDOR_AQUANTIA is not set
+CONFIG_NET_VENDOR_AQUANTIA=y

baseconfig/CONFIG_NFP_APP_FLOWER

@@ -0,0 +1 @@
+CONFIG_NFP_APP_FLOWER=y

baseconfig/CONFIG_NTB_IDT

@@ -0,0 +1 @@
+CONFIG_NTB_IDT=m

baseconfig/CONFIG_OVERLAY_FS_INDEX

@@ -0,0 +1 @@
+# CONFIG_OVERLAY_FS_INDEX is not set

baseconfig/CONFIG_PERCPU_STATS

@@ -0,0 +1 @@
+# CONFIG_PERCPU_STATS is not set

baseconfig/CONFIG_PHY_CPCAP_USB

@@ -0,0 +1 @@
+# CONFIG_PHY_CPCAP_USB is not set

baseconfig/CONFIG_PINCTRL_CANNONLAKE

@@ -0,0 +1 @@
+# CONFIG_PINCTRL_CANNONLAKE is not set

baseconfig/CONFIG_PINCTRL_IPQ8074

@@ -0,0 +1 @@
+# CONFIG_PINCTRL_IPQ8074 is not set

baseconfig/CONFIG_PINCTRL_MCP23S08

@@ -0,0 +1 @@
+# CONFIG_PINCTRL_MCP23S08 is not set

baseconfig/CONFIG_POWER_RESET_BRCMSTB

@@ -0,0 +1 @@
+# CONFIG_POWER_RESET_BRCMSTB is not set

baseconfig/CONFIG_QCA7000_SPI

@@ -0,0 +1 @@
+# CONFIG_QCA7000_SPI is not set

baseconfig/CONFIG_QCA7000_UART

@@ -0,0 +1 @@
+# CONFIG_QCA7000_UART is not set

baseconfig/CONFIG_QTNFMAC_PEARL_PCIE

@@ -0,0 +1 @@
+CONFIG_QTNFMAC_PEARL_PCIE=m

baseconfig/CONFIG_REFCOUNT_FULL

@@ -0,0 +1 @@
+# CONFIG_REFCOUNT_FULL is not set

baseconfig/CONFIG_RESET_TI_SYSCON

@@ -0,0 +1 @@
+# CONFIG_RESET_TI_SYSCON is not set

baseconfig/CONFIG_RPMSG_QCOM_GLINK_RPM

@@ -0,0 +1 @@
+# CONFIG_RPMSG_QCOM_GLINK_RPM is not set

baseconfig/CONFIG_RTC_DRV_DS3232_HWMON

@@ -0,0 +1 @@
+# CONFIG_RTC_DRV_DS3232_HWMON is not set

baseconfig/CONFIG_RTC_DRV_FTRTC010

@@ -0,0 +1 @@
+# CONFIG_RTC_DRV_FTRTC010 is not set

baseconfig/CONFIG_RTC_NVMEM

@@ -0,0 +1 @@
+# CONFIG_RTC_NVMEM is not set

baseconfig/CONFIG_SECURITY_INFINIBAND

@@ -0,0 +1 @@
+CONFIG_SECURITY_INFINIBAND=y

baseconfig/CONFIG_SENSORS_IR35221

@@ -0,0 +1 @@
+# CONFIG_SENSORS_IR35221 is not set

baseconfig/CONFIG_SERIAL_8250_ASPEED_VUART

@@ -0,0 +1 @@
+# CONFIG_SERIAL_8250_ASPEED_VUART is not set

baseconfig/CONFIG_SIMPLE_PM_BUS

@@ -0,0 +1 @@
+# CONFIG_SIMPLE_PM_BUS is not set

baseconfig/CONFIG_SLAB_MERGE_DEFAULT

@@ -0,0 +1 @@
+CONFIG_SLAB_MERGE_DEFAULT=y

baseconfig/CONFIG_SND_AUDIO_GRAPH_CARD

@@ -0,0 +1 @@
+# CONFIG_SND_AUDIO_GRAPH_CARD is not set

baseconfig/CONFIG_SND_AUDIO_GRAPH_SCU_CARD

@@ -0,0 +1 @@
+# CONFIG_SND_AUDIO_GRAPH_SCU_CARD is not set

baseconfig/CONFIG_SND_SEQUENCER_OSS

@@ -1 +1 @@
-CONFIG_SND_SEQUENCER_OSS=y
+CONFIG_SND_SEQUENCER_OSS=m

baseconfig/CONFIG_SND_SIMPLE_CARD_UTILS

@@ -0,0 +1 @@
+CONFIG_SND_SIMPLE_CARD_UTILS=m

baseconfig/CONFIG_SND_SOC_ES8316

@@ -0,0 +1 @@
+# CONFIG_SND_SOC_ES8316 is not set

baseconfig/CONFIG_SND_SOC_ZX_AUD96P22

@@ -0,0 +1 @@
+# CONFIG_SND_SOC_ZX_AUD96P22 is not set

baseconfig/CONFIG_SOFTLOCKUP_DETECTOR

@@ -0,0 +1 @@
+CONFIG_SOFTLOCKUP_DETECTOR=y

baseconfig/CONFIG_SPI_SLAVE

@@ -0,0 +1 @@
+# CONFIG_SPI_SLAVE is not set

baseconfig/CONFIG_TEST_KMOD

@@ -0,0 +1 @@
+# CONFIG_TEST_KMOD is not set

baseconfig/CONFIG_TEST_SYSCTL

@@ -0,0 +1 @@
+# CONFIG_TEST_SYSCTL is not set

baseconfig/CONFIG_TI_ADC084S021

@@ -0,0 +1 @@
+# CONFIG_TI_ADC084S021 is not set

baseconfig/CONFIG_TI_ADC108S102

@@ -0,0 +1 @@
+# CONFIG_TI_ADC108S102 is not set

baseconfig/CONFIG_TLS

@@ -0,0 +1 @@
+CONFIG_TLS=m

baseconfig/CONFIG_TOUCHSCREEN_STMFTS

@@ -0,0 +1 @@
+# CONFIG_TOUCHSCREEN_STMFTS is not set

baseconfig/CONFIG_TRACE_EVAL_MAP_FILE

@@ -0,0 +1 @@
+CONFIG_TRACE_EVAL_MAP_FILE=y

baseconfig/CONFIG_TYPEC_UCSI

@@ -0,0 +1 @@
+CONFIG_TYPEC_UCSI=m

baseconfig/CONFIG_UCSI_ACPI

@@ -0,0 +1 @@
+CONFIG_UCSI_ACPI=m

baseconfig/CONFIG_USB_CONFIGFS_F_UAC1_LEGACY

@@ -0,0 +1 @@
+# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set

baseconfig/CONFIG_USB_SNP_UDC_PLAT

@@ -0,0 +1 @@
+CONFIG_USB_SNP_UDC_PLAT=m

baseconfig/CONFIG_WARN_ALL_UNSEEDED_RANDOM

@@ -0,0 +1 @@
+# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set

baseconfig/CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED

@@ -0,0 +1 @@
+CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y

baseconfig/CONFIG_WLAN_VENDOR_QUANTENNA

@@ -0,0 +1 @@
+CONFIG_WLAN_VENDOR_QUANTENNA=y

baseconfig/arm/CONFIG_ARCH_ACTIONS

@@ -0,0 +1 @@
+# CONFIG_ARCH_ACTIONS is not set

baseconfig/arm/CONFIG_BCM_SBA_RAID

@@ -0,0 +1 @@
+CONFIG_BCM_SBA_RAID=m

baseconfig/arm/CONFIG_DMI

@@ -0,0 +1 @@
+CONFIG_DMI=y

baseconfig/arm/CONFIG_DMIID

@@ -0,0 +1 @@
+CONFIG_DMIID=y