Linux v4.17.2 Rebase
This commit is contained in:
parent
9ea83b4034
commit
ac63c81fef
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@ -1,72 +0,0 @@
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From b42db0860e13067fcc7cbfba3966c9e652668bbc Mon Sep 17 00:00:00 2001
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From: Eric Sandeen <sandeen@sandeen.net>
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Date: Mon, 16 Apr 2018 23:06:53 -0700
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Subject: [PATCH] xfs: enhance dinode verifier
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Add several more validations to xfs_dinode_verify:
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- For LOCAL data fork formats, di_nextents must be 0.
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- For LOCAL attr fork formats, di_anextents must be 0.
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- For inodes with no attr fork offset,
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- format must be XFS_DINODE_FMT_EXTENTS if set at all
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- di_anextents must be 0.
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Thanks to dchinner for pointing out a couple related checks I had
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forgotten to add.
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Signed-off-by: Eric Sandeen <sandeen@redhat.com>
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Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=199377
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Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com>
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Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
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---
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fs/xfs/libxfs/xfs_inode_buf.c | 21 +++++++++++++++++++++
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1 file changed, 21 insertions(+)
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diff --git a/fs/xfs/libxfs/xfs_inode_buf.c b/fs/xfs/libxfs/xfs_inode_buf.c
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index ef68b1de006a..1201107eabc6 100644
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--- a/fs/xfs/libxfs/xfs_inode_buf.c
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+++ b/fs/xfs/libxfs/xfs_inode_buf.c
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@@ -466,6 +466,8 @@ xfs_dinode_verify(
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return __this_address;
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if (di_size > XFS_DFORK_DSIZE(dip, mp))
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return __this_address;
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+ if (dip->di_nextents)
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+ return __this_address;
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/* fall through */
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case XFS_DINODE_FMT_EXTENTS:
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case XFS_DINODE_FMT_BTREE:
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@@ -484,12 +486,31 @@ xfs_dinode_verify(
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if (XFS_DFORK_Q(dip)) {
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switch (dip->di_aformat) {
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case XFS_DINODE_FMT_LOCAL:
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+ if (dip->di_anextents)
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+ return __this_address;
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+ /* fall through */
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case XFS_DINODE_FMT_EXTENTS:
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case XFS_DINODE_FMT_BTREE:
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break;
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default:
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return __this_address;
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}
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+ } else {
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+ /*
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+ * If there is no fork offset, this may be a freshly-made inode
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+ * in a new disk cluster, in which case di_aformat is zeroed.
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+ * Otherwise, such an inode must be in EXTENTS format; this goes
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+ * for freed inodes as well.
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+ */
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+ switch (dip->di_aformat) {
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+ case 0:
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+ case XFS_DINODE_FMT_EXTENTS:
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+ break;
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+ default:
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+ return __this_address;
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+ }
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+ if (dip->di_anextents)
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+ return __this_address;
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}
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/* only version 3 or greater inodes are extensively verified here */
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--
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2.17.0
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@ -1,45 +0,0 @@
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From 2c4306f719b083d17df2963bc761777576b8ad1b Mon Sep 17 00:00:00 2001
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From: Eric Sandeen <sandeen@redhat.com>
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Date: Mon, 16 Apr 2018 23:07:27 -0700
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Subject: [PATCH] xfs: set format back to extents if xfs_bmap_extents_to_btree
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If xfs_bmap_extents_to_btree fails in a mode where we call
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xfs_iroot_realloc(-1) to de-allocate the root, set the
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format back to extents.
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Otherwise we can assume we can dereference ifp->if_broot
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based on the XFS_DINODE_FMT_BTREE format, and crash.
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Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=199423
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Signed-off-by: Eric Sandeen <sandeen@redhat.com>
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Reviewed-by: Christoph Hellwig <hch@lst.de>
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Reviewed-by: Darrick J. Wong <darrick.wong@oracle.com>
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Signed-off-by: Darrick J. Wong <darrick.wong@oracle.com>
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---
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fs/xfs/libxfs/xfs_bmap.c | 4 ++++
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1 file changed, 4 insertions(+)
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diff --git a/fs/xfs/libxfs/xfs_bmap.c b/fs/xfs/libxfs/xfs_bmap.c
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index 6a7c2f03ea11..040eeda8426f 100644
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--- a/fs/xfs/libxfs/xfs_bmap.c
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+++ b/fs/xfs/libxfs/xfs_bmap.c
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@@ -725,12 +725,16 @@ xfs_bmap_extents_to_btree(
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*logflagsp = 0;
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if ((error = xfs_alloc_vextent(&args))) {
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xfs_iroot_realloc(ip, -1, whichfork);
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+ ASSERT(ifp->if_broot == NULL);
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+ XFS_IFORK_FMT_SET(ip, whichfork, XFS_DINODE_FMT_EXTENTS);
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xfs_btree_del_cursor(cur, XFS_BTREE_ERROR);
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return error;
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}
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if (WARN_ON_ONCE(args.fsbno == NULLFSBLOCK)) {
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xfs_iroot_realloc(ip, -1, whichfork);
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+ ASSERT(ifp->if_broot == NULL);
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+ XFS_IFORK_FMT_SET(ip, whichfork, XFS_DINODE_FMT_EXTENTS);
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xfs_btree_del_cursor(cur, XFS_BTREE_ERROR);
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return -ENOSPC;
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}
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--
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2.17.0
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@ -1,160 +0,0 @@
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From 5744a0927df22f46e4b7f134b3dfb405fdfcf6ce Mon Sep 17 00:00:00 2001
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From: Jeremy Cline <jeremy@jcline.org>
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Date: Wed, 2 May 2018 15:16:29 -0400
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Subject: [PATCH 1/2] Revert "random: use a different mixing algorithm for
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add_device_randomness()"
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This reverts commit 89b59f050347d376c2ace8b1ceb908a218cfdc2e.
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Signed-off-by: Jeremy Cline <jeremy@jcline.org>
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---
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drivers/char/random.c | 55 ++++---------------------------------------
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1 file changed, 4 insertions(+), 51 deletions(-)
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diff --git a/drivers/char/random.c b/drivers/char/random.c
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index 8f4e11842c60..aa5b04af86c6 100644
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--- a/drivers/char/random.c
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+++ b/drivers/char/random.c
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@@ -831,10 +831,6 @@ static void numa_crng_init(void)
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static void numa_crng_init(void) {}
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#endif
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-/*
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- * crng_fast_load() can be called by code in the interrupt service
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- * path. So we can't afford to dilly-dally.
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- */
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static int crng_fast_load(const char *cp, size_t len)
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{
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unsigned long flags;
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@@ -861,51 +857,6 @@ static int crng_fast_load(const char *cp, size_t len)
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return 1;
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}
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-/*
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- * crng_slow_load() is called by add_device_randomness, which has two
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- * attributes. (1) We can't trust the buffer passed to it is
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- * guaranteed to be unpredictable (so it might not have any entropy at
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- * all), and (2) it doesn't have the performance constraints of
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- * crng_fast_load().
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- *
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- * So we do something more comprehensive which is guaranteed to touch
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- * all of the primary_crng's state, and which uses a LFSR with a
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- * period of 255 as part of the mixing algorithm. Finally, we do
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- * *not* advance crng_init_cnt since buffer we may get may be something
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- * like a fixed DMI table (for example), which might very well be
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- * unique to the machine, but is otherwise unvarying.
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- */
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-static int crng_slow_load(const char *cp, size_t len)
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-{
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- unsigned long flags;
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- static unsigned char lfsr = 1;
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- unsigned char tmp;
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- unsigned i, max = CHACHA20_KEY_SIZE;
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- const char * src_buf = cp;
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- char * dest_buf = (char *) &primary_crng.state[4];
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-
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- if (!spin_trylock_irqsave(&primary_crng.lock, flags))
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- return 0;
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- if (crng_init != 0) {
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- spin_unlock_irqrestore(&primary_crng.lock, flags);
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- return 0;
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- }
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- if (len > max)
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- max = len;
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-
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- for (i = 0; i < max ; i++) {
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- tmp = lfsr;
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- lfsr >>= 1;
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- if (tmp & 1)
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- lfsr ^= 0xE1;
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- tmp = dest_buf[i % CHACHA20_KEY_SIZE];
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- dest_buf[i % CHACHA20_KEY_SIZE] ^= src_buf[i % len] ^ lfsr;
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- lfsr += (tmp << 3) | (tmp >> 5);
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- }
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- spin_unlock_irqrestore(&primary_crng.lock, flags);
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- return 1;
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-}
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-
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static void crng_reseed(struct crng_state *crng, struct entropy_store *r)
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{
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unsigned long flags;
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@@ -1089,8 +1040,10 @@ void add_device_randomness(const void *buf, unsigned int size)
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unsigned long time = random_get_entropy() ^ jiffies;
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unsigned long flags;
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- if (!crng_ready() && size)
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- crng_slow_load(buf, size);
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+ if (!crng_ready()) {
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+ crng_fast_load(buf, size);
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+ return;
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+ }
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trace_add_device_randomness(size, _RET_IP_);
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spin_lock_irqsave(&input_pool.lock, flags);
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--
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2.17.0
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From e1b1b5b62740b0e6ea8258a4eb81b2a336538fed Mon Sep 17 00:00:00 2001
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From: Jeremy Cline <jeremy@jcline.org>
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Date: Wed, 2 May 2018 15:18:03 -0400
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Subject: [PATCH 2/2] Revert "random: fix crng_ready() test"
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This reverts commit cd8d7a5778a4abf76ee8fe8f1bfcf78976029f8d.
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Signed-off-by: Jeremy Cline <jeremy@jcline.org>
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---
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drivers/char/random.c | 10 +++++-----
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1 file changed, 5 insertions(+), 5 deletions(-)
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diff --git a/drivers/char/random.c b/drivers/char/random.c
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index aa5b04af86c6..ef05cc685b74 100644
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--- a/drivers/char/random.c
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+++ b/drivers/char/random.c
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@@ -428,7 +428,7 @@ struct crng_state primary_crng = {
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* its value (from 0->1->2).
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*/
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static int crng_init = 0;
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-#define crng_ready() (likely(crng_init > 1))
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+#define crng_ready() (likely(crng_init > 0))
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static int crng_init_cnt = 0;
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static unsigned long crng_global_init_time = 0;
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#define CRNG_INIT_CNT_THRESH (2*CHACHA20_KEY_SIZE)
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@@ -838,7 +838,7 @@ static int crng_fast_load(const char *cp, size_t len)
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if (!spin_trylock_irqsave(&primary_crng.lock, flags))
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return 0;
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- if (crng_init != 0) {
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+ if (crng_ready()) {
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spin_unlock_irqrestore(&primary_crng.lock, flags);
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return 0;
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}
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@@ -913,7 +913,7 @@ static void _extract_crng(struct crng_state *crng,
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{
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unsigned long v, flags;
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- if (crng_ready() &&
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+ if (crng_init > 1 &&
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(time_after(crng_global_init_time, crng->init_time) ||
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time_after(jiffies, crng->init_time + CRNG_RESEED_INTERVAL)))
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crng_reseed(crng, crng == &primary_crng ? &input_pool : NULL);
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@@ -1200,7 +1200,7 @@ void add_interrupt_randomness(int irq, int irq_flags)
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fast_mix(fast_pool);
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add_interrupt_bench(cycles);
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- if (unlikely(crng_init == 0)) {
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+ if (!crng_ready()) {
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if ((fast_pool->count >= 64) &&
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crng_fast_load((char *) fast_pool->pool,
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sizeof(fast_pool->pool))) {
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@@ -2269,7 +2269,7 @@ void add_hwgenerator_randomness(const char *buffer, size_t count,
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{
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struct entropy_store *poolp = &input_pool;
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- if (unlikely(crng_init == 0)) {
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+ if (!crng_ready()) {
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crng_fast_load(buffer, count);
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return;
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}
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--
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2.17.0
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@ -1,7 +1,19 @@
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From bb86b4b0bbae12341df16fedf51aeda480364fbf Mon Sep 17 00:00:00 2001
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From: Peter Robinson <pbrobinson@gmail.com>
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Date: Thu, 19 Apr 2018 19:35:58 +0100
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Subject: [PATCH] ARM: dts: Add am335x-pocketbeagle
|
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From patchwork Tue Apr 17 17:14:04 2018
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [v3] ARM: dts: Add am335x-pocketbeagle
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From: Robert Nelson <robertcnelson@gmail.com>
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X-Patchwork-Id: 10346089
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Message-Id: <20180417171404.13624-1-robertcnelson@gmail.com>
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To: tony@atomide.com,
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devicetree@vger.kernel.org
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Cc: Drew Fustini <drew@beagleboard.org>,
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Peter Robinson <pbrobinson@redhat.com>,
|
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Jason Kridner <jkridner@beagleboard.org>, linux-omap@vger.kernel.org,
|
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Robert Nelson <robertcnelson@gmail.com>,
|
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linux-arm-kernel@lists.infradead.org
|
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Date: Tue, 17 Apr 2018 12:14:04 -0500
|
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|
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PocketBeagle is an ultra-tiny-yet-complete open-source USB-key-fob computer.
|
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|
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|
@ -12,7 +24,6 @@ http://beagleboard.org/pocket
|
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https://github.com/beagleboard/pocketbeagle
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|
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Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
|
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Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
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CC: Tony Lindgren <tony@atomide.com>
|
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CC: Jason Kridner <jkridner@beagleboard.org>
|
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CC: Drew Fustini <drew@beagleboard.org>
|
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|
@ -35,11 +46,11 @@ Changes in v2:
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create mode 100644 arch/arm/boot/dts/am335x-pocketbeagle.dts
|
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|
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diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
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index ade7a38543dc..a632bbef01f5 100644
|
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index 7e2424957809..5a09ff15743b 100644
|
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--- a/arch/arm/boot/dts/Makefile
|
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+++ b/arch/arm/boot/dts/Makefile
|
||||
@@ -675,6 +675,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
|
||||
am335x-nano.dtb \
|
||||
@@ -688,6 +688,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
|
||||
am335x-pdu001.dtb \
|
||||
am335x-pepper.dtb \
|
||||
am335x-phycore-rdk.dtb \
|
||||
+ am335x-pocketbeagle.dtb \
|
||||
|
@ -48,7 +59,7 @@ index ade7a38543dc..a632bbef01f5 100644
|
|||
am335x-sl50.dtb \
|
||||
diff --git a/arch/arm/boot/dts/am335x-osd335x-common.dtsi b/arch/arm/boot/dts/am335x-osd335x-common.dtsi
|
||||
new file mode 100644
|
||||
index 000000000000..f8ff473f94f0
|
||||
index 000000000000..d2150d207b7a
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/boot/dts/am335x-osd335x-common.dtsi
|
||||
@@ -0,0 +1,124 @@
|
||||
|
@ -419,6 +430,3 @@ index 000000000000..62fe5cab9fae
|
|||
+&cppi41dma {
|
||||
+ status = "okay";
|
||||
+};
|
||||
--
|
||||
2.17.0
|
||||
|
||||
|
|
|
@ -1,131 +0,0 @@
|
|||
From 0ab09d651b5858f9bc7d5f74e725334a661828e0 Mon Sep 17 00:00:00 2001
|
||||
From: Icenowy Zheng <icenowy@aosc.io>
|
||||
Date: Fri, 9 Mar 2018 14:47:17 +0000
|
||||
Subject: nvmem: sunxi-sid: fix H3 SID controller support
|
||||
|
||||
It seems that doing some operation will make the value pre-read on H3
|
||||
SID controller wrong again, so all operation should be performed by
|
||||
register.
|
||||
|
||||
Change the SID reading to use register only.
|
||||
|
||||
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
|
||||
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
||||
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
---
|
||||
drivers/nvmem/sunxi_sid.c | 71 +++++++++++++++++++++++++++++++++--------------
|
||||
1 file changed, 50 insertions(+), 21 deletions(-)
|
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|
||||
diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c
|
||||
index 99bd54d..26bb637 100644
|
||||
--- a/drivers/nvmem/sunxi_sid.c
|
||||
+++ b/drivers/nvmem/sunxi_sid.c
|
||||
@@ -85,13 +85,14 @@ static int sunxi_sid_read(void *context, unsigned int offset,
|
||||
}
|
||||
|
||||
static int sun8i_sid_register_readout(const struct sunxi_sid *sid,
|
||||
- const unsigned int word)
|
||||
+ const unsigned int offset,
|
||||
+ u32 *out)
|
||||
{
|
||||
u32 reg_val;
|
||||
int ret;
|
||||
|
||||
/* Set word, lock access, and set read command */
|
||||
- reg_val = (word & SUN8I_SID_OFFSET_MASK)
|
||||
+ reg_val = (offset & SUN8I_SID_OFFSET_MASK)
|
||||
<< SUN8I_SID_OFFSET_SHIFT;
|
||||
reg_val |= SUN8I_SID_OP_LOCK | SUN8I_SID_READ;
|
||||
writel(reg_val, sid->base + SUN8I_SID_PRCTL);
|
||||
@@ -101,7 +102,49 @@ static int sun8i_sid_register_readout(const struct sunxi_sid *sid,
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
+ if (out)
|
||||
+ *out = readl(sid->base + SUN8I_SID_RDKEY);
|
||||
+
|
||||
writel(0, sid->base + SUN8I_SID_PRCTL);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+/*
|
||||
+ * On Allwinner H3, the value on the 0x200 offset of the SID controller seems
|
||||
+ * to be not reliable at all.
|
||||
+ * Read by the registers instead.
|
||||
+ */
|
||||
+static int sun8i_sid_read_byte_by_reg(const struct sunxi_sid *sid,
|
||||
+ const unsigned int offset,
|
||||
+ u8 *out)
|
||||
+{
|
||||
+ u32 word;
|
||||
+ int ret;
|
||||
+
|
||||
+ ret = sun8i_sid_register_readout(sid, offset & ~0x03, &word);
|
||||
+
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ *out = (word >> ((offset & 0x3) * 8)) & 0xff;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int sun8i_sid_read_by_reg(void *context, unsigned int offset,
|
||||
+ void *val, size_t bytes)
|
||||
+{
|
||||
+ struct sunxi_sid *sid = context;
|
||||
+ u8 *buf = val;
|
||||
+ int ret;
|
||||
+
|
||||
+ while (bytes--) {
|
||||
+ ret = sun8i_sid_read_byte_by_reg(sid, offset++, buf++);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -131,26 +174,12 @@ static int sunxi_sid_probe(struct platform_device *pdev)
|
||||
|
||||
size = cfg->size;
|
||||
|
||||
- if (cfg->need_register_readout) {
|
||||
- /*
|
||||
- * H3's SID controller have a bug that the value at 0x200
|
||||
- * offset is not the correct value when the hardware is reseted.
|
||||
- * However, after doing a register-based read operation, the
|
||||
- * value become right.
|
||||
- * Do a full read operation here, but ignore its value
|
||||
- * (as it's more fast to read by direct MMIO value than
|
||||
- * with registers)
|
||||
- */
|
||||
- for (i = 0; i < (size >> 2); i++) {
|
||||
- ret = sun8i_sid_register_readout(sid, i);
|
||||
- if (ret)
|
||||
- return ret;
|
||||
- }
|
||||
- }
|
||||
-
|
||||
econfig.size = size;
|
||||
econfig.dev = dev;
|
||||
- econfig.reg_read = sunxi_sid_read;
|
||||
+ if (cfg->need_register_readout)
|
||||
+ econfig.reg_read = sun8i_sid_read_by_reg;
|
||||
+ else
|
||||
+ econfig.reg_read = sunxi_sid_read;
|
||||
econfig.priv = sid;
|
||||
nvmem = nvmem_register(&econfig);
|
||||
if (IS_ERR(nvmem))
|
||||
@@ -163,7 +192,7 @@ static int sunxi_sid_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
- randomness[i] = sunxi_sid_read_byte(sid, i);
|
||||
+ econfig.reg_read(sid, i, &randomness[i], 1);
|
||||
|
||||
add_device_randomness(randomness, size);
|
||||
kfree(randomness);
|
||||
--
|
||||
cgit v1.1
|
|
@ -1,857 +0,0 @@
|
|||
From patchwork Wed Mar 28 09:50:48 2018
|
||||
Content-Type: text/plain; charset="utf-8"
|
||||
MIME-Version: 1.0
|
||||
Content-Transfer-Encoding: 7bit
|
||||
Subject: [v2,1/2] arm64: fpsimd: Split cpu field out from struct fpsimd_state
|
||||
From: Dave P Martin <Dave.Martin@arm.com>
|
||||
X-Patchwork-Id: 10312693
|
||||
Message-Id: <1522230649-22008-2-git-send-email-Dave.Martin@arm.com>
|
||||
To: linux-arm-kernel@lists.infradead.org
|
||||
Cc: Mark Rutland <mark.rutland@arm.com>, Will Deacon <will.deacon@arm.com>,
|
||||
Kees Cook <keescook@chromium.org>
|
||||
Date: Wed, 28 Mar 2018 10:50:48 +0100
|
||||
|
||||
In preparation for using a common representation of the FPSIMD
|
||||
state for tasks and KVM vcpus, this patch separates out the "cpu"
|
||||
field that is used to track the cpu on which the state was most
|
||||
recently loaded.
|
||||
|
||||
This will allow common code to operate on task and vcpu contexts
|
||||
without requiring the cpu field to be stored at the same offset
|
||||
from the FPSIMD register data in both cases. This should avoid the
|
||||
need for messing with the definition of those parts of struct
|
||||
vcpu_arch that are exposed in the KVM user ABI.
|
||||
|
||||
The resulting change is also convenient for grouping and defining
|
||||
the set of thread_struct fields that are supposed to be accessible
|
||||
to copy_{to,from}_user(), which includes user_fpsimd_state but
|
||||
should exclude the cpu field. This patch does not amend the
|
||||
usercopy whitelist to match: that will be addressed in a subsequent
|
||||
patch.
|
||||
|
||||
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
|
||||
---
|
||||
arch/arm64/include/asm/fpsimd.h | 29 ++------------------------
|
||||
arch/arm64/include/asm/processor.h | 4 ++--
|
||||
arch/arm64/kernel/fpsimd.c | 42 +++++++++++++++++++++-----------------
|
||||
arch/arm64/kernel/ptrace.c | 10 ++++-----
|
||||
arch/arm64/kernel/signal.c | 3 +--
|
||||
arch/arm64/kernel/signal32.c | 3 +--
|
||||
6 files changed, 34 insertions(+), 57 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
|
||||
index 8857a0f..1bfc920 100644
|
||||
--- a/arch/arm64/include/asm/fpsimd.h
|
||||
+++ b/arch/arm64/include/asm/fpsimd.h
|
||||
@@ -24,31 +24,6 @@
|
||||
#include <linux/cache.h>
|
||||
#include <linux/stddef.h>
|
||||
|
||||
-/*
|
||||
- * FP/SIMD storage area has:
|
||||
- * - FPSR and FPCR
|
||||
- * - 32 128-bit data registers
|
||||
- *
|
||||
- * Note that user_fpsimd forms a prefix of this structure, which is
|
||||
- * relied upon in the ptrace FP/SIMD accessors.
|
||||
- */
|
||||
-struct fpsimd_state {
|
||||
- union {
|
||||
- struct user_fpsimd_state user_fpsimd;
|
||||
- struct {
|
||||
- __uint128_t vregs[32];
|
||||
- u32 fpsr;
|
||||
- u32 fpcr;
|
||||
- /*
|
||||
- * For ptrace compatibility, pad to next 128-bit
|
||||
- * boundary here if extending this struct.
|
||||
- */
|
||||
- };
|
||||
- };
|
||||
- /* the id of the last cpu to have restored this state */
|
||||
- unsigned int cpu;
|
||||
-};
|
||||
-
|
||||
#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
|
||||
/* Masks for extracting the FPSR and FPCR from the FPSCR */
|
||||
#define VFP_FPSCR_STAT_MASK 0xf800009f
|
||||
@@ -62,8 +37,8 @@ struct fpsimd_state {
|
||||
|
||||
struct task_struct;
|
||||
|
||||
-extern void fpsimd_save_state(struct fpsimd_state *state);
|
||||
-extern void fpsimd_load_state(struct fpsimd_state *state);
|
||||
+extern void fpsimd_save_state(struct user_fpsimd_state *state);
|
||||
+extern void fpsimd_load_state(struct user_fpsimd_state *state);
|
||||
|
||||
extern void fpsimd_thread_switch(struct task_struct *next);
|
||||
extern void fpsimd_flush_thread(void);
|
||||
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
|
||||
index fce604e..4a04535 100644
|
||||
--- a/arch/arm64/include/asm/processor.h
|
||||
+++ b/arch/arm64/include/asm/processor.h
|
||||
@@ -37,7 +37,6 @@
|
||||
#include <linux/string.h>
|
||||
|
||||
#include <asm/alternative.h>
|
||||
-#include <asm/fpsimd.h>
|
||||
#include <asm/hw_breakpoint.h>
|
||||
#include <asm/lse.h>
|
||||
#include <asm/pgtable-hwdef.h>
|
||||
@@ -107,7 +106,8 @@ struct thread_struct {
|
||||
#ifdef CONFIG_COMPAT
|
||||
unsigned long tp2_value;
|
||||
#endif
|
||||
- struct fpsimd_state fpsimd_state;
|
||||
+ struct user_fpsimd_state fpsimd_state;
|
||||
+ unsigned int fpsimd_cpu;
|
||||
void *sve_state; /* SVE registers, if any */
|
||||
unsigned int sve_vl; /* SVE vector length */
|
||||
unsigned int sve_vl_onexec; /* SVE vl after next exec */
|
||||
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
|
||||
index e7226c4..c4be311 100644
|
||||
--- a/arch/arm64/kernel/fpsimd.c
|
||||
+++ b/arch/arm64/kernel/fpsimd.c
|
||||
@@ -64,7 +64,7 @@
|
||||
* been loaded into its FPSIMD registers most recently, or whether it has
|
||||
* been used to perform kernel mode NEON in the meantime.
|
||||
*
|
||||
- * For (a), we add a 'cpu' field to struct fpsimd_state, which gets updated to
|
||||
+ * For (a), we add a fpsimd_cpu field to thread_struct, which gets updated to
|
||||
* the id of the current CPU every time the state is loaded onto a CPU. For (b),
|
||||
* we add the per-cpu variable 'fpsimd_last_state' (below), which contains the
|
||||
* address of the userland FPSIMD state of the task that was loaded onto the CPU
|
||||
@@ -73,7 +73,7 @@
|
||||
* With this in place, we no longer have to restore the next FPSIMD state right
|
||||
* when switching between tasks. Instead, we can defer this check to userland
|
||||
* resume, at which time we verify whether the CPU's fpsimd_last_state and the
|
||||
- * task's fpsimd_state.cpu are still mutually in sync. If this is the case, we
|
||||
+ * task's fpsimd_cpu are still mutually in sync. If this is the case, we
|
||||
* can omit the FPSIMD restore.
|
||||
*
|
||||
* As an optimization, we use the thread_info flag TIF_FOREIGN_FPSTATE to
|
||||
@@ -90,14 +90,14 @@
|
||||
* flag with local_bh_disable() unless softirqs are already masked.
|
||||
*
|
||||
* For a certain task, the sequence may look something like this:
|
||||
- * - the task gets scheduled in; if both the task's fpsimd_state.cpu field
|
||||
+ * - the task gets scheduled in; if both the task's fpsimd_cpu field
|
||||
* contains the id of the current CPU, and the CPU's fpsimd_last_state per-cpu
|
||||
* variable points to the task's fpsimd_state, the TIF_FOREIGN_FPSTATE flag is
|
||||
* cleared, otherwise it is set;
|
||||
*
|
||||
* - the task returns to userland; if TIF_FOREIGN_FPSTATE is set, the task's
|
||||
* userland FPSIMD state is copied from memory to the registers, the task's
|
||||
- * fpsimd_state.cpu field is set to the id of the current CPU, the current
|
||||
+ * fpsimd_cpu field is set to the id of the current CPU, the current
|
||||
* CPU's fpsimd_last_state pointer is set to this task's fpsimd_state and the
|
||||
* TIF_FOREIGN_FPSTATE flag is cleared;
|
||||
*
|
||||
@@ -115,7 +115,7 @@
|
||||
* whatever is in the FPSIMD registers is not saved to memory, but discarded.
|
||||
*/
|
||||
struct fpsimd_last_state_struct {
|
||||
- struct fpsimd_state *st;
|
||||
+ struct user_fpsimd_state *st;
|
||||
bool sve_in_use;
|
||||
};
|
||||
|
||||
@@ -417,7 +417,7 @@ static void fpsimd_to_sve(struct task_struct *task)
|
||||
{
|
||||
unsigned int vq;
|
||||
void *sst = task->thread.sve_state;
|
||||
- struct fpsimd_state const *fst = &task->thread.fpsimd_state;
|
||||
+ struct user_fpsimd_state const *fst = &task->thread.fpsimd_state;
|
||||
unsigned int i;
|
||||
|
||||
if (!system_supports_sve())
|
||||
@@ -443,7 +443,7 @@ static void sve_to_fpsimd(struct task_struct *task)
|
||||
{
|
||||
unsigned int vq;
|
||||
void const *sst = task->thread.sve_state;
|
||||
- struct fpsimd_state *fst = &task->thread.fpsimd_state;
|
||||
+ struct user_fpsimd_state *fst = &task->thread.fpsimd_state;
|
||||
unsigned int i;
|
||||
|
||||
if (!system_supports_sve())
|
||||
@@ -539,7 +539,7 @@ void sve_sync_from_fpsimd_zeropad(struct task_struct *task)
|
||||
{
|
||||
unsigned int vq;
|
||||
void *sst = task->thread.sve_state;
|
||||
- struct fpsimd_state const *fst = &task->thread.fpsimd_state;
|
||||
+ struct user_fpsimd_state const *fst = &task->thread.fpsimd_state;
|
||||
unsigned int i;
|
||||
|
||||
if (!test_tsk_thread_flag(task, TIF_SVE))
|
||||
@@ -908,10 +908,9 @@ void fpsimd_thread_switch(struct task_struct *next)
|
||||
* the TIF_FOREIGN_FPSTATE flag so the state will be loaded
|
||||
* upon the next return to userland.
|
||||
*/
|
||||
- struct fpsimd_state *st = &next->thread.fpsimd_state;
|
||||
-
|
||||
- if (__this_cpu_read(fpsimd_last_state.st) == st
|
||||
- && st->cpu == smp_processor_id())
|
||||
+ if (__this_cpu_read(fpsimd_last_state.st) ==
|
||||
+ &next->thread.fpsimd_state
|
||||
+ && next->thread.fpsimd_cpu == smp_processor_id())
|
||||
clear_tsk_thread_flag(next, TIF_FOREIGN_FPSTATE);
|
||||
else
|
||||
set_tsk_thread_flag(next, TIF_FOREIGN_FPSTATE);
|
||||
@@ -927,7 +926,8 @@ void fpsimd_flush_thread(void)
|
||||
|
||||
local_bh_disable();
|
||||
|
||||
- memset(¤t->thread.fpsimd_state, 0, sizeof(struct fpsimd_state));
|
||||
+ memset(¤t->thread.fpsimd_state, 0,
|
||||
+ sizeof current->thread.fpsimd_state);
|
||||
fpsimd_flush_task_state(current);
|
||||
|
||||
if (system_supports_sve()) {
|
||||
@@ -1004,11 +1004,10 @@ static void fpsimd_bind_to_cpu(void)
|
||||
{
|
||||
struct fpsimd_last_state_struct *last =
|
||||
this_cpu_ptr(&fpsimd_last_state);
|
||||
- struct fpsimd_state *st = ¤t->thread.fpsimd_state;
|
||||
|
||||
- last->st = st;
|
||||
+ last->st = ¤t->thread.fpsimd_state;
|
||||
last->sve_in_use = test_thread_flag(TIF_SVE);
|
||||
- st->cpu = smp_processor_id();
|
||||
+ current->thread.fpsimd_cpu = smp_processor_id();
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -1043,7 +1042,7 @@ void fpsimd_update_current_state(struct user_fpsimd_state const *state)
|
||||
|
||||
local_bh_disable();
|
||||
|
||||
- current->thread.fpsimd_state.user_fpsimd = *state;
|
||||
+ current->thread.fpsimd_state = *state;
|
||||
if (system_supports_sve() && test_thread_flag(TIF_SVE))
|
||||
fpsimd_to_sve(current);
|
||||
|
||||
@@ -1055,12 +1054,17 @@ void fpsimd_update_current_state(struct user_fpsimd_state const *state)
|
||||
local_bh_enable();
|
||||
}
|
||||
|
||||
+void fpsimd_flush_state(unsigned int *cpu)
|
||||
+{
|
||||
+ *cpu = NR_CPUS;
|
||||
+}
|
||||
+
|
||||
/*
|
||||
* Invalidate live CPU copies of task t's FPSIMD state
|
||||
*/
|
||||
void fpsimd_flush_task_state(struct task_struct *t)
|
||||
{
|
||||
- t->thread.fpsimd_state.cpu = NR_CPUS;
|
||||
+ fpsimd_flush_state(&t->thread.fpsimd_cpu);
|
||||
}
|
||||
|
||||
static inline void fpsimd_flush_cpu_state(void)
|
||||
@@ -1159,7 +1163,7 @@ EXPORT_SYMBOL(kernel_neon_end);
|
||||
|
||||
#ifdef CONFIG_EFI
|
||||
|
||||
-static DEFINE_PER_CPU(struct fpsimd_state, efi_fpsimd_state);
|
||||
+static DEFINE_PER_CPU(struct user_fpsimd_state, efi_fpsimd_state);
|
||||
static DEFINE_PER_CPU(bool, efi_fpsimd_state_used);
|
||||
static DEFINE_PER_CPU(bool, efi_sve_state_used);
|
||||
|
||||
diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
|
||||
index 9ae31f7..fdeaba0de 100644
|
||||
--- a/arch/arm64/kernel/ptrace.c
|
||||
+++ b/arch/arm64/kernel/ptrace.c
|
||||
@@ -629,7 +629,7 @@ static int __fpr_get(struct task_struct *target,
|
||||
|
||||
sve_sync_to_fpsimd(target);
|
||||
|
||||
- uregs = &target->thread.fpsimd_state.user_fpsimd;
|
||||
+ uregs = &target->thread.fpsimd_state;
|
||||
|
||||
return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs,
|
||||
start_pos, start_pos + sizeof(*uregs));
|
||||
@@ -660,14 +660,14 @@ static int __fpr_set(struct task_struct *target,
|
||||
*/
|
||||
sve_sync_to_fpsimd(target);
|
||||
|
||||
- newstate = target->thread.fpsimd_state.user_fpsimd;
|
||||
+ newstate = target->thread.fpsimd_state;
|
||||
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate,
|
||||
start_pos, start_pos + sizeof(newstate));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
- target->thread.fpsimd_state.user_fpsimd = newstate;
|
||||
+ target->thread.fpsimd_state = newstate;
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -1169,7 +1169,7 @@ static int compat_vfp_get(struct task_struct *target,
|
||||
compat_ulong_t fpscr;
|
||||
int ret, vregs_end_pos;
|
||||
|
||||
- uregs = &target->thread.fpsimd_state.user_fpsimd;
|
||||
+ uregs = &target->thread.fpsimd_state;
|
||||
|
||||
if (target == current)
|
||||
fpsimd_preserve_current_state();
|
||||
@@ -1202,7 +1202,7 @@ static int compat_vfp_set(struct task_struct *target,
|
||||
compat_ulong_t fpscr;
|
||||
int ret, vregs_end_pos;
|
||||
|
||||
- uregs = &target->thread.fpsimd_state.user_fpsimd;
|
||||
+ uregs = &target->thread.fpsimd_state;
|
||||
|
||||
vregs_end_pos = VFP_STATE_SIZE - sizeof(compat_ulong_t);
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
|
||||
diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c
|
||||
index f60c052..d026615 100644
|
||||
--- a/arch/arm64/kernel/signal.c
|
||||
+++ b/arch/arm64/kernel/signal.c
|
||||
@@ -178,8 +178,7 @@ static void __user *apply_user_offset(
|
||||
|
||||
static int preserve_fpsimd_context(struct fpsimd_context __user *ctx)
|
||||
{
|
||||
- struct user_fpsimd_state const *fpsimd =
|
||||
- ¤t->thread.fpsimd_state.user_fpsimd;
|
||||
+ struct user_fpsimd_state const *fpsimd = ¤t->thread.fpsimd_state;
|
||||
int err;
|
||||
|
||||
/* copy the FP and status/control registers */
|
||||
diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
|
||||
index 79feb86..4ea38d3 100644
|
||||
--- a/arch/arm64/kernel/signal32.c
|
||||
+++ b/arch/arm64/kernel/signal32.c
|
||||
@@ -148,8 +148,7 @@ union __fpsimd_vreg {
|
||||
|
||||
static int compat_preserve_vfp_context(struct compat_vfp_sigframe __user *frame)
|
||||
{
|
||||
- struct user_fpsimd_state const *fpsimd =
|
||||
- ¤t->thread.fpsimd_state.user_fpsimd;
|
||||
+ struct user_fpsimd_state const *fpsimd = ¤t->thread.fpsimd_state;
|
||||
compat_ulong_t magic = VFP_MAGIC;
|
||||
compat_ulong_t size = VFP_STORAGE_SIZE;
|
||||
compat_ulong_t fpscr, fpexc;
|
||||
From patchwork Wed Mar 28 09:50:49 2018
|
||||
Content-Type: text/plain; charset="utf-8"
|
||||
MIME-Version: 1.0
|
||||
Content-Transfer-Encoding: 7bit
|
||||
Subject: [v2,2/2] arm64: uaccess: Fix omissions from usercopy whitelist
|
||||
From: Dave P Martin <Dave.Martin@arm.com>
|
||||
X-Patchwork-Id: 10312691
|
||||
Message-Id: <1522230649-22008-3-git-send-email-Dave.Martin@arm.com>
|
||||
To: linux-arm-kernel@lists.infradead.org
|
||||
Cc: Mark Rutland <mark.rutland@arm.com>, Will Deacon <will.deacon@arm.com>,
|
||||
Kees Cook <keescook@chromium.org>
|
||||
Date: Wed, 28 Mar 2018 10:50:49 +0100
|
||||
|
||||
When the hardend usercopy support was added for arm64, it was
|
||||
concluded that all cases of usercopy into and out of thread_struct
|
||||
were statically sized and so didn't require explicit whitelisting
|
||||
of the appropriate fields in thread_struct.
|
||||
|
||||
Testing with usercopy hardening enabled has revealed that this is
|
||||
not the case for certain ptrace regset manipulation calls on arm64.
|
||||
This occurs because the sizes of usercopies associated with the
|
||||
regset API are dynamic by construction, and because arm64 does not
|
||||
always stage such copies via the stack: indeed the regset API is
|
||||
designed to avoid the need for that by adding some bounds checking.
|
||||
|
||||
This is currently believed to affect only the fpsimd and TLS
|
||||
registers.
|
||||
|
||||
Because the whitelisted fields in thread_struct must be contiguous,
|
||||
this patch groups them together in a nested struct. It is also
|
||||
necessary to be able to determine the location and size of that
|
||||
struct, so rather than making the struct anonymous (which would
|
||||
save on edits elsewhere) or adding an anonymous union containing
|
||||
named and unnamed instances of the same struct (gross), this patch
|
||||
gives the struct a name and makes the necessary edits to code that
|
||||
references it (noisy but simple).
|
||||
|
||||
Care is needed to ensure that the new struct does not contain
|
||||
padding (which the usercopy hardening would fail to protect).
|
||||
|
||||
For this reason, the presence of tp2_value is made unconditional,
|
||||
since a padding field would be needed there in any case. This pads
|
||||
up to the 16-byte alignment required by struct user_fpsimd_state.
|
||||
|
||||
Reported-by: Mark Rutland <mark.rutland@arm.com>
|
||||
Fixes: 9e8084d3f761 ("arm64: Implement thread_struct whitelist for hardened usercopy")
|
||||
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
|
||||
Acked-by: Kees Cook <keescook@chromium.org>
|
||||
---
|
||||
|
||||
Changes since v1:
|
||||
|
||||
* Add a BUILD_BUG_ON() check for padding in the whitelist struct.
|
||||
* Move to using sizeof_field() for assigning *size; get rid of the
|
||||
dummy pointer that was used previously.
|
||||
* Delete bogus comment about why no whitelist is (was) needed.
|
||||
---
|
||||
arch/arm64/include/asm/processor.h | 38 +++++++++++++++++++-----------
|
||||
arch/arm64/kernel/fpsimd.c | 47 +++++++++++++++++++-------------------
|
||||
arch/arm64/kernel/process.c | 6 ++---
|
||||
arch/arm64/kernel/ptrace.c | 30 ++++++++++++------------
|
||||
arch/arm64/kernel/signal.c | 3 ++-
|
||||
arch/arm64/kernel/signal32.c | 3 ++-
|
||||
arch/arm64/kernel/sys_compat.c | 2 +-
|
||||
7 files changed, 72 insertions(+), 57 deletions(-)
|
||||
|
||||
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
|
||||
index 4a04535..224af48 100644
|
||||
--- a/arch/arm64/include/asm/processor.h
|
||||
+++ b/arch/arm64/include/asm/processor.h
|
||||
@@ -34,6 +34,8 @@
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
+#include <linux/build_bug.h>
|
||||
+#include <linux/stddef.h>
|
||||
#include <linux/string.h>
|
||||
|
||||
#include <asm/alternative.h>
|
||||
@@ -102,11 +104,18 @@ struct cpu_context {
|
||||
|
||||
struct thread_struct {
|
||||
struct cpu_context cpu_context; /* cpu context */
|
||||
- unsigned long tp_value; /* TLS register */
|
||||
-#ifdef CONFIG_COMPAT
|
||||
- unsigned long tp2_value;
|
||||
-#endif
|
||||
- struct user_fpsimd_state fpsimd_state;
|
||||
+
|
||||
+ /*
|
||||
+ * Whitelisted fields for hardened usercopy:
|
||||
+ * Maintainers must ensure manually that this contains no
|
||||
+ * implicit padding.
|
||||
+ */
|
||||
+ struct {
|
||||
+ unsigned long tp_value; /* TLS register */
|
||||
+ unsigned long tp2_value;
|
||||
+ struct user_fpsimd_state fpsimd_state;
|
||||
+ } uw;
|
||||
+
|
||||
unsigned int fpsimd_cpu;
|
||||
void *sve_state; /* SVE registers, if any */
|
||||
unsigned int sve_vl; /* SVE vector length */
|
||||
@@ -116,14 +125,17 @@ struct thread_struct {
|
||||
struct debug_info debug; /* debugging */
|
||||
};
|
||||
|
||||
-/*
|
||||
- * Everything usercopied to/from thread_struct is statically-sized, so
|
||||
- * no hardened usercopy whitelist is needed.
|
||||
- */
|
||||
static inline void arch_thread_struct_whitelist(unsigned long *offset,
|
||||
unsigned long *size)
|
||||
{
|
||||
- *offset = *size = 0;
|
||||
+ /* Verify that there is no padding among the whitelisted fields: */
|
||||
+ BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
|
||||
+ sizeof_field(struct thread_struct, uw.tp_value) +
|
||||
+ sizeof_field(struct thread_struct, uw.tp2_value) +
|
||||
+ sizeof_field(struct thread_struct, uw.fpsimd_state));
|
||||
+
|
||||
+ *offset = offsetof(struct thread_struct, uw);
|
||||
+ *size = sizeof_field(struct thread_struct, uw);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
@@ -131,13 +143,13 @@ static inline void arch_thread_struct_whitelist(unsigned long *offset,
|
||||
({ \
|
||||
unsigned long *__tls; \
|
||||
if (is_compat_thread(task_thread_info(t))) \
|
||||
- __tls = &(t)->thread.tp2_value; \
|
||||
+ __tls = &(t)->thread.uw.tp2_value; \
|
||||
else \
|
||||
- __tls = &(t)->thread.tp_value; \
|
||||
+ __tls = &(t)->thread.uw.tp_value; \
|
||||
__tls; \
|
||||
})
|
||||
#else
|
||||
-#define task_user_tls(t) (&(t)->thread.tp_value)
|
||||
+#define task_user_tls(t) (&(t)->thread.uw.tp_value)
|
||||
#endif
|
||||
|
||||
/* Sync TPIDR_EL0 back to thread_struct for current */
|
||||
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
|
||||
index c4be311..7a8ac960b6 100644
|
||||
--- a/arch/arm64/kernel/fpsimd.c
|
||||
+++ b/arch/arm64/kernel/fpsimd.c
|
||||
@@ -222,7 +222,7 @@ static void sve_user_enable(void)
|
||||
* sets TIF_SVE.
|
||||
*
|
||||
* When stored, FPSIMD registers V0-V31 are encoded in
|
||||
- * task->fpsimd_state; bits [max : 128] for each of Z0-Z31 are
|
||||
+ * task->thread.uw.fpsimd_state; bits [max : 128] for each of Z0-Z31 are
|
||||
* logically zero but not stored anywhere; P0-P15 and FFR are not
|
||||
* stored and have unspecified values from userspace's point of
|
||||
* view. For hygiene purposes, the kernel zeroes them on next use,
|
||||
@@ -231,9 +231,9 @@ static void sve_user_enable(void)
|
||||
* task->thread.sve_state does not need to be non-NULL, valid or any
|
||||
* particular size: it must not be dereferenced.
|
||||
*
|
||||
- * * FPSR and FPCR are always stored in task->fpsimd_state irrespctive of
|
||||
- * whether TIF_SVE is clear or set, since these are not vector length
|
||||
- * dependent.
|
||||
+ * * FPSR and FPCR are always stored in task->thread.uw.fpsimd_state
|
||||
+ * irrespective of whether TIF_SVE is clear or set, since these are
|
||||
+ * not vector length dependent.
|
||||
*/
|
||||
|
||||
/*
|
||||
@@ -251,10 +251,10 @@ static void task_fpsimd_load(void)
|
||||
|
||||
if (system_supports_sve() && test_thread_flag(TIF_SVE))
|
||||
sve_load_state(sve_pffr(current),
|
||||
- ¤t->thread.fpsimd_state.fpsr,
|
||||
+ ¤t->thread.uw.fpsimd_state.fpsr,
|
||||
sve_vq_from_vl(current->thread.sve_vl) - 1);
|
||||
else
|
||||
- fpsimd_load_state(¤t->thread.fpsimd_state);
|
||||
+ fpsimd_load_state(¤t->thread.uw.fpsimd_state);
|
||||
|
||||
if (system_supports_sve()) {
|
||||
/* Toggle SVE trapping for userspace if needed */
|
||||
@@ -291,9 +291,9 @@ static void task_fpsimd_save(void)
|
||||
}
|
||||
|
||||
sve_save_state(sve_pffr(current),
|
||||
- ¤t->thread.fpsimd_state.fpsr);
|
||||
+ ¤t->thread.uw.fpsimd_state.fpsr);
|
||||
} else
|
||||
- fpsimd_save_state(¤t->thread.fpsimd_state);
|
||||
+ fpsimd_save_state(¤t->thread.uw.fpsimd_state);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -404,20 +404,21 @@ static int __init sve_sysctl_init(void) { return 0; }
|
||||
(SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET))
|
||||
|
||||
/*
|
||||
- * Transfer the FPSIMD state in task->thread.fpsimd_state to
|
||||
+ * Transfer the FPSIMD state in task->thread.uw.fpsimd_state to
|
||||
* task->thread.sve_state.
|
||||
*
|
||||
* Task can be a non-runnable task, or current. In the latter case,
|
||||
* softirqs (and preemption) must be disabled.
|
||||
* task->thread.sve_state must point to at least sve_state_size(task)
|
||||
* bytes of allocated kernel memory.
|
||||
- * task->thread.fpsimd_state must be up to date before calling this function.
|
||||
+ * task->thread.uw.fpsimd_state must be up to date before calling this
|
||||
+ * function.
|
||||
*/
|
||||
static void fpsimd_to_sve(struct task_struct *task)
|
||||
{
|
||||
unsigned int vq;
|
||||
void *sst = task->thread.sve_state;
|
||||
- struct user_fpsimd_state const *fst = &task->thread.fpsimd_state;
|
||||
+ struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state;
|
||||
unsigned int i;
|
||||
|
||||
if (!system_supports_sve())
|
||||
@@ -431,7 +432,7 @@ static void fpsimd_to_sve(struct task_struct *task)
|
||||
|
||||
/*
|
||||
* Transfer the SVE state in task->thread.sve_state to
|
||||
- * task->thread.fpsimd_state.
|
||||
+ * task->thread.uw.fpsimd_state.
|
||||
*
|
||||
* Task can be a non-runnable task, or current. In the latter case,
|
||||
* softirqs (and preemption) must be disabled.
|
||||
@@ -443,7 +444,7 @@ static void sve_to_fpsimd(struct task_struct *task)
|
||||
{
|
||||
unsigned int vq;
|
||||
void const *sst = task->thread.sve_state;
|
||||
- struct user_fpsimd_state *fst = &task->thread.fpsimd_state;
|
||||
+ struct user_fpsimd_state *fst = &task->thread.uw.fpsimd_state;
|
||||
unsigned int i;
|
||||
|
||||
if (!system_supports_sve())
|
||||
@@ -510,7 +511,7 @@ void fpsimd_sync_to_sve(struct task_struct *task)
|
||||
}
|
||||
|
||||
/*
|
||||
- * Ensure that task->thread.fpsimd_state is up to date with respect to
|
||||
+ * Ensure that task->thread.uw.fpsimd_state is up to date with respect to
|
||||
* the user task, irrespective of whether SVE is in use or not.
|
||||
*
|
||||
* This should only be called by ptrace. task must be non-runnable.
|
||||
@@ -525,21 +526,21 @@ void sve_sync_to_fpsimd(struct task_struct *task)
|
||||
|
||||
/*
|
||||
* Ensure that task->thread.sve_state is up to date with respect to
|
||||
- * the task->thread.fpsimd_state.
|
||||
+ * the task->thread.uw.fpsimd_state.
|
||||
*
|
||||
* This should only be called by ptrace to merge new FPSIMD register
|
||||
* values into a task for which SVE is currently active.
|
||||
* task must be non-runnable.
|
||||
* task->thread.sve_state must point to at least sve_state_size(task)
|
||||
* bytes of allocated kernel memory.
|
||||
- * task->thread.fpsimd_state must already have been initialised with
|
||||
+ * task->thread.uw.fpsimd_state must already have been initialised with
|
||||
* the new FPSIMD register values to be merged in.
|
||||
*/
|
||||
void sve_sync_from_fpsimd_zeropad(struct task_struct *task)
|
||||
{
|
||||
unsigned int vq;
|
||||
void *sst = task->thread.sve_state;
|
||||
- struct user_fpsimd_state const *fst = &task->thread.fpsimd_state;
|
||||
+ struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state;
|
||||
unsigned int i;
|
||||
|
||||
if (!test_tsk_thread_flag(task, TIF_SVE))
|
||||
@@ -909,7 +910,7 @@ void fpsimd_thread_switch(struct task_struct *next)
|
||||
* upon the next return to userland.
|
||||
*/
|
||||
if (__this_cpu_read(fpsimd_last_state.st) ==
|
||||
- &next->thread.fpsimd_state
|
||||
+ &next->thread.uw.fpsimd_state
|
||||
&& next->thread.fpsimd_cpu == smp_processor_id())
|
||||
clear_tsk_thread_flag(next, TIF_FOREIGN_FPSTATE);
|
||||
else
|
||||
@@ -926,8 +927,8 @@ void fpsimd_flush_thread(void)
|
||||
|
||||
local_bh_disable();
|
||||
|
||||
- memset(¤t->thread.fpsimd_state, 0,
|
||||
- sizeof current->thread.fpsimd_state);
|
||||
+ memset(¤t->thread.uw.fpsimd_state, 0,
|
||||
+ sizeof current->thread.uw.fpsimd_state);
|
||||
fpsimd_flush_task_state(current);
|
||||
|
||||
if (system_supports_sve()) {
|
||||
@@ -986,7 +987,7 @@ void fpsimd_preserve_current_state(void)
|
||||
|
||||
/*
|
||||
* Like fpsimd_preserve_current_state(), but ensure that
|
||||
- * current->thread.fpsimd_state is updated so that it can be copied to
|
||||
+ * current->thread.uw.fpsimd_state is updated so that it can be copied to
|
||||
* the signal frame.
|
||||
*/
|
||||
void fpsimd_signal_preserve_current_state(void)
|
||||
@@ -1005,7 +1006,7 @@ static void fpsimd_bind_to_cpu(void)
|
||||
struct fpsimd_last_state_struct *last =
|
||||
this_cpu_ptr(&fpsimd_last_state);
|
||||
|
||||
- last->st = ¤t->thread.fpsimd_state;
|
||||
+ last->st = ¤t->thread.uw.fpsimd_state;
|
||||
last->sve_in_use = test_thread_flag(TIF_SVE);
|
||||
current->thread.fpsimd_cpu = smp_processor_id();
|
||||
}
|
||||
@@ -1042,7 +1043,7 @@ void fpsimd_update_current_state(struct user_fpsimd_state const *state)
|
||||
|
||||
local_bh_disable();
|
||||
|
||||
- current->thread.fpsimd_state = *state;
|
||||
+ current->thread.uw.fpsimd_state = *state;
|
||||
if (system_supports_sve() && test_thread_flag(TIF_SVE))
|
||||
fpsimd_to_sve(current);
|
||||
|
||||
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
|
||||
index c0da6ef..f08a2ed 100644
|
||||
--- a/arch/arm64/kernel/process.c
|
||||
+++ b/arch/arm64/kernel/process.c
|
||||
@@ -257,7 +257,7 @@ static void tls_thread_flush(void)
|
||||
write_sysreg(0, tpidr_el0);
|
||||
|
||||
if (is_compat_task()) {
|
||||
- current->thread.tp_value = 0;
|
||||
+ current->thread.uw.tp_value = 0;
|
||||
|
||||
/*
|
||||
* We need to ensure ordering between the shadow state and the
|
||||
@@ -351,7 +351,7 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start,
|
||||
* for the new thread.
|
||||
*/
|
||||
if (clone_flags & CLONE_SETTLS)
|
||||
- p->thread.tp_value = childregs->regs[3];
|
||||
+ p->thread.uw.tp_value = childregs->regs[3];
|
||||
} else {
|
||||
memset(childregs, 0, sizeof(struct pt_regs));
|
||||
childregs->pstate = PSR_MODE_EL1h;
|
||||
@@ -379,7 +379,7 @@ static void tls_thread_switch(struct task_struct *next)
|
||||
tls_preserve_current_state();
|
||||
|
||||
if (is_compat_thread(task_thread_info(next)))
|
||||
- write_sysreg(next->thread.tp_value, tpidrro_el0);
|
||||
+ write_sysreg(next->thread.uw.tp_value, tpidrro_el0);
|
||||
else if (!arm64_kernel_unmapped_at_el0())
|
||||
write_sysreg(0, tpidrro_el0);
|
||||
|
||||
diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
|
||||
index fdeaba0de..436a132 100644
|
||||
--- a/arch/arm64/kernel/ptrace.c
|
||||
+++ b/arch/arm64/kernel/ptrace.c
|
||||
@@ -629,7 +629,7 @@ static int __fpr_get(struct task_struct *target,
|
||||
|
||||
sve_sync_to_fpsimd(target);
|
||||
|
||||
- uregs = &target->thread.fpsimd_state;
|
||||
+ uregs = &target->thread.uw.fpsimd_state;
|
||||
|
||||
return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs,
|
||||
start_pos, start_pos + sizeof(*uregs));
|
||||
@@ -655,19 +655,19 @@ static int __fpr_set(struct task_struct *target,
|
||||
struct user_fpsimd_state newstate;
|
||||
|
||||
/*
|
||||
- * Ensure target->thread.fpsimd_state is up to date, so that a
|
||||
+ * Ensure target->thread.uw.fpsimd_state is up to date, so that a
|
||||
* short copyin can't resurrect stale data.
|
||||
*/
|
||||
sve_sync_to_fpsimd(target);
|
||||
|
||||
- newstate = target->thread.fpsimd_state;
|
||||
+ newstate = target->thread.uw.fpsimd_state;
|
||||
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate,
|
||||
start_pos, start_pos + sizeof(newstate));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
- target->thread.fpsimd_state = newstate;
|
||||
+ target->thread.uw.fpsimd_state = newstate;
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -692,7 +692,7 @@ static int tls_get(struct task_struct *target, const struct user_regset *regset,
|
||||
unsigned int pos, unsigned int count,
|
||||
void *kbuf, void __user *ubuf)
|
||||
{
|
||||
- unsigned long *tls = &target->thread.tp_value;
|
||||
+ unsigned long *tls = &target->thread.uw.tp_value;
|
||||
|
||||
if (target == current)
|
||||
tls_preserve_current_state();
|
||||
@@ -705,13 +705,13 @@ static int tls_set(struct task_struct *target, const struct user_regset *regset,
|
||||
const void *kbuf, const void __user *ubuf)
|
||||
{
|
||||
int ret;
|
||||
- unsigned long tls = target->thread.tp_value;
|
||||
+ unsigned long tls = target->thread.uw.tp_value;
|
||||
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
- target->thread.tp_value = tls;
|
||||
+ target->thread.uw.tp_value = tls;
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -842,7 +842,7 @@ static int sve_get(struct task_struct *target,
|
||||
start = end;
|
||||
end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
|
||||
ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
||||
- &target->thread.fpsimd_state.fpsr,
|
||||
+ &target->thread.uw.fpsimd_state.fpsr,
|
||||
start, end);
|
||||
if (ret)
|
||||
return ret;
|
||||
@@ -941,7 +941,7 @@ static int sve_set(struct task_struct *target,
|
||||
start = end;
|
||||
end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
||||
- &target->thread.fpsimd_state.fpsr,
|
||||
+ &target->thread.uw.fpsimd_state.fpsr,
|
||||
start, end);
|
||||
|
||||
out:
|
||||
@@ -1169,7 +1169,7 @@ static int compat_vfp_get(struct task_struct *target,
|
||||
compat_ulong_t fpscr;
|
||||
int ret, vregs_end_pos;
|
||||
|
||||
- uregs = &target->thread.fpsimd_state;
|
||||
+ uregs = &target->thread.uw.fpsimd_state;
|
||||
|
||||
if (target == current)
|
||||
fpsimd_preserve_current_state();
|
||||
@@ -1202,7 +1202,7 @@ static int compat_vfp_set(struct task_struct *target,
|
||||
compat_ulong_t fpscr;
|
||||
int ret, vregs_end_pos;
|
||||
|
||||
- uregs = &target->thread.fpsimd_state;
|
||||
+ uregs = &target->thread.uw.fpsimd_state;
|
||||
|
||||
vregs_end_pos = VFP_STATE_SIZE - sizeof(compat_ulong_t);
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
|
||||
@@ -1225,7 +1225,7 @@ static int compat_tls_get(struct task_struct *target,
|
||||
const struct user_regset *regset, unsigned int pos,
|
||||
unsigned int count, void *kbuf, void __user *ubuf)
|
||||
{
|
||||
- compat_ulong_t tls = (compat_ulong_t)target->thread.tp_value;
|
||||
+ compat_ulong_t tls = (compat_ulong_t)target->thread.uw.tp_value;
|
||||
return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
|
||||
}
|
||||
|
||||
@@ -1235,13 +1235,13 @@ static int compat_tls_set(struct task_struct *target,
|
||||
const void __user *ubuf)
|
||||
{
|
||||
int ret;
|
||||
- compat_ulong_t tls = target->thread.tp_value;
|
||||
+ compat_ulong_t tls = target->thread.uw.tp_value;
|
||||
|
||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
- target->thread.tp_value = tls;
|
||||
+ target->thread.uw.tp_value = tls;
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -1538,7 +1538,7 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
|
||||
break;
|
||||
|
||||
case COMPAT_PTRACE_GET_THREAD_AREA:
|
||||
- ret = put_user((compat_ulong_t)child->thread.tp_value,
|
||||
+ ret = put_user((compat_ulong_t)child->thread.uw.tp_value,
|
||||
(compat_ulong_t __user *)datap);
|
||||
break;
|
||||
|
||||
diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c
|
||||
index d026615..a0c4138 100644
|
||||
--- a/arch/arm64/kernel/signal.c
|
||||
+++ b/arch/arm64/kernel/signal.c
|
||||
@@ -178,7 +178,8 @@ static void __user *apply_user_offset(
|
||||
|
||||
static int preserve_fpsimd_context(struct fpsimd_context __user *ctx)
|
||||
{
|
||||
- struct user_fpsimd_state const *fpsimd = ¤t->thread.fpsimd_state;
|
||||
+ struct user_fpsimd_state const *fpsimd =
|
||||
+ ¤t->thread.uw.fpsimd_state;
|
||||
int err;
|
||||
|
||||
/* copy the FP and status/control registers */
|
||||
diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
|
||||
index 4ea38d3..884177a 100644
|
||||
--- a/arch/arm64/kernel/signal32.c
|
||||
+++ b/arch/arm64/kernel/signal32.c
|
||||
@@ -148,7 +148,8 @@ union __fpsimd_vreg {
|
||||
|
||||
static int compat_preserve_vfp_context(struct compat_vfp_sigframe __user *frame)
|
||||
{
|
||||
- struct user_fpsimd_state const *fpsimd = ¤t->thread.fpsimd_state;
|
||||
+ struct user_fpsimd_state const *fpsimd =
|
||||
+ ¤t->thread.uw.fpsimd_state;
|
||||
compat_ulong_t magic = VFP_MAGIC;
|
||||
compat_ulong_t size = VFP_STORAGE_SIZE;
|
||||
compat_ulong_t fpscr, fpexc;
|
||||
diff --git a/arch/arm64/kernel/sys_compat.c b/arch/arm64/kernel/sys_compat.c
|
||||
index a382b2a..9155989 100644
|
||||
--- a/arch/arm64/kernel/sys_compat.c
|
||||
+++ b/arch/arm64/kernel/sys_compat.c
|
||||
@@ -88,7 +88,7 @@ long compat_arm_syscall(struct pt_regs *regs)
|
||||
return do_compat_cache_op(regs->regs[0], regs->regs[1], regs->regs[2]);
|
||||
|
||||
case __ARM_NR_compat_set_tls:
|
||||
- current->thread.tp_value = regs->regs[0];
|
||||
+ current->thread.uw.tp_value = regs->regs[0];
|
||||
|
||||
/*
|
||||
* Protect against register corruption from context switch.
|
|
@ -1,76 +0,0 @@
|
|||
From 24b6fe7240e15b6df53b0ace61a70f58e09f6fc6 Mon Sep 17 00:00:00 2001
|
||||
From: Ryan Hsu <ryanhsu@codeaurora.org>
|
||||
Date: Fri, 8 Jun 2018 11:32:39 -0700
|
||||
Subject: [PATCH] ath10k: Update the phymode along with bandwidth change
|
||||
request
|
||||
|
||||
In the case of Station connects to AP with narrower bandwidth at beginning.
|
||||
And later the AP changes the bandwidth to winder bandwidth, the AP will
|
||||
beacon with wider bandwidth IE, eg VHT20->VHT40->VHT80 or VHT40->VHT80.
|
||||
|
||||
Since the supported BANDWIDTH will be limited by the PHYMODE, so while
|
||||
Station receives the bandwidth change request, it will also need to
|
||||
reconfigure the PHYMODE setting to firmware instead of just configuring
|
||||
the BANDWIDTH info, otherwise it'll trigger a firmware crash with
|
||||
non-support bandwidth.
|
||||
|
||||
The issue was observed in WLAN.RM.4.4.1-00051-QCARMSWP-1, QCA6174 with
|
||||
below scenario.
|
||||
|
||||
Reported-by: Rouven Czerwinski <rouven@czerwinskis.de>
|
||||
Signed-off-by: Ryan Hsu <ryanhsu@codeaurora.org>
|
||||
Signed-off-by: Jeremy Cline <jcline@redhat.com>
|
||||
---
|
||||
drivers/net/wireless/ath/ath10k/mac.c | 16 ++++++++++++++--
|
||||
drivers/net/wireless/ath/ath10k/wmi.h | 1 +
|
||||
2 files changed, 15 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/drivers/net/wireless/ath/ath10k/mac.c b/drivers/net/wireless/ath/ath10k/mac.c
|
||||
index 2d7ef7460780..72d61ca3cb42 100644
|
||||
--- a/drivers/net/wireless/ath/ath10k/mac.c
|
||||
+++ b/drivers/net/wireless/ath/ath10k/mac.c
|
||||
@@ -5996,8 +5996,19 @@ static void ath10k_sta_rc_update_wk(struct work_struct *wk)
|
||||
ath10k_mac_max_vht_nss(vht_mcs_mask)));
|
||||
|
||||
if (changed & IEEE80211_RC_BW_CHANGED) {
|
||||
- ath10k_dbg(ar, ATH10K_DBG_MAC, "mac update sta %pM peer bw %d\n",
|
||||
- sta->addr, bw);
|
||||
+ enum wmi_phy_mode mode;
|
||||
+
|
||||
+ mode = chan_to_phymode(&def);
|
||||
+ ath10k_dbg(ar, ATH10K_DBG_MAC, "mac update sta %pM peer bw %d phymode %d\n",
|
||||
+ sta->addr, bw, mode);
|
||||
+
|
||||
+ err = ath10k_wmi_peer_set_param(ar, arvif->vdev_id, sta->addr,
|
||||
+ WMI_PEER_PHYMODE, mode);
|
||||
+ if (err) {
|
||||
+ ath10k_warn(ar, "failed to update STA %pM peer phymode %d: %d\n",
|
||||
+ sta->addr, mode, err);
|
||||
+ goto exit;
|
||||
+ }
|
||||
|
||||
err = ath10k_wmi_peer_set_param(ar, arvif->vdev_id, sta->addr,
|
||||
WMI_PEER_CHAN_WIDTH, bw);
|
||||
@@ -6038,6 +6049,7 @@ static void ath10k_sta_rc_update_wk(struct work_struct *wk)
|
||||
sta->addr);
|
||||
}
|
||||
|
||||
+exit:
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
}
|
||||
|
||||
diff --git a/drivers/net/wireless/ath/ath10k/wmi.h b/drivers/net/wireless/ath/ath10k/wmi.h
|
||||
index c7b30ed9015d..930a0e1b1163 100644
|
||||
--- a/drivers/net/wireless/ath/ath10k/wmi.h
|
||||
+++ b/drivers/net/wireless/ath/ath10k/wmi.h
|
||||
@@ -6010,6 +6010,7 @@ enum wmi_peer_param {
|
||||
WMI_PEER_NSS = 0x5,
|
||||
WMI_PEER_USE_4ADDR = 0x6,
|
||||
WMI_PEER_DEBUG = 0xa,
|
||||
+ WMI_PEER_PHYMODE = 0xd,
|
||||
WMI_PEER_DUMMY_VAR = 0xff, /* dummy parameter for STA PS workaround */
|
||||
};
|
||||
|
||||
--
|
||||
2.17.1
|
||||
|
|
@ -1,529 +0,0 @@
|
|||
From 08af112e79cab22f318ca0ad1a48187eee5ac2f0 Mon Sep 17 00:00:00 2001
|
||||
From: Baruch Siach <baruch@tkos.co.il>
|
||||
Date: Tue, 20 Feb 2018 14:19:31 +0200
|
||||
Subject: soc: bcm2835: sync firmware properties with downstream
|
||||
|
||||
Add latest firmware property tags from the latest Raspberry Pi downstream
|
||||
kernel. This is needed for the GPIO tags, so we can control the GPIO
|
||||
multiplexor lines.
|
||||
|
||||
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
|
||||
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
---
|
||||
include/soc/bcm2835/raspberrypi-firmware.h | 18 ++++++++++++++++++
|
||||
1 file changed, 18 insertions(+)
|
||||
|
||||
diff --git a/include/soc/bcm2835/raspberrypi-firmware.h b/include/soc/bcm2835/raspberrypi-firmware.h
|
||||
index cb979ad..50df5b2 100644
|
||||
--- a/include/soc/bcm2835/raspberrypi-firmware.h
|
||||
+++ b/include/soc/bcm2835/raspberrypi-firmware.h
|
||||
@@ -63,6 +63,7 @@ enum rpi_firmware_property_tag {
|
||||
RPI_FIRMWARE_GET_MIN_VOLTAGE = 0x00030008,
|
||||
RPI_FIRMWARE_GET_TURBO = 0x00030009,
|
||||
RPI_FIRMWARE_GET_MAX_TEMPERATURE = 0x0003000a,
|
||||
+ RPI_FIRMWARE_GET_STC = 0x0003000b,
|
||||
RPI_FIRMWARE_ALLOCATE_MEMORY = 0x0003000c,
|
||||
RPI_FIRMWARE_LOCK_MEMORY = 0x0003000d,
|
||||
RPI_FIRMWARE_UNLOCK_MEMORY = 0x0003000e,
|
||||
@@ -72,12 +73,22 @@ enum rpi_firmware_property_tag {
|
||||
RPI_FIRMWARE_SET_ENABLE_QPU = 0x00030012,
|
||||
RPI_FIRMWARE_GET_DISPMANX_RESOURCE_MEM_HANDLE = 0x00030014,
|
||||
RPI_FIRMWARE_GET_EDID_BLOCK = 0x00030020,
|
||||
+ RPI_FIRMWARE_GET_CUSTOMER_OTP = 0x00030021,
|
||||
RPI_FIRMWARE_GET_DOMAIN_STATE = 0x00030030,
|
||||
RPI_FIRMWARE_SET_CLOCK_STATE = 0x00038001,
|
||||
RPI_FIRMWARE_SET_CLOCK_RATE = 0x00038002,
|
||||
RPI_FIRMWARE_SET_VOLTAGE = 0x00038003,
|
||||
RPI_FIRMWARE_SET_TURBO = 0x00038009,
|
||||
+ RPI_FIRMWARE_SET_CUSTOMER_OTP = 0x00038021,
|
||||
RPI_FIRMWARE_SET_DOMAIN_STATE = 0x00038030,
|
||||
+ RPI_FIRMWARE_GET_GPIO_STATE = 0x00030041,
|
||||
+ RPI_FIRMWARE_SET_GPIO_STATE = 0x00038041,
|
||||
+ RPI_FIRMWARE_SET_SDHOST_CLOCK = 0x00038042,
|
||||
+ RPI_FIRMWARE_GET_GPIO_CONFIG = 0x00030043,
|
||||
+ RPI_FIRMWARE_SET_GPIO_CONFIG = 0x00038043,
|
||||
+ RPI_FIRMWARE_GET_PERIPH_REG = 0x00030045,
|
||||
+ RPI_FIRMWARE_SET_PERIPH_REG = 0x00038045,
|
||||
+
|
||||
|
||||
/* Dispmanx TAGS */
|
||||
RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE = 0x00040001,
|
||||
@@ -91,6 +102,8 @@ enum rpi_firmware_property_tag {
|
||||
RPI_FIRMWARE_FRAMEBUFFER_GET_VIRTUAL_OFFSET = 0x00040009,
|
||||
RPI_FIRMWARE_FRAMEBUFFER_GET_OVERSCAN = 0x0004000a,
|
||||
RPI_FIRMWARE_FRAMEBUFFER_GET_PALETTE = 0x0004000b,
|
||||
+ RPI_FIRMWARE_FRAMEBUFFER_GET_TOUCHBUF = 0x0004000f,
|
||||
+ RPI_FIRMWARE_FRAMEBUFFER_GET_GPIOVIRTBUF = 0x00040010,
|
||||
RPI_FIRMWARE_FRAMEBUFFER_RELEASE = 0x00048001,
|
||||
RPI_FIRMWARE_FRAMEBUFFER_TEST_PHYSICAL_WIDTH_HEIGHT = 0x00044003,
|
||||
RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_WIDTH_HEIGHT = 0x00044004,
|
||||
@@ -100,6 +113,7 @@ enum rpi_firmware_property_tag {
|
||||
RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_OFFSET = 0x00044009,
|
||||
RPI_FIRMWARE_FRAMEBUFFER_TEST_OVERSCAN = 0x0004400a,
|
||||
RPI_FIRMWARE_FRAMEBUFFER_TEST_PALETTE = 0x0004400b,
|
||||
+ RPI_FIRMWARE_FRAMEBUFFER_TEST_VSYNC = 0x0004400e,
|
||||
RPI_FIRMWARE_FRAMEBUFFER_SET_PHYSICAL_WIDTH_HEIGHT = 0x00048003,
|
||||
RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_WIDTH_HEIGHT = 0x00048004,
|
||||
RPI_FIRMWARE_FRAMEBUFFER_SET_DEPTH = 0x00048005,
|
||||
@@ -108,6 +122,10 @@ enum rpi_firmware_property_tag {
|
||||
RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009,
|
||||
RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a,
|
||||
RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b,
|
||||
+ RPI_FIRMWARE_FRAMEBUFFER_SET_TOUCHBUF = 0x0004801f,
|
||||
+ RPI_FIRMWARE_FRAMEBUFFER_SET_GPIOVIRTBUF = 0x00048020,
|
||||
+ RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC = 0x0004800e,
|
||||
+ RPI_FIRMWARE_FRAMEBUFFER_SET_BACKLIGHT = 0x0004800f,
|
||||
|
||||
RPI_FIRMWARE_VCHIQ_INIT = 0x00048010,
|
||||
|
||||
--
|
||||
cgit v1.1
|
||||
From 9777d8099a4a9df1625b4caaee1388c0158478c5 Mon Sep 17 00:00:00 2001
|
||||
From: Baruch Siach <baruch@tkos.co.il>
|
||||
Date: Tue, 20 Feb 2018 14:19:32 +0200
|
||||
Subject: dt-bindings: gpio: add raspberry pi GPIO expander binding
|
||||
|
||||
The Raspberry Pi 3 GPIO expander is controlled by the VC4 firmware over
|
||||
I2C. The firmware mailbox interface allows the ARM core to control the
|
||||
GPIO lines.
|
||||
|
||||
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
|
||||
Reviewed-by: Rob Herring <robh@kernel.org>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
---
|
||||
.../bindings/gpio/raspberrypi,firmware-gpio.txt | 30 ++++++++++++++++++++++
|
||||
1 file changed, 30 insertions(+)
|
||||
create mode 100644 Documentation/devicetree/bindings/gpio/raspberrypi,firmware-gpio.txt
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/gpio/raspberrypi,firmware-gpio.txt b/Documentation/devicetree/bindings/gpio/raspberrypi,firmware-gpio.txt
|
||||
new file mode 100644
|
||||
index 0000000..ce97265
|
||||
--- /dev/null
|
||||
+++ b/Documentation/devicetree/bindings/gpio/raspberrypi,firmware-gpio.txt
|
||||
@@ -0,0 +1,30 @@
|
||||
+Raspberry Pi GPIO expander
|
||||
+
|
||||
+The Raspberry Pi 3 GPIO expander is controlled by the VC4 firmware. The
|
||||
+firmware exposes a mailbox interface that allows the ARM core to control the
|
||||
+GPIO lines on the expander.
|
||||
+
|
||||
+The Raspberry Pi GPIO expander node must be a child node of the Raspberry Pi
|
||||
+firmware node.
|
||||
+
|
||||
+Required properties:
|
||||
+
|
||||
+- compatible : Should be "raspberrypi,firmware-gpio"
|
||||
+- gpio-controller : Marks the device node as a gpio controller
|
||||
+- #gpio-cells : Should be two. The first cell is the pin number, and
|
||||
+ the second cell is used to specify the gpio polarity:
|
||||
+ 0 = active high
|
||||
+ 1 = active low
|
||||
+
|
||||
+Example:
|
||||
+
|
||||
+firmware: firmware-rpi {
|
||||
+ compatible = "raspberrypi,bcm2835-firmware";
|
||||
+ mboxes = <&mailbox>;
|
||||
+
|
||||
+ expgpio: gpio {
|
||||
+ compatible = "raspberrypi,firmware-gpio";
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
cgit v1.1
|
||||
From a98d90e7d588045716c3c85d63f93dc3f15a079b Mon Sep 17 00:00:00 2001
|
||||
From: Dave Stevenson <dave.stevenson@raspberrypi.org>
|
||||
Date: Tue, 20 Feb 2018 14:19:33 +0200
|
||||
Subject: gpio: raspberrypi-exp: Driver for RPi3 GPIO expander via mailbox
|
||||
service
|
||||
|
||||
Pi3 and Compute Module 3 have a GPIO expander that the
|
||||
VPU communicates with.
|
||||
There is a mailbox service that now allows control of this
|
||||
expander, so add a kernel driver that can make use of it.
|
||||
|
||||
Reviewed-by: Stefan Wahren <stefan.wahren@i2se.com>
|
||||
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
|
||||
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
---
|
||||
drivers/gpio/Kconfig | 9 ++
|
||||
drivers/gpio/Makefile | 1 +
|
||||
drivers/gpio/gpio-raspberrypi-exp.c | 252 ++++++++++++++++++++++++++++++++++++
|
||||
3 files changed, 262 insertions(+)
|
||||
create mode 100644 drivers/gpio/gpio-raspberrypi-exp.c
|
||||
|
||||
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
|
||||
index 8dbb228..fd0562a 100644
|
||||
--- a/drivers/gpio/Kconfig
|
||||
+++ b/drivers/gpio/Kconfig
|
||||
@@ -122,6 +122,15 @@ config GPIO_ATH79
|
||||
Select this option to enable GPIO driver for
|
||||
Atheros AR71XX/AR724X/AR913X SoC devices.
|
||||
|
||||
+config GPIO_RASPBERRYPI_EXP
|
||||
+ tristate "Raspberry Pi 3 GPIO Expander"
|
||||
+ default RASPBERRYPI_FIRMWARE
|
||||
+ depends on OF_GPIO
|
||||
+ depends on (ARCH_BCM2835 && RASPBERRYPI_FIRMWARE) || COMPILE_TEST
|
||||
+ help
|
||||
+ Turn on GPIO support for the expander on Raspberry Pi 3 boards, using
|
||||
+ the firmware mailbox to communicate with VideoCore on BCM283x chips.
|
||||
+
|
||||
config GPIO_BCM_KONA
|
||||
bool "Broadcom Kona GPIO"
|
||||
depends on OF_GPIO && (ARCH_BCM_MOBILE || COMPILE_TEST)
|
||||
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
|
||||
index cccb0d4..76dc0a0 100644
|
||||
--- a/drivers/gpio/Makefile
|
||||
+++ b/drivers/gpio/Makefile
|
||||
@@ -32,6 +32,7 @@ obj-$(CONFIG_GPIO_AMDPT) += gpio-amdpt.o
|
||||
obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o
|
||||
obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o
|
||||
obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o
|
||||
+obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
|
||||
obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
|
||||
obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o
|
||||
obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
|
||||
diff --git a/drivers/gpio/gpio-raspberrypi-exp.c b/drivers/gpio/gpio-raspberrypi-exp.c
|
||||
new file mode 100644
|
||||
index 0000000..d6d36d5
|
||||
--- /dev/null
|
||||
+++ b/drivers/gpio/gpio-raspberrypi-exp.c
|
||||
@@ -0,0 +1,252 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0+
|
||||
+/*
|
||||
+ * Raspberry Pi 3 expander GPIO driver
|
||||
+ *
|
||||
+ * Uses the firmware mailbox service to communicate with the
|
||||
+ * GPIO expander on the VPU.
|
||||
+ *
|
||||
+ * Copyright (C) 2017 Raspberry Pi Trading Ltd.
|
||||
+ */
|
||||
+
|
||||
+#include <linux/err.h>
|
||||
+#include <linux/gpio/driver.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <soc/bcm2835/raspberrypi-firmware.h>
|
||||
+
|
||||
+#define MODULE_NAME "raspberrypi-exp-gpio"
|
||||
+#define NUM_GPIO 8
|
||||
+
|
||||
+#define RPI_EXP_GPIO_BASE 128
|
||||
+
|
||||
+#define RPI_EXP_GPIO_DIR_IN 0
|
||||
+#define RPI_EXP_GPIO_DIR_OUT 1
|
||||
+
|
||||
+struct rpi_exp_gpio {
|
||||
+ struct gpio_chip gc;
|
||||
+ struct rpi_firmware *fw;
|
||||
+};
|
||||
+
|
||||
+/* VC4 firmware mailbox interface data structures */
|
||||
+
|
||||
+struct gpio_set_config {
|
||||
+ u32 gpio;
|
||||
+ u32 direction;
|
||||
+ u32 polarity;
|
||||
+ u32 term_en;
|
||||
+ u32 term_pull_up;
|
||||
+ u32 state;
|
||||
+};
|
||||
+
|
||||
+struct gpio_get_config {
|
||||
+ u32 gpio;
|
||||
+ u32 direction;
|
||||
+ u32 polarity;
|
||||
+ u32 term_en;
|
||||
+ u32 term_pull_up;
|
||||
+};
|
||||
+
|
||||
+struct gpio_get_set_state {
|
||||
+ u32 gpio;
|
||||
+ u32 state;
|
||||
+};
|
||||
+
|
||||
+static int rpi_exp_gpio_get_polarity(struct gpio_chip *gc, unsigned int off)
|
||||
+{
|
||||
+ struct rpi_exp_gpio *gpio;
|
||||
+ struct gpio_get_config get;
|
||||
+ int ret;
|
||||
+
|
||||
+ gpio = gpiochip_get_data(gc);
|
||||
+
|
||||
+ get.gpio = off + RPI_EXP_GPIO_BASE; /* GPIO to update */
|
||||
+
|
||||
+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_GET_GPIO_CONFIG,
|
||||
+ &get, sizeof(get));
|
||||
+ if (ret || get.gpio != 0) {
|
||||
+ dev_err(gc->parent, "Failed to get GPIO %u config (%d %x)\n",
|
||||
+ off, ret, get.gpio);
|
||||
+ return ret ? ret : -EIO;
|
||||
+ }
|
||||
+ return get.polarity;
|
||||
+}
|
||||
+
|
||||
+static int rpi_exp_gpio_dir_in(struct gpio_chip *gc, unsigned int off)
|
||||
+{
|
||||
+ struct rpi_exp_gpio *gpio;
|
||||
+ struct gpio_set_config set_in;
|
||||
+ int ret;
|
||||
+
|
||||
+ gpio = gpiochip_get_data(gc);
|
||||
+
|
||||
+ set_in.gpio = off + RPI_EXP_GPIO_BASE; /* GPIO to update */
|
||||
+ set_in.direction = RPI_EXP_GPIO_DIR_IN;
|
||||
+ set_in.term_en = 0; /* termination disabled */
|
||||
+ set_in.term_pull_up = 0; /* n/a as termination disabled */
|
||||
+ set_in.state = 0; /* n/a as configured as an input */
|
||||
+
|
||||
+ ret = rpi_exp_gpio_get_polarity(gc, off);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+ set_in.polarity = ret; /* Retain existing setting */
|
||||
+
|
||||
+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_SET_GPIO_CONFIG,
|
||||
+ &set_in, sizeof(set_in));
|
||||
+ if (ret || set_in.gpio != 0) {
|
||||
+ dev_err(gc->parent, "Failed to set GPIO %u to input (%d %x)\n",
|
||||
+ off, ret, set_in.gpio);
|
||||
+ return ret ? ret : -EIO;
|
||||
+ }
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int rpi_exp_gpio_dir_out(struct gpio_chip *gc, unsigned int off, int val)
|
||||
+{
|
||||
+ struct rpi_exp_gpio *gpio;
|
||||
+ struct gpio_set_config set_out;
|
||||
+ int ret;
|
||||
+
|
||||
+ gpio = gpiochip_get_data(gc);
|
||||
+
|
||||
+ set_out.gpio = off + RPI_EXP_GPIO_BASE; /* GPIO to update */
|
||||
+ set_out.direction = RPI_EXP_GPIO_DIR_OUT;
|
||||
+ set_out.term_en = 0; /* n/a as an output */
|
||||
+ set_out.term_pull_up = 0; /* n/a as termination disabled */
|
||||
+ set_out.state = val; /* Output state */
|
||||
+
|
||||
+ ret = rpi_exp_gpio_get_polarity(gc, off);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
+ set_out.polarity = ret; /* Retain existing setting */
|
||||
+
|
||||
+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_SET_GPIO_CONFIG,
|
||||
+ &set_out, sizeof(set_out));
|
||||
+ if (ret || set_out.gpio != 0) {
|
||||
+ dev_err(gc->parent, "Failed to set GPIO %u to output (%d %x)\n",
|
||||
+ off, ret, set_out.gpio);
|
||||
+ return ret ? ret : -EIO;
|
||||
+ }
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int rpi_exp_gpio_get_direction(struct gpio_chip *gc, unsigned int off)
|
||||
+{
|
||||
+ struct rpi_exp_gpio *gpio;
|
||||
+ struct gpio_get_config get;
|
||||
+ int ret;
|
||||
+
|
||||
+ gpio = gpiochip_get_data(gc);
|
||||
+
|
||||
+ get.gpio = off + RPI_EXP_GPIO_BASE; /* GPIO to update */
|
||||
+
|
||||
+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_GET_GPIO_CONFIG,
|
||||
+ &get, sizeof(get));
|
||||
+ if (ret || get.gpio != 0) {
|
||||
+ dev_err(gc->parent,
|
||||
+ "Failed to get GPIO %u config (%d %x)\n", off, ret,
|
||||
+ get.gpio);
|
||||
+ return ret ? ret : -EIO;
|
||||
+ }
|
||||
+ return !get.direction;
|
||||
+}
|
||||
+
|
||||
+static int rpi_exp_gpio_get(struct gpio_chip *gc, unsigned int off)
|
||||
+{
|
||||
+ struct rpi_exp_gpio *gpio;
|
||||
+ struct gpio_get_set_state get;
|
||||
+ int ret;
|
||||
+
|
||||
+ gpio = gpiochip_get_data(gc);
|
||||
+
|
||||
+ get.gpio = off + RPI_EXP_GPIO_BASE; /* GPIO to update */
|
||||
+ get.state = 0; /* storage for returned value */
|
||||
+
|
||||
+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_GET_GPIO_STATE,
|
||||
+ &get, sizeof(get));
|
||||
+ if (ret || get.gpio != 0) {
|
||||
+ dev_err(gc->parent,
|
||||
+ "Failed to get GPIO %u state (%d %x)\n", off, ret,
|
||||
+ get.gpio);
|
||||
+ return ret ? ret : -EIO;
|
||||
+ }
|
||||
+ return !!get.state;
|
||||
+}
|
||||
+
|
||||
+static void rpi_exp_gpio_set(struct gpio_chip *gc, unsigned int off, int val)
|
||||
+{
|
||||
+ struct rpi_exp_gpio *gpio;
|
||||
+ struct gpio_get_set_state set;
|
||||
+ int ret;
|
||||
+
|
||||
+ gpio = gpiochip_get_data(gc);
|
||||
+
|
||||
+ set.gpio = off + RPI_EXP_GPIO_BASE; /* GPIO to update */
|
||||
+ set.state = val; /* Output state */
|
||||
+
|
||||
+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_SET_GPIO_STATE,
|
||||
+ &set, sizeof(set));
|
||||
+ if (ret || set.gpio != 0)
|
||||
+ dev_err(gc->parent,
|
||||
+ "Failed to set GPIO %u state (%d %x)\n", off, ret,
|
||||
+ set.gpio);
|
||||
+}
|
||||
+
|
||||
+static int rpi_exp_gpio_probe(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct device *dev = &pdev->dev;
|
||||
+ struct device_node *np = dev->of_node;
|
||||
+ struct device_node *fw_node;
|
||||
+ struct rpi_firmware *fw;
|
||||
+ struct rpi_exp_gpio *rpi_gpio;
|
||||
+
|
||||
+ fw_node = of_get_parent(np);
|
||||
+ if (!fw_node) {
|
||||
+ dev_err(dev, "Missing firmware node\n");
|
||||
+ return -ENOENT;
|
||||
+ }
|
||||
+
|
||||
+ fw = rpi_firmware_get(fw_node);
|
||||
+ if (!fw)
|
||||
+ return -EPROBE_DEFER;
|
||||
+
|
||||
+ rpi_gpio = devm_kzalloc(dev, sizeof(*rpi_gpio), GFP_KERNEL);
|
||||
+ if (!rpi_gpio)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ rpi_gpio->fw = fw;
|
||||
+ rpi_gpio->gc.parent = dev;
|
||||
+ rpi_gpio->gc.label = MODULE_NAME;
|
||||
+ rpi_gpio->gc.owner = THIS_MODULE;
|
||||
+ rpi_gpio->gc.of_node = np;
|
||||
+ rpi_gpio->gc.base = -1;
|
||||
+ rpi_gpio->gc.ngpio = NUM_GPIO;
|
||||
+
|
||||
+ rpi_gpio->gc.direction_input = rpi_exp_gpio_dir_in;
|
||||
+ rpi_gpio->gc.direction_output = rpi_exp_gpio_dir_out;
|
||||
+ rpi_gpio->gc.get_direction = rpi_exp_gpio_get_direction;
|
||||
+ rpi_gpio->gc.get = rpi_exp_gpio_get;
|
||||
+ rpi_gpio->gc.set = rpi_exp_gpio_set;
|
||||
+ rpi_gpio->gc.can_sleep = true;
|
||||
+
|
||||
+ return devm_gpiochip_add_data(dev, &rpi_gpio->gc, rpi_gpio);
|
||||
+}
|
||||
+
|
||||
+static const struct of_device_id rpi_exp_gpio_ids[] = {
|
||||
+ { .compatible = "raspberrypi,firmware-gpio" },
|
||||
+ { }
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, rpi_exp_gpio_ids);
|
||||
+
|
||||
+static struct platform_driver rpi_exp_gpio_driver = {
|
||||
+ .driver = {
|
||||
+ .name = MODULE_NAME,
|
||||
+ .of_match_table = of_match_ptr(rpi_exp_gpio_ids),
|
||||
+ },
|
||||
+ .probe = rpi_exp_gpio_probe,
|
||||
+};
|
||||
+module_platform_driver(rpi_exp_gpio_driver);
|
||||
+
|
||||
+MODULE_LICENSE("GPL");
|
||||
+MODULE_AUTHOR("Dave Stevenson <dave.stevenson@raspberrypi.org>");
|
||||
+MODULE_DESCRIPTION("Raspberry Pi 3 expander GPIO driver");
|
||||
+MODULE_ALIAS("platform:rpi-exp-gpio");
|
||||
--
|
||||
cgit v1.1
|
||||
From b0c07c5af6d286f3d3b907743998e9d41f6ab042 Mon Sep 17 00:00:00 2001
|
||||
From: Baruch Siach <baruch@tkos.co.il>
|
||||
Date: Tue, 20 Feb 2018 14:19:34 +0200
|
||||
Subject: ARM: dts: bcm2835: make the firmware node into a bus
|
||||
|
||||
This allows adding devices for which the firmware exposes control interface
|
||||
via the mailbox. An example of such device is the GPIO expander.
|
||||
|
||||
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
|
||||
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
Signed-off-by: Eric Anholt <eric@anholt.net>
|
||||
---
|
||||
arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
|
||||
1 file changed, 3 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
||||
index e36c392..0198bd4 100644
|
||||
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
||||
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
||||
@@ -18,7 +18,9 @@
|
||||
|
||||
soc {
|
||||
firmware: firmware {
|
||||
- compatible = "raspberrypi,bcm2835-firmware";
|
||||
+ compatible = "raspberrypi,bcm2835-firmware", "simple-bus";
|
||||
+ #address-cells = <0>;
|
||||
+ #size-cells = <0>;
|
||||
mboxes = <&mailbox>;
|
||||
};
|
||||
|
||||
--
|
||||
cgit v1.1
|
||||
From 4d5b2eaf3ca80c56a59f230208c4ff11e3f68d55 Mon Sep 17 00:00:00 2001
|
||||
From: Baruch Siach <baruch@tkos.co.il>
|
||||
Date: Tue, 20 Feb 2018 14:19:35 +0200
|
||||
Subject: ARM: dts: bcm2837-rpi-3-b: add GPIO expander
|
||||
|
||||
Add a description of the RPi3 GPIO expander that the VC4 firmware controls.
|
||||
|
||||
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
|
||||
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
|
||||
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
Signed-off-by: Eric Anholt <eric@anholt.net>
|
||||
---
|
||||
arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 17 +++++++++++++++++
|
||||
1 file changed, 17 insertions(+)
|
||||
|
||||
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
|
||||
index 3e4ed7c..0b31d99 100644
|
||||
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
|
||||
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
|
||||
@@ -25,6 +25,23 @@
|
||||
};
|
||||
};
|
||||
|
||||
+&firmware {
|
||||
+ expgpio: gpio {
|
||||
+ compatible = "raspberrypi,firmware-gpio";
|
||||
+ gpio-controller;
|
||||
+ #gpio-cells = <2>;
|
||||
+ gpio-line-names = "BT_ON",
|
||||
+ "WL_ON",
|
||||
+ "STATUS_LED",
|
||||
+ "LAN_RUN",
|
||||
+ "HPD_N",
|
||||
+ "CAM_GPIO0",
|
||||
+ "CAM_GPIO1",
|
||||
+ "PWR_LOW_N";
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
/* uart0 communicates with the BT module */
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
--
|
||||
cgit v1.1
|
|
@ -1,338 +1,3 @@
|
|||
From b23d39c166ca3ed30a2a0a4c8ba4cf29677eed83 Mon Sep 17 00:00:00 2001
|
||||
From: Raghuram Chary J <raghuramchary.jallipalli@microchip.com>
|
||||
Date: Wed, 11 Apr 2018 20:36:36 +0530
|
||||
Subject: [PATCH 1/9] lan78xx: PHY DSP registers initialization to address EEE
|
||||
link drop issues with long cables
|
||||
|
||||
The patch is to configure DSP registers of PHY device
|
||||
to handle Gbe-EEE failures with >40m cable length.
|
||||
|
||||
Fixes: 55d7de9de6c3 ("Microchip's LAN7800 family USB 2/3 to 10/100/1000 Ethernet device driver")
|
||||
Signed-off-by: Raghuram Chary J <raghuramchary.jallipalli@microchip.com>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/phy/microchip.c | 178 ++++++++++++++++++++++++++++++++++-
|
||||
include/linux/microchipphy.h | 8 ++
|
||||
2 files changed, 185 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/net/phy/microchip.c b/drivers/net/phy/microchip.c
|
||||
index 0f293ef28935..a97ac8c12c4c 100644
|
||||
--- a/drivers/net/phy/microchip.c
|
||||
+++ b/drivers/net/phy/microchip.c
|
||||
@@ -20,6 +20,7 @@
|
||||
#include <linux/ethtool.h>
|
||||
#include <linux/phy.h>
|
||||
#include <linux/microchipphy.h>
|
||||
+#include <linux/delay.h>
|
||||
|
||||
#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
|
||||
#define DRIVER_DESC "Microchip LAN88XX PHY driver"
|
||||
@@ -30,6 +31,16 @@ struct lan88xx_priv {
|
||||
__u32 wolopts;
|
||||
};
|
||||
|
||||
+static int lan88xx_read_page(struct phy_device *phydev)
|
||||
+{
|
||||
+ return __phy_read(phydev, LAN88XX_EXT_PAGE_ACCESS);
|
||||
+}
|
||||
+
|
||||
+static int lan88xx_write_page(struct phy_device *phydev, int page)
|
||||
+{
|
||||
+ return __phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS, page);
|
||||
+}
|
||||
+
|
||||
static int lan88xx_phy_config_intr(struct phy_device *phydev)
|
||||
{
|
||||
int rc;
|
||||
@@ -66,6 +77,150 @@ static int lan88xx_suspend(struct phy_device *phydev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
+static int lan88xx_TR_reg_set(struct phy_device *phydev, u16 regaddr,
|
||||
+ u32 data)
|
||||
+{
|
||||
+ int val, save_page, ret = 0;
|
||||
+ u16 buf;
|
||||
+
|
||||
+ /* Save current page */
|
||||
+ save_page = phy_save_page(phydev);
|
||||
+ if (save_page < 0) {
|
||||
+ pr_warn("Failed to get current page\n");
|
||||
+ goto err;
|
||||
+ }
|
||||
+
|
||||
+ /* Switch to TR page */
|
||||
+ lan88xx_write_page(phydev, LAN88XX_EXT_PAGE_ACCESS_TR);
|
||||
+
|
||||
+ ret = __phy_write(phydev, LAN88XX_EXT_PAGE_TR_LOW_DATA,
|
||||
+ (data & 0xFFFF));
|
||||
+ if (ret < 0) {
|
||||
+ pr_warn("Failed to write TR low data\n");
|
||||
+ goto err;
|
||||
+ }
|
||||
+
|
||||
+ ret = __phy_write(phydev, LAN88XX_EXT_PAGE_TR_HIGH_DATA,
|
||||
+ (data & 0x00FF0000) >> 16);
|
||||
+ if (ret < 0) {
|
||||
+ pr_warn("Failed to write TR high data\n");
|
||||
+ goto err;
|
||||
+ }
|
||||
+
|
||||
+ /* Config control bits [15:13] of register */
|
||||
+ buf = (regaddr & ~(0x3 << 13));/* Clr [14:13] to write data in reg */
|
||||
+ buf |= 0x8000; /* Set [15] to Packet transmit */
|
||||
+
|
||||
+ ret = __phy_write(phydev, LAN88XX_EXT_PAGE_TR_CR, buf);
|
||||
+ if (ret < 0) {
|
||||
+ pr_warn("Failed to write data in reg\n");
|
||||
+ goto err;
|
||||
+ }
|
||||
+
|
||||
+ usleep_range(1000, 2000);/* Wait for Data to be written */
|
||||
+ val = __phy_read(phydev, LAN88XX_EXT_PAGE_TR_CR);
|
||||
+ if (!(val & 0x8000))
|
||||
+ pr_warn("TR Register[0x%X] configuration failed\n", regaddr);
|
||||
+err:
|
||||
+ return phy_restore_page(phydev, save_page, ret);
|
||||
+}
|
||||
+
|
||||
+static void lan88xx_config_TR_regs(struct phy_device *phydev)
|
||||
+{
|
||||
+ int err;
|
||||
+
|
||||
+ /* Get access to Channel 0x1, Node 0xF , Register 0x01.
|
||||
+ * Write 24-bit value 0x12B00A to register. Setting MrvlTrFix1000Kf,
|
||||
+ * MrvlTrFix1000Kp, MasterEnableTR bits.
|
||||
+ */
|
||||
+ err = lan88xx_TR_reg_set(phydev, 0x0F82, 0x12B00A);
|
||||
+ if (err < 0)
|
||||
+ pr_warn("Failed to Set Register[0x0F82]\n");
|
||||
+
|
||||
+ /* Get access to Channel b'10, Node b'1101, Register 0x06.
|
||||
+ * Write 24-bit value 0xD2C46F to register. Setting SSTrKf1000Slv,
|
||||
+ * SSTrKp1000Mas bits.
|
||||
+ */
|
||||
+ err = lan88xx_TR_reg_set(phydev, 0x168C, 0xD2C46F);
|
||||
+ if (err < 0)
|
||||
+ pr_warn("Failed to Set Register[0x168C]\n");
|
||||
+
|
||||
+ /* Get access to Channel b'10, Node b'1111, Register 0x11.
|
||||
+ * Write 24-bit value 0x620 to register. Setting rem_upd_done_thresh
|
||||
+ * bits
|
||||
+ */
|
||||
+ err = lan88xx_TR_reg_set(phydev, 0x17A2, 0x620);
|
||||
+ if (err < 0)
|
||||
+ pr_warn("Failed to Set Register[0x17A2]\n");
|
||||
+
|
||||
+ /* Get access to Channel b'10, Node b'1101, Register 0x10.
|
||||
+ * Write 24-bit value 0xEEFFDD to register. Setting
|
||||
+ * eee_TrKp1Long_1000, eee_TrKp2Long_1000, eee_TrKp3Long_1000,
|
||||
+ * eee_TrKp1Short_1000,eee_TrKp2Short_1000, eee_TrKp3Short_1000 bits.
|
||||
+ */
|
||||
+ err = lan88xx_TR_reg_set(phydev, 0x16A0, 0xEEFFDD);
|
||||
+ if (err < 0)
|
||||
+ pr_warn("Failed to Set Register[0x16A0]\n");
|
||||
+
|
||||
+ /* Get access to Channel b'10, Node b'1101, Register 0x13.
|
||||
+ * Write 24-bit value 0x071448 to register. Setting
|
||||
+ * slv_lpi_tr_tmr_val1, slv_lpi_tr_tmr_val2 bits.
|
||||
+ */
|
||||
+ err = lan88xx_TR_reg_set(phydev, 0x16A6, 0x071448);
|
||||
+ if (err < 0)
|
||||
+ pr_warn("Failed to Set Register[0x16A6]\n");
|
||||
+
|
||||
+ /* Get access to Channel b'10, Node b'1101, Register 0x12.
|
||||
+ * Write 24-bit value 0x13132F to register. Setting
|
||||
+ * slv_sigdet_timer_val1, slv_sigdet_timer_val2 bits.
|
||||
+ */
|
||||
+ err = lan88xx_TR_reg_set(phydev, 0x16A4, 0x13132F);
|
||||
+ if (err < 0)
|
||||
+ pr_warn("Failed to Set Register[0x16A4]\n");
|
||||
+
|
||||
+ /* Get access to Channel b'10, Node b'1101, Register 0x14.
|
||||
+ * Write 24-bit value 0x0 to register. Setting eee_3level_delay,
|
||||
+ * eee_TrKf_freeze_delay bits.
|
||||
+ */
|
||||
+ err = lan88xx_TR_reg_set(phydev, 0x16A8, 0x0);
|
||||
+ if (err < 0)
|
||||
+ pr_warn("Failed to Set Register[0x16A8]\n");
|
||||
+
|
||||
+ /* Get access to Channel b'01, Node b'1111, Register 0x34.
|
||||
+ * Write 24-bit value 0x91B06C to register. Setting
|
||||
+ * FastMseSearchThreshLong1000, FastMseSearchThreshShort1000,
|
||||
+ * FastMseSearchUpdGain1000 bits.
|
||||
+ */
|
||||
+ err = lan88xx_TR_reg_set(phydev, 0x0FE8, 0x91B06C);
|
||||
+ if (err < 0)
|
||||
+ pr_warn("Failed to Set Register[0x0FE8]\n");
|
||||
+
|
||||
+ /* Get access to Channel b'01, Node b'1111, Register 0x3E.
|
||||
+ * Write 24-bit value 0xC0A028 to register. Setting
|
||||
+ * FastMseKp2ThreshLong1000, FastMseKp2ThreshShort1000,
|
||||
+ * FastMseKp2UpdGain1000, FastMseKp2ExitEn1000 bits.
|
||||
+ */
|
||||
+ err = lan88xx_TR_reg_set(phydev, 0x0FFC, 0xC0A028);
|
||||
+ if (err < 0)
|
||||
+ pr_warn("Failed to Set Register[0x0FFC]\n");
|
||||
+
|
||||
+ /* Get access to Channel b'01, Node b'1111, Register 0x35.
|
||||
+ * Write 24-bit value 0x041600 to register. Setting
|
||||
+ * FastMseSearchPhShNum1000, FastMseSearchClksPerPh1000,
|
||||
+ * FastMsePhChangeDelay1000 bits.
|
||||
+ */
|
||||
+ err = lan88xx_TR_reg_set(phydev, 0x0FEA, 0x041600);
|
||||
+ if (err < 0)
|
||||
+ pr_warn("Failed to Set Register[0x0FEA]\n");
|
||||
+
|
||||
+ /* Get access to Channel b'10, Node b'1101, Register 0x03.
|
||||
+ * Write 24-bit value 0x000004 to register. Setting TrFreeze bits.
|
||||
+ */
|
||||
+ err = lan88xx_TR_reg_set(phydev, 0x1686, 0x000004);
|
||||
+ if (err < 0)
|
||||
+ pr_warn("Failed to Set Register[0x1686]\n");
|
||||
+}
|
||||
+
|
||||
static int lan88xx_probe(struct phy_device *phydev)
|
||||
{
|
||||
struct device *dev = &phydev->mdio.dev;
|
||||
@@ -132,6 +287,25 @@ static void lan88xx_set_mdix(struct phy_device *phydev)
|
||||
phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS, LAN88XX_EXT_PAGE_SPACE_0);
|
||||
}
|
||||
|
||||
+static int lan88xx_config_init(struct phy_device *phydev)
|
||||
+{
|
||||
+ int val;
|
||||
+
|
||||
+ genphy_config_init(phydev);
|
||||
+ /*Zerodetect delay enable */
|
||||
+ val = phy_read_mmd(phydev, MDIO_MMD_PCS,
|
||||
+ PHY_ARDENNES_MMD_DEV_3_PHY_CFG);
|
||||
+ val |= PHY_ARDENNES_MMD_DEV_3_PHY_CFG_ZD_DLY_EN_;
|
||||
+
|
||||
+ phy_write_mmd(phydev, MDIO_MMD_PCS, PHY_ARDENNES_MMD_DEV_3_PHY_CFG,
|
||||
+ val);
|
||||
+
|
||||
+ /* Config DSP registers */
|
||||
+ lan88xx_config_TR_regs(phydev);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
static int lan88xx_config_aneg(struct phy_device *phydev)
|
||||
{
|
||||
lan88xx_set_mdix(phydev);
|
||||
@@ -151,7 +325,7 @@ static struct phy_driver microchip_phy_driver[] = {
|
||||
.probe = lan88xx_probe,
|
||||
.remove = lan88xx_remove,
|
||||
|
||||
- .config_init = genphy_config_init,
|
||||
+ .config_init = lan88xx_config_init,
|
||||
.config_aneg = lan88xx_config_aneg,
|
||||
|
||||
.ack_interrupt = lan88xx_phy_ack_interrupt,
|
||||
@@ -160,6 +334,8 @@ static struct phy_driver microchip_phy_driver[] = {
|
||||
.suspend = lan88xx_suspend,
|
||||
.resume = genphy_resume,
|
||||
.set_wol = lan88xx_set_wol,
|
||||
+ .read_page = lan88xx_read_page,
|
||||
+ .write_page = lan88xx_write_page,
|
||||
} };
|
||||
|
||||
module_phy_driver(microchip_phy_driver);
|
||||
diff --git a/include/linux/microchipphy.h b/include/linux/microchipphy.h
|
||||
index eb492d47f717..8f9c90379732 100644
|
||||
--- a/include/linux/microchipphy.h
|
||||
+++ b/include/linux/microchipphy.h
|
||||
@@ -70,4 +70,12 @@
|
||||
#define LAN88XX_MMD3_CHIP_ID (32877)
|
||||
#define LAN88XX_MMD3_CHIP_REV (32878)
|
||||
|
||||
+/* DSP registers */
|
||||
+#define PHY_ARDENNES_MMD_DEV_3_PHY_CFG (0x806A)
|
||||
+#define PHY_ARDENNES_MMD_DEV_3_PHY_CFG_ZD_DLY_EN_ (0x2000)
|
||||
+#define LAN88XX_EXT_PAGE_ACCESS_TR (0x52B5)
|
||||
+#define LAN88XX_EXT_PAGE_TR_CR 16
|
||||
+#define LAN88XX_EXT_PAGE_TR_LOW_DATA 17
|
||||
+#define LAN88XX_EXT_PAGE_TR_HIGH_DATA 18
|
||||
+
|
||||
#endif /* _MICROCHIPPHY_H */
|
||||
--
|
||||
2.17.0
|
||||
|
||||
From 502356f8db439d77a41958041feec187c42f72bb Mon Sep 17 00:00:00 2001
|
||||
From: Phil Elwell <phil@raspberrypi.org>
|
||||
Date: Wed, 11 Apr 2018 12:02:47 +0100
|
||||
Subject: [PATCH 3/9] lan78xx: Avoid spurious kevent 4 "error"
|
||||
|
||||
lan78xx_defer_event generates an error message whenever the work item
|
||||
is already scheduled. lan78xx_open defers three events -
|
||||
EVENT_STAT_UPDATE, EVENT_DEV_OPEN and EVENT_LINK_RESET. Being aware
|
||||
of the likelihood (or certainty) of an error message, the DEV_OPEN
|
||||
event is added to the set of pending events directly, relying on
|
||||
the subsequent deferral of the EVENT_LINK_RESET call to schedule the
|
||||
work. Take the same precaution with EVENT_STAT_UPDATE to avoid a
|
||||
totally unnecessary error message.
|
||||
|
||||
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/usb/lan78xx.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/drivers/net/usb/lan78xx.c b/drivers/net/usb/lan78xx.c
|
||||
index 145bb7cbf5b2..bdb696612e11 100644
|
||||
--- a/drivers/net/usb/lan78xx.c
|
||||
+++ b/drivers/net/usb/lan78xx.c
|
||||
@@ -2503,7 +2503,7 @@ static void lan78xx_init_stats(struct lan78xx_net *dev)
|
||||
dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF;
|
||||
dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF;
|
||||
|
||||
- lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
|
||||
+ set_bit(EVENT_STAT_UPDATE, &dev->flags);
|
||||
}
|
||||
|
||||
static int lan78xx_open(struct net_device *net)
|
||||
--
|
||||
2.17.0
|
||||
|
||||
From d9332c56373a8c43bc4761267ba3a246082e2270 Mon Sep 17 00:00:00 2001
|
||||
From: Phil Elwell <phil@raspberrypi.org>
|
||||
Date: Tue, 10 Apr 2018 13:18:25 +0100
|
||||
Subject: [PATCH 4/9] lan78xx: Don't reset the interface on open
|
||||
|
||||
Commit 92571a1aae40 ("lan78xx: Connect phy early") moves the PHY
|
||||
initialisation into lan78xx_probe, but lan78xx_open subsequently calls
|
||||
lan78xx_reset. As well as forcing a second round of link negotiation,
|
||||
this reset frequently prevents the phy interrupt from being generated
|
||||
(even though the link is up), rendering the interface unusable.
|
||||
|
||||
Fix this issue by removing the lan78xx_reset call from lan78xx_open.
|
||||
|
||||
Fixes: 92571a1aae40 ("lan78xx: Connect phy early")
|
||||
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/usb/lan78xx.c | 4 ----
|
||||
1 file changed, 4 deletions(-)
|
||||
|
||||
diff --git a/drivers/net/usb/lan78xx.c b/drivers/net/usb/lan78xx.c
|
||||
index bdb696612e11..0867f7275852 100644
|
||||
--- a/drivers/net/usb/lan78xx.c
|
||||
+++ b/drivers/net/usb/lan78xx.c
|
||||
@@ -2515,10 +2515,6 @@ static int lan78xx_open(struct net_device *net)
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
- ret = lan78xx_reset(dev);
|
||||
- if (ret < 0)
|
||||
- goto done;
|
||||
-
|
||||
phy_start(net->phydev);
|
||||
|
||||
netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
|
||||
--
|
||||
2.17.0
|
||||
|
||||
From bce4fe9fa48df0cbbe842e80d9a520f7265b4cd4 Mon Sep 17 00:00:00 2001
|
||||
From: Dave Stevenson <dave.stevenson@raspberrypi.org>
|
||||
Date: Wed, 4 Apr 2018 16:34:24 +0100
|
||||
|
@ -785,4 +450,3 @@ index 8f9c90379732..fd1fc8c248ef 100644
|
|||
#endif /* _MICROCHIPPHY_H */
|
||||
--
|
||||
2.17.0
|
||||
|
||||
|
|
|
@ -1,74 +0,0 @@
|
|||
From patchwork Fri Feb 16 10:55:33 2018
|
||||
Content-Type: text/plain; charset="utf-8"
|
||||
MIME-Version: 1.0
|
||||
Content-Transfer-Encoding: 7bit
|
||||
Subject: [V3, 1/2,
|
||||
RESEND] dt-bindings: bcm283x: Fix register ranges of bcm2835-i2s
|
||||
From: Stefan Wahren <stefan.wahren@i2se.com>
|
||||
X-Patchwork-Id: 10224429
|
||||
Message-Id: <1518778534-3328-2-git-send-email-stefan.wahren@i2se.com>
|
||||
To: Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>,
|
||||
Eric Anholt <eric@anholt.net>
|
||||
Cc: Stefan Wahren <stefan.wahren@i2se.com>, devicetree@vger.kernel.org,
|
||||
alsa-devel@alsa-project.org, Liam Girdwood <lgirdwood@gmail.com>,
|
||||
Mark Brown <broonie@kernel.org>, linux-rpi-kernel@lists.infradead.org,
|
||||
linux-arm-kernel@lists.infradead.org
|
||||
Date: Fri, 16 Feb 2018 11:55:33 +0100
|
||||
|
||||
Since 517e7a1537a ("ASoC: bcm2835: move to use the clock framework")
|
||||
the bcm2835-i2s requires a clock as DT property. Unfortunately
|
||||
the necessary DT change has never been applied. While we are at it
|
||||
also fix the first PCM register range to cover the PCM_GRAY register.
|
||||
|
||||
This patch only fixes the affected dt-bindings.
|
||||
|
||||
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
|
||||
Reviewed-by: Eric Anholt <eric@anholt.net>
|
||||
Reviewed-by: Rob Herring <robh@kernel.org>
|
||||
---
|
||||
Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt | 4 ++--
|
||||
Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt | 9 ++++-----
|
||||
2 files changed, 6 insertions(+), 7 deletions(-)
|
||||
|
||||
diff --git a/Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt b/Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt
|
||||
index baf9b34..b6a8cc0 100644
|
||||
--- a/Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt
|
||||
+++ b/Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt
|
||||
@@ -74,8 +74,8 @@ Example:
|
||||
|
||||
bcm2835_i2s: i2s@7e203000 {
|
||||
compatible = "brcm,bcm2835-i2s";
|
||||
- reg = < 0x7e203000 0x20>,
|
||||
- < 0x7e101098 0x02>;
|
||||
+ reg = < 0x7e203000 0x24>;
|
||||
+ clocks = <&clocks BCM2835_CLOCK_PCM>;
|
||||
|
||||
dmas = <&dma 2>,
|
||||
<&dma 3>;
|
||||
diff --git a/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt b/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt
|
||||
index 65783de..7bb0362 100644
|
||||
--- a/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt
|
||||
+++ b/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt
|
||||
@@ -2,9 +2,8 @@
|
||||
|
||||
Required properties:
|
||||
- compatible: "brcm,bcm2835-i2s"
|
||||
-- reg: A list of base address and size entries:
|
||||
- * The first entry should cover the PCM registers
|
||||
- * The second entry should cover the PCM clock registers
|
||||
+- reg: Should contain PCM registers location and length.
|
||||
+- clocks: the (PCM) clock to use
|
||||
- dmas: List of DMA controller phandle and DMA request line ordered pairs.
|
||||
- dma-names: Identifier string for each DMA request line in the dmas property.
|
||||
These strings correspond 1:1 with the ordered pairs in dmas.
|
||||
@@ -16,8 +15,8 @@ Example:
|
||||
|
||||
bcm2835_i2s: i2s@7e203000 {
|
||||
compatible = "brcm,bcm2835-i2s";
|
||||
- reg = <0x7e203000 0x20>,
|
||||
- <0x7e101098 0x02>;
|
||||
+ reg = <0x7e203000 0x24>;
|
||||
+ clocks = <&clocks BCM2835_CLOCK_PCM>;
|
||||
|
||||
dmas = <&dma 2>,
|
||||
<&dma 3>;
|
|
@ -0,0 +1 @@
|
|||
CONFIG_ARM_PTDUMP=y
|
|
@ -0,0 +1 @@
|
|||
CONFIG_ARM_PTDUMP_DEBUGFS=y
|
|
@ -0,0 +1 @@
|
|||
CONFIG_DEBUG_RWSEMS=y
|
|
@ -0,0 +1 @@
|
|||
CONFIG_DEBUG_WW_MUTEX_SLOWPATH=y
|
|
@ -0,0 +1 @@
|
|||
CONFIG_XFS_WARN=y
|
|
@ -0,0 +1 @@
|
|||
CONFIG_ACPI_TAD=m
|
|
@ -0,0 +1 @@
|
|||
CONFIG_AD5272=m
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_DAVINCI is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_DOVE is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_EBSA110 is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_EP93XX is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_IOP13XX is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_IOP32X is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_IOP33X is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_IXP4XX is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_KS8695 is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_LPC32XX is not set
|
|
@ -0,0 +1 @@
|
|||
CONFIG_ARCH_MULTIPLATFORM=y
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_NETX is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_OMAP1 is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_PXA is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_RPC is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_S3C24XX is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_SA1100 is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_TEGRA_194_SOC is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_ARCH_W90X900 is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_B43_BUSES_BCMA is not set
|
|
@ -0,0 +1 @@
|
|||
CONFIG_B43_BUSES_BCMA_AND_SSB=y
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_B43_BUSES_SSB is not set
|
|
@ -0,0 +1 @@
|
|||
CONFIG_BRANCH_PROFILE_NONE=y
|
|
@ -0,0 +1 @@
|
|||
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CC_STACKPROTECTOR_AUTO is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CC_STACKPROTECTOR_NONE is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CC_STACKPROTECTOR_STRONG is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CEC_PIN_ERROR_INJ is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CELL_CPU is not set
|
|
@ -0,0 +1 @@
|
|||
CONFIG_COMMON_CLK_SI544=m
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CPU_BIG_ENDIAN is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CRC32_BIT is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CRC32_SARWATE is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_CRC32_SLICEBY4 is not set
|
|
@ -0,0 +1 @@
|
|||
CONFIG_CRC32_SLICEBY8=y
|
|
@ -1 +1 @@
|
|||
CONFIG_CRYPTO_842=m
|
||||
CONFIG_CRYPTO_842=y
|
||||
|
|
|
@ -0,0 +1 @@
|
|||
CONFIG_CRYPTO_CFB=m
|
|
@ -1 +1 @@
|
|||
CONFIG_CRYPTO_DEFLATE=m
|
||||
CONFIG_CRYPTO_DEFLATE=y
|
||||
|
|
|
@ -0,0 +1 @@
|
|||
CONFIG_CRYPTO_DEV_CHELSIO_TLS=m
|
|
@ -0,0 +1 @@
|
|||
CONFIG_CRYPTO_SM4=m
|
|
@ -0,0 +1 @@
|
|||
CONFIG_CRYPTO_SPECK=m
|
|
@ -0,0 +1 @@
|
|||
CONFIG_CXD2880_SPI_DRV=m
|
|
@ -0,0 +1 @@
|
|||
CONFIG_DAX=y
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_DEBUG_RWSEMS is not set
|
|
@ -0,0 +1 @@
|
|||
CONFIG_DEFAULT_CUBIC=y
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_DEFAULT_DEADLINE is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_DEFAULT_NOOP is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_DEFAULT_RENO is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_DEFAULT_SECURITY_DAC is not set
|
|
@ -0,0 +1 @@
|
|||
CONFIG_DEFAULT_SECURITY_SELINUX=y
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_DRM_RCAR_LVDS is not set
|
|
@ -1 +1 @@
|
|||
# CONFIG_DVB_CXD2099 is not set
|
||||
CONFIG_DVB_CXD2099=m
|
||||
|
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_DW_AXI_DMAC is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_EXPOLINE_AUTO is not set
|
|
@ -0,0 +1 @@
|
|||
CONFIG_EXPOLINE_FULL=y
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_EXPOLINE_OFF is not set
|
|
@ -0,0 +1 @@
|
|||
CONFIG_FLATMEM_MANUAL=y
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_GENERIC_CPU is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_GPIO_HLWD is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_GPIO_WINBOND is not set
|
|
@ -0,0 +1 @@
|
|||
CONFIG_HID_ELAN=m
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_HID_GOOGLE_HAMMER is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_HZ_100 is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_HZ_200 is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_HZ_250 is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_HZ_300 is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_HZ_500 is not set
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_HZ_PERIODIC is not set
|
|
@ -0,0 +1 @@
|
|||
CONFIG_ICE=m
|
|
@ -0,0 +1 @@
|
|||
CONFIG_IEEE802154_MCR20A=m
|
|
@ -1 +1 @@
|
|||
# CONFIG_IMA is not set
|
||||
CONFIG_IMA=y
|
||||
|
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_IMA_APPRAISE is not set
|
|
@ -0,0 +1 @@
|
|||
CONFIG_IMA_APPRAISE_BOOTPARAM=y
|
|
@ -0,0 +1 @@
|
|||
# CONFIG_IMA_BLACKLIST_KEYRING is not set
|
|
@ -0,0 +1 @@
|
|||
CONFIG_IMA_DEFAULT_HASH_SHA1=y
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue