diff --git a/kernel-riscv64-debug-fedora.config b/kernel-riscv64-debug-fedora.config index ca2288d79..1267aae79 100644 --- a/kernel-riscv64-debug-fedora.config +++ b/kernel-riscv64-debug-fedora.config @@ -2898,7 +2898,7 @@ CONFIG_IR_NEC_DECODER=m CONFIG_IR_NUVOTON=m CONFIG_IR_PWM_TX=m # CONFIG_IRQSOFF_TRACER is not set -# CONFIG_IRQ_STACKS is not set +CONFIG_IRQ_STACKS=y CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_IR_RC5_DECODER=m CONFIG_IR_RC6_DECODER=m diff --git a/kernel-riscv64-fedora.config b/kernel-riscv64-fedora.config index 1c59e4bdb..8dd0add54 100644 --- a/kernel-riscv64-fedora.config +++ b/kernel-riscv64-fedora.config @@ -2878,7 +2878,7 @@ CONFIG_IR_NEC_DECODER=m CONFIG_IR_NUVOTON=m CONFIG_IR_PWM_TX=m # CONFIG_IRQSOFF_TRACER is not set -# CONFIG_IRQ_STACKS is not set +CONFIG_IRQ_STACKS=y CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_IR_RC5_DECODER=m CONFIG_IR_RC6_DECODER=m diff --git a/kernel.spec b/kernel.spec index c3db2d6f1..905f331b8 100644 --- a/kernel.spec +++ b/kernel.spec @@ -180,7 +180,7 @@ Summary: The Linux kernel # This is needed to do merge window version magic %define patchlevel 5 # This allows pkg_release to have configurable %%{?dist} tag -%define specrelease 0.rc4.30%{?buildid}.5.riscv64%{?dist} +%define specrelease 0.rc4.30%{?buildid}.6.riscv64%{?dist} # This defines the kabi tarball version %define kabiversion 6.5.0 diff --git a/linux-kernel-test.patch b/linux-kernel-test.patch index db239f73d..c27c73ecc 100644 --- a/linux-kernel-test.patch +++ b/linux-kernel-test.patch @@ -1,163 +1,38 @@ -diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c -index a2fc952318e9..35b854cf078e 100644 ---- a/arch/riscv/kernel/cpu.c -+++ b/arch/riscv/kernel/cpu.c -@@ -17,6 +17,11 @@ - #include - #include +commit e79633f74b1ef25ddcdc3b0f54335edc799025fa (HEAD) +Author: Alexandre Ghiti +Date: Mon Aug 7 10:15:42 2023 +0000 + + riscv: Do not allow vmap pud mappings for 3-level page table + + The vmalloc_fault() path was removed and to avoid syncing the vmalloc PGD + mappings, they are now preallocated. But if the kernel can use a PUD mapping + (which in sv39 is actually a PGD mapping) for large vmalloc allocation, it + will free the current unused preallocated PGD mapping and install a new leaf + one. Since there is no sync anymore, some page tables lack this new mapping + and that triggers a panic. + + So only allow PUD mappings for sv48 and sv57. + + Fixes: 7d3332be011e ("riscv: mm: Pre-allocate PGD entries for vmalloc/modules area") + Signed-off-by: Alexandre Ghiti + +diff --git a/arch/riscv/include/asm/vmalloc.h b/arch/riscv/include/asm/vmalloc.h +index 58d3e447f191..924d01b56c9a 100644 +--- a/arch/riscv/include/asm/vmalloc.h ++++ b/arch/riscv/include/asm/vmalloc.h +@@ -3,12 +3,14 @@ -+bool arch_match_cpu_phys_id(int cpu, u64 phys_id) -+{ -+ return phys_id == cpuid_to_hartid_map(cpu); -+} + #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP + ++extern bool pgtable_l4_enabled, pgtable_l5_enabled; + - /* - * Returns the hart ID of the given device tree node, or -ENODEV if the node - * isn't an enabled and valid RISC-V hart node. -diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c -index 85bbce0f758c..40420afbb1a0 100644 ---- a/arch/riscv/kernel/smp.c -+++ b/arch/riscv/kernel/smp.c -@@ -61,11 +61,6 @@ int riscv_hartid_to_cpuid(unsigned long hartid) - return -ENOENT; - } + #define IOREMAP_MAX_ORDER (PUD_SHIFT) --bool arch_match_cpu_phys_id(int cpu, u64 phys_id) --{ -- return phys_id == cpuid_to_hartid_map(cpu); --} -- - static void ipi_stop(void) + #define arch_vmap_pud_supported arch_vmap_pud_supported + static inline bool arch_vmap_pud_supported(pgprot_t prot) { - set_cpu_online(smp_processor_id(), false); -diff --git a/arch/riscv/include/asm/irqflags.h b/arch/riscv/include/asm/irqflags.h -index 08d4d6a5b7e9..7c31fc3c3559 100644 ---- a/arch/riscv/include/asm/irqflags.h -+++ b/arch/riscv/include/asm/irqflags.h -@@ -49,7 +49,10 @@ static inline int arch_irqs_disabled(void) - /* set interrupt enabled status */ - static inline void arch_local_irq_restore(unsigned long flags) - { -- csr_set(CSR_STATUS, flags & SR_IE); -+ if (flags & SR_IE) -+ csr_set(CSR_STATUS, SR_IE); -+ else -+ csr_clear(CSR_STATUS, SR_IE); +- return true; ++ return pgtable_l4_enabled || pgtable_l5_enabled; } - #endif /* _ASM_RISCV_IRQFLAGS_H */ -diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c -index f910dfccbf5d..927347a19847 100644 ---- a/arch/riscv/kernel/traps.c -+++ b/arch/riscv/kernel/traps.c -@@ -372,6 +372,9 @@ asmlinkage void noinstr do_irq(struct pt_regs *regs) - : [sp] "r" (sp), [regs] "r" (regs) - : "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", - "t0", "t1", "t2", "t3", "t4", "t5", "t6", -+#ifndef CONFIG_FRAME_POINTER -+ "s0", -+#endif - "memory"); - } else - #endif -diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c -index d0577cc6a081..a8efa053c4a5 100644 ---- a/arch/riscv/kernel/irq.c -+++ b/arch/riscv/kernel/irq.c -@@ -84,6 +84,9 @@ void do_softirq_own_stack(void) - : [sp] "r" (sp) - : "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", - "t0", "t1", "t2", "t3", "t4", "t5", "t6", -+#ifndef CONFIG_FRAME_POINTER -+ "s0", -+#endif - "memory"); - } else - #endif -diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h -index 8091b8bf4883..b93ffddf8a61 100644 ---- a/arch/riscv/include/asm/cacheflush.h -+++ b/arch/riscv/include/asm/cacheflush.h -@@ -37,6 +37,10 @@ static inline void flush_dcache_page(struct page *page) - #define flush_icache_user_page(vma, pg, addr, len) \ - flush_icache_mm(vma->vm_mm, 0) - -+#ifdef CONFIG_64BIT -+#define flush_cache_vmap(start, end) flush_tlb_kernel_range(start, end) -+#endif -+ - #ifndef CONFIG_SMP - - #define flush_icache_all() local_flush_icache_all() -diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c -index e1484905b7bd..c2673fdad8e5 100644 ---- a/drivers/irqchip/irq-sifive-plic.c -+++ b/drivers/irqchip/irq-sifive-plic.c -@@ -120,12 +120,14 @@ static inline void plic_irq_toggle(const struct cpumask *mask, - } - } - --static void plic_irq_enable(struct irq_data *d) -+static unsigned int plic_irq_startup(struct irq_data *d) - { - plic_irq_toggle(irq_data_get_effective_affinity_mask(d), d, 1); -+ -+ return 0; - } - --static void plic_irq_disable(struct irq_data *d) -+static void plic_irq_shutdown(struct irq_data *d) - { - plic_irq_toggle(irq_data_get_effective_affinity_mask(d), d, 0); - } -@@ -169,12 +171,12 @@ static int plic_set_affinity(struct irq_data *d, - if (cpu >= nr_cpu_ids) - return -EINVAL; - -- plic_irq_disable(d); -+ plic_irq_shutdown(d); - - irq_data_update_effective_affinity(d, cpumask_of(cpu)); - -- if (!irqd_irq_disabled(d)) -- plic_irq_enable(d); -+ if (irqd_is_started(d)) -+ plic_irq_startup(d); - - return IRQ_SET_MASK_OK_DONE; - } -@@ -182,8 +184,8 @@ static int plic_set_affinity(struct irq_data *d, - - static struct irq_chip plic_edge_chip = { - .name = "SiFive PLIC", -- .irq_enable = plic_irq_enable, -- .irq_disable = plic_irq_disable, -+ .irq_startup = plic_irq_startup, -+ .irq_shutdown = plic_irq_shutdown, - .irq_ack = plic_irq_eoi, - .irq_mask = plic_irq_mask, - .irq_unmask = plic_irq_unmask, -@@ -197,8 +199,8 @@ static struct irq_chip plic_edge_chip = { - - static struct irq_chip plic_chip = { - .name = "SiFive PLIC", -- .irq_enable = plic_irq_enable, -- .irq_disable = plic_irq_disable, -+ .irq_startup = plic_irq_startup, -+ .irq_shutdown = plic_irq_shutdown, - .irq_mask = plic_irq_mask, - .irq_unmask = plic_irq_unmask, - .irq_eoi = plic_irq_eoi, -diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig -index 4c07b9189..7dba17e40 100644 ---- a/arch/riscv/Kconfig -+++ b/arch/riscv/Kconfig -@@ -600,7 +600,7 @@ config FPU - - config IRQ_STACKS - bool "Independent irq & softirq stacks" if EXPERT -- default y -+ default n - select HAVE_IRQ_EXIT_ON_IRQ_STACK - select HAVE_SOFTIRQ_ON_OWN_STACK - help + #define arch_vmap_pmd_supported arch_vmap_pmd_supported